From: "Das, Nirmoy" <nirmoy.das@linux.intel.com>
To: Tejas Upadhyay <tejas.upadhyay@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Matt Roper <matthew.d.roper@intel.com>
Subject: Re: [Intel-gfx] [PATCH] drm/i915/mtl: Add workaround 14018778641
Date: Thu, 20 Apr 2023 13:45:56 +0200 [thread overview]
Message-ID: <b229cb73-5d65-f216-9b9f-4ba04edef419@linux.intel.com> (raw)
In-Reply-To: <20230420112123.3486469-1-tejas.upadhyay@intel.com>
On 4/20/2023 1:21 PM, Tejas Upadhyay wrote:
> WA 18018781329 is applicable now across all MTL
> steppings.
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
Acked-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++-------
> 1 file changed, 13 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 312eb8b5f949..c73d2b5410d8 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1695,17 +1695,22 @@ pvc_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> static void
> xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> {
> - if (IS_MTL_GRAPHICS_STEP(gt->i915, M, STEP_A0, STEP_B0) ||
> - IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0)) {
> - /* Wa_14014830051 */
> - wa_mcr_write_clr(wal, SARB_CHICKEN1, COMP_CKN_IN);
> + /* Wa_14018778641: MTL */
> + if (IS_METEORLAKE(gt->i915)) {
>
> /* Wa_18018781329 */
> wa_mcr_write_or(wal, RENDER_MOD_CTRL, FORCE_MISS_FTLB);
> wa_mcr_write_or(wal, COMP_MOD_CTRL, FORCE_MISS_FTLB);
>
> - /* Wa_14015795083 */
> - wa_write_clr(wal, GEN7_MISCCPCTL, GEN12_DOP_CLOCK_GATE_RENDER_ENABLE);
> + if (IS_MTL_GRAPHICS_STEP(gt->i915, M, STEP_A0, STEP_B0) ||
> + IS_MTL_GRAPHICS_STEP(gt->i915, P, STEP_A0, STEP_B0)) {
> + /* Wa_14014830051 */
> + wa_mcr_write_clr(wal, SARB_CHICKEN1, COMP_CKN_IN);
> +
> + /* Wa_14015795083 */
> + wa_write_clr(wal, GEN7_MISCCPCTL,
> + GEN12_DOP_CLOCK_GATE_RENDER_ENABLE);
> + }
> }
>
> /*
> @@ -1718,7 +1723,8 @@ xelpg_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> static void
> xelpmp_gt_workarounds_init(struct intel_gt *gt, struct i915_wa_list *wal)
> {
> - if (IS_MTL_MEDIA_STEP(gt->i915, STEP_A0, STEP_B0)) {
> + /* Wa_14018778641: MTL */
> + if (IS_METEORLAKE(gt->i915)) {
> /*
> * Wa_18018781329
> *
next prev parent reply other threads:[~2023-04-20 11:46 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-20 11:21 [Intel-gfx] [PATCH] drm/i915/mtl: Add workaround 14018778641 Tejas Upadhyay
2023-04-20 11:45 ` Das, Nirmoy [this message]
2023-04-20 12:01 ` [Intel-gfx] ✓ Fi.CI.BAT: success for " Patchwork
2023-04-20 15:23 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-04-21 0:00 ` [Intel-gfx] [PATCH] " Matt Roper
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