Intel-GFX Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Lionel Landwerlin <lionel.g.landwerlin@intel.com>,
	intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 3/6] drm/i915/debugfs: add rcs topology entry
Date: Thu, 11 Jan 2018 11:31:24 +0000	[thread overview]
Message-ID: <b658e319-75e5-b1fe-0b5b-40988e96ae85@linux.intel.com> (raw)
In-Reply-To: <20171218153520.14181-4-lionel.g.landwerlin@intel.com>


On 18/12/2017 15:35, Lionel Landwerlin wrote:
> While the end goal is to make this information available to userspace
> through a new ioctl, there is no reason we can't display it in a human
> readable fashion through debugfs.
> 
> slice0 (subslice_mask=0x7):

I'd add a subslice count while at it, since the eu lines have counts.

Bike-shedding on whether counts or masks are typically more important?

Slice0: 3 slices (0x7):
	Subslice 0: 8 EUs (0xff)
	Subslice 1: 8 EUs (0xff)
...

?

> 	subslice0:
> 		eu_mask: 0xff (8)
> 	subslice1:
> 		eu_mask: 0xff (8)
> 	subslice2:
> 		eu_mask: 0xff (8)
> 	subslice3:
> 		eu_mask: 0x0 (0)
> slice1 (subslice_mask=0x7):
> 	subslice0:
> 		eu_mask: 0xff (8)
> 	subslice1:
> 		eu_mask: 0xff (8)
> 	subslice2:
> 		eu_mask: 0xff (8)
> 	subslice3:
> 		eu_mask: 0x0 (0)
> slice2 (subslice_mask=0x7):
> 	subslice0:
> 		eu_mask: 0xff (8)
> 	subslice1:
> 		eu_mask: 0xff (8)
> 	subslice2:
> 		eu_mask: 0xff (8)
> 	subslice3:
> 		eu_mask: 0x0 (0)
> 
> Suggested-by: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
> ---
>   drivers/gpu/drm/i915/i915_debugfs.c | 37 +++++++++++++++++++++++++++++++++++++
>   1 file changed, 37 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index 6ec7543e698f..79ca6e9f9ec9 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3173,6 +3173,42 @@ static int i915_engine_info(struct seq_file *m, void *unused)
>   	return 0;
>   }
>   
> +static int i915_rcs_topology(struct seq_file *m, void *unused)
> +{
> +	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> +	const struct sseu_dev_info *sseu = &INTEL_INFO(dev_priv)->sseu;
> +	int s, ss;
> +	int subslice_stride = ALIGN(sseu->max_eus_per_subslice, 8) / 8;
> +	int slice_stride = sseu->max_subslices * subslice_stride;

Another case for the before mentioned helper for indexing into eu_mask 
array?

> +
> +	if (sseu->max_slices == 0) {
> +		seq_printf(m, "Unavailable\n");
> +		return 0;
> +	}

Is this possible?

> +
> +	for (s = 0; s < sseu->max_slices; s++) {
> +		seq_printf(m, "slice%i (subslice_mask=0x%x):\n",

%i always confuses me. Googling shows it is equivalent to %d for 
printing? Or is it something different in kernel space? If it is 
equivalent I would go with a more standard one. And I would even change 
to unsigned variables for iterators but I realize some people have a 
different opinion so up to you.

> +			   s, sseu->subslices_mask[s]);
> +
> +		for (ss = 0; ss < slice_stride / subslice_stride; ss++) {

With the indexing helpers hopefully it would be possible to simply 
iterate to hweight8(sseu->sublice_mask[s]) ?

> +			int eu, n_subslice_eus = 0;
> +
> +			seq_printf(m, "\tsubslice%i:\n", ss);
> +
> +			seq_printf(m, "\t\teu_mask:");
> +			for (eu = 0; eu < subslice_stride; eu++) {
> +				u8 val = sseu->eu_mask[s * slice_stride +
> +						       ss * subslice_stride + eu];
> +				seq_printf(m, " 0x%x", val);
> +				n_subslice_eus += hweight8(val);
> +			}
> +			seq_printf(m, " (%i)\n", n_subslice_eus);
> +		}
> +	}
> +
> +	return 0;
> +}
> +
>   static int i915_shrinker_info(struct seq_file *m, void *unused)
>   {
>   	struct drm_i915_private *i915 = node_to_i915(m->private);
> @@ -4658,6 +4694,7 @@ static const struct drm_info_list i915_debugfs_list[] = {
>   	{"i915_dmc_info", i915_dmc_info, 0},
>   	{"i915_display_info", i915_display_info, 0},
>   	{"i915_engine_info", i915_engine_info, 0},
> +	{"i915_rcs_topology", i915_rcs_topology, 0},
>   	{"i915_shrinker_info", i915_shrinker_info, 0},
>   	{"i915_shared_dplls_info", i915_shared_dplls_info, 0},
>   	{"i915_dp_mst_info", i915_dp_mst_info, 0},
> 

Regards,

Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-01-11 11:31 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-18 15:35 [PATCH 0/6] drm/i915: expose RCS topology to userspace Lionel Landwerlin
2017-12-18 15:35 ` [PATCH 1/6] drm/i915: store all subslice masks Lionel Landwerlin
2018-01-11 11:12   ` Tvrtko Ursulin
2018-01-11 15:48     ` Lionel Landwerlin
2018-01-11 15:57       ` Tvrtko Ursulin
2018-01-11 16:00     ` Lionel Landwerlin
2017-12-18 15:35 ` [PATCH 2/6] drm/i915/debugfs: reuse max slice/subslices already stored in sseu Lionel Landwerlin
2018-01-11 11:21   ` Tvrtko Ursulin
2018-01-11 15:50     ` Lionel Landwerlin
2017-12-18 15:35 ` [PATCH 3/6] drm/i915/debugfs: add rcs topology entry Lionel Landwerlin
2018-01-11 11:31   ` Tvrtko Ursulin [this message]
2018-01-11 17:04     ` Lionel Landwerlin
2017-12-18 15:35 ` [PATCH 4/6] drm/i915: add rcs topology to error state Lionel Landwerlin
2017-12-18 15:43   ` Chris Wilson
2017-12-18 15:35 ` [PATCH 5/6] drm/i915: add query uAPI Lionel Landwerlin
2018-01-11 12:19   ` Tvrtko Ursulin
2018-01-11 17:08     ` Lionel Landwerlin
2017-12-18 15:35 ` [PATCH 6/6] drm/i915: expose rcs topology through " Lionel Landwerlin
2018-01-11 12:45   ` Tvrtko Ursulin
2018-01-11 18:38     ` Lionel Landwerlin
2018-01-12  8:55       ` Tvrtko Ursulin
2017-12-18 16:07 ` ✗ Fi.CI.BAT: warning for drm/i915: expose RCS topology to userspace Patchwork
2018-01-08 16:30 ` [PATCH 0/6] " Lionel Landwerlin

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=b658e319-75e5-b1fe-0b5b-40988e96ae85@linux.intel.com \
    --to=tvrtko.ursulin@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=lionel.g.landwerlin@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox