[PATCH v4 0/9] Add WildCat Lake support

[PATCH v4 0/9] Add WildCat Lake support

[Dnyaneshwar Bhadane]

Enable Wildcat Lake by adding PCI IDs and add the initial support GT, Media
and Display workarounds.

Dnyaneshwar Bhadane (3):
  drm/i915/xe3lpd: Extend DMC path for display version 30.02
  drm/i915/wcl: C10 phy connected to port A and B
  drm/i915/xe3lpd: Extend WA 16023981245 for display 30.02

Matt Atwood (2):
  drm/i915/xe3lpd: Update bandwidth parameters for display version 30.02
  drm/i915: Set max cdclk for display 30.02

Matt Roper (4):
  drm/i915/xe3lpd: Add support for display version 30.02
  drm/xe/xe3: Add support for graphics IP version 30.03
  drm/xe/xe3: Add support for media IP version 30.02
  drm/xe: Add Wildcat Lake device IDs to PTL list

 drivers/gpu/drm/i915/display/intel_atomic_plane.c   |  3 ++-
 drivers/gpu/drm/i915/display/intel_bw.c             | 11 ++++++++++-
 drivers/gpu/drm/i915/display/intel_cdclk.c          |  4 +++-
 drivers/gpu/drm/i915/display/intel_cx0_phy.c        |  8 +++++++-
 drivers/gpu/drm/i915/display/intel_display_device.c |  1 +
 drivers/gpu/drm/i915/display/intel_dmc.c            |  3 ++-
 drivers/gpu/drm/xe/xe_pci.c                         |  2 ++
 drivers/gpu/drm/xe/xe_wa.c                          |  6 +++---
 drivers/gpu/drm/xe/xe_wa_oob.rules                  | 11 ++++++-----
 include/drm/intel/pciids.h                          |  4 +++-
 10 files changed, 39 insertions(+), 14 deletions(-)

-- 
2.34.1

[PATCH v4 1/9] drm/i915/xe3lpd: Add support for display version 30.02

[Dnyaneshwar Bhadane]

From: Matt Roper <matthew.d.roper@intel.com>

Display version 30.02 should be treated the same as other Xe3 IP, but
will have a slightly different set of workarounds.

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_device.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
index a4070f40e26f..089cffabbad5 100644
--- a/drivers/gpu/drm/i915/display/intel_display_device.c
+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
@@ -1480,6 +1480,7 @@ static const struct {
 	{ 14,  1, &xe2_hpd_display },
 	{ 20,  0, &xe2_lpd_display },
 	{ 30,  0, &xe2_lpd_display },
+	{ 30,  2, &xe2_lpd_display },
 };
 
 static const struct intel_display_device_info *
-- 
2.34.1

[PATCH v4 2/9] drm/xe/xe3: Add support for graphics IP version 30.03

[Dnyaneshwar Bhadane]

From: Matt Roper <matthew.d.roper@intel.com>

Graphics version 30.03 should be treated the same as other Xe3 IP, but
will have a slightly different set of workarounds.

-v2: Merge and extend the WA onto existing entry (Bala)

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c        | 1 +
 drivers/gpu/drm/xe/xe_wa.c         | 2 +-
 drivers/gpu/drm/xe/xe_wa_oob.rules | 7 ++++---
 3 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index b5559800db7a..8824a8016b1c 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -183,6 +183,7 @@ static const struct xe_ip graphics_ips[] = {
 	{ 2004, "Xe2_LPG", &graphics_xe2 },
 	{ 3000, "Xe3_LPG", &graphics_xe2 },
 	{ 3001, "Xe3_LPG", &graphics_xe2 },
+	{ 3003, "Xe3_LPG", &graphics_xe2 },
 };
 
 /* Pre-GMDID Media IPs */
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 67196baa4249..8693d098aa9b 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -609,7 +609,7 @@ static const struct xe_rtp_entry_sr engine_was[] = {
 	/* Xe3_LPG */
 
 	{ XE_RTP_NAME("14021402888"),
-	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
+	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3003),
 		       FUNC(xe_rtp_match_first_render_or_compute)),
 	  XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
 	},
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 9efc5accd43d..5c0d8b720946 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -32,10 +32,10 @@
 		GRAPHICS_VERSION(3001)
 14022293748	GRAPHICS_VERSION(2001)
 		GRAPHICS_VERSION(2004)
-		GRAPHICS_VERSION_RANGE(3000, 3001)
+		GRAPHICS_VERSION_RANGE(3000, 3003)
 22019794406	GRAPHICS_VERSION(2001)
 		GRAPHICS_VERSION(2004)
-		GRAPHICS_VERSION_RANGE(3000, 3001)
+		GRAPHICS_VERSION_RANGE(3000, 3003)
 22019338487	MEDIA_VERSION(2000)
 		GRAPHICS_VERSION(2001)
 		MEDIA_VERSION(3000), MEDIA_STEP(A0, B0), FUNC(xe_rtp_match_not_sriov_vf)
@@ -57,5 +57,6 @@ no_media_l3	MEDIA_VERSION(3000)
 		GRAPHICS_VERSION(1260), GRAPHICS_STEP(A0, B0)
 16023105232	GRAPHICS_VERSION_RANGE(2001, 3001)
 		MEDIA_VERSION_RANGE(1301, 3000)
-16026508708	GRAPHICS_VERSION_RANGE(1200, 3001)
+		GRAPHICS_VERSION(3003)
+16026508708	GRAPHICS_VERSION_RANGE(1200, 3003)
 		MEDIA_VERSION_RANGE(1300, 3000)
-- 
2.34.1

[PATCH v4 3/9] drm/xe/xe3: Add support for media IP version 30.02

[Dnyaneshwar Bhadane]

From: Matt Roper <matthew.d.roper@intel.com>

Media version 30.02 should be treated the same as other Xe3 IP, but
will have a slightly different set of workarounds.

-v2: Extend the range in existing WA entry (Bala)

Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
 drivers/gpu/drm/xe/xe_pci.c        | 1 +
 drivers/gpu/drm/xe/xe_wa.c         | 4 ++--
 drivers/gpu/drm/xe/xe_wa_oob.rules | 4 ++--
 3 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 8824a8016b1c..46d4d9af0ed0 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -196,6 +196,7 @@ static const struct xe_ip media_ips[] = {
 	{ 1301, "Xe2_HPM", &media_xelpmp },
 	{ 2000, "Xe2_LPM", &media_xelpmp },
 	{ 3000, "Xe3_LPM", &media_xelpmp },
+	{ 3002, "Xe3_LPM", &media_xelpmp },
 };
 
 static const struct xe_device_desc tgl_desc = {
diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
index 8693d098aa9b..8097b5e2a6f7 100644
--- a/drivers/gpu/drm/xe/xe_wa.c
+++ b/drivers/gpu/drm/xe/xe_wa.c
@@ -274,13 +274,13 @@ static const struct xe_rtp_entry_sr gt_was[] = {
 	/* Xe3_LPM */
 
 	{ XE_RTP_NAME("16021867713"),
-	  XE_RTP_RULES(MEDIA_VERSION(3000),
+	  XE_RTP_RULES(MEDIA_VERSION_RANGE(3000, 3002),
 		       ENGINE_CLASS(VIDEO_DECODE)),
 	  XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)),
 	  XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
 	},
 	{ XE_RTP_NAME("16021865536"),
-	  XE_RTP_RULES(MEDIA_VERSION(3000),
+	  XE_RTP_RULES(MEDIA_VERSION_RANGE(3000, 3002),
 		       ENGINE_CLASS(VIDEO_DECODE)),
 	  XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F10(0), IECPUNIT_CLKGATE_DIS)),
 	  XE_RTP_ENTRY_FLAG(FOREACH_ENGINE),
diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
index 5c0d8b720946..45d0cd917f6b 100644
--- a/drivers/gpu/drm/xe/xe_wa_oob.rules
+++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
@@ -56,7 +56,7 @@ no_media_l3	MEDIA_VERSION(3000)
 1508761755	GRAPHICS_VERSION(1255)
 		GRAPHICS_VERSION(1260), GRAPHICS_STEP(A0, B0)
 16023105232	GRAPHICS_VERSION_RANGE(2001, 3001)
-		MEDIA_VERSION_RANGE(1301, 3000)
+		MEDIA_VERSION_RANGE(1301, 3002)
 		GRAPHICS_VERSION(3003)
 16026508708	GRAPHICS_VERSION_RANGE(1200, 3003)
-		MEDIA_VERSION_RANGE(1300, 3000)
+		MEDIA_VERSION_RANGE(1300, 3002)
-- 
2.34.1

[PATCH v4 4/9] drm/i915/xe3lpd: Update bandwidth parameters for display version 30.02

[Dnyaneshwar Bhadane]

From: Matt Atwood <matthew.s.atwood@intel.com>

Bandwidth parameters for WCL have been updated with respect to
previous display releases. Encode them into xe3lpd_3002_sa_info and use
that new struct.

-v2: Resolve conflict on applying patch.

Bspec: 68859
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_bw.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 6c2ab2e0dc91..a515241d80db 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -420,6 +420,13 @@ static const struct intel_sa_info xe3lpd_sa_info = {
 	.derating = 10,
 };
 
+static const struct intel_sa_info xe3lpd_3002_sa_info = {
+	.deburst = 32,
+	.deprogbwlimit = 22, /* GB/s */
+	.displayrtids = 256,
+	.derating = 10,
+};
+
 static int icl_get_bw_info(struct intel_display *display,
 			   const struct dram_info *dram_info,
 			   const struct intel_sa_info *sa)
@@ -771,7 +778,9 @@ void intel_bw_init_hw(struct intel_display *display)
 	if (!HAS_DISPLAY(display))
 		return;
 
-	if (DISPLAY_VER(display) >= 30)
+	if (DISPLAY_VERx100(display) >= 3002)
+		tgl_get_bw_info(display, dram_info, &xe3lpd_3002_sa_info);
+	else if (DISPLAY_VER(display) >= 30)
 		tgl_get_bw_info(display, dram_info, &xe3lpd_sa_info);
 	else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx &&
 		 dram_info->type == INTEL_DRAM_GDDR_ECC)
-- 
2.34.1

[PATCH v4 5/9] drm/i915: Set max cdclk for display 30.02

[Dnyaneshwar Bhadane]

From: Matt Atwood <matthew.s.atwood@intel.com>

Display version 30.02 has a lower max cdclk rate than 30.00.

Bspec: 68861
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c
index 38b3094b37d7..1cbb1d526fe8 100644
--- a/drivers/gpu/drm/i915/display/intel_cdclk.c
+++ b/drivers/gpu/drm/i915/display/intel_cdclk.c
@@ -3386,7 +3386,9 @@ static int intel_compute_max_dotclk(struct intel_display *display)
  */
 void intel_update_max_cdclk(struct intel_display *display)
 {
-	if (DISPLAY_VER(display) >= 30) {
+	if (DISPLAY_VERx100(display) >= 3002) {
+		display->cdclk.max_cdclk_freq = 480000;
+	} else if (DISPLAY_VER(display) >= 30) {
 		display->cdclk.max_cdclk_freq = 691200;
 	} else if (display->platform.jasperlake || display->platform.elkhartlake) {
 		if (display->cdclk.hw.ref == 24000)
-- 
2.34.1

[PATCH v4 6/9] drm/xe: Add Wildcat Lake device IDs to PTL list

[Dnyaneshwar Bhadane]

From: Matt Roper <matthew.d.roper@intel.com>

Introduce wildcat lake device Id.
Wildcat Lake uses slightly different graphics and media IP versions
than Panther Lake, but can still be treated as PTL for general driver
flows.

Bspec: 73951
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Tejas Upadhyay <tejas.upadhyay@intel.com>
---
 include/drm/intel/pciids.h | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/drm/intel/pciids.h b/include/drm/intel/pciids.h
index a7ce9523c50d..258273e8b794 100644
--- a/include/drm/intel/pciids.h
+++ b/include/drm/intel/pciids.h
@@ -868,6 +868,8 @@
 	MACRO__(0xB08F, ## __VA_ARGS__), \
 	MACRO__(0xB090, ## __VA_ARGS__), \
 	MACRO__(0xB0A0, ## __VA_ARGS__), \
-	MACRO__(0xB0B0, ## __VA_ARGS__)
+	MACRO__(0xB0B0, ## __VA_ARGS__), \
+	MACRO__(0xFD80, ## __VA_ARGS__), \
+	MACRO__(0xFD81, ## __VA_ARGS__)
 
 #endif /* __PCIIDS_H__ */
-- 
2.34.1

[PATCH v4 7/9] drm/i915/xe3lpd: Extend DMC path for display version 30.02

[Dnyaneshwar Bhadane]

Display version 30.02 should be treated the same as other Xe3 IP.
So exteding DMC load path the condition for it.

Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index a10e56e7cf31..1295d8245a2e 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -179,7 +179,8 @@ static const char *dmc_firmware_default(struct intel_display *display, u32 *size
 	const char *fw_path = NULL;
 	u32 max_fw_size = 0;
 
-	if (DISPLAY_VERx100(display) == 3000) {
+	if (DISPLAY_VERx100(display) == 3002 ||
+	    DISPLAY_VERx100(display) == 3000) {
 		fw_path = XE3LPD_DMC_PATH;
 		max_fw_size = XE2LPD_DMC_MAX_FW_SIZE;
 	} else if (DISPLAY_VERx100(display) == 2000) {
-- 
2.34.1

[PATCH v4 8/9] drm/i915/wcl: C10 phy connected to port A and B

[Dnyaneshwar Bhadane]

WCL added a c10 phy connected to port B. PTL code is currently
restricting c10 to phy_a only.

PTL doesn't have a PHY connected to PORT B; as such,there will
never be a case where PTL uses PHY B.
WCL uses PORT A and B with the C10 PHY.Reusing the condition
for WCL and extending it for PORT B should not cause any issues
for PTL.

-v2: Reuse and extend PTL condition for WCL (Matt)

Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
---
 drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
index 75caccb65513..05b41ecaba2f 100644
--- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c
+++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c
@@ -40,7 +40,13 @@ bool intel_encoder_is_c10phy(struct intel_encoder *encoder)
 	struct intel_display *display = to_intel_display(encoder);
 	enum phy phy = intel_encoder_to_phy(encoder);
 
-	if (display->platform.pantherlake && phy == PHY_A)
+	/* PTL doesn't have a PHY connected to PORT B; as such,
+	 * there will never be a case where PTL uses PHY B.
+	 * WCL uses PORT A and B with the C10 PHY.
+	 * Reusing the condition for WCL and extending it for PORT B
+	 * should not cause any issues for PTL.
+	 */
+	if (display->platform.pantherlake && phy < PHY_C)
 		return true;
 
 	if ((display->platform.lunarlake || display->platform.meteorlake) && phy < PHY_C)
-- 
2.34.1

[PATCH v4 9/9] drm/i915/xe3lpd: Extend WA 16023981245 for display 30.02

[Dnyaneshwar Bhadane]

wa_16023981245 need to be extended for display version 30.02

Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
---
 drivers/gpu/drm/i915/display/intel_atomic_plane.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 15ede7678636..e0336c79c294 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -1085,7 +1085,8 @@ int intel_plane_check_src_coordinates(struct intel_plane_state *plane_state)
 
 		/* Wa_16023981245 */
 		if ((DISPLAY_VERx100(display) == 2000 ||
-		     DISPLAY_VERx100(display) == 3000) &&
+		     DISPLAY_VERx100(display) == 3000 ||
+		     DISPLAY_VERx100(display) == 3002) &&
 		     src_x % 2 != 0)
 			hsub = 2;
 	} else {
-- 
2.34.1

Re: [PATCH v4 0/9] Add WildCat Lake support

[Jani Nikula]

On Wed, 11 Jun 2025, Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> wrote:
> Enable Wildcat Lake by adding PCI IDs and add the initial support GT, Media
> and Display workarounds.

Please figure out whether this should be merged via drm-intel-next or
drm-xe-next, and ask for appropriate acks in advance.

Thanks,
Jani.


>
> Dnyaneshwar Bhadane (3):
>   drm/i915/xe3lpd: Extend DMC path for display version 30.02
>   drm/i915/wcl: C10 phy connected to port A and B
>   drm/i915/xe3lpd: Extend WA 16023981245 for display 30.02
>
> Matt Atwood (2):
>   drm/i915/xe3lpd: Update bandwidth parameters for display version 30.02
>   drm/i915: Set max cdclk for display 30.02
>
> Matt Roper (4):
>   drm/i915/xe3lpd: Add support for display version 30.02
>   drm/xe/xe3: Add support for graphics IP version 30.03
>   drm/xe/xe3: Add support for media IP version 30.02
>   drm/xe: Add Wildcat Lake device IDs to PTL list
>
>  drivers/gpu/drm/i915/display/intel_atomic_plane.c   |  3 ++-
>  drivers/gpu/drm/i915/display/intel_bw.c             | 11 ++++++++++-
>  drivers/gpu/drm/i915/display/intel_cdclk.c          |  4 +++-
>  drivers/gpu/drm/i915/display/intel_cx0_phy.c        |  8 +++++++-
>  drivers/gpu/drm/i915/display/intel_display_device.c |  1 +
>  drivers/gpu/drm/i915/display/intel_dmc.c            |  3 ++-
>  drivers/gpu/drm/xe/xe_pci.c                         |  2 ++
>  drivers/gpu/drm/xe/xe_wa.c                          |  6 +++---
>  drivers/gpu/drm/xe/xe_wa_oob.rules                  | 11 ++++++-----
>  include/drm/intel/pciids.h                          |  4 +++-
>  10 files changed, 39 insertions(+), 14 deletions(-)

-- 
Jani Nikula, Intel

✗ Fi.CI.BUILD: failure for Add WildCat Lake support

[Patchwork]

== Series Details ==

Series: Add WildCat Lake support
URL   : https://patchwork.freedesktop.org/series/150101/
State : failure

== Summary ==

Error: patch https://patchwork.freedesktop.org/api/1.0/series/150101/revisions/1/mbox/ not applied
Applying: drm/i915/xe3lpd: Add support for display version 30.02
Applying: drm/xe/xe3: Add support for graphics IP version 30.03
Using index info to reconstruct a base tree...
M	drivers/gpu/drm/xe/xe_pci.c
M	drivers/gpu/drm/xe/xe_wa.c
M	drivers/gpu/drm/xe/xe_wa_oob.rules
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/xe/xe_wa_oob.rules
CONFLICT (content): Merge conflict in drivers/gpu/drm/xe/xe_wa_oob.rules
Auto-merging drivers/gpu/drm/xe/xe_wa.c
Auto-merging drivers/gpu/drm/xe/xe_pci.c
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0002 drm/xe/xe3: Add support for graphics IP version 30.03
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
Build failed, no error log produced

Re: [PATCH v4 7/9] drm/i915/xe3lpd: Extend DMC path for display version 30.02

[Pottumuttu, Sai Teja]

On 11-06-2025 19:14, Dnyaneshwar Bhadane wrote:
> Display version 30.02 should be treated the same as other Xe3 IP.
> So exteding DMC load path the condition for it.
> 
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>

Nit, should be 'extending DMC load path condition for it' in commit 
message, other than that

LGTM,
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>

> ---
>   drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
>   1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
> index a10e56e7cf31..1295d8245a2e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dmc.c
> +++ b/drivers/gpu/drm/i915/display/intel_dmc.c
> @@ -179,7 +179,8 @@ static const char *dmc_firmware_default(struct intel_display *display, u32 *size
>   	const char *fw_path = NULL;
>   	u32 max_fw_size = 0;
>   
> -	if (DISPLAY_VERx100(display) == 3000) {
> +	if (DISPLAY_VERx100(display) == 3002 ||
> +	    DISPLAY_VERx100(display) == 3000) {
>   		fw_path = XE3LPD_DMC_PATH;
>   		max_fw_size = XE2LPD_DMC_MAX_FW_SIZE;
>   	} else if (DISPLAY_VERx100(display) == 2000) {

Re: [PATCH v4 2/9] drm/xe/xe3: Add support for graphics IP version 30.03

[Pottumuttu, Sai Teja]

On 11-06-2025 19:14, Dnyaneshwar Bhadane wrote:
> From: Matt Roper <matthew.d.roper@intel.com>
> 
> Graphics version 30.03 should be treated the same as other Xe3 IP, but
> will have a slightly different set of workarounds.
> 
> -v2: Merge and extend the WA onto existing entry (Bala)
> 
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
> ---
>   drivers/gpu/drm/xe/xe_pci.c        | 1 +
>   drivers/gpu/drm/xe/xe_wa.c         | 2 +-
>   drivers/gpu/drm/xe/xe_wa_oob.rules | 7 ++++---
>   3 files changed, 6 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> index b5559800db7a..8824a8016b1c 100644
> --- a/drivers/gpu/drm/xe/xe_pci.c
> +++ b/drivers/gpu/drm/xe/xe_pci.c
> @@ -183,6 +183,7 @@ static const struct xe_ip graphics_ips[] = {
>   	{ 2004, "Xe2_LPG", &graphics_xe2 },
>   	{ 3000, "Xe3_LPG", &graphics_xe2 },
>   	{ 3001, "Xe3_LPG", &graphics_xe2 },
> +	{ 3003, "Xe3_LPG", &graphics_xe2 },
>   };
>   
>   /* Pre-GMDID Media IPs */
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index 67196baa4249..8693d098aa9b 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -609,7 +609,7 @@ static const struct xe_rtp_entry_sr engine_was[] = {
>   	/* Xe3_LPG */
>   
>   	{ XE_RTP_NAME("14021402888"),
> -	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
> +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3003),
>   		       FUNC(xe_rtp_match_first_render_or_compute)),
>   	  XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
>   	},
> diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> index 9efc5accd43d..5c0d8b720946 100644
> --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> @@ -32,10 +32,10 @@
>   		GRAPHICS_VERSION(3001)
>   14022293748	GRAPHICS_VERSION(2001)
>   		GRAPHICS_VERSION(2004)
> -		GRAPHICS_VERSION_RANGE(3000, 3001)
> +		GRAPHICS_VERSION_RANGE(3000, 3003)
>   22019794406	GRAPHICS_VERSION(2001)
>   		GRAPHICS_VERSION(2004)
> -		GRAPHICS_VERSION_RANGE(3000, 3001)
> +		GRAPHICS_VERSION_RANGE(3000, 3003)
>   22019338487	MEDIA_VERSION(2000)
>   		GRAPHICS_VERSION(2001)
>   		MEDIA_VERSION(3000), MEDIA_STEP(A0, B0), FUNC(xe_rtp_match_not_sriov_vf)
> @@ -57,5 +57,6 @@ no_media_l3	MEDIA_VERSION(3000)
>   		GRAPHICS_VERSION(1260), GRAPHICS_STEP(A0, B0)
>   16023105232	GRAPHICS_VERSION_RANGE(2001, 3001)
>   		MEDIA_VERSION_RANGE(1301, 3000)
> -16026508708	GRAPHICS_VERSION_RANGE(1200, 3001)
> +		GRAPHICS_VERSION(3003)

Can we merge GRAPHICS_VERSION(3003) here into 
GRAPHICS_VERSION_RANGE(2001, 3001) above just like the other WAs?

Thanks,
Sai Teja

> +16026508708	GRAPHICS_VERSION_RANGE(1200, 3003)
>   		MEDIA_VERSION_RANGE(1300, 3000)

Re: [PATCH v4 2/9] drm/xe/xe3: Add support for graphics IP version 30.03

[Matt Roper]

On Thu, Jun 12, 2025 at 12:20:05PM +0530, Pottumuttu, Sai Teja wrote:
> On 11-06-2025 19:14, Dnyaneshwar Bhadane wrote:
> > From: Matt Roper <matthew.d.roper@intel.com>
> > 
> > Graphics version 30.03 should be treated the same as other Xe3 IP, but
> > will have a slightly different set of workarounds.
> > 
> > -v2: Merge and extend the WA onto existing entry (Bala)
> > 
> > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
> > ---
> >   drivers/gpu/drm/xe/xe_pci.c        | 1 +
> >   drivers/gpu/drm/xe/xe_wa.c         | 2 +-
> >   drivers/gpu/drm/xe/xe_wa_oob.rules | 7 ++++---
> >   3 files changed, 6 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> > index b5559800db7a..8824a8016b1c 100644
> > --- a/drivers/gpu/drm/xe/xe_pci.c
> > +++ b/drivers/gpu/drm/xe/xe_pci.c
> > @@ -183,6 +183,7 @@ static const struct xe_ip graphics_ips[] = {
> >   	{ 2004, "Xe2_LPG", &graphics_xe2 },
> >   	{ 3000, "Xe3_LPG", &graphics_xe2 },
> >   	{ 3001, "Xe3_LPG", &graphics_xe2 },
> > +	{ 3003, "Xe3_LPG", &graphics_xe2 },
> >   };
> >   /* Pre-GMDID Media IPs */
> > diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> > index 67196baa4249..8693d098aa9b 100644
> > --- a/drivers/gpu/drm/xe/xe_wa.c
> > +++ b/drivers/gpu/drm/xe/xe_wa.c
> > @@ -609,7 +609,7 @@ static const struct xe_rtp_entry_sr engine_was[] = {
> >   	/* Xe3_LPG */
> >   	{ XE_RTP_NAME("14021402888"),
> > -	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
> > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3003),
> >   		       FUNC(xe_rtp_match_first_render_or_compute)),
> >   	  XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7, CLEAR_OPTIMIZATION_DISABLE))
> >   	},
> > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > index 9efc5accd43d..5c0d8b720946 100644
> > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > @@ -32,10 +32,10 @@
> >   		GRAPHICS_VERSION(3001)
> >   14022293748	GRAPHICS_VERSION(2001)
> >   		GRAPHICS_VERSION(2004)
> > -		GRAPHICS_VERSION_RANGE(3000, 3001)
> > +		GRAPHICS_VERSION_RANGE(3000, 3003)
> >   22019794406	GRAPHICS_VERSION(2001)
> >   		GRAPHICS_VERSION(2004)
> > -		GRAPHICS_VERSION_RANGE(3000, 3001)
> > +		GRAPHICS_VERSION_RANGE(3000, 3003)
> >   22019338487	MEDIA_VERSION(2000)
> >   		GRAPHICS_VERSION(2001)
> >   		MEDIA_VERSION(3000), MEDIA_STEP(A0, B0), FUNC(xe_rtp_match_not_sriov_vf)
> > @@ -57,5 +57,6 @@ no_media_l3	MEDIA_VERSION(3000)
> >   		GRAPHICS_VERSION(1260), GRAPHICS_STEP(A0, B0)
> >   16023105232	GRAPHICS_VERSION_RANGE(2001, 3001)
> >   		MEDIA_VERSION_RANGE(1301, 3000)
> > -16026508708	GRAPHICS_VERSION_RANGE(1200, 3001)
> > +		GRAPHICS_VERSION(3003)
> 
> Can we merge GRAPHICS_VERSION(3003) here into GRAPHICS_VERSION_RANGE(2001,
> 3001) above just like the other WAs?

It would probably be better to go the other direction and break out
30.03 on those other workarounds so that they aren't incorrectly
applying to 30.02 as well.  We don't have any platforms using 30.02 at
the moment, but one could show up in the future and these workarounds
may or may not apply.

If we're sure a couple years down the road that no 30.02 is ever going
to materialize, we can come back and consolidate some of the entries to
help simplify.  But for now we should try to follow the workaround
database exactly and not make assumptions about versions that don't
exist yet.


Matt

> 
> Thanks,
> Sai Teja
> 
> > +16026508708	GRAPHICS_VERSION_RANGE(1200, 3003)
> >   		MEDIA_VERSION_RANGE(1300, 3000)

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

RE: [PATCH v4 2/9] drm/xe/xe3: Add support for graphics IP version 30.03

[Bhadane, Dnyaneshwar]

> -----Original Message-----
> From: Roper, Matthew D <matthew.d.roper@intel.com>
> Sent: Thursday, June 12, 2025 10:00 PM
> To: Pottumuttu, Sai Teja <sai.teja.pottumuttu@intel.com>
> Cc: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane@intel.com>; intel-
> xe@lists.freedesktop.org; intel-gfx@lists.freedesktop.org
> Subject: Re: [PATCH v4 2/9] drm/xe/xe3: Add support for graphics IP version
> 30.03
> 
> On Thu, Jun 12, 2025 at 12:20:05PM +0530, Pottumuttu, Sai Teja wrote:
> > On 11-06-2025 19:14, Dnyaneshwar Bhadane wrote:
> > > From: Matt Roper <matthew.d.roper@intel.com>
> > >
> > > Graphics version 30.03 should be treated the same as other Xe3 IP,
> > > but will have a slightly different set of workarounds.
> > >
> > > -v2: Merge and extend the WA onto existing entry (Bala)
> > >
> > > Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> > > Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
> > > ---
> > >   drivers/gpu/drm/xe/xe_pci.c        | 1 +
> > >   drivers/gpu/drm/xe/xe_wa.c         | 2 +-
> > >   drivers/gpu/drm/xe/xe_wa_oob.rules | 7 ++++---
> > >   3 files changed, 6 insertions(+), 4 deletions(-)
> > >
> > > diff --git a/drivers/gpu/drm/xe/xe_pci.c
> > > b/drivers/gpu/drm/xe/xe_pci.c index b5559800db7a..8824a8016b1c
> > > 100644
> > > --- a/drivers/gpu/drm/xe/xe_pci.c
> > > +++ b/drivers/gpu/drm/xe/xe_pci.c
> > > @@ -183,6 +183,7 @@ static const struct xe_ip graphics_ips[] = {
> > >   	{ 2004, "Xe2_LPG", &graphics_xe2 },
> > >   	{ 3000, "Xe3_LPG", &graphics_xe2 },
> > >   	{ 3001, "Xe3_LPG", &graphics_xe2 },
> > > +	{ 3003, "Xe3_LPG", &graphics_xe2 },
> > >   };
> > >   /* Pre-GMDID Media IPs */
> > > diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> > > index 67196baa4249..8693d098aa9b 100644
> > > --- a/drivers/gpu/drm/xe/xe_wa.c
> > > +++ b/drivers/gpu/drm/xe/xe_wa.c
> > > @@ -609,7 +609,7 @@ static const struct xe_rtp_entry_sr engine_was[] =
> {
> > >   	/* Xe3_LPG */
> > >   	{ XE_RTP_NAME("14021402888"),
> > > -	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3001),
> > > +	  XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3003),
> > >   		       FUNC(xe_rtp_match_first_render_or_compute)),
> > >   	  XE_RTP_ACTIONS(SET(HALF_SLICE_CHICKEN7,
> CLEAR_OPTIMIZATION_DISABLE))
> > >   	},
> > > diff --git a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > > b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > > index 9efc5accd43d..5c0d8b720946 100644
> > > --- a/drivers/gpu/drm/xe/xe_wa_oob.rules
> > > +++ b/drivers/gpu/drm/xe/xe_wa_oob.rules
> > > @@ -32,10 +32,10 @@
> > >   		GRAPHICS_VERSION(3001)
> > >   14022293748	GRAPHICS_VERSION(2001)
> > >   		GRAPHICS_VERSION(2004)
> > > -		GRAPHICS_VERSION_RANGE(3000, 3001)
> > > +		GRAPHICS_VERSION_RANGE(3000, 3003)
> > >   22019794406	GRAPHICS_VERSION(2001)
> > >   		GRAPHICS_VERSION(2004)
> > > -		GRAPHICS_VERSION_RANGE(3000, 3001)
> > > +		GRAPHICS_VERSION_RANGE(3000, 3003)
> > >   22019338487	MEDIA_VERSION(2000)
> > >   		GRAPHICS_VERSION(2001)
> > >   		MEDIA_VERSION(3000), MEDIA_STEP(A0, B0),
> FUNC(xe_rtp_match_not_sriov_vf)
> > > @@ -57,5 +57,6 @@ no_media_l3	MEDIA_VERSION(3000)
> > >   		GRAPHICS_VERSION(1260), GRAPHICS_STEP(A0, B0)
> > >   16023105232	GRAPHICS_VERSION_RANGE(2001, 3001)
> > >   		MEDIA_VERSION_RANGE(1301, 3000)
> > > -16026508708	GRAPHICS_VERSION_RANGE(1200, 3001)
> > > +		GRAPHICS_VERSION(3003)
> >
> > Can we merge GRAPHICS_VERSION(3003) here into
> > GRAPHICS_VERSION_RANGE(2001,
> > 3001) above just like the other WAs?
> 
> It would probably be better to go the other direction and break out
> 30.03 on those other workarounds so that they aren't incorrectly applying to
> 30.02 as well.  We don't have any platforms using 30.02 at the moment, but
> one could show up in the future and these workarounds may or may not apply.
> 
> If we're sure a couple years down the road that no 30.02 is ever going to
> materialize, we can come back and consolidate some of the entries to help
> simplify.  But for now we should try to follow the workaround database exactly
> and not make assumptions about versions that don't exist yet.
> 
In this case applied here also then I should revert to original changes on rev3, 
as I have extended few WA entries as single based on feedback on rev3.
1. https://patchwork.freedesktop.org/patch/657455/?series=149794&rev=3
2. https://patchwork.freedesktop.org/patch/657456/?series=149794&rev=3

Dnyaneshwar,

> 
> Matt
> 
> >
> > Thanks,
> > Sai Teja
> >
> > > +16026508708	GRAPHICS_VERSION_RANGE(1200, 3003)
> > >   		MEDIA_VERSION_RANGE(1300, 3000)
> 
> --
> Matt Roper
> Graphics Software Engineer
> Linux GPU Platform Enablement
> Intel Corporation

RE: ✗ Fi.CI.BUILD: failure for Add WildCat Lake support

[Bhadane, Dnyaneshwar]

> -----Original Message-----
> From: Patchwork <patchwork@emeril.freedesktop.org>
> Sent: Wednesday, June 11, 2025 10:15 PM
> To: Bhadane, Dnyaneshwar <dnyaneshwar.bhadane@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: ✗ Fi.CI.BUILD: failure for Add WildCat Lake support
> 
> == Series Details ==
> 
> Series: Add WildCat Lake support
> URL   : https://patchwork.freedesktop.org/series/150101/
> State : failure
> 
> == Summary ==
> 
> Error: patch
> https://patchwork.freedesktop.org/api/1.0/series/150101/revisions/1/mbox/
> not applied
> Applying: drm/i915/xe3lpd: Add support for display version 30.02
> Applying: drm/xe/xe3: Add support for graphics IP version 30.03 Using index
> info to reconstruct a base tree...
> M	drivers/gpu/drm/xe/xe_pci.c
> M	drivers/gpu/drm/xe/xe_wa.c
> M	drivers/gpu/drm/xe/xe_wa_oob.rules
> Falling back to patching base and 3-way merge...
> Auto-merging drivers/gpu/drm/xe/xe_wa_oob.rules
> CONFLICT (content): Merge conflict in drivers/gpu/drm/xe/xe_wa_oob.rules
Looks like some there are still ahead in the branch than drm-xe-next,
I will figure out and send updated conflict free patches for intel-gfx list.

Dnyaneshwar,

> Auto-merging drivers/gpu/drm/xe/xe_wa.c
> Auto-merging drivers/gpu/drm/xe/xe_pci.c
> error: Failed to merge in the changes.
> hint: Use 'git am --show-current-patch=diff' to see the failed patch Patch failed
> at 0002 drm/xe/xe3: Add support for graphics IP version 30.03 When you have
> resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am --abort".
> Build failed, no error log produced
>