From: "Shankar, Uma" <uma.shankar@intel.com>
To: "Gupta, Anshuman" <anshuman.gupta@intel.com>,
"intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"dri-devel@lists.freedesktop.org"
<dri-devel@lists.freedesktop.org>
Cc: "Nikula, Jani" <jani.nikula@intel.com>,
"seanpaul@chromium.org" <seanpaul@chromium.org>
Subject: Re: [Intel-gfx] [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support
Date: Tue, 27 Oct 2020 06:29:14 +0000 [thread overview]
Message-ID: <bcd909eb40694baba56d58941aa7518a@intel.com> (raw)
In-Reply-To: <20201023122112.15265-8-anshuman.gupta@intel.com>
> -----Original Message-----
> From: Anshuman Gupta <anshuman.gupta@intel.com>
> Sent: Friday, October 23, 2020 5:51 PM
> To: intel-gfx@lists.freedesktop.org; dri-devel@lists.freedesktop.org
> Cc: seanpaul@chromium.org; Nikula, Jani <jani.nikula@intel.com>; C,
> Ramalingam <ramalingam.c@intel.com>; Li, Juston <juston.li@intel.com>;
> Shankar, Uma <uma.shankar@intel.com>; Gupta, Anshuman
> <anshuman.gupta@intel.com>
> Subject: [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST
> support
>
> Enable HDCP 1.4 over DP MST for Gen12.
> This also enable the stream encryption support for older generations, which was
> missing earlier.
>
> v2:
> - Added debug print for stream encryption.
> - Disable the hdcp on port after disabling last stream
> encryption.
Don't see port disable here, Am I missing something.
>
> Cc: Ramalingam C <ramalingam.c@intel.com>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 10 ++---
> drivers/gpu/drm/i915/display/intel_hdcp.c | 46 ++++++++++++++-------
> 2 files changed, 35 insertions(+), 21 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 16865b200062..f00e12fc83e8 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -826,13 +826,9 @@ static struct drm_connector
> *intel_dp_add_mst_connector(struct drm_dp_mst_topolo
> intel_attach_force_audio_property(connector);
> intel_attach_broadcast_rgb_property(connector);
>
> -
> - /* TODO: Figure out how to make HDCP work on GEN12+ */
> - if (INTEL_GEN(dev_priv) < 12) {
> - ret = intel_dp_init_hdcp(dig_port, intel_connector);
> - if (ret)
> - DRM_DEBUG_KMS("HDCP init failed, skipping.\n");
> - }
> + ret = intel_dp_init_hdcp(dig_port, intel_connector);
> + if (ret)
> + drm_dbg_kms(&dev_priv->drm, "HDCP init failed, skipping.\n");
>
> /*
> * Reuse the prop from the SST connector because we're diff --git
> a/drivers/gpu/drm/i915/display/intel_hdcp.c
> b/drivers/gpu/drm/i915/display/intel_hdcp.c
> index 61252d4be3dd..46c9bd588db1 100644
> --- a/drivers/gpu/drm/i915/display/intel_hdcp.c
> +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
> @@ -612,7 +612,12 @@ int intel_hdcp_auth_downstream(struct intel_connector
> *connector)
> return ret;
> }
>
> -/* Implements Part 1 of the HDCP authorization procedure */
> +/*
> + * Implements Part 1 of the HDCP authorization procedure.
> + * Authentication Part 1 steps for Multi-stream DisplayPort.
> + * Step 1. Auth Part 1 sequence on the driving MST Trasport Link.
> + * Step 2. Enable encryption for each stream that requires encryption.
> + */
> static int intel_hdcp_auth(struct intel_connector *connector) {
> struct intel_digital_port *dig_port = intel_attached_dig_port(connector);
> @@ -766,10 +771,16 @@ static int intel_hdcp_auth(struct intel_connector
> *connector)
> return -ETIMEDOUT;
> }
>
> - /*
> - * XXX: If we have MST-connected devices, we need to enable encryption
> - * on those as well.
> - */
> + /* DP MST Auth Part 1 Step 2.a and Step 2.b */
> + if (shim->stream_encryption) {
> + ret = shim->stream_encryption(dig_port, true);
> + if (ret) {
> + drm_err(&dev_priv->drm, "Failed to enable HDCP 1.4
> stream enc\n");
> + return ret;
> + }
> + drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 tras %s stream
> encrypted\n",
> + transcoder_name(hdcp->stream_transcoder));
> + }
>
> if (repeater_present)
> return intel_hdcp_auth_downstream(connector);
> @@ -790,19 +801,26 @@ static int _intel_hdcp_disable(struct intel_connector
> *connector)
>
> drm_dbg_kms(&dev_priv->drm, "[%s:%d] HDCP is being disabled...\n",
> connector->base.name, connector->base.base.id);
> + /*
> + * Step 1: Deselect HDCP Multiplestream Bit.
> + * Step 2: poll for stream encryption status to be disable.
> + */
The above comment should be inside the callback, doesn't add value here.
> + if (hdcp->shim->stream_encryption) {
> + ret = hdcp->shim->stream_encryption(dig_port, false);
> + if (ret) {
> + drm_err(&dev_priv->drm, "Failed to disable HDCP 1.4
> stream enc\n");
> + return ret;
> + }
> + drm_dbg_kms(&dev_priv->drm, "HDCP 1.4 trans %s stream
> encryption disabled\n",
> + transcoder_name(hdcp->stream_transcoder));
> + }
>
> /*
> - * If there are other connectors on this port using HDCP, don't disable
> - * it. Instead, toggle the HDCP signalling off on that particular
> - * connector/pipe and exit.
> + * If there are other connectors on this port using HDCP, don't disable it.
> + * Repeat steps 1-2 for each stream that no longer requires encryption.
> */
> - if (dig_port->num_hdcp_streams > 0) {
> - ret = hdcp->shim->toggle_signalling(dig_port,
> - cpu_transcoder, false);
> - if (ret)
> - DRM_ERROR("Failed to disable HDCP signalling\n");
> + if (dig_port->num_hdcp_streams > 0)
> return ret;
> - }
>
> hdcp->hdcp_encrypted = false;
> intel_de_write(dev_priv, HDCP_CONF(dev_priv, cpu_transcoder, port), 0);
> --
> 2.26.2
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-10-27 6:29 UTC|newest]
Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-23 12:20 [Intel-gfx] [PATCH v3 00/16] HDCP 2.2 and HDCP 1.4 Gen12 DP MST support Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] [PATCH v3 01/16] drm/i915/hdcp: Update CP property in update_pipe Anshuman Gupta
2020-10-27 5:32 ` Shankar, Uma
2020-10-27 7:50 ` Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] [PATCH v3 02/16] drm/i915/hdcp: Get conn while content_type changed Anshuman Gupta
2020-10-27 5:34 ` Shankar, Uma
2020-10-27 5:37 ` Anshuman Gupta
2020-10-23 12:20 ` [Intel-gfx] [PATCH v3 03/16] drm/i915/hotplug: Handle CP_IRQ for DP-MST Anshuman Gupta
2020-10-27 5:43 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 04/16] drm/i915/hdcp: DP MST transcoder for link and stream Anshuman Gupta
2020-10-27 5:49 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 05/16] drm/i915/hdcp: Move HDCP enc status timeout to header Anshuman Gupta
2020-10-27 5:52 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 06/16] drm/i915/hdcp: HDCP stream encryption support Anshuman Gupta
2020-10-27 6:20 ` Shankar, Uma
2020-10-27 7:46 ` Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
2020-10-27 6:29 ` Shankar, Uma [this message]
2020-10-27 7:57 ` Anshuman Gupta
2020-10-27 12:04 ` Anshuman Gupta
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 08/16] drm/i915/hdcp: Pass dig_port to intel_hdcp_init Anshuman Gupta
2020-10-27 6:30 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 09/16] drm/i915/hdcp: Encapsulate hdcp_port_data to dig_port Anshuman Gupta
2020-10-27 6:34 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 10/16] misc/mei/hdcp: Fix AUTH_STREAM_REQ cmd buffer len Anshuman Gupta
2020-10-27 6:36 ` Shankar, Uma
2020-10-27 6:39 ` Winkler, Tomas
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 11/16] drm/hdcp: Max MST content streams Anshuman Gupta
2020-10-27 6:41 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 12/16] drm/i915/hdcp: MST streams support in hdcp port_data Anshuman Gupta
2020-10-27 6:55 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 13/16] drm/i915/hdcp: Pass connector to check_2_2_link Anshuman Gupta
2020-10-27 6:57 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 14/16] drm/i915/hdcp: Add HDCP 2.2 stream register Anshuman Gupta
2020-10-27 7:11 ` Shankar, Uma
2020-10-27 8:57 ` Anshuman Gupta
2020-10-27 9:50 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 15/16] drm/i915/hdcp: Support for HDCP 2.2 MST shim callbacks Anshuman Gupta
2020-10-27 7:20 ` Shankar, Uma
2020-10-23 12:21 ` [Intel-gfx] [PATCH v3 16/16] drm/i915/hdcp: Enable HDCP 2.2 MST support Anshuman Gupta
2020-10-27 7:24 ` Shankar, Uma
2020-10-23 14:41 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for HDCP 2.2 and HDCP 1.4 Gen12 DP " Patchwork
2020-10-23 14:42 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2020-10-23 15:07 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2020-10-23 18:54 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2020-10-22 8:55 [Intel-gfx] [PATCH v3 00/16] HDCP 2.2 DP MST Support Anshuman Gupta
2020-10-22 8:55 ` [Intel-gfx] [PATCH v3 07/16] drm/i915/hdcp: Enable Gen12 HDCP 1.4 DP MST support Anshuman Gupta
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=bcd909eb40694baba56d58941aa7518a@intel.com \
--to=uma.shankar@intel.com \
--cc=anshuman.gupta@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-gfx@lists.freedesktop.org \
--cc=jani.nikula@intel.com \
--cc=seanpaul@chromium.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox