* [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3)
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
@ 2022-02-14 23:56 ` Vivek Kasireddy
2022-02-14 23:56 ` [Intel-gfx] [PATCH 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v7) Vivek Kasireddy
` (5 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Vivek Kasireddy @ 2022-02-14 23:56 UTC (permalink / raw)
To: intel-gfx, dri-devel
This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
functions to identify suitable holes for an allocation of a given
size by efficiently traversing the rbtree associated with the given
allocator.
It replaces the for loop in drm_mm_insert_node_in_range() and can
also be used by drm drivers to quickly identify holes of a certain
size within a given range.
v2: (Tvrtko)
- Prepend a double underscore for the newly exported first/next_hole
- s/each_best_hole/each_suitable_hole/g
- Mask out DRM_MM_INSERT_ONCE from the mode before calling
first/next_hole and elsewhere.
v3: (Tvrtko)
- Reduce the number of hunks by retaining the "mode" variable name
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
---
drivers/gpu/drm/drm_mm.c | 32 +++++++++++++++-----------------
include/drm/drm_mm.h | 36 ++++++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 8257f9d4f619..8efea548ae9f 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -352,10 +352,10 @@ static struct drm_mm_node *find_hole_addr(struct drm_mm *mm, u64 addr, u64 size)
return node;
}
-static struct drm_mm_node *
-first_hole(struct drm_mm *mm,
- u64 start, u64 end, u64 size,
- enum drm_mm_insert_mode mode)
+struct drm_mm_node *
+__drm_mm_first_hole(struct drm_mm *mm,
+ u64 start, u64 end, u64 size,
+ enum drm_mm_insert_mode mode)
{
switch (mode) {
default:
@@ -374,6 +374,7 @@ first_hole(struct drm_mm *mm,
hole_stack);
}
}
+EXPORT_SYMBOL(__drm_mm_first_hole);
/**
* DECLARE_NEXT_HOLE_ADDR - macro to declare next hole functions
@@ -410,11 +411,11 @@ static struct drm_mm_node *name(struct drm_mm_node *entry, u64 size) \
DECLARE_NEXT_HOLE_ADDR(next_hole_high_addr, rb_left, rb_right)
DECLARE_NEXT_HOLE_ADDR(next_hole_low_addr, rb_right, rb_left)
-static struct drm_mm_node *
-next_hole(struct drm_mm *mm,
- struct drm_mm_node *node,
- u64 size,
- enum drm_mm_insert_mode mode)
+struct drm_mm_node *
+__drm_mm_next_hole(struct drm_mm *mm,
+ struct drm_mm_node *node,
+ u64 size,
+ enum drm_mm_insert_mode mode)
{
switch (mode) {
default:
@@ -432,6 +433,7 @@ next_hole(struct drm_mm *mm,
return &node->hole_stack == &mm->hole_stack ? NULL : node;
}
}
+EXPORT_SYMBOL(__drm_mm_next_hole);
/**
* drm_mm_reserve_node - insert an pre-initialized node
@@ -516,11 +518,11 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
u64 size, u64 alignment,
unsigned long color,
u64 range_start, u64 range_end,
- enum drm_mm_insert_mode mode)
+ enum drm_mm_insert_mode caller_mode)
{
struct drm_mm_node *hole;
u64 remainder_mask;
- bool once;
+ enum drm_mm_insert_mode mode = caller_mode & ~DRM_MM_INSERT_ONCE;
DRM_MM_BUG_ON(range_start > range_end);
@@ -533,13 +535,9 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
if (alignment <= 1)
alignment = 0;
- once = mode & DRM_MM_INSERT_ONCE;
- mode &= ~DRM_MM_INSERT_ONCE;
-
remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0;
- for (hole = first_hole(mm, range_start, range_end, size, mode);
- hole;
- hole = once ? NULL : next_hole(mm, hole, size, mode)) {
+ drm_mm_for_each_suitable_hole(hole, mm, range_start, range_end,
+ size, mode) {
u64 hole_start = __drm_mm_hole_node_start(hole);
u64 hole_end = hole_start + hole->hole_size;
u64 adj_start, adj_end;
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index ac33ba1b18bc..777f659f9692 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -400,6 +400,42 @@ static inline u64 drm_mm_hole_node_end(const struct drm_mm_node *hole_node)
1 : 0; \
pos = list_next_entry(pos, hole_stack))
+struct drm_mm_node *
+__drm_mm_first_hole(struct drm_mm *mm,
+ u64 start, u64 end, u64 size,
+ enum drm_mm_insert_mode mode);
+
+struct drm_mm_node *
+__drm_mm_next_hole(struct drm_mm *mm,
+ struct drm_mm_node *node,
+ u64 size,
+ enum drm_mm_insert_mode mode);
+
+/**
+ * drm_mm_for_each_suitable_hole - iterator to optimally walk over all
+ * holes that can fit an allocation of the given @size.
+ * @pos: &drm_mm_node used internally to track progress
+ * @mm: &drm_mm allocator to walk
+ * @range_start: start of the allowed range for the allocation
+ * @range_end: end of the allowed range for the allocation
+ * @size: size of the allocation
+ * @mode: fine-tune the allocation search
+ *
+ * This iterator walks over all holes suitable for the allocation of given
+ * @size in a very efficient manner. It is implemented by calling
+ * drm_mm_first_hole() and drm_mm_next_hole() which identify the
+ * appropriate holes within the given range by efficiently traversing the
+ * rbtree associated with @mm.
+ */
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
+
/*
* Basic range manager support (drm_mm.c)
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v7)
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
2022-02-14 23:56 ` [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3) Vivek Kasireddy
@ 2022-02-14 23:56 ` Vivek Kasireddy
2022-02-15 7:37 ` [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Christian König
` (4 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Vivek Kasireddy @ 2022-02-14 23:56 UTC (permalink / raw)
To: intel-gfx, dri-devel
On platforms capable of allowing 8K (7680 x 4320) modes, pinning 2 or
more framebuffers/scanout buffers results in only one that is mappable/
fenceable. Therefore, pageflipping between these 2 FBs where only one
is mappable/fenceable creates latencies large enough to miss alternate
vblanks thereby producing less optimal framerate.
This mainly happens because when i915_gem_object_pin_to_display_plane()
is called to pin one of the FB objs, the associated vma is identified
as misplaced and therefore i915_vma_unbind() is called which unbinds and
evicts it. This misplaced vma gets subseqently pinned only when
i915_gem_object_ggtt_pin_ww() is called without PIN_MAPPABLE. This
results in a latency of ~10ms and happens every other vblank/repaint cycle.
Therefore, to fix this issue, we try to see if there is space to map
at-least two objects of a given size and return early if there isn't. This
would ensure that we do not try with PIN_MAPPABLE for any objects that
are too big to map thereby preventing unncessary unbind.
Testcase:
Running Weston and weston-simple-egl on an Alderlake_S (ADLS) platform
with a 8K@60 mode results in only ~40 FPS. Since upstream Weston submits
a frame ~7ms before the next vblank, the latencies seen between atomic
commit and flip event are 7, 24 (7 + 16.66), 7, 24..... suggesting that
it misses the vblank every other frame.
Here is the ftrace snippet that shows the source of the ~10ms latency:
i915_gem_object_pin_to_display_plane() {
0.102 us | i915_gem_object_set_cache_level();
i915_gem_object_ggtt_pin_ww() {
0.390 us | i915_vma_instance();
0.178 us | i915_vma_misplaced();
i915_vma_unbind() {
__i915_active_wait() {
0.082 us | i915_active_acquire_if_busy();
0.475 us | }
intel_runtime_pm_get() {
0.087 us | intel_runtime_pm_acquire();
0.259 us | }
__i915_active_wait() {
0.085 us | i915_active_acquire_if_busy();
0.240 us | }
__i915_vma_evict() {
ggtt_unbind_vma() {
gen8_ggtt_clear_range() {
10507.255 us | }
10507.689 us | }
10508.516 us | }
v2: Instead of using bigjoiner checks, determine whether a scanout
buffer is too big by checking to see if it is possible to map
two of them into the ggtt.
v3 (Ville):
- Count how many fb objects can be fit into the available holes
instead of checking for a hole twice the object size.
- Take alignment constraints into account.
- Limit this large scanout buffer check to >= Gen 11 platforms.
v4:
- Remove existing heuristic that checks just for size. (Ville)
- Return early if we find space to map at-least two objects. (Tvrtko)
- Slightly update the commit message.
v5: (Tvrtko)
- Rename the function to indicate that the object may be too big to
map into the aperture.
- Account for guard pages while calculating the total size required
for the object.
- Do not subject all objects to the heuristic check and instead
consider objects only of a certain size.
- Do the hole walk using the rbtree.
- Preserve the existing PIN_NONBLOCK logic.
- Drop the PIN_MAPPABLE check while pinning the VMA.
v6: (Tvrtko)
- Return 0 on success and the specific error code on failure to
preserve the existing behavior.
v7: (Ville)
- Drop the HAS_GMCH(i915), DISPLAY_VER(i915) < 11 and
size < ggtt->mappable_end / 4 checks.
- Drop the redundant check that is based on previous heuristic.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
---
drivers/gpu/drm/i915/i915_gem.c | 120 +++++++++++++++++++++++---------
1 file changed, 86 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2e10187cd0a0..260cd3961ca1 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -49,6 +49,7 @@
#include "gem/i915_gem_pm.h"
#include "gem/i915_gem_region.h"
#include "gem/i915_gem_userptr.h"
+#include "gem/i915_gem_tiling.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_gt.h"
#include "gt/intel_gt_pm.h"
@@ -879,6 +880,88 @@ static void discard_ggtt_vma(struct i915_vma *vma)
spin_unlock(&obj->vma.lock);
}
+static int
+i915_gem_object_fits_in_aperture(struct drm_i915_gem_object *obj,
+ u64 alignment, u64 flags)
+{
+ struct drm_i915_private *i915 = to_i915(obj->base.dev);
+ struct i915_ggtt *ggtt = to_gt(i915)->ggtt;
+ struct drm_mm_node *hole;
+ u64 hole_start, hole_end, start, end;
+ u64 fence_size, fence_alignment;
+ unsigned int count = 0;
+
+ /*
+ * If the required space is larger than the available
+ * aperture, we will not able to find a slot for the
+ * object and unbinding the object now will be in
+ * vain. Worse, doing so may cause us to ping-pong
+ * the object in and out of the Global GTT and
+ * waste a lot of cycles under the mutex.
+ */
+ if (obj->base.size > ggtt->mappable_end)
+ return -E2BIG;
+
+ /*
+ * If NONBLOCK is set the caller is optimistically
+ * trying to cache the full object within the mappable
+ * aperture, and *must* have a fallback in place for
+ * situations where we cannot bind the object. We
+ * can be a little more lax here and use the fallback
+ * more often to avoid costly migrations of ourselves
+ * and other objects within the aperture.
+ */
+ if (!(flags & PIN_NONBLOCK))
+ return 0;
+
+ /*
+ * Other objects such as batchbuffers are fairly small compared
+ * to FBs and are unlikely to exahust the aperture space.
+ * Therefore, return early if this obj is not an FB.
+ */
+ if (!i915_gem_object_is_framebuffer(obj))
+ return 0;
+
+ fence_size = i915_gem_fence_size(i915, obj->base.size,
+ i915_gem_object_get_tiling(obj),
+ i915_gem_object_get_stride(obj));
+
+ if (i915_vm_has_cache_coloring(&ggtt->vm))
+ fence_size += 2 * I915_GTT_PAGE_SIZE;
+
+ fence_alignment = i915_gem_fence_alignment(i915, obj->base.size,
+ i915_gem_object_get_tiling(obj),
+ i915_gem_object_get_stride(obj));
+ alignment = max_t(u64, alignment, fence_alignment);
+
+ /*
+ * Assuming this object is a large scanout buffer, we try to find
+ * out if there is room to map at-least two of them. There could
+ * be space available to map one but to be consistent, we try to
+ * avoid mapping/fencing any of them.
+ */
+ drm_mm_for_each_suitable_hole(hole, &ggtt->vm.mm, 0, ggtt->mappable_end,
+ fence_size, DRM_MM_INSERT_LOW) {
+ hole_start = drm_mm_hole_node_start(hole);
+ hole_end = hole_start + hole->hole_size;
+
+ do {
+ start = round_up(hole_start, alignment);
+ end = min_t(u64, hole_end, ggtt->mappable_end);
+
+ if (range_overflows(start, fence_size, end))
+ break;
+
+ if (++count >= 2)
+ return 0;
+
+ hole_start = start + fence_size;
+ } while (1);
+ }
+
+ return -ENOSPC;
+}
+
struct i915_vma *
i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
struct i915_gem_ww_ctx *ww,
@@ -894,36 +977,9 @@ i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
if (flags & PIN_MAPPABLE &&
(!view || view->type == I915_GGTT_VIEW_NORMAL)) {
- /*
- * If the required space is larger than the available
- * aperture, we will not able to find a slot for the
- * object and unbinding the object now will be in
- * vain. Worse, doing so may cause us to ping-pong
- * the object in and out of the Global GTT and
- * waste a lot of cycles under the mutex.
- */
- if (obj->base.size > ggtt->mappable_end)
- return ERR_PTR(-E2BIG);
-
- /*
- * If NONBLOCK is set the caller is optimistically
- * trying to cache the full object within the mappable
- * aperture, and *must* have a fallback in place for
- * situations where we cannot bind the object. We
- * can be a little more lax here and use the fallback
- * more often to avoid costly migrations of ourselves
- * and other objects within the aperture.
- *
- * Half-the-aperture is used as a simple heuristic.
- * More interesting would to do search for a free
- * block prior to making the commitment to unbind.
- * That caters for the self-harm case, and with a
- * little more heuristics (e.g. NOFAULT, NOEVICT)
- * we could try to minimise harm to others.
- */
- if (flags & PIN_NONBLOCK &&
- obj->base.size > ggtt->mappable_end / 2)
- return ERR_PTR(-ENOSPC);
+ ret = i915_gem_object_fits_in_aperture(obj, alignment, flags);
+ if (ret)
+ return ERR_PTR(ret);
}
new_vma:
@@ -935,10 +991,6 @@ i915_gem_object_ggtt_pin_ww(struct drm_i915_gem_object *obj,
if (flags & PIN_NONBLOCK) {
if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma))
return ERR_PTR(-ENOSPC);
-
- if (flags & PIN_MAPPABLE &&
- vma->fence_size > ggtt->mappable_end / 2)
- return ERR_PTR(-ENOSPC);
}
if (i915_vma_is_pinned(vma) || i915_vma_is_active(vma)) {
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
2022-02-14 23:56 ` [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3) Vivek Kasireddy
2022-02-14 23:56 ` [Intel-gfx] [PATCH 2/2] drm/i915/gem: Don't try to map and fence large scanout buffers (v7) Vivek Kasireddy
@ 2022-02-15 7:37 ` Christian König
2022-02-15 22:23 ` [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3) Vivek Kasireddy
2022-02-16 3:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Patchwork
` (3 subsequent siblings)
6 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2022-02-15 7:37 UTC (permalink / raw)
To: Vivek Kasireddy, intel-gfx, dri-devel; +Cc: Nirmoy Das
Am 15.02.22 um 00:56 schrieb Vivek Kasireddy:
> The first patch is a drm core patch that replaces the for loop in
> drm_mm_insert_node_in_range() with the iterator and would not
> cause any functional changes. The second patch is a i915 driver
> specific patch that also uses the iterator but solves a different
> problem.
Sounds like a good idea to me, but I somehow only see the cover letter
and none of the patches.
Please double check your mail setup, looks like you CCed me only on the
first mail and I don't see the rest on dri-devel for some reason.
Regards,
Christian.
>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Cc: Nirmoy Das <nirmoy.das@intel.com>
> Cc: Christian König <christian.koenig@amd.com>
>
> Vivek Kasireddy (2):
> drm/mm: Add an iterator to optimally walk over holes for an allocation
> (v3)
> drm/i915/gem: Don't try to map and fence large scanout buffers (v7)
>
> drivers/gpu/drm/drm_mm.c | 32 ++++-----
> drivers/gpu/drm/i915/i915_gem.c | 120 +++++++++++++++++++++++---------
> include/drm/drm_mm.h | 36 ++++++++++
> 3 files changed, 137 insertions(+), 51 deletions(-)
>
^ permalink raw reply [flat|nested] 11+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3)
2022-02-15 7:37 ` [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Christian König
@ 2022-02-15 22:23 ` Vivek Kasireddy
2022-02-16 10:36 ` Christian König
0 siblings, 1 reply; 11+ messages in thread
From: Vivek Kasireddy @ 2022-02-15 22:23 UTC (permalink / raw)
To: intel-gfx, dri-devel; +Cc: Christian König
This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
functions to identify suitable holes for an allocation of a given
size by efficiently traversing the rbtree associated with the given
allocator.
It replaces the for loop in drm_mm_insert_node_in_range() and can
also be used by drm drivers to quickly identify holes of a certain
size within a given range.
v2: (Tvrtko)
- Prepend a double underscore for the newly exported first/next_hole
- s/each_best_hole/each_suitable_hole/g
- Mask out DRM_MM_INSERT_ONCE from the mode before calling
first/next_hole and elsewhere.
v3: (Tvrtko)
- Reduce the number of hunks by retaining the "mode" variable name
Cc: Christian König <christian.koenig@amd.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
---
drivers/gpu/drm/drm_mm.c | 32 +++++++++++++++-----------------
include/drm/drm_mm.h | 36 ++++++++++++++++++++++++++++++++++++
2 files changed, 51 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 8257f9d4f619..8efea548ae9f 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -352,10 +352,10 @@ static struct drm_mm_node *find_hole_addr(struct drm_mm *mm, u64 addr, u64 size)
return node;
}
-static struct drm_mm_node *
-first_hole(struct drm_mm *mm,
- u64 start, u64 end, u64 size,
- enum drm_mm_insert_mode mode)
+struct drm_mm_node *
+__drm_mm_first_hole(struct drm_mm *mm,
+ u64 start, u64 end, u64 size,
+ enum drm_mm_insert_mode mode)
{
switch (mode) {
default:
@@ -374,6 +374,7 @@ first_hole(struct drm_mm *mm,
hole_stack);
}
}
+EXPORT_SYMBOL(__drm_mm_first_hole);
/**
* DECLARE_NEXT_HOLE_ADDR - macro to declare next hole functions
@@ -410,11 +411,11 @@ static struct drm_mm_node *name(struct drm_mm_node *entry, u64 size) \
DECLARE_NEXT_HOLE_ADDR(next_hole_high_addr, rb_left, rb_right)
DECLARE_NEXT_HOLE_ADDR(next_hole_low_addr, rb_right, rb_left)
-static struct drm_mm_node *
-next_hole(struct drm_mm *mm,
- struct drm_mm_node *node,
- u64 size,
- enum drm_mm_insert_mode mode)
+struct drm_mm_node *
+__drm_mm_next_hole(struct drm_mm *mm,
+ struct drm_mm_node *node,
+ u64 size,
+ enum drm_mm_insert_mode mode)
{
switch (mode) {
default:
@@ -432,6 +433,7 @@ next_hole(struct drm_mm *mm,
return &node->hole_stack == &mm->hole_stack ? NULL : node;
}
}
+EXPORT_SYMBOL(__drm_mm_next_hole);
/**
* drm_mm_reserve_node - insert an pre-initialized node
@@ -516,11 +518,11 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
u64 size, u64 alignment,
unsigned long color,
u64 range_start, u64 range_end,
- enum drm_mm_insert_mode mode)
+ enum drm_mm_insert_mode caller_mode)
{
struct drm_mm_node *hole;
u64 remainder_mask;
- bool once;
+ enum drm_mm_insert_mode mode = caller_mode & ~DRM_MM_INSERT_ONCE;
DRM_MM_BUG_ON(range_start > range_end);
@@ -533,13 +535,9 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
if (alignment <= 1)
alignment = 0;
- once = mode & DRM_MM_INSERT_ONCE;
- mode &= ~DRM_MM_INSERT_ONCE;
-
remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0;
- for (hole = first_hole(mm, range_start, range_end, size, mode);
- hole;
- hole = once ? NULL : next_hole(mm, hole, size, mode)) {
+ drm_mm_for_each_suitable_hole(hole, mm, range_start, range_end,
+ size, mode) {
u64 hole_start = __drm_mm_hole_node_start(hole);
u64 hole_end = hole_start + hole->hole_size;
u64 adj_start, adj_end;
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index ac33ba1b18bc..777f659f9692 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -400,6 +400,42 @@ static inline u64 drm_mm_hole_node_end(const struct drm_mm_node *hole_node)
1 : 0; \
pos = list_next_entry(pos, hole_stack))
+struct drm_mm_node *
+__drm_mm_first_hole(struct drm_mm *mm,
+ u64 start, u64 end, u64 size,
+ enum drm_mm_insert_mode mode);
+
+struct drm_mm_node *
+__drm_mm_next_hole(struct drm_mm *mm,
+ struct drm_mm_node *node,
+ u64 size,
+ enum drm_mm_insert_mode mode);
+
+/**
+ * drm_mm_for_each_suitable_hole - iterator to optimally walk over all
+ * holes that can fit an allocation of the given @size.
+ * @pos: &drm_mm_node used internally to track progress
+ * @mm: &drm_mm allocator to walk
+ * @range_start: start of the allowed range for the allocation
+ * @range_end: end of the allowed range for the allocation
+ * @size: size of the allocation
+ * @mode: fine-tune the allocation search
+ *
+ * This iterator walks over all holes suitable for the allocation of given
+ * @size in a very efficient manner. It is implemented by calling
+ * drm_mm_first_hole() and drm_mm_next_hole() which identify the
+ * appropriate holes within the given range by efficiently traversing the
+ * rbtree associated with @mm.
+ */
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
+
/*
* Basic range manager support (drm_mm.c)
*/
--
2.34.1
^ permalink raw reply related [flat|nested] 11+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3)
2022-02-15 22:23 ` [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3) Vivek Kasireddy
@ 2022-02-16 10:36 ` Christian König
2022-02-21 12:42 ` Tvrtko Ursulin
0 siblings, 1 reply; 11+ messages in thread
From: Christian König @ 2022-02-16 10:36 UTC (permalink / raw)
To: Vivek Kasireddy, intel-gfx, dri-devel
Am 15.02.22 um 23:23 schrieb Vivek Kasireddy:
> This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
> functions to identify suitable holes for an allocation of a given
> size by efficiently traversing the rbtree associated with the given
> allocator.
>
> It replaces the for loop in drm_mm_insert_node_in_range() and can
> also be used by drm drivers to quickly identify holes of a certain
> size within a given range.
>
> v2: (Tvrtko)
> - Prepend a double underscore for the newly exported first/next_hole
> - s/each_best_hole/each_suitable_hole/g
> - Mask out DRM_MM_INSERT_ONCE from the mode before calling
> first/next_hole and elsewhere.
>
> v3: (Tvrtko)
> - Reduce the number of hunks by retaining the "mode" variable name
>
> Cc: Christian König <christian.koenig@amd.com>
> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
> Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
Of hand it looks like it does what the description says without any
functional change, but I don't know the internals of drm_mm so well either.
Feel free to add an Acked-by: Christian König <christian.koenig@amd.com>.
Regards,
Christian.
> ---
> drivers/gpu/drm/drm_mm.c | 32 +++++++++++++++-----------------
> include/drm/drm_mm.h | 36 ++++++++++++++++++++++++++++++++++++
> 2 files changed, 51 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
> index 8257f9d4f619..8efea548ae9f 100644
> --- a/drivers/gpu/drm/drm_mm.c
> +++ b/drivers/gpu/drm/drm_mm.c
> @@ -352,10 +352,10 @@ static struct drm_mm_node *find_hole_addr(struct drm_mm *mm, u64 addr, u64 size)
> return node;
> }
>
> -static struct drm_mm_node *
> -first_hole(struct drm_mm *mm,
> - u64 start, u64 end, u64 size,
> - enum drm_mm_insert_mode mode)
> +struct drm_mm_node *
> +__drm_mm_first_hole(struct drm_mm *mm,
> + u64 start, u64 end, u64 size,
> + enum drm_mm_insert_mode mode)
> {
> switch (mode) {
> default:
> @@ -374,6 +374,7 @@ first_hole(struct drm_mm *mm,
> hole_stack);
> }
> }
> +EXPORT_SYMBOL(__drm_mm_first_hole);
>
> /**
> * DECLARE_NEXT_HOLE_ADDR - macro to declare next hole functions
> @@ -410,11 +411,11 @@ static struct drm_mm_node *name(struct drm_mm_node *entry, u64 size) \
> DECLARE_NEXT_HOLE_ADDR(next_hole_high_addr, rb_left, rb_right)
> DECLARE_NEXT_HOLE_ADDR(next_hole_low_addr, rb_right, rb_left)
>
> -static struct drm_mm_node *
> -next_hole(struct drm_mm *mm,
> - struct drm_mm_node *node,
> - u64 size,
> - enum drm_mm_insert_mode mode)
> +struct drm_mm_node *
> +__drm_mm_next_hole(struct drm_mm *mm,
> + struct drm_mm_node *node,
> + u64 size,
> + enum drm_mm_insert_mode mode)
> {
> switch (mode) {
> default:
> @@ -432,6 +433,7 @@ next_hole(struct drm_mm *mm,
> return &node->hole_stack == &mm->hole_stack ? NULL : node;
> }
> }
> +EXPORT_SYMBOL(__drm_mm_next_hole);
>
> /**
> * drm_mm_reserve_node - insert an pre-initialized node
> @@ -516,11 +518,11 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
> u64 size, u64 alignment,
> unsigned long color,
> u64 range_start, u64 range_end,
> - enum drm_mm_insert_mode mode)
> + enum drm_mm_insert_mode caller_mode)
> {
> struct drm_mm_node *hole;
> u64 remainder_mask;
> - bool once;
> + enum drm_mm_insert_mode mode = caller_mode & ~DRM_MM_INSERT_ONCE;
>
> DRM_MM_BUG_ON(range_start > range_end);
>
> @@ -533,13 +535,9 @@ int drm_mm_insert_node_in_range(struct drm_mm * const mm,
> if (alignment <= 1)
> alignment = 0;
>
> - once = mode & DRM_MM_INSERT_ONCE;
> - mode &= ~DRM_MM_INSERT_ONCE;
> -
> remainder_mask = is_power_of_2(alignment) ? alignment - 1 : 0;
> - for (hole = first_hole(mm, range_start, range_end, size, mode);
> - hole;
> - hole = once ? NULL : next_hole(mm, hole, size, mode)) {
> + drm_mm_for_each_suitable_hole(hole, mm, range_start, range_end,
> + size, mode) {
> u64 hole_start = __drm_mm_hole_node_start(hole);
> u64 hole_end = hole_start + hole->hole_size;
> u64 adj_start, adj_end;
> diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
> index ac33ba1b18bc..777f659f9692 100644
> --- a/include/drm/drm_mm.h
> +++ b/include/drm/drm_mm.h
> @@ -400,6 +400,42 @@ static inline u64 drm_mm_hole_node_end(const struct drm_mm_node *hole_node)
> 1 : 0; \
> pos = list_next_entry(pos, hole_stack))
>
> +struct drm_mm_node *
> +__drm_mm_first_hole(struct drm_mm *mm,
> + u64 start, u64 end, u64 size,
> + enum drm_mm_insert_mode mode);
> +
> +struct drm_mm_node *
> +__drm_mm_next_hole(struct drm_mm *mm,
> + struct drm_mm_node *node,
> + u64 size,
> + enum drm_mm_insert_mode mode);
> +
> +/**
> + * drm_mm_for_each_suitable_hole - iterator to optimally walk over all
> + * holes that can fit an allocation of the given @size.
> + * @pos: &drm_mm_node used internally to track progress
> + * @mm: &drm_mm allocator to walk
> + * @range_start: start of the allowed range for the allocation
> + * @range_end: end of the allowed range for the allocation
> + * @size: size of the allocation
> + * @mode: fine-tune the allocation search
> + *
> + * This iterator walks over all holes suitable for the allocation of given
> + * @size in a very efficient manner. It is implemented by calling
> + * drm_mm_first_hole() and drm_mm_next_hole() which identify the
> + * appropriate holes within the given range by efficiently traversing the
> + * rbtree associated with @mm.
> + */
> +#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
> + size, mode) \
> + for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
> + mode & ~DRM_MM_INSERT_ONCE); \
> + pos; \
> + pos = mode & DRM_MM_INSERT_ONCE ? \
> + NULL : __drm_mm_next_hole(mm, hole, size, \
> + mode & ~DRM_MM_INSERT_ONCE))
> +
> /*
> * Basic range manager support (drm_mm.c)
> */
^ permalink raw reply [flat|nested] 11+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v3)
2022-02-16 10:36 ` Christian König
@ 2022-02-21 12:42 ` Tvrtko Ursulin
0 siblings, 0 replies; 11+ messages in thread
From: Tvrtko Ursulin @ 2022-02-21 12:42 UTC (permalink / raw)
To: Christian König, Vivek Kasireddy, intel-gfx, dri-devel
On 16/02/2022 10:36, Christian König wrote:
> Am 15.02.22 um 23:23 schrieb Vivek Kasireddy:
>> This iterator relies on drm_mm_first_hole() and drm_mm_next_hole()
>> functions to identify suitable holes for an allocation of a given
>> size by efficiently traversing the rbtree associated with the given
>> allocator.
>>
>> It replaces the for loop in drm_mm_insert_node_in_range() and can
>> also be used by drm drivers to quickly identify holes of a certain
>> size within a given range.
>>
>> v2: (Tvrtko)
>> - Prepend a double underscore for the newly exported first/next_hole
>> - s/each_best_hole/each_suitable_hole/g
>> - Mask out DRM_MM_INSERT_ONCE from the mode before calling
>> first/next_hole and elsewhere.
>>
>> v3: (Tvrtko)
>> - Reduce the number of hunks by retaining the "mode" variable name
>>
>> Cc: Christian König <christian.koenig@amd.com>
>> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
>> Suggested-by: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
>> Signed-off-by: Vivek Kasireddy <vivek.kasireddy@intel.com>
>
> Of hand it looks like it does what the description says without any
> functional change, but I don't know the internals of drm_mm so well either.
>
> Feel free to add an Acked-by: Christian König <christian.koenig@amd.com>.
Thanks!
Can we merge this via the Intel tree as one series (one drm core plus
one i915 patch)? Daniel?
Regards,
Tvrtko
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
` (2 preceding siblings ...)
2022-02-15 7:37 ` [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Christian König
@ 2022-02-16 3:16 ` Patchwork
2022-02-16 3:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
` (2 subsequent siblings)
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-16 3:16 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/100136/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ebe0b21fe6a5 drm/mm: Add an iterator to optimally walk over holes for an allocation (v3)
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pos' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mm' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'size' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'mode' - possible side-effects?
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
-:146: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'mode' may be better as '(mode)' to avoid precedence issues
#146: FILE: include/drm/drm_mm.h:430:
+#define drm_mm_for_each_suitable_hole(pos, mm, range_start, range_end, \
+ size, mode) \
+ for (pos = __drm_mm_first_hole(mm, range_start, range_end, size, \
+ mode & ~DRM_MM_INSERT_ONCE); \
+ pos; \
+ pos = mode & DRM_MM_INSERT_ONCE ? \
+ NULL : __drm_mm_next_hole(mm, hole, size, \
+ mode & ~DRM_MM_INSERT_ONCE))
total: 0 errors, 0 warnings, 5 checks, 114 lines checked
241d025a61c3 drm/i915/gem: Don't try to map and fence large scanout buffers (v7)
^ permalink raw reply [flat|nested] 11+ messages in thread* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
` (3 preceding siblings ...)
2022-02-16 3:16 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Patchwork
@ 2022-02-16 3:19 ` Patchwork
2022-02-16 3:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-02-16 8:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-16 3:19 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/100136/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
^ permalink raw reply [flat|nested] 11+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
` (4 preceding siblings ...)
2022-02-16 3:19 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
@ 2022-02-16 3:51 ` Patchwork
2022-02-16 8:17 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-16 3:51 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 5014 bytes --]
== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/100136/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11230 -> Patchwork_22273
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/index.html
Participating hosts (50 -> 43)
------------------------------
Missing (7): shard-tglu fi-icl-u2 fi-bsw-cyan fi-pnv-d510 shard-rkl shard-dg1 bat-jsl-2
Known issues
------------
Here are the changes found in Patchwork_22273 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-bdw-5557u: [PASS][1] -> [INCOMPLETE][2] ([i915#146])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-bdw-5557u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@gem_huc_copy@huc-copy:
- fi-skl-6600u: NOTRUN -> [SKIP][3] ([fdo#109271] / [i915#2190])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-skl-6600u/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@verify-random:
- fi-skl-6600u: NOTRUN -> [SKIP][4] ([fdo#109271] / [i915#4613]) +3 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-skl-6600u/igt@gem_lmem_swapping@verify-random.html
* igt@i915_selftest@live@hangcheck:
- fi-ivb-3770: [PASS][5] -> [INCOMPLETE][6] ([i915#3303])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-ivb-3770/igt@i915_selftest@live@hangcheck.html
* igt@kms_chamelium@vga-edid-read:
- fi-skl-6600u: NOTRUN -> [SKIP][7] ([fdo#109271] / [fdo#111827]) +8 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-skl-6600u/igt@kms_chamelium@vga-edid-read.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-skl-6600u: NOTRUN -> [SKIP][8] ([fdo#109271]) +21 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-skl-6600u/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-skl-6600u: NOTRUN -> [SKIP][9] ([fdo#109271] / [i915#533])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-skl-6600u/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@runner@aborted:
- fi-ivb-3770: NOTRUN -> [FAIL][10] ([fdo#109271] / [i915#4312])
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-ivb-3770/igt@runner@aborted.html
#### Possible fixes ####
* igt@gem_exec_suspend@basic-s3@smem:
- fi-skl-6600u: [INCOMPLETE][11] ([i915#4547]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/fi-skl-6600u/igt@gem_exec_suspend@basic-s3@smem.html
* igt@i915_selftest@live@hangcheck:
- bat-dg1-6: [DMESG-FAIL][13] ([i915#4957]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/bat-dg1-6/igt@i915_selftest@live@hangcheck.html
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#146]: https://gitlab.freedesktop.org/drm/intel/issues/146
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4547]: https://gitlab.freedesktop.org/drm/intel/issues/4547
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4957]: https://gitlab.freedesktop.org/drm/intel/issues/4957
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
Build changes
-------------
* Linux: CI_DRM_11230 -> Patchwork_22273
CI-20190529: 20190529
CI_DRM_11230: e3741d576f60e3d0df5b385ba96a08ada3c760af @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6345: ee18c0497ec2c74007e299c3fdd26f1613b9f514 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_22273: 241d025a61c3835d371c5c0bef5303e4449f3712 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
241d025a61c3 drm/i915/gem: Don't try to map and fence large scanout buffers (v7)
ebe0b21fe6a5 drm/mm: Add an iterator to optimally walk over holes for an allocation (v3)
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/index.html
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^ permalink raw reply [flat|nested] 11+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
2022-02-14 23:56 [Intel-gfx] [PATCH 0/2] drm/mm: Add an iterator to optimally walk over holes suitable for an allocation Vivek Kasireddy
` (5 preceding siblings ...)
2022-02-16 3:51 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2022-02-16 8:17 ` Patchwork
6 siblings, 0 replies; 11+ messages in thread
From: Patchwork @ 2022-02-16 8:17 UTC (permalink / raw)
To: Vivek Kasireddy; +Cc: intel-gfx
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== Series Details ==
Series: drm/mm: Add an iterator to optimally walk over holes suitable for an allocation
URL : https://patchwork.freedesktop.org/series/100136/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11230_full -> Patchwork_22273_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_22273_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_22273_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (13 -> 12)
------------------------------
Missing (1): shard-dg1
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_22273_full:
### IGT changes ###
#### Possible regressions ####
* igt@gem_eio@kms:
- shard-glk: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk3/igt@gem_eio@kms.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk8/igt@gem_eio@kms.html
#### Warnings ####
* igt@kms_ccs@pipe-d-random-ccs-data-yf_tiled_ccs:
- shard-tglb: [SKIP][3] ([fdo#111615] / [i915#3689]) -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-tglb8/igt@kms_ccs@pipe-d-random-ccs-data-yf_tiled_ccs.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb8/igt@kms_ccs@pipe-d-random-ccs-data-yf_tiled_ccs.html
Known issues
------------
Here are the changes found in Patchwork_22273_full that come from known issues:
### CI changes ###
#### Possible fixes ####
* boot:
- {shard-rkl}: ([PASS][5], [PASS][6], [PASS][7], [FAIL][8], [PASS][9], [PASS][10], [PASS][11], [PASS][12], [PASS][13], [PASS][14], [PASS][15], [PASS][16], [PASS][17], [PASS][18], [PASS][19], [PASS][20]) -> ([PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [PASS][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-6/boot.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-6/boot.html
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-6/boot.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-5/boot.html
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-5/boot.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-5/boot.html
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-5/boot.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-5/boot.html
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-4/boot.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-4/boot.html
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-2/boot.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-2/boot.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-1/boot.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-1/boot.html
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-1/boot.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-1/boot.html
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-6/boot.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-6/boot.html
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-6/boot.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-5/boot.html
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-5/boot.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-5/boot.html
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-5/boot.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-4/boot.html
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-4/boot.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-2/boot.html
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-2/boot.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-2/boot.html
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-1/boot.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-1/boot.html
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-1/boot.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-1/boot.html
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-1/boot.html
### IGT changes ###
#### Issues hit ####
* igt@gem_create@create-massive:
- shard-apl: NOTRUN -> [DMESG-WARN][38] ([i915#4991])
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl8/igt@gem_create@create-massive.html
* igt@gem_ctx_persistence@legacy-engines-hostile@render:
- shard-tglb: [PASS][39] -> [FAIL][40] ([i915#2410])
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-tglb3/igt@gem_ctx_persistence@legacy-engines-hostile@render.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb1/igt@gem_ctx_persistence@legacy-engines-hostile@render.html
* igt@gem_exec_capture@pi@vcs0:
- shard-skl: NOTRUN -> [INCOMPLETE][41] ([i915#4547])
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl10/igt@gem_exec_capture@pi@vcs0.html
* igt@gem_exec_fair@basic-flow@rcs0:
- shard-tglb: [PASS][42] -> [FAIL][43] ([i915#2842])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-tglb1/igt@gem_exec_fair@basic-flow@rcs0.html
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb7/igt@gem_exec_fair@basic-flow@rcs0.html
* igt@gem_exec_fair@basic-none-solo@rcs0:
- shard-tglb: NOTRUN -> [FAIL][44] ([i915#2842])
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@gem_exec_fair@basic-none-solo@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-glk: [PASS][45] -> [FAIL][46] ([i915#2842])
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk5/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-pace-solo@rcs0:
- shard-kbl: [PASS][47] -> [FAIL][48] ([i915#2842])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-kbl4/igt@gem_exec_fair@basic-pace-solo@rcs0.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl7/igt@gem_exec_fair@basic-pace-solo@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-iclb: [PASS][49] -> [FAIL][50] ([i915#2849])
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-iclb4/igt@gem_exec_fair@basic-throttle@rcs0.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb7/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_huc_copy@huc-copy:
- shard-tglb: [PASS][51] -> [SKIP][52] ([i915#2190])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-tglb1/igt@gem_huc_copy@huc-copy.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb7/igt@gem_huc_copy@huc-copy.html
- shard-skl: NOTRUN -> [SKIP][53] ([fdo#109271] / [i915#2190])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl6/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@heavy-random:
- shard-kbl: NOTRUN -> [SKIP][54] ([fdo#109271] / [i915#4613])
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl4/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_softpin@allocator-evict-all-engines:
- shard-glk: [PASS][55] -> [FAIL][56] ([i915#4171])
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk1/igt@gem_softpin@allocator-evict-all-engines.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk2/igt@gem_softpin@allocator-evict-all-engines.html
* igt@gem_tiled_partial_pwrite_pread@writes-after-reads:
- shard-glk: [PASS][57] -> [DMESG-WARN][58] ([i915#118])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk1/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk2/igt@gem_tiled_partial_pwrite_pread@writes-after-reads.html
* igt@gem_userptr_blits@unsync-unmap-cycles:
- shard-iclb: NOTRUN -> [SKIP][59] ([i915#3297])
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@gem_userptr_blits@unsync-unmap-cycles.html
* igt@gem_workarounds@suspend-resume-context:
- shard-apl: [PASS][60] -> [DMESG-WARN][61] ([i915#180])
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-apl4/igt@gem_workarounds@suspend-resume-context.html
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl7/igt@gem_workarounds@suspend-resume-context.html
* igt@gen3_mixed_blits:
- shard-tglb: NOTRUN -> [SKIP][62] ([fdo#109289])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@gen3_mixed_blits.html
* igt@gen7_exec_parse@oacontrol-tracking:
- shard-iclb: NOTRUN -> [SKIP][63] ([fdo#109289]) +2 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@gen7_exec_parse@oacontrol-tracking.html
* igt@i915_pm_dc@dc6-dpms:
- shard-kbl: NOTRUN -> [FAIL][64] ([i915#454])
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl4/igt@i915_pm_dc@dc6-dpms.html
* igt@i915_pm_dc@dc6-psr:
- shard-iclb: [PASS][65] -> [FAIL][66] ([i915#454])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-iclb4/igt@i915_pm_dc@dc6-psr.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb3/igt@i915_pm_dc@dc6-psr.html
* igt@i915_selftest@live@hangcheck:
- shard-snb: [PASS][67] -> [INCOMPLETE][68] ([i915#3921])
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-snb4/igt@i915_selftest@live@hangcheck.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-snb5/igt@i915_selftest@live@hangcheck.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-apl: NOTRUN -> [SKIP][69] ([fdo#109271] / [i915#3777]) +3 similar issues
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl1/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-skl: NOTRUN -> [FAIL][70] ([i915#3763])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl7/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-skl: NOTRUN -> [SKIP][71] ([fdo#109271] / [i915#3777]) +4 similar issues
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl7/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc:
- shard-kbl: NOTRUN -> [SKIP][72] ([fdo#109271] / [i915#3886]) +4 similar issues
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl3/igt@kms_ccs@pipe-a-crc-primary-rotation-180-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][73] ([fdo#109271] / [i915#3886]) +5 similar issues
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl8/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc:
- shard-iclb: NOTRUN -> [SKIP][74] ([fdo#109278] / [i915#3886]) +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@kms_ccs@pipe-b-bad-pixel-format-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs:
- shard-skl: NOTRUN -> [SKIP][75] ([fdo#109271] / [i915#3886]) +3 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl10/igt@kms_ccs@pipe-c-crc-sprite-planes-basic-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-ccs-on-another-bo-yf_tiled_ccs:
- shard-tglb: NOTRUN -> [SKIP][76] ([fdo#111615] / [i915#3689])
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@kms_ccs@pipe-d-ccs-on-another-bo-yf_tiled_ccs.html
* igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs:
- shard-iclb: NOTRUN -> [SKIP][77] ([fdo#109278]) +4 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@kms_ccs@pipe-d-crc-primary-basic-y_tiled_ccs.html
* igt@kms_chamelium@dp-hpd-for-each-pipe:
- shard-kbl: NOTRUN -> [SKIP][78] ([fdo#109271] / [fdo#111827]) +8 similar issues
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl7/igt@kms_chamelium@dp-hpd-for-each-pipe.html
* igt@kms_chamelium@hdmi-cmp-planar-formats:
- shard-iclb: NOTRUN -> [SKIP][79] ([fdo#109284] / [fdo#111827]) +1 similar issue
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@kms_chamelium@hdmi-cmp-planar-formats.html
* igt@kms_chamelium@vga-hpd:
- shard-apl: NOTRUN -> [SKIP][80] ([fdo#109271] / [fdo#111827]) +4 similar issues
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl1/igt@kms_chamelium@vga-hpd.html
* igt@kms_color@pipe-a-ctm-blue-to-red:
- shard-skl: NOTRUN -> [DMESG-WARN][81] ([i915#1982])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl6/igt@kms_color@pipe-a-ctm-blue-to-red.html
* igt@kms_color_chamelium@pipe-d-ctm-blue-to-red:
- shard-skl: NOTRUN -> [SKIP][82] ([fdo#109271] / [fdo#111827]) +8 similar issues
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl6/igt@kms_color_chamelium@pipe-d-ctm-blue-to-red.html
* igt@kms_content_protection@atomic:
- shard-kbl: NOTRUN -> [TIMEOUT][83] ([i915#1319])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl3/igt@kms_content_protection@atomic.html
* igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
- shard-iclb: NOTRUN -> [SKIP][84] ([fdo#109274] / [fdo#109278])
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
- shard-iclb: [PASS][85] -> [FAIL][86] ([i915#2346])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-iclb4/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
* igt@kms_cursor_legacy@pipe-d-torture-bo:
- shard-apl: NOTRUN -> [SKIP][87] ([fdo#109271] / [i915#533]) +1 similar issue
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl1/igt@kms_cursor_legacy@pipe-d-torture-bo.html
* igt@kms_flip@2x-dpms-vs-vblank-race-interruptible:
- shard-tglb: NOTRUN -> [SKIP][88] ([fdo#109274] / [fdo#111825]) +1 similar issue
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@kms_flip@2x-dpms-vs-vblank-race-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][89] -> [FAIL][90] ([i915#79])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk8/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible@bc-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-skl: [PASS][91] -> [FAIL][92] ([i915#79]) +1 similar issue
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-skl10/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl2/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-kbl: [PASS][93] -> [INCOMPLETE][94] ([i915#636])
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-kbl6/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt:
- shard-kbl: NOTRUN -> [SKIP][95] ([fdo#109271]) +84 similar issues
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt:
- shard-skl: NOTRUN -> [SKIP][96] ([fdo#109271]) +78 similar issues
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-iclb: NOTRUN -> [SKIP][97] ([fdo#109280]) +2 similar issues
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt:
- shard-tglb: NOTRUN -> [SKIP][98] ([fdo#109280] / [fdo#111825]) +1 similar issue
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][99] -> [FAIL][100] ([i915#1188])
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-skl1/igt@kms_hdr@bpc-switch-suspend.html
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl10/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c:
- shard-apl: NOTRUN -> [SKIP][101] ([fdo#109271]) +71 similar issues
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl1/igt@kms_pipe_b_c_ivb@disable-pipe-b-enable-pipe-c.html
* igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence:
- shard-kbl: NOTRUN -> [SKIP][102] ([fdo#109271] / [i915#533])
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl7/igt@kms_pipe_crc_basic@read-crc-pipe-d-frame-sequence.html
* igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d:
- shard-skl: NOTRUN -> [SKIP][103] ([fdo#109271] / [i915#533]) +1 similar issue
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl6/igt@kms_pipe_crc_basic@suspend-read-crc-pipe-d.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes:
- shard-kbl: [PASS][104] -> [DMESG-WARN][105] ([i915#180]) +5 similar issues
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-kbl6/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl1/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-b-planes.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-7efc:
- shard-apl: NOTRUN -> [FAIL][106] ([fdo#108145] / [i915#265])
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-7efc.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max:
- shard-skl: NOTRUN -> [FAIL][107] ([fdo#108145] / [i915#265]) +1 similar issue
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-max.html
* igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max:
- shard-kbl: NOTRUN -> [FAIL][108] ([fdo#108145] / [i915#265]) +1 similar issue
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-max.html
* igt@kms_plane_lowres@pipe-b-tiling-y:
- shard-tglb: NOTRUN -> [SKIP][109] ([i915#3536])
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@kms_plane_lowres@pipe-b-tiling-y.html
* igt@kms_psr2_sf@primary-plane-update-sf-dmg-area:
- shard-kbl: NOTRUN -> [SKIP][110] ([fdo#109271] / [i915#658])
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl7/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
- shard-skl: NOTRUN -> [SKIP][111] ([fdo#109271] / [i915#658]) +1 similar issue
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl10/igt@kms_psr2_sf@primary-plane-update-sf-dmg-area.html
* igt@kms_psr@psr2_no_drrs:
- shard-tglb: NOTRUN -> [FAIL][112] ([i915#132] / [i915#3467])
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@kms_psr@psr2_no_drrs.html
* igt@kms_setmode@basic:
- shard-apl: [PASS][113] -> [FAIL][114] ([i915#31])
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-apl7/igt@kms_setmode@basic.html
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl1/igt@kms_setmode@basic.html
- shard-glk: [PASS][115] -> [FAIL][116] ([i915#31])
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk7/igt@kms_setmode@basic.html
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk3/igt@kms_setmode@basic.html
* igt@nouveau_crc@pipe-a-source-outp-inactive:
- shard-iclb: NOTRUN -> [SKIP][117] ([i915#2530])
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb6/igt@nouveau_crc@pipe-a-source-outp-inactive.html
* igt@nouveau_crc@pipe-c-source-outp-inactive:
- shard-tglb: NOTRUN -> [SKIP][118] ([i915#2530])
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb6/igt@nouveau_crc@pipe-c-source-outp-inactive.html
* igt@perf@polling-parameterized:
- shard-glk: [PASS][119] -> [FAIL][120] ([i915#1542])
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk5/igt@perf@polling-parameterized.html
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk5/igt@perf@polling-parameterized.html
* igt@perf_pmu@rc6-suspend:
- shard-apl: NOTRUN -> [DMESG-WARN][121] ([i915#180])
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl8/igt@perf_pmu@rc6-suspend.html
* igt@sysfs_clients@pidname:
- shard-apl: NOTRUN -> [SKIP][122] ([fdo#109271] / [i915#2994])
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl8/igt@sysfs_clients@pidname.html
#### Possible fixes ####
* igt@api_intel_allocator@two-level-inception-interruptible:
- {shard-rkl}: [INCOMPLETE][123] -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-5/igt@api_intel_allocator@two-level-inception-interruptible.html
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-2/igt@api_intel_allocator@two-level-inception-interruptible.html
* igt@gem_exec_capture@pi@bcs0:
- shard-skl: [INCOMPLETE][125] ([i915#4547]) -> [PASS][126]
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-skl1/igt@gem_exec_capture@pi@bcs0.html
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl10/igt@gem_exec_capture@pi@bcs0.html
* igt@gem_exec_capture@pi@rcs0:
- {shard-rkl}: [INCOMPLETE][127] ([i915#3371]) -> [PASS][128]
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-4/igt@gem_exec_capture@pi@rcs0.html
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-1/igt@gem_exec_capture@pi@rcs0.html
* igt@gem_exec_fair@basic-none-share@rcs0:
- shard-iclb: [FAIL][129] ([i915#2842]) -> [PASS][130]
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-iclb3/igt@gem_exec_fair@basic-none-share@rcs0.html
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb7/igt@gem_exec_fair@basic-none-share@rcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][131] ([i915#2842]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglb2/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@kms_big_fb@linear-16bpp-rotate-180:
- {shard-tglu}: [DMESG-WARN][133] ([i915#402]) -> [PASS][134]
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-tglu-2/igt@kms_big_fb@linear-16bpp-rotate-180.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-tglu-3/igt@kms_big_fb@linear-16bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-32bpp-rotate-180:
- shard-glk: [DMESG-WARN][135] ([i915#118]) -> [PASS][136] +1 similar issue
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk8/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk8/igt@kms_big_fb@x-tiled-32bpp-rotate-180.html
* igt@kms_color@pipe-c-invalid-gamma-lut-sizes:
- {shard-rkl}: ([SKIP][137], [PASS][138]) ([i915#4070]) -> [PASS][139]
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-6/igt@kms_color@pipe-c-invalid-gamma-lut-sizes.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-4/igt@kms_color@pipe-c-invalid-gamma-lut-sizes.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-5/igt@kms_color@pipe-c-invalid-gamma-lut-sizes.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-skl: [FAIL][140] ([i915#2346]) -> [PASS][141] +1 similar issue
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-skl2/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl7/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_cursor_legacy@flip-vs-cursor-toggle:
- shard-iclb: [FAIL][142] ([i915#2346]) -> [PASS][143]
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-iclb5/igt@kms_cursor_legacy@flip-vs-cursor-toggle.html
* igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic:
- {shard-rkl}: [SKIP][144] ([fdo#111825]) -> [PASS][145]
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-4/igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-6/igt@kms_cursor_legacy@nonblocking-modeset-vs-cursor-atomic.html
* igt@kms_flip@dpms-off-confusion-interruptible@a-edp1:
- shard-skl: [DMESG-WARN][146] ([i915#1982]) -> [PASS][147]
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-skl1/igt@kms_flip@dpms-off-confusion-interruptible@a-edp1.html
[147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-skl10/igt@kms_flip@dpms-off-confusion-interruptible@a-edp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2:
- shard-glk: [FAIL][148] ([i915#79]) -> [PASS][149]
[148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-glk8/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html
[149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-glk4/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-apl: [DMESG-WARN][150] ([i915#180]) -> [PASS][151] +4 similar issues
[150]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_frontbuffer_tracking@fbc-suspend:
- shard-kbl: [DMESG-WARN][152] ([i915#180]) -> [PASS][153] +4 similar issues
[152]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-kbl1/igt@kms_frontbuffer_tracking@fbc-suspend.html
[153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-kbl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render:
- {shard-rkl}: [SKIP][154] ([i915#4098]) -> [PASS][155]
[154]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11230/shard-rkl-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-render.html
[155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/shard-rkl-6/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_22273/index.html
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