[PATCH 1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[PATCH 1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[Michal Wajdeczko]

If WOPCM layout is already locked in HW we shouldn't continue
with our own partitioning as it could be likely different and
we will be unable to enforce it and fail. Instead we should try
to reuse what is already programmed, maybe there will be a fit.

This should enable us to reload driver with slightly different
HuC firmware (or even without HuC) without need to reboot.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Winiarski <michal.winiarski@intel.com>
---
 drivers/gpu/drm/i915/intel_wopcm.c | 29 +++++++++++++++++++++++++++--
 1 file changed, 27 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
index 2bda24200498..e5bc7b8a433e 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.c
+++ b/drivers/gpu/drm/i915/intel_wopcm.c
@@ -154,6 +154,21 @@ static inline int check_hw_restriction(struct drm_i915_private *i915,
 	return err;
 }
 
+static bool __wopcm_regs_locked(struct intel_uncore *uncore,
+				u32 *guc_wopcm_base, u32 *guc_wopcm_size)
+{
+	u32 reg_base = intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET);
+	u32 reg_size = intel_uncore_read(uncore, GUC_WOPCM_SIZE);
+
+	if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
+	    !(reg_base & GUC_WOPCM_OFFSET_VALID))
+		return false;
+
+	*guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
+	*guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
+	return true;
+}
+
 /**
  * intel_wopcm_init() - Initialize the WOPCM structure.
  * @wopcm: pointer to intel_wopcm.
@@ -167,8 +182,9 @@ static inline int check_hw_restriction(struct drm_i915_private *i915,
 void intel_wopcm_init(struct intel_wopcm *wopcm)
 {
 	struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
-	u32 guc_fw_size = intel_uc_fw_get_upload_size(&i915->gt.uc.guc.fw);
-	u32 huc_fw_size = intel_uc_fw_get_upload_size(&i915->gt.uc.huc.fw);
+	struct intel_gt *gt = &i915->gt;
+	u32 guc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.guc.fw);
+	u32 huc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.huc.fw);
 	u32 ctx_rsvd = context_reserved_size(i915);
 	u32 guc_wopcm_base;
 	u32 guc_wopcm_size;
@@ -185,6 +201,14 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
 	if (i915_inject_probe_failure(i915))
 		return;
 
+	if (__wopcm_regs_locked(gt->uncore, &guc_wopcm_base, &guc_wopcm_size)) {
+		DRM_DEV_DEBUG_DRIVER(i915->drm.dev,
+				     "GuC WOPCM is already locked [%uK, %uK)\n",
+				     guc_wopcm_base / SZ_1K,
+				     guc_wopcm_size / SZ_1K);
+		goto check;
+	}
+
 	if (guc_fw_size >= wopcm->size) {
 		DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.",
 			  guc_fw_size / 1024);
@@ -211,6 +235,7 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
 	DRM_DEBUG_DRIVER("Calculated GuC WOPCM Region: [%uKiB, %uKiB)\n",
 			 guc_wopcm_base / 1024, guc_wopcm_size / 1024);
 
+check:
 	guc_wopcm_rsvd = GUC_WOPCM_RESERVED + GUC_WOPCM_STACK_RESERVED;
 	if ((guc_fw_size + guc_wopcm_rsvd) > guc_wopcm_size) {
 		DRM_ERROR("Need %uKiB WOPCM for GuC, %uKiB available.\n",
-- 
2.19.2

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[PATCH 2/2] drm/i915/uc: Move FW size sanity check back to fetch

[Michal Wajdeczko]

From: Michał Winiarski <michal.winiarski@intel.com>

While we need to know WOPCM size to do this sanity check, it has more to
do with FW than with WOPCM. Let's move the check to fetch phase, it's
not like WOPCM is going to grow in the meantime.

v2: rebased

Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Jackie Li <yaodong.li@intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 11 +++++++++++
 drivers/gpu/drm/i915/intel_wopcm.c       | 14 ++------------
 2 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
index d056e1f4bd6d..98cb0eff143f 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
@@ -265,6 +265,7 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
 	size_t size;
 	int err;
 
+	GEM_BUG_ON(!i915->wopcm.size);
 	GEM_BUG_ON(!intel_uc_fw_supported(uc_fw));
 
 	err = i915_inject_load_error(i915, -ENXIO);
@@ -324,6 +325,16 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
 		goto fail;
 	}
 
+	/* Sanity check whether this fw is not larger than whole WOPCM memory */
+	size = sizeof(struct uc_css_header) + uc_fw->ucode_size;
+	if (unlikely(size >= i915->wopcm.size)) {
+		dev_warn(dev, "%s firmware %s: invalid size: %zu > %zu\n",
+			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
+			 size, (size_t)i915->wopcm.size);
+		err = -E2BIG;
+		goto fail;
+	}
+
 	/* Get version numbers from the CSS header */
 	switch (uc_fw->type) {
 	case INTEL_UC_FW_TYPE_GUC:
diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
index e5bc7b8a433e..295978356eef 100644
--- a/drivers/gpu/drm/i915/intel_wopcm.c
+++ b/drivers/gpu/drm/i915/intel_wopcm.c
@@ -197,6 +197,8 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
 	GEM_BUG_ON(!wopcm->size);
 	GEM_BUG_ON(wopcm->guc.base);
 	GEM_BUG_ON(wopcm->guc.size);
+	GEM_BUG_ON(guc_fw_size >= wopcm->size);
+	GEM_BUG_ON(huc_fw_size >= wopcm->size);
 
 	if (i915_inject_probe_failure(i915))
 		return;
@@ -209,18 +211,6 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
 		goto check;
 	}
 
-	if (guc_fw_size >= wopcm->size) {
-		DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.",
-			  guc_fw_size / 1024);
-		return;
-	}
-
-	if (huc_fw_size >= wopcm->size) {
-		DRM_ERROR("HuC FW (%uKiB) is too big to fit in WOPCM.",
-			  huc_fw_size / 1024);
-		return;
-	}
-
 	guc_wopcm_base = ALIGN(huc_fw_size + WOPCM_RESERVED_SIZE,
 			       GUC_WOPCM_OFFSET_ALIGNMENT);
 	if ((guc_wopcm_base + ctx_rsvd) >= wopcm->size) {
-- 
2.19.2

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Re: [PATCH 2/2] drm/i915/uc: Move FW size sanity check back to fetch

[Daniele Ceraolo Spurio]

On 8/14/19 4:38 AM, Michal Wajdeczko wrote:
> From: Michał Winiarski <michal.winiarski@intel.com>
> 
> While we need to know WOPCM size to do this sanity check, it has more to
> do with FW than with WOPCM. Let's move the check to fetch phase, it's
> not like WOPCM is going to grow in the meantime.
> 
> v2: rebased
> 
> Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Jackie Li <yaodong.li@intel.com>
> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
> ---
>   drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 11 +++++++++++
>   drivers/gpu/drm/i915/intel_wopcm.c       | 14 ++------------
>   2 files changed, 13 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> index d056e1f4bd6d..98cb0eff143f 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c
> @@ -265,6 +265,7 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
>   	size_t size;
>   	int err;
>   
> +	GEM_BUG_ON(!i915->wopcm.size);
>   	GEM_BUG_ON(!intel_uc_fw_supported(uc_fw));
>   
>   	err = i915_inject_load_error(i915, -ENXIO);
> @@ -324,6 +325,16 @@ int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915)
>   		goto fail;
>   	}
>   
> +	/* Sanity check whether this fw is not larger than whole WOPCM memory */
> +	size = sizeof(struct uc_css_header) + uc_fw->ucode_size;

We could add a __intel_uc_fw_get_upload_size() that skips the 
is_available() check and use that here. With our without this:

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>

Daniele

> +	if (unlikely(size >= i915->wopcm.size)) {
> +		dev_warn(dev, "%s firmware %s: invalid size: %zu > %zu\n",
> +			 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path,
> +			 size, (size_t)i915->wopcm.size);
> +		err = -E2BIG;
> +		goto fail;
> +	}
> +
>   	/* Get version numbers from the CSS header */
>   	switch (uc_fw->type) {
>   	case INTEL_UC_FW_TYPE_GUC:
> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
> index e5bc7b8a433e..295978356eef 100644
> --- a/drivers/gpu/drm/i915/intel_wopcm.c
> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
> @@ -197,6 +197,8 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>   	GEM_BUG_ON(!wopcm->size);
>   	GEM_BUG_ON(wopcm->guc.base);
>   	GEM_BUG_ON(wopcm->guc.size);
> +	GEM_BUG_ON(guc_fw_size >= wopcm->size);
> +	GEM_BUG_ON(huc_fw_size >= wopcm->size);
>   
>   	if (i915_inject_probe_failure(i915))
>   		return;
> @@ -209,18 +211,6 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>   		goto check;
>   	}
>   
> -	if (guc_fw_size >= wopcm->size) {
> -		DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.",
> -			  guc_fw_size / 1024);
> -		return;
> -	}
> -
> -	if (huc_fw_size >= wopcm->size) {
> -		DRM_ERROR("HuC FW (%uKiB) is too big to fit in WOPCM.",
> -			  huc_fw_size / 1024);
> -		return;
> -	}
> -
>   	guc_wopcm_base = ALIGN(huc_fw_size + WOPCM_RESERVED_SIZE,
>   			       GUC_WOPCM_OFFSET_ALIGNMENT);
>   	if ((guc_wopcm_base + ctx_rsvd) >= wopcm->size) {
> 
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✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/wopcm: Try to use already locked WOPCM layout
URL   : https://patchwork.freedesktop.org/series/65175/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6706 -> Patchwork_14012
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/

Known issues
------------

  Here are the changes found in Patchwork_14012 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_basic@bad-close:
    - fi-icl-u3:          [PASS][1] -> [DMESG-WARN][2] ([fdo#107724])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/fi-icl-u3/igt@gem_basic@bad-close.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/fi-icl-u3/igt@gem_basic@bad-close.html

  * igt@i915_selftest@live_execlists:
    - fi-skl-gvtdvm:      [PASS][3] -> [DMESG-FAIL][4] ([fdo#111108])
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/fi-skl-gvtdvm/igt@i915_selftest@live_execlists.html

  
#### Possible fixes ####

  * igt@gem_exec_reloc@basic-cpu-read-noreloc:
    - fi-icl-u3:          [DMESG-WARN][5] ([fdo#107724]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/fi-icl-u3/igt@gem_exec_reloc@basic-cpu-read-noreloc.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/fi-icl-u3/igt@gem_exec_reloc@basic-cpu-read-noreloc.html

  * igt@kms_chamelium@hdmi-hpd-fast:
    - fi-icl-u2:          [FAIL][7] ([fdo#109483]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html

  * igt@kms_frontbuffer_tracking@basic:
    - fi-icl-u2:          [FAIL][9] ([fdo#103167]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/fi-icl-u2/igt@kms_frontbuffer_tracking@basic.html

  
#### Warnings ####

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-icl-u2:          [FAIL][11] ([fdo#109483]) -> [DMESG-WARN][12] ([fdo#102505] / [fdo#110390])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/fi-icl-u2/igt@kms_chamelium@common-hpd-after-suspend.html

  
  [fdo#102505]: https://bugs.freedesktop.org/show_bug.cgi?id=102505
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#107724]: https://bugs.freedesktop.org/show_bug.cgi?id=107724
  [fdo#109483]: https://bugs.freedesktop.org/show_bug.cgi?id=109483
  [fdo#110390]: https://bugs.freedesktop.org/show_bug.cgi?id=110390
  [fdo#111108]: https://bugs.freedesktop.org/show_bug.cgi?id=111108


Participating hosts (52 -> 45)
------------------------------

  Additional (1): fi-icl-u4 
  Missing    (8): fi-kbl-soraka fi-ilk-m540 fi-hsw-4200u fi-byt-squawks fi-bsw-cyan fi-icl-y fi-byt-clapper fi-bdw-samus 


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6706 -> Patchwork_14012

  CI-20190529: 20190529
  CI_DRM_6706: 57b60ae5ac6b9d384440562785c2581f6ee8330f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5133: f50ce93c889c4fdc1fd63fd77626a96afd8388a3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14012: 8f00fae7f845d9f4f1eb49d34b494c36e0742474 @ git://anongit.freedesktop.org/gfx-ci/linux


== Linux commits ==

8f00fae7f845 drm/i915/uc: Move FW size sanity check back to fetch
e6a35c96b2ad drm/i915/wopcm: Try to use already locked WOPCM layout

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/
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Re: [PATCH 1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[Daniele Ceraolo Spurio]

On 8/14/19 4:38 AM, Michal Wajdeczko wrote:
> If WOPCM layout is already locked in HW we shouldn't continue
> with our own partitioning as it could be likely different and
> we will be unable to enforce it and fail. Instead we should try
> to reuse what is already programmed, maybe there will be a fit.
> 
> This should enable us to reload driver with slightly different
> HuC firmware (or even without HuC) without need to reboot.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Michal Winiarski <michal.winiarski@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_wopcm.c | 29 +++++++++++++++++++++++++++--
>   1 file changed, 27 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c b/drivers/gpu/drm/i915/intel_wopcm.c
> index 2bda24200498..e5bc7b8a433e 100644
> --- a/drivers/gpu/drm/i915/intel_wopcm.c
> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
> @@ -154,6 +154,21 @@ static inline int check_hw_restriction(struct drm_i915_private *i915,
>   	return err;
>   }
>   
> +static bool __wopcm_regs_locked(struct intel_uncore *uncore,
> +				u32 *guc_wopcm_base, u32 *guc_wopcm_size)
> +{
> +	u32 reg_base = intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET);
> +	u32 reg_size = intel_uncore_read(uncore, GUC_WOPCM_SIZE);
> +
> +	if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
> +	    !(reg_base & GUC_WOPCM_OFFSET_VALID))
> +		return false;

Should we at least WARN in the unlikely case where only one of the 2 
regs is locked?

> +
> +	*guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
> +	*guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
> +	return true;
> +}
> +
>   /**
>    * intel_wopcm_init() - Initialize the WOPCM structure.
>    * @wopcm: pointer to intel_wopcm.
> @@ -167,8 +182,9 @@ static inline int check_hw_restriction(struct drm_i915_private *i915,
>   void intel_wopcm_init(struct intel_wopcm *wopcm)
>   {
>   	struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
> -	u32 guc_fw_size = intel_uc_fw_get_upload_size(&i915->gt.uc.guc.fw);
> -	u32 huc_fw_size = intel_uc_fw_get_upload_size(&i915->gt.uc.huc.fw);
> +	struct intel_gt *gt = &i915->gt;
> +	u32 guc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.guc.fw);
> +	u32 huc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.huc.fw);
>   	u32 ctx_rsvd = context_reserved_size(i915);
>   	u32 guc_wopcm_base;
>   	u32 guc_wopcm_size;
> @@ -185,6 +201,14 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>   	if (i915_inject_probe_failure(i915))
>   		return;
>   
> +	if (__wopcm_regs_locked(gt->uncore, &guc_wopcm_base, &guc_wopcm_size)) {
> +		DRM_DEV_DEBUG_DRIVER(i915->drm.dev,
> +				     "GuC WOPCM is already locked [%uK, %uK)\n",
> +				     guc_wopcm_base / SZ_1K,
> +				     guc_wopcm_size / SZ_1K);
> +		goto check;
> +	}
> +
>   	if (guc_fw_size >= wopcm->size) {
>   		DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.",
>   			  guc_fw_size / 1024);
> @@ -211,6 +235,7 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>   	DRM_DEBUG_DRIVER("Calculated GuC WOPCM Region: [%uKiB, %uKiB)\n",
>   			 guc_wopcm_base / 1024, guc_wopcm_size / 1024);
>   
> +check:

The checks here don't really verify that the sizes we're locked with are 
enough to fit the binaries. We need to at least print an error in that 
case so we can debug why GuC/HuC fails to load later if the sizes are 
not ok.

Daniele

>   	guc_wopcm_rsvd = GUC_WOPCM_RESERVED + GUC_WOPCM_STACK_RESERVED;
>   	if ((guc_fw_size + guc_wopcm_rsvd) > guc_wopcm_size) {
>   		DRM_ERROR("Need %uKiB WOPCM for GuC, %uKiB available.\n",
> 
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Re: [PATCH 1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[Daniele Ceraolo Spurio]

On 8/14/19 12:51 PM, Daniele Ceraolo Spurio wrote:
> 
> 
> On 8/14/19 4:38 AM, Michal Wajdeczko wrote:
>> If WOPCM layout is already locked in HW we shouldn't continue
>> with our own partitioning as it could be likely different and
>> we will be unable to enforce it and fail. Instead we should try
>> to reuse what is already programmed, maybe there will be a fit.
>>
>> This should enable us to reload driver with slightly different
>> HuC firmware (or even without HuC) without need to reboot.
>>
>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>> Cc: Michal Winiarski <michal.winiarski@intel.com>
>> ---
>>   drivers/gpu/drm/i915/intel_wopcm.c | 29 +++++++++++++++++++++++++++--
>>   1 file changed, 27 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c 
>> b/drivers/gpu/drm/i915/intel_wopcm.c
>> index 2bda24200498..e5bc7b8a433e 100644
>> --- a/drivers/gpu/drm/i915/intel_wopcm.c
>> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
>> @@ -154,6 +154,21 @@ static inline int check_hw_restriction(struct 
>> drm_i915_private *i915,
>>       return err;
>>   }
>> +static bool __wopcm_regs_locked(struct intel_uncore *uncore,
>> +                u32 *guc_wopcm_base, u32 *guc_wopcm_size)
>> +{
>> +    u32 reg_base = intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET);
>> +    u32 reg_size = intel_uncore_read(uncore, GUC_WOPCM_SIZE);
>> +
>> +    if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
>> +        !(reg_base & GUC_WOPCM_OFFSET_VALID))
>> +        return false;
> 
> Should we at least WARN in the unlikely case where only one of the 2 
> regs is locked?
> 
>> +
>> +    *guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
>> +    *guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
>> +    return true;
>> +}
>> +
>>   /**
>>    * intel_wopcm_init() - Initialize the WOPCM structure.
>>    * @wopcm: pointer to intel_wopcm.
>> @@ -167,8 +182,9 @@ static inline int check_hw_restriction(struct 
>> drm_i915_private *i915,
>>   void intel_wopcm_init(struct intel_wopcm *wopcm)
>>   {
>>       struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
>> -    u32 guc_fw_size = intel_uc_fw_get_upload_size(&i915->gt.uc.guc.fw);
>> -    u32 huc_fw_size = intel_uc_fw_get_upload_size(&i915->gt.uc.huc.fw);
>> +    struct intel_gt *gt = &i915->gt;
>> +    u32 guc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.guc.fw);
>> +    u32 huc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.huc.fw);
>>       u32 ctx_rsvd = context_reserved_size(i915);
>>       u32 guc_wopcm_base;
>>       u32 guc_wopcm_size;
>> @@ -185,6 +201,14 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>>       if (i915_inject_probe_failure(i915))
>>           return;
>> +    if (__wopcm_regs_locked(gt->uncore, &guc_wopcm_base, 
>> &guc_wopcm_size)) {
>> +        DRM_DEV_DEBUG_DRIVER(i915->drm.dev,
>> +                     "GuC WOPCM is already locked [%uK, %uK)\n",
>> +                     guc_wopcm_base / SZ_1K,
>> +                     guc_wopcm_size / SZ_1K);
>> +        goto check;
>> +    }
>> +
>>       if (guc_fw_size >= wopcm->size) {
>>           DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.",
>>                 guc_fw_size / 1024);
>> @@ -211,6 +235,7 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>>       DRM_DEBUG_DRIVER("Calculated GuC WOPCM Region: [%uKiB, %uKiB)\n",
>>                guc_wopcm_base / 1024, guc_wopcm_size / 1024);
>> +check:
> 
> The checks here don't really verify that the sizes we're locked with are 
> enough to fit the binaries. We need to at least print an error in that 
> case so we can debug why GuC/HuC fails to load later if the sizes are 
> not ok.

Here I meant to refer to HuC only, since guc size is verified below (I'm 
too used to refer to them as a pair :P )

Daniele

> 
> Daniele
> 
>>       guc_wopcm_rsvd = GUC_WOPCM_RESERVED + GUC_WOPCM_STACK_RESERVED;
>>       if ((guc_fw_size + guc_wopcm_rsvd) > guc_wopcm_size) {
>>           DRM_ERROR("Need %uKiB WOPCM for GuC, %uKiB available.\n",
>>
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Re: [PATCH 1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[Michal Wajdeczko]

On Wed, 14 Aug 2019 22:10:51 +0200, Daniele Ceraolo Spurio  
<daniele.ceraolospurio@intel.com> wrote:

>
>
> On 8/14/19 12:51 PM, Daniele Ceraolo Spurio wrote:
>>   On 8/14/19 4:38 AM, Michal Wajdeczko wrote:
>>> If WOPCM layout is already locked in HW we shouldn't continue
>>> with our own partitioning as it could be likely different and
>>> we will be unable to enforce it and fail. Instead we should try
>>> to reuse what is already programmed, maybe there will be a fit.
>>>
>>> This should enable us to reload driver with slightly different
>>> HuC firmware (or even without HuC) without need to reboot.
>>>
>>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>> Cc: Michal Winiarski <michal.winiarski@intel.com>
>>> ---
>>>   drivers/gpu/drm/i915/intel_wopcm.c | 29 +++++++++++++++++++++++++++--
>>>   1 file changed, 27 insertions(+), 2 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c  
>>> b/drivers/gpu/drm/i915/intel_wopcm.c
>>> index 2bda24200498..e5bc7b8a433e 100644
>>> --- a/drivers/gpu/drm/i915/intel_wopcm.c
>>> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
>>> @@ -154,6 +154,21 @@ static inline int check_hw_restriction(struct  
>>> drm_i915_private *i915,
>>>       return err;
>>>   }
>>> +static bool __wopcm_regs_locked(struct intel_uncore *uncore,
>>> +                u32 *guc_wopcm_base, u32 *guc_wopcm_size)
>>> +{
>>> +    u32 reg_base = intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET);
>>> +    u32 reg_size = intel_uncore_read(uncore, GUC_WOPCM_SIZE);
>>> +
>>> +    if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
>>> +        !(reg_base & GUC_WOPCM_OFFSET_VALID))
>>> +        return false;
>>  Should we at least WARN in the unlikely case where only one of the 2  
>> regs is locked?

I wanted just to cover valid case where both regs are locked so
we can grab base/size as final.

If only single reg is locked, then we continue with our own partitioning
as before, and fail during reg verification in uc_init_wopcm() where
we already have WARNs

>>
>>> +
>>> +    *guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
>>> +    *guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
>>> +    return true;
>>> +}
>>> +
>>>   /**
>>>    * intel_wopcm_init() - Initialize the WOPCM structure.
>>>    * @wopcm: pointer to intel_wopcm.
>>> @@ -167,8 +182,9 @@ static inline int check_hw_restriction(struct  
>>> drm_i915_private *i915,
>>>   void intel_wopcm_init(struct intel_wopcm *wopcm)
>>>   {
>>>       struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
>>> -    u32 guc_fw_size =  
>>> intel_uc_fw_get_upload_size(&i915->gt.uc.guc.fw);
>>> -    u32 huc_fw_size =  
>>> intel_uc_fw_get_upload_size(&i915->gt.uc.huc.fw);
>>> +    struct intel_gt *gt = &i915->gt;
>>> +    u32 guc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.guc.fw);
>>> +    u32 huc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.huc.fw);
>>>       u32 ctx_rsvd = context_reserved_size(i915);
>>>       u32 guc_wopcm_base;
>>>       u32 guc_wopcm_size;
>>> @@ -185,6 +201,14 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>>>       if (i915_inject_probe_failure(i915))
>>>           return;
>>> +    if (__wopcm_regs_locked(gt->uncore, &guc_wopcm_base,  
>>> &guc_wopcm_size)) {
>>> +        DRM_DEV_DEBUG_DRIVER(i915->drm.dev,
>>> +                     "GuC WOPCM is already locked [%uK, %uK)\n",
>>> +                     guc_wopcm_base / SZ_1K,
>>> +                     guc_wopcm_size / SZ_1K);
>>> +        goto check;
>>> +    }
>>> +
>>>       if (guc_fw_size >= wopcm->size) {
>>>           DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.",
>>>                 guc_fw_size / 1024);
>>> @@ -211,6 +235,7 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>>>       DRM_DEBUG_DRIVER("Calculated GuC WOPCM Region: [%uKiB, %uKiB)\n",
>>>                guc_wopcm_base / 1024, guc_wopcm_size / 1024);
>>> +check:
>>  The checks here don't really verify that the sizes we're locked with  
>> are enough to fit the binaries. We need to at least print an error in  
>> that case so we can debug why GuC/HuC fails to load later if the sizes  
>> are not ok.

I've added DRM_DEV_DEBUG_DRIVER("GuC WOPCM is already locked [%uK, %uK)\n"
but maybe we should promote it to dev_notice ? will that work for you ?

>
> Here I meant to refer to HuC only, since guc size is verified below (I'm  
> too used to refer to them as a pair :P )
>
> Daniele
>
>>  Daniele
>>
>>>       guc_wopcm_rsvd = GUC_WOPCM_RESERVED + GUC_WOPCM_STACK_RESERVED;
>>>       if ((guc_fw_size + guc_wopcm_rsvd) > guc_wopcm_size) {
>>>           DRM_ERROR("Need %uKiB WOPCM for GuC, %uKiB available.\n",
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Re: [PATCH 1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[Daniele Ceraolo Spurio]

On 8/14/19 1:49 PM, Michal Wajdeczko wrote:
> On Wed, 14 Aug 2019 22:10:51 +0200, Daniele Ceraolo Spurio 
> <daniele.ceraolospurio@intel.com> wrote:
> 
>>
>>
>> On 8/14/19 12:51 PM, Daniele Ceraolo Spurio wrote:
>>>   On 8/14/19 4:38 AM, Michal Wajdeczko wrote:
>>>> If WOPCM layout is already locked in HW we shouldn't continue
>>>> with our own partitioning as it could be likely different and
>>>> we will be unable to enforce it and fail. Instead we should try
>>>> to reuse what is already programmed, maybe there will be a fit.
>>>>
>>>> This should enable us to reload driver with slightly different
>>>> HuC firmware (or even without HuC) without need to reboot.
>>>>
>>>> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
>>>> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>>>> Cc: Chris Wilson <chris@chris-wilson.co.uk>
>>>> Cc: Michal Winiarski <michal.winiarski@intel.com>
>>>> ---
>>>>   drivers/gpu/drm/i915/intel_wopcm.c | 29 +++++++++++++++++++++++++++--
>>>>   1 file changed, 27 insertions(+), 2 deletions(-)
>>>>
>>>> diff --git a/drivers/gpu/drm/i915/intel_wopcm.c 
>>>> b/drivers/gpu/drm/i915/intel_wopcm.c
>>>> index 2bda24200498..e5bc7b8a433e 100644
>>>> --- a/drivers/gpu/drm/i915/intel_wopcm.c
>>>> +++ b/drivers/gpu/drm/i915/intel_wopcm.c
>>>> @@ -154,6 +154,21 @@ static inline int check_hw_restriction(struct 
>>>> drm_i915_private *i915,
>>>>       return err;
>>>>   }
>>>> +static bool __wopcm_regs_locked(struct intel_uncore *uncore,
>>>> +                u32 *guc_wopcm_base, u32 *guc_wopcm_size)
>>>> +{
>>>> +    u32 reg_base = intel_uncore_read(uncore, DMA_GUC_WOPCM_OFFSET);
>>>> +    u32 reg_size = intel_uncore_read(uncore, GUC_WOPCM_SIZE);
>>>> +
>>>> +    if (!(reg_size & GUC_WOPCM_SIZE_LOCKED) ||
>>>> +        !(reg_base & GUC_WOPCM_OFFSET_VALID))
>>>> +        return false;
>>>  Should we at least WARN in the unlikely case where only one of the 2 
>>> regs is locked?
> 
> I wanted just to cover valid case where both regs are locked so
> we can grab base/size as final.
> 
> If only single reg is locked, then we continue with our own partitioning
> as before, and fail during reg verification in uc_init_wopcm() where
> we already have WARNs
> 

That works

>>>
>>>> +
>>>> +    *guc_wopcm_base = reg_base & GUC_WOPCM_OFFSET_MASK;
>>>> +    *guc_wopcm_size = reg_size & GUC_WOPCM_SIZE_MASK;
>>>> +    return true;
>>>> +}
>>>> +
>>>>   /**
>>>>    * intel_wopcm_init() - Initialize the WOPCM structure.
>>>>    * @wopcm: pointer to intel_wopcm.
>>>> @@ -167,8 +182,9 @@ static inline int check_hw_restriction(struct 
>>>> drm_i915_private *i915,
>>>>   void intel_wopcm_init(struct intel_wopcm *wopcm)
>>>>   {
>>>>       struct drm_i915_private *i915 = wopcm_to_i915(wopcm);
>>>> -    u32 guc_fw_size = 
>>>> intel_uc_fw_get_upload_size(&i915->gt.uc.guc.fw);
>>>> -    u32 huc_fw_size = 
>>>> intel_uc_fw_get_upload_size(&i915->gt.uc.huc.fw);
>>>> +    struct intel_gt *gt = &i915->gt;
>>>> +    u32 guc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.guc.fw);
>>>> +    u32 huc_fw_size = intel_uc_fw_get_upload_size(&gt->uc.huc.fw);
>>>>       u32 ctx_rsvd = context_reserved_size(i915);
>>>>       u32 guc_wopcm_base;
>>>>       u32 guc_wopcm_size;
>>>> @@ -185,6 +201,14 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>>>>       if (i915_inject_probe_failure(i915))
>>>>           return;
>>>> +    if (__wopcm_regs_locked(gt->uncore, &guc_wopcm_base, 
>>>> &guc_wopcm_size)) {
>>>> +        DRM_DEV_DEBUG_DRIVER(i915->drm.dev,
>>>> +                     "GuC WOPCM is already locked [%uK, %uK)\n",
>>>> +                     guc_wopcm_base / SZ_1K,
>>>> +                     guc_wopcm_size / SZ_1K);
>>>> +        goto check;
>>>> +    }
>>>> +
>>>>       if (guc_fw_size >= wopcm->size) {
>>>>           DRM_ERROR("GuC FW (%uKiB) is too big to fit in WOPCM.",
>>>>                 guc_fw_size / 1024);
>>>> @@ -211,6 +235,7 @@ void intel_wopcm_init(struct intel_wopcm *wopcm)
>>>>       DRM_DEBUG_DRIVER("Calculated GuC WOPCM Region: [%uKiB, %uKiB)\n",
>>>>                guc_wopcm_base / 1024, guc_wopcm_size / 1024);
>>>> +check:
>>>  The checks here don't really verify that the sizes we're locked with 
>>> are enough to fit the binaries. We need to at least print an error in 
>>> that case so we can debug why GuC/HuC fails to load later if the 
>>> sizes are not ok.
> 
> I've added DRM_DEV_DEBUG_DRIVER("GuC WOPCM is already locked [%uK, %uK)\n"
> but maybe we should promote it to dev_notice ? will that work for you ?

I'd prefer an error-level message if huc doesn't fit so it jumps out 
that this is wrong and not just an informational message. The same as 
what we do with guc size below.

Daniele

> 
>>
>> Here I meant to refer to HuC only, since guc size is verified below 
>> (I'm too used to refer to them as a pair :P )
>>
>> Daniele
>>
>>>  Daniele
>>>
>>>>       guc_wopcm_rsvd = GUC_WOPCM_RESERVED + GUC_WOPCM_STACK_RESERVED;
>>>>       if ((guc_fw_size + guc_wopcm_rsvd) > guc_wopcm_size) {
>>>>           DRM_ERROR("Need %uKiB WOPCM for GuC, %uKiB available.\n",
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✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/wopcm: Try to use already locked WOPCM layout

[Patchwork]

== Series Details ==

Series: series starting with [1/2] drm/i915/wopcm: Try to use already locked WOPCM layout
URL   : https://patchwork.freedesktop.org/series/65175/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_6706_full -> Patchwork_14012_full
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Known issues
------------

  Here are the changes found in Patchwork_14012_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_eio@reset-stress:
    - shard-glk:          [PASS][1] -> [FAIL][2] ([fdo#109661])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-glk8/igt@gem_eio@reset-stress.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-glk3/igt@gem_eio@reset-stress.html

  * igt@gem_exec_async@concurrent-writes-bsd:
    - shard-iclb:         [PASS][3] -> [SKIP][4] ([fdo#111325]) +5 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb5/igt@gem_exec_async@concurrent-writes-bsd.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb2/igt@gem_exec_async@concurrent-writes-bsd.html

  * igt@gem_softpin@noreloc-s3:
    - shard-skl:          [PASS][5] -> [INCOMPLETE][6] ([fdo#104108]) +2 similar issues
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-skl8/igt@gem_softpin@noreloc-s3.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-skl5/igt@gem_softpin@noreloc-s3.html

  * igt@i915_suspend@sysfs-reader:
    - shard-apl:          [PASS][7] -> [DMESG-WARN][8] ([fdo#108566]) +9 similar issues
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-apl7/igt@i915_suspend@sysfs-reader.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-apl6/igt@i915_suspend@sysfs-reader.html

  * igt@kms_cursor_crc@pipe-c-cursor-64x64-random:
    - shard-apl:          [PASS][9] -> [INCOMPLETE][10] ([fdo#103927]) +2 similar issues
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-apl5/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-apl4/igt@kms_cursor_crc@pipe-c-cursor-64x64-random.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite:
    - shard-iclb:         [PASS][11] -> [FAIL][12] ([fdo#103167]) +3 similar issues
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-pwrite.html

  * igt@kms_pipe_crc_basic@read-crc-pipe-a:
    - shard-skl:          [PASS][13] -> [FAIL][14] ([fdo#103191])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-skl5/igt@kms_pipe_crc_basic@read-crc-pipe-a.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-skl6/igt@kms_pipe_crc_basic@read-crc-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-b-coverage-7efc:
    - shard-skl:          [PASS][15] -> [FAIL][16] ([fdo#108145] / [fdo#110403])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-skl5/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-skl6/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html

  * igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min:
    - shard-skl:          [PASS][17] -> [FAIL][18] ([fdo#108145]) +1 similar issue
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-min.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         [PASS][19] -> [FAIL][20] ([fdo#103166])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-y.html
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb6/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_psr@psr2_sprite_plane_move:
    - shard-iclb:         [PASS][21] -> [SKIP][22] ([fdo#109441]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb2/igt@kms_psr@psr2_sprite_plane_move.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb6/igt@kms_psr@psr2_sprite_plane_move.html

  * igt@kms_rotation_crc@multiplane-rotation-cropping-top:
    - shard-kbl:          [PASS][23] -> [INCOMPLETE][24] ([fdo#103665])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-kbl7/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-kbl2/igt@kms_rotation_crc@multiplane-rotation-cropping-top.html

  * igt@prime_vgem@fence-wait-bsd2:
    - shard-iclb:         [PASS][25] -> [SKIP][26] ([fdo#109276]) +15 similar issues
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb1/igt@prime_vgem@fence-wait-bsd2.html
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb8/igt@prime_vgem@fence-wait-bsd2.html

  
#### Possible fixes ####

  * igt@gem_eio@in-flight-suspend:
    - shard-apl:          [DMESG-WARN][27] ([fdo#108566]) -> [PASS][28] +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-apl8/igt@gem_eio@in-flight-suspend.html
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-apl7/igt@gem_eio@in-flight-suspend.html

  * igt@gem_exec_schedule@preempt-contexts-bsd2:
    - shard-iclb:         [SKIP][29] ([fdo#109276]) -> [PASS][30] +25 similar issues
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb3/igt@gem_exec_schedule@preempt-contexts-bsd2.html
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb4/igt@gem_exec_schedule@preempt-contexts-bsd2.html

  * igt@gem_exec_schedule@preempt-self-bsd:
    - shard-iclb:         [SKIP][31] ([fdo#111325]) -> [PASS][32] +4 similar issues
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb4/igt@gem_exec_schedule@preempt-self-bsd.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb5/igt@gem_exec_schedule@preempt-self-bsd.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-apl:          [DMESG-WARN][33] ([fdo#108686]) -> [PASS][34]
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-apl4/igt@gem_tiled_swapping@non-threaded.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-apl4/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_hangman@error-state-capture-vcs0:
    - shard-hsw:          [INCOMPLETE][35] ([fdo#103540]) -> [PASS][36]
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-hsw8/igt@i915_hangman@error-state-capture-vcs0.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-hsw8/igt@i915_hangman@error-state-capture-vcs0.html

  * igt@i915_pm_rc6_residency@rc6-accuracy:
    - shard-snb:          [SKIP][37] ([fdo#109271]) -> [PASS][38]
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-snb6/igt@i915_pm_rc6_residency@rc6-accuracy.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-snb7/igt@i915_pm_rc6_residency@rc6-accuracy.html

  * igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic:
    - shard-hsw:          [FAIL][39] ([fdo#105767]) -> [PASS][40]
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-hsw6/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-hsw8/igt@kms_cursor_legacy@2x-long-cursor-vs-flip-atomic.html

  * igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic:
    - shard-glk:          [FAIL][41] ([fdo#104873]) -> [PASS][42]
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-glk8/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-glk6/igt@kms_cursor_legacy@2x-long-flip-vs-cursor-atomic.html

  * igt@kms_frontbuffer_tracking@basic:
    - shard-iclb:         [FAIL][43] ([fdo#103167]) -> [PASS][44] +2 similar issues
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb5/igt@kms_frontbuffer_tracking@basic.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb2/igt@kms_frontbuffer_tracking@basic.html

  * igt@kms_setmode@basic:
    - shard-skl:          [FAIL][45] ([fdo#99912]) -> [PASS][46]
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-skl5/igt@kms_setmode@basic.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-skl4/igt@kms_setmode@basic.html

  * igt@perf@blocking:
    - shard-skl:          [FAIL][47] ([fdo#110728]) -> [PASS][48]
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-skl2/igt@perf@blocking.html
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-skl1/igt@perf@blocking.html

  * igt@perf_pmu@busy-idle-no-semaphores-vecs0:
    - shard-apl:          [DMESG-WARN][49] -> [PASS][50]
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-apl4/igt@perf_pmu@busy-idle-no-semaphores-vecs0.html
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-apl1/igt@perf_pmu@busy-idle-no-semaphores-vecs0.html

  * igt@prime_mmap_coherency@write:
    - shard-apl:          [INCOMPLETE][51] ([fdo#103927]) -> [PASS][52] +1 similar issue
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-apl5/igt@prime_mmap_coherency@write.html
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-apl6/igt@prime_mmap_coherency@write.html

  
#### Warnings ####

  * igt@gem_mocs_settings@mocs-isolation-bsd2:
    - shard-iclb:         [FAIL][53] ([fdo#111330]) -> [SKIP][54] ([fdo#109276])
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6706/shard-iclb2/igt@gem_mocs_settings@mocs-isolation-bsd2.html
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/shard-iclb6/igt@gem_mocs_settings@mocs-isolation-bsd2.html

  
  [fdo#103166]: https://bugs.freedesktop.org/show_bug.cgi?id=103166
  [fdo#103167]: https://bugs.freedesktop.org/show_bug.cgi?id=103167
  [fdo#103191]: https://bugs.freedesktop.org/show_bug.cgi?id=103191
  [fdo#103540]: https://bugs.freedesktop.org/show_bug.cgi?id=103540
  [fdo#103665]: https://bugs.freedesktop.org/show_bug.cgi?id=103665
  [fdo#103927]: https://bugs.freedesktop.org/show_bug.cgi?id=103927
  [fdo#104108]: https://bugs.freedesktop.org/show_bug.cgi?id=104108
  [fdo#104873]: https://bugs.freedesktop.org/show_bug.cgi?id=104873
  [fdo#105767]: https://bugs.freedesktop.org/show_bug.cgi?id=105767
  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#108566]: https://bugs.freedesktop.org/show_bug.cgi?id=108566
  [fdo#108686]: https://bugs.freedesktop.org/show_bug.cgi?id=108686
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109276]: https://bugs.freedesktop.org/show_bug.cgi?id=109276
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109661]: https://bugs.freedesktop.org/show_bug.cgi?id=109661
  [fdo#110403]: https://bugs.freedesktop.org/show_bug.cgi?id=110403
  [fdo#110728]: https://bugs.freedesktop.org/show_bug.cgi?id=110728
  [fdo#111325]: https://bugs.freedesktop.org/show_bug.cgi?id=111325
  [fdo#111330]: https://bugs.freedesktop.org/show_bug.cgi?id=111330
  [fdo#99912]: https://bugs.freedesktop.org/show_bug.cgi?id=99912


Participating hosts (10 -> 10)
------------------------------

  No changes in participating hosts


Build changes
-------------

  * CI: CI-20190529 -> None
  * Linux: CI_DRM_6706 -> Patchwork_14012

  CI-20190529: 20190529
  CI_DRM_6706: 57b60ae5ac6b9d384440562785c2581f6ee8330f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_5133: f50ce93c889c4fdc1fd63fd77626a96afd8388a3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Patchwork_14012: 8f00fae7f845d9f4f1eb49d34b494c36e0742474 @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14012/
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