Re: [Intel-gfx] [PATCH v5 1/4] drm/i915: Add GuC TLB Invalidation pci tags

[John Harrison <john.c.harrison@intel.com>]

On 10/4/2023 12:03, Andi Shyti wrote:
> Hi Jonathan,
>
> On Wed, Oct 04, 2023 at 11:36:22AM -0700, Jonathan Cavitt wrote:
>> Add pci (device info) tags for if GuC TLB Invalidation is enabled.
>> Since GuC based TLB invalidation is only strictly necessary for MTL
>> resently, only enable GuC based TLB invalidations for MTL.
>>
>> Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
> Jani was mentioning that the pci tags is not a proper title.
>
> No need to resend, I think I will merge this series, so that, if
> you agree, I can change /pci tags/pci flag/ before pushing.
Have all the review comments been addressed? Surely it can't be pushed 
until it has at least an ack from everyone who has expressed concerns 
about the changes?

John.

>
> In any case.
>
> Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
>
> Andi
>
>> ---
>>   drivers/gpu/drm/i915/i915_drv.h          | 1 +
>>   drivers/gpu/drm/i915/i915_pci.c          | 1 +
>>   drivers/gpu/drm/i915/intel_device_info.h | 3 ++-
>>   3 files changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
>> index 2b7a6db4d0d44..1e25cc1e3dba1 100644
>> --- a/drivers/gpu/drm/i915/i915_drv.h
>> +++ b/drivers/gpu/drm/i915/i915_drv.h
>> @@ -807,4 +807,5 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>>   #define HAS_LMEMBAR_SMEM_STOLEN(i915) (!HAS_LMEM(i915) && \
>>   				       GRAPHICS_VER_FULL(i915) >= IP_VER(12, 70))
>>   
>> +#define HAS_GUC_TLB_INVALIDATION(i915)	(INTEL_INFO(i915)->has_guc_tlb_invalidation)
>>   #endif
>> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
>> index df7c261410f79..c3a5d5efb45d1 100644
>> --- a/drivers/gpu/drm/i915/i915_pci.c
>> +++ b/drivers/gpu/drm/i915/i915_pci.c
>> @@ -837,6 +837,7 @@ static const struct intel_device_info mtl_info = {
>>   	.memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
>>   	.platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
>>   	.require_force_probe = 1,
>> +	.has_guc_tlb_invalidation = 1,
>>   	MTL_CACHELEVEL,
>>   };
>>   
>> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
>> index 39817490b13fd..ad54db0a22470 100644
>> --- a/drivers/gpu/drm/i915/intel_device_info.h
>> +++ b/drivers/gpu/drm/i915/intel_device_info.h
>> @@ -173,7 +173,8 @@ enum intel_ppgtt_type {
>>   	func(has_coherent_ggtt); \
>>   	func(tuning_thread_rr_after_dep); \
>>   	func(unfenced_needs_alignment); \
>> -	func(hws_needs_physical);
>> +	func(hws_needs_physical); \
>> +	func(has_guc_tlb_invalidation);
>>   
>>   struct intel_ip_version {
>>   	u8 ver;
>> -- 
>> 2.25.1