* [Intel-gfx] [PATCH 2/8] drm/i915/display: add namespace to intel_finish_reset
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
@ 2020-11-06 22:55 ` Lucas De Marchi
2020-11-09 9:00 ` Jani Nikula
2020-11-06 22:55 ` [Intel-gfx] [PATCH 3/8] drm/i915/display: Do not reset display when there is none Lucas De Marchi
` (9 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 22:55 UTC (permalink / raw)
To: intel-gfx
Rename intel_finish_reset to intel_display_finish_reset, so it's clear
from gt/ that we are calling out the display code.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 2 +-
drivers/gpu/drm/i915/display/intel_display.h | 2 +-
drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 4050bc60f632..ab04c89cdf05 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -5011,7 +5011,7 @@ void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
state->acquire_ctx = ctx;
}
-void intel_finish_reset(struct drm_i915_private *dev_priv)
+void intel_display_finish_reset(struct drm_i915_private *dev_priv)
{
struct drm_device *dev = &dev_priv->drm;
struct drm_modeset_acquire_ctx *ctx = &dev_priv->reset_ctx;
diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
index 30960cc8b8a6..a988f9518ece 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -591,7 +591,7 @@ int lpt_get_iclkip(struct drm_i915_private *dev_priv);
bool intel_fuzzy_clock_check(int clock1, int clock2);
void intel_display_prepare_reset(struct drm_i915_private *dev_priv);
-void intel_finish_reset(struct drm_i915_private *dev_priv);
+void intel_display_finish_reset(struct drm_i915_private *dev_priv);
void intel_dp_get_m_n(struct intel_crtc *crtc,
struct intel_crtc_state *pipe_config);
void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state,
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index d71bad8c07b7..6b07ff5249f5 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -1198,7 +1198,7 @@ static void intel_gt_reset_global(struct intel_gt *gt,
intel_gt_reset(gt, engine_mask, reason);
- intel_finish_reset(gt->i915);
+ intel_display_finish_reset(gt->i915);
}
if (!test_bit(I915_WEDGED, >->reset.flags))
--
2.29.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 2/8] drm/i915/display: add namespace to intel_finish_reset
2020-11-06 22:55 ` [Intel-gfx] [PATCH 2/8] drm/i915/display: add namespace to intel_finish_reset Lucas De Marchi
@ 2020-11-09 9:00 ` Jani Nikula
0 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2020-11-09 9:00 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx
On Fri, 06 Nov 2020, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> Rename intel_finish_reset to intel_display_finish_reset, so it's clear
> from gt/ that we are calling out the display code.
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 4050bc60f632..ab04c89cdf05 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -5011,7 +5011,7 @@ void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
> state->acquire_ctx = ctx;
> }
>
> -void intel_finish_reset(struct drm_i915_private *dev_priv)
> +void intel_display_finish_reset(struct drm_i915_private *dev_priv)
> {
> struct drm_device *dev = &dev_priv->drm;
> struct drm_modeset_acquire_ctx *ctx = &dev_priv->reset_ctx;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index 30960cc8b8a6..a988f9518ece 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -591,7 +591,7 @@ int lpt_get_iclkip(struct drm_i915_private *dev_priv);
> bool intel_fuzzy_clock_check(int clock1, int clock2);
>
> void intel_display_prepare_reset(struct drm_i915_private *dev_priv);
> -void intel_finish_reset(struct drm_i915_private *dev_priv);
> +void intel_display_finish_reset(struct drm_i915_private *dev_priv);
> void intel_dp_get_m_n(struct intel_crtc *crtc,
> struct intel_crtc_state *pipe_config);
> void intel_dp_set_m_n(const struct intel_crtc_state *crtc_state,
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index d71bad8c07b7..6b07ff5249f5 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -1198,7 +1198,7 @@ static void intel_gt_reset_global(struct intel_gt *gt,
>
> intel_gt_reset(gt, engine_mask, reason);
>
> - intel_finish_reset(gt->i915);
> + intel_display_finish_reset(gt->i915);
> }
>
> if (!test_bit(I915_WEDGED, >->reset.flags))
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH 3/8] drm/i915/display: Do not reset display when there is none
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
2020-11-06 22:55 ` [Intel-gfx] [PATCH 2/8] drm/i915/display: add namespace to intel_finish_reset Lucas De Marchi
@ 2020-11-06 22:55 ` Lucas De Marchi
2020-11-09 9:00 ` Jani Nikula
2020-11-06 22:55 ` [Intel-gfx] [PATCH 4/8] drm/i915/display: return earlier from intel_modeset_init() without display Lucas De Marchi
` (8 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 22:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: José Roberto de Souza <jose.souza@intel.com>
Display is always disabled and enabled when resetting any engine, but if
there is no display it should not do anything with display and only
reset the needed engines.
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index ab04c89cdf05..b6a9d41a043e 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -4958,6 +4958,9 @@ void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
struct drm_atomic_state *state;
int ret;
+ if (!HAS_DISPLAY(dev_priv))
+ return;
+
/* reset doesn't touch the display */
if (!dev_priv->params.force_reset_modeset_test &&
!gpu_reset_clobbers_display(dev_priv))
@@ -5018,6 +5021,9 @@ void intel_display_finish_reset(struct drm_i915_private *dev_priv)
struct drm_atomic_state *state;
int ret;
+ if (!HAS_DISPLAY(dev_priv))
+ return;
+
/* reset doesn't touch the display */
if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
return;
--
2.29.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 3/8] drm/i915/display: Do not reset display when there is none
2020-11-06 22:55 ` [Intel-gfx] [PATCH 3/8] drm/i915/display: Do not reset display when there is none Lucas De Marchi
@ 2020-11-09 9:00 ` Jani Nikula
0 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2020-11-09 9:00 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx
On Fri, 06 Nov 2020, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> From: José Roberto de Souza <jose.souza@intel.com>
>
> Display is always disabled and enabled when resetting any engine, but if
> there is no display it should not do anything with display and only
> reset the needed engines.
>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index ab04c89cdf05..b6a9d41a043e 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4958,6 +4958,9 @@ void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
> struct drm_atomic_state *state;
> int ret;
>
> + if (!HAS_DISPLAY(dev_priv))
> + return;
> +
> /* reset doesn't touch the display */
> if (!dev_priv->params.force_reset_modeset_test &&
> !gpu_reset_clobbers_display(dev_priv))
> @@ -5018,6 +5021,9 @@ void intel_display_finish_reset(struct drm_i915_private *dev_priv)
> struct drm_atomic_state *state;
> int ret;
>
> + if (!HAS_DISPLAY(dev_priv))
> + return;
> +
> /* reset doesn't touch the display */
> if (!test_bit(I915_RESET_MODESET, &dev_priv->gt.reset.flags))
> return;
--
Jani Nikula, Intel Open Source Graphics Center
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH 4/8] drm/i915/display: return earlier from intel_modeset_init() without display
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
2020-11-06 22:55 ` [Intel-gfx] [PATCH 2/8] drm/i915/display: add namespace to intel_finish_reset Lucas De Marchi
2020-11-06 22:55 ` [Intel-gfx] [PATCH 3/8] drm/i915/display: Do not reset display when there is none Lucas De Marchi
@ 2020-11-06 22:55 ` Lucas De Marchi
2020-11-09 20:46 ` Souza, Jose
2020-11-06 22:55 ` [Intel-gfx] [PATCH 5/8] drm/i915/display: Do not set any power wells when there is no display Lucas De Marchi
` (7 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 22:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: Jani Nikula <jani.nikula@intel.com>
!HAS_DISPLAY() implies !HAS_OVERLAY(), skipping overlay setup anyway, so
return earlier from intel_modeset_init() for clarity.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index b6a9d41a043e..b3e6c43f0cb2 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -18364,11 +18364,11 @@ int intel_modeset_init(struct drm_i915_private *i915)
{
int ret;
- intel_overlay_setup(i915);
-
if (!HAS_DISPLAY(i915))
return 0;
+ intel_overlay_setup(i915);
+
ret = intel_fbdev_init(&i915->drm);
if (ret)
return ret;
--
2.29.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 4/8] drm/i915/display: return earlier from intel_modeset_init() without display
2020-11-06 22:55 ` [Intel-gfx] [PATCH 4/8] drm/i915/display: return earlier from intel_modeset_init() without display Lucas De Marchi
@ 2020-11-09 20:46 ` Souza, Jose
0 siblings, 0 replies; 19+ messages in thread
From: Souza, Jose @ 2020-11-09 20:46 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, De Marchi, Lucas; +Cc: Nikula, Jani
On Fri, 2020-11-06 at 14:55 -0800, Lucas De Marchi wrote:
> From: Jani Nikula <jani.nikula@intel.com>
>
> !HAS_DISPLAY() implies !HAS_OVERLAY(), skipping overlay setup anyway, so
> return earlier from intel_modeset_init() for clarity.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index b6a9d41a043e..b3e6c43f0cb2 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -18364,11 +18364,11 @@ int intel_modeset_init(struct drm_i915_private *i915)
> {
> int ret;
>
>
>
>
> - intel_overlay_setup(i915);
> -
> if (!HAS_DISPLAY(i915))
> return 0;
>
>
>
>
> + intel_overlay_setup(i915);
> +
> ret = intel_fbdev_init(&i915->drm);
> if (ret)
> return ret;
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH 5/8] drm/i915/display: Do not set any power wells when there is no display
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (2 preceding siblings ...)
2020-11-06 22:55 ` [Intel-gfx] [PATCH 4/8] drm/i915/display: return earlier from intel_modeset_init() without display Lucas De Marchi
@ 2020-11-06 22:55 ` Lucas De Marchi
2020-11-06 23:18 ` Lucas De Marchi
2020-11-06 22:55 ` [Intel-gfx] [PATCH 6/8] drm/i915: re-order if/else ladder for hpd_irq_setup Lucas De Marchi
` (6 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 22:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
From: José Roberto de Souza <jose.souza@intel.com>
Power wells are only part of display block and not necessary when
we don't have display.
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_power.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 689922480661..19a3c93c5489 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4567,6 +4567,11 @@ __set_power_wells(struct i915_power_domains *power_domains,
int power_well_count = 0;
int i, plt_idx = 0;
+ if (!HAS_DISPLAY(i915)) {
+ power_domains->power_well_count = 0;
+ return 0;
+ }
+
for (i = 0; i < power_well_descs_sz; i++)
if (!(BIT_ULL(power_well_descs[i].id) & skip_mask))
power_well_count++;
--
2.29.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 5/8] drm/i915/display: Do not set any power wells when there is no display
2020-11-06 22:55 ` [Intel-gfx] [PATCH 5/8] drm/i915/display: Do not set any power wells when there is no display Lucas De Marchi
@ 2020-11-06 23:18 ` Lucas De Marchi
0 siblings, 0 replies; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 23:18 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
On Fri, Nov 06, 2020 at 02:55:28PM -0800, Lucas De Marchi wrote:
>From: José Roberto de Souza <jose.souza@intel.com>
>
>Power wells are only part of display block and not necessary when
>we don't have display.
>
>Cc: Jani Nikula <jani.nikula@intel.com>
>Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
>Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
>---
> drivers/gpu/drm/i915/display/intel_display_power.c | 5 +++++
> 1 file changed, 5 insertions(+)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
>index 689922480661..19a3c93c5489 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_power.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
>@@ -4567,6 +4567,11 @@ __set_power_wells(struct i915_power_domains *power_domains,
> int power_well_count = 0;
> int i, plt_idx = 0;
>
>+ if (!HAS_DISPLAY(i915)) {
>+ power_domains->power_well_count = 0;
>+ return 0;
>+ }
so I sent this to get some discussion going, but I think this is out of
place.
__set_power_wells() is ultimately called only by
intel_power_domains_init()
From that function, I think we may want to initialize
power_domains->lock to make the calls outside display/ to work,
but that should be it. We could just have this check and return on top
of intel_power_domains_init().
Lucas De Marchi
>+
> for (i = 0; i < power_well_descs_sz; i++)
> if (!(BIT_ULL(power_well_descs[i].id) & skip_mask))
> power_well_count++;
>--
>2.29.0
>
>_______________________________________________
>Intel-gfx mailing list
>Intel-gfx@lists.freedesktop.org
>https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH 6/8] drm/i915: re-order if/else ladder for hpd_irq_setup
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (3 preceding siblings ...)
2020-11-06 22:55 ` [Intel-gfx] [PATCH 5/8] drm/i915/display: Do not set any power wells when there is no display Lucas De Marchi
@ 2020-11-06 22:55 ` Lucas De Marchi
2020-11-09 20:47 ` Souza, Jose
2020-11-06 22:55 ` [Intel-gfx] [PATCH 7/8] drm/i915: move display-related to the end of intel_irq_init() Lucas De Marchi
` (5 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 22:55 UTC (permalink / raw)
To: intel-gfx
Use the convention of new platforms first. No need to special case
HAS_GMCH() since that stopped being true at the lattest on gen8 (for
cherryview).
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 27 ++++++++++++---------------
1 file changed, 12 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index e0eb32bd9607..2ab4edf7f25c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4237,21 +4237,18 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
*/
dev_priv->hotplug.hpd_short_storm_enabled = !HAS_DP_MST(dev_priv);
- if (HAS_GMCH(dev_priv)) {
- if (I915_HAS_HOTPLUG(dev_priv))
- dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
- } else {
- if (HAS_PCH_DG1(dev_priv))
- dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup;
- else if (INTEL_GEN(dev_priv) >= 11)
- dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup;
- else if (IS_GEN9_LP(dev_priv))
- dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
- else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
- dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
- else
- dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
- }
+ if (HAS_PCH_DG1(dev_priv))
+ dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup;
+ else if (INTEL_GEN(dev_priv) >= 11)
+ dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup;
+ else if (IS_GEN9_LP(dev_priv))
+ dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
+ else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
+ dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
+ else if (HAS_GMCH(dev_priv) && I915_HAS_HOTPLUG(dev_priv))
+ dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
+ else
+ dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
}
/**
--
2.29.0
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 6/8] drm/i915: re-order if/else ladder for hpd_irq_setup
2020-11-06 22:55 ` [Intel-gfx] [PATCH 6/8] drm/i915: re-order if/else ladder for hpd_irq_setup Lucas De Marchi
@ 2020-11-09 20:47 ` Souza, Jose
0 siblings, 0 replies; 19+ messages in thread
From: Souza, Jose @ 2020-11-09 20:47 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, De Marchi, Lucas
On Fri, 2020-11-06 at 14:55 -0800, Lucas De Marchi wrote:
> Use the convention of new platforms first. No need to special case
> HAS_GMCH() since that stopped being true at the lattest on gen8 (for
> cherryview).
>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 27 ++++++++++++---------------
> 1 file changed, 12 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index e0eb32bd9607..2ab4edf7f25c 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -4237,21 +4237,18 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> */
> dev_priv->hotplug.hpd_short_storm_enabled = !HAS_DP_MST(dev_priv);
>
>
>
>
> - if (HAS_GMCH(dev_priv)) {
> - if (I915_HAS_HOTPLUG(dev_priv))
> - dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
> - } else {
> - if (HAS_PCH_DG1(dev_priv))
> - dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup;
> - else if (INTEL_GEN(dev_priv) >= 11)
> - dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup;
> - else if (IS_GEN9_LP(dev_priv))
> - dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
> - else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
> - dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
> - else
> - dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
> - }
> + if (HAS_PCH_DG1(dev_priv))
> + dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup;
> + else if (INTEL_GEN(dev_priv) >= 11)
> + dev_priv->display.hpd_irq_setup = gen11_hpd_irq_setup;
> + else if (IS_GEN9_LP(dev_priv))
> + dev_priv->display.hpd_irq_setup = bxt_hpd_irq_setup;
> + else if (INTEL_PCH_TYPE(dev_priv) >= PCH_SPT)
> + dev_priv->display.hpd_irq_setup = spt_hpd_irq_setup;
> + else if (HAS_GMCH(dev_priv) && I915_HAS_HOTPLUG(dev_priv))
> + dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
> + else
> + dev_priv->display.hpd_irq_setup = ilk_hpd_irq_setup;
> }
>
>
>
>
> /**
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH 7/8] drm/i915: move display-related to the end of intel_irq_init()
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (4 preceding siblings ...)
2020-11-06 22:55 ` [Intel-gfx] [PATCH 6/8] drm/i915: re-order if/else ladder for hpd_irq_setup Lucas De Marchi
@ 2020-11-06 22:55 ` Lucas De Marchi
2020-11-09 20:48 ` Souza, Jose
2020-11-06 22:55 ` [Intel-gfx] [PATCH 8/8] drm/i915: Do not setup hpd without display Lucas De Marchi
` (4 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 22:55 UTC (permalink / raw)
To: intel-gfx
In intel_irq_init() move what's display/hpd related after what is gt and
guc. This makes it easier to support !HAS_DISPLAY() in future.
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 2ab4edf7f25c..4faf7cb9c158 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4204,10 +4204,6 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
struct drm_device *dev = &dev_priv->drm;
int i;
- intel_hpd_init_pins(dev_priv);
-
- intel_hpd_init_work(dev_priv);
-
INIT_WORK(&dev_priv->l3_parity.error_work, ivb_parity_work);
for (i = 0; i < MAX_L3_SLICES; ++i)
dev_priv->l3_parity.remap_info[i] = NULL;
@@ -4216,6 +4212,10 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
if (HAS_GT_UC(dev_priv) && INTEL_GEN(dev_priv) < 11)
dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
+ intel_hpd_init_pins(dev_priv);
+
+ intel_hpd_init_work(dev_priv);
+
dev->vblank_disable_immediate = true;
/* Most platforms treat the display irq block as an always-on
--
2.29.0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 7/8] drm/i915: move display-related to the end of intel_irq_init()
2020-11-06 22:55 ` [Intel-gfx] [PATCH 7/8] drm/i915: move display-related to the end of intel_irq_init() Lucas De Marchi
@ 2020-11-09 20:48 ` Souza, Jose
0 siblings, 0 replies; 19+ messages in thread
From: Souza, Jose @ 2020-11-09 20:48 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, De Marchi, Lucas
On Fri, 2020-11-06 at 14:55 -0800, Lucas De Marchi wrote:
> In intel_irq_init() move what's display/hpd related after what is gt and
> guc. This makes it easier to support !HAS_DISPLAY() in future.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 2ab4edf7f25c..4faf7cb9c158 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -4204,10 +4204,6 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> struct drm_device *dev = &dev_priv->drm;
> int i;
>
>
>
>
> - intel_hpd_init_pins(dev_priv);
> -
> - intel_hpd_init_work(dev_priv);
> -
> INIT_WORK(&dev_priv->l3_parity.error_work, ivb_parity_work);
> for (i = 0; i < MAX_L3_SLICES; ++i)
> dev_priv->l3_parity.remap_info[i] = NULL;
> @@ -4216,6 +4212,10 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> if (HAS_GT_UC(dev_priv) && INTEL_GEN(dev_priv) < 11)
> dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
>
>
>
>
> + intel_hpd_init_pins(dev_priv);
> +
> + intel_hpd_init_work(dev_priv);
> +
> dev->vblank_disable_immediate = true;
>
>
>
>
> /* Most platforms treat the display irq block as an always-on
_______________________________________________
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^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] [PATCH 8/8] drm/i915: Do not setup hpd without display
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (5 preceding siblings ...)
2020-11-06 22:55 ` [Intel-gfx] [PATCH 7/8] drm/i915: move display-related to the end of intel_irq_init() Lucas De Marchi
@ 2020-11-06 22:55 ` Lucas De Marchi
2020-11-09 20:48 ` Souza, Jose
2020-11-06 23:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset Patchwork
` (3 subsequent siblings)
10 siblings, 1 reply; 19+ messages in thread
From: Lucas De Marchi @ 2020-11-06 22:55 UTC (permalink / raw)
To: intel-gfx; +Cc: Jani Nikula
Now that hpd/display related calls are split from the rest in
intel_irq_init(), skip all of that in case we don't have display.
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
drivers/gpu/drm/i915/i915_irq.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4faf7cb9c158..01f5749a5905 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -4212,6 +4212,9 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
if (HAS_GT_UC(dev_priv) && INTEL_GEN(dev_priv) < 11)
dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
+ if (!HAS_DISPLAY(dev_priv))
+ return;
+
intel_hpd_init_pins(dev_priv);
intel_hpd_init_work(dev_priv);
--
2.29.0
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 8/8] drm/i915: Do not setup hpd without display
2020-11-06 22:55 ` [Intel-gfx] [PATCH 8/8] drm/i915: Do not setup hpd without display Lucas De Marchi
@ 2020-11-09 20:48 ` Souza, Jose
0 siblings, 0 replies; 19+ messages in thread
From: Souza, Jose @ 2020-11-09 20:48 UTC (permalink / raw)
To: intel-gfx@lists.freedesktop.org, De Marchi, Lucas; +Cc: Nikula, Jani
On Fri, 2020-11-06 at 14:55 -0800, Lucas De Marchi wrote:
> Now that hpd/display related calls are split from the rest in
> intel_irq_init(), skip all of that in case we don't have display.
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
>
> Cc: José Roberto de Souza <jose.souza@intel.com>
> Cc: Jani Nikula <jani.nikula@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
> ---
> drivers/gpu/drm/i915/i915_irq.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 4faf7cb9c158..01f5749a5905 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -4212,6 +4212,9 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
> if (HAS_GT_UC(dev_priv) && INTEL_GEN(dev_priv) < 11)
> dev_priv->gt.pm_guc_events = GUC_INTR_GUC2HOST << 16;
>
>
>
>
> + if (!HAS_DISPLAY(dev_priv))
> + return;
> +
> intel_hpd_init_pins(dev_priv);
>
>
>
>
> intel_hpd_init_work(dev_priv);
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread
* [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (6 preceding siblings ...)
2020-11-06 22:55 ` [Intel-gfx] [PATCH 8/8] drm/i915: Do not setup hpd without display Lucas De Marchi
@ 2020-11-06 23:20 ` Patchwork
2020-11-06 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
` (2 subsequent siblings)
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-11-06 23:20 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset
URL : https://patchwork.freedesktop.org/series/83596/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/gt/intel_reset.c:1312:5: warning: context imbalance in 'intel_gt_reset_trylock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:100:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:101:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: expected void *in
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:136:20: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: expected void const *src
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:137:46: warning: incorrect type in argument 2 (different address spaces)
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: expected unsigned int [usertype] *s
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: got void [noderef] __iomem *[assigned] s
+drivers/gpu/drm/i915/gt/selftest_reset.c:98:34: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/gvt/mmio.c:290:23: warning: memcpy with byte count of 279040
+drivers/gpu/drm/i915/i915_perf.c:1440:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/i915_perf.c:1494:15: warning: memset with byte count of 16777216
+drivers/gpu/drm/i915/intel_wakeref.c:137:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:838:24: warning: trying to copy expression type 31
+./include/linux/seqlock.h:864:16: warning: trying to copy expression type 31
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen11_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen12_fwtable_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read64' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_read8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen6_write8' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write16' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write32' - different lock contexts for basic block
+./include/linux/spinlock.h:409:9: warning: context imbalance in 'gen8_write8' - different lock contexts for basic block
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread* [Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (7 preceding siblings ...)
2020-11-06 23:20 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset Patchwork
@ 2020-11-06 23:48 ` Patchwork
2020-11-07 1:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2020-11-09 8:59 ` [Intel-gfx] [PATCH 1/8] " Jani Nikula
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-11-06 23:48 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
[-- Attachment #1.1: Type: text/plain, Size: 5794 bytes --]
== Series Details ==
Series: series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset
URL : https://patchwork.freedesktop.org/series/83596/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_9285 -> Patchwork_18870
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/index.html
New tests
---------
New tests have been introduced between CI_DRM_9285 and Patchwork_18870:
### New CI tests (1) ###
* boot:
- Statuses : 39 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18870 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_sync@basic-each:
- fi-tgl-y: [PASS][1] -> [DMESG-WARN][2] ([i915#402])
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-tgl-y/igt@gem_sync@basic-each.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-tgl-y/igt@gem_sync@basic-each.html
* igt@i915_module_load@reload:
- fi-icl-u2: [PASS][3] -> [DMESG-WARN][4] ([i915#1982]) +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-icl-u2/igt@i915_module_load@reload.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-icl-u2/igt@i915_module_load@reload.html
- fi-byt-j1900: [PASS][5] -> [DMESG-WARN][6] ([i915#1982]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-byt-j1900/igt@i915_module_load@reload.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-byt-j1900/igt@i915_module_load@reload.html
* igt@kms_busy@basic@flip:
- fi-kbl-soraka: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-kbl-soraka/igt@kms_busy@basic@flip.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-kbl-soraka/igt@kms_busy@basic@flip.html
* igt@kms_frontbuffer_tracking@basic:
- fi-tgl-y: [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-tgl-y/igt@kms_frontbuffer_tracking@basic.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-tgl-y/igt@kms_frontbuffer_tracking@basic.html
#### Possible fixes ####
* igt@debugfs_test@read_all_entries:
- fi-bsw-nick: [INCOMPLETE][11] ([i915#1250] / [i915#1436]) -> [PASS][12]
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-bsw-nick/igt@debugfs_test@read_all_entries.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-bsw-nick/igt@debugfs_test@read_all_entries.html
* igt@gem_linear_blits@basic:
- fi-tgl-y: [DMESG-WARN][13] ([i915#402]) -> [PASS][14]
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-tgl-y/igt@gem_linear_blits@basic.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-tgl-y/igt@gem_linear_blits@basic.html
* igt@i915_selftest@live@gt_heartbeat:
- fi-kbl-guc: [DMESG-FAIL][15] ([i915#541]) -> [PASS][16]
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-kbl-guc/igt@i915_selftest@live@gt_heartbeat.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-kbl-guc/igt@i915_selftest@live@gt_heartbeat.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-byt-j1900: [DMESG-WARN][17] ([i915#1982]) -> [PASS][18] +1 similar issue
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-byt-j1900/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
- fi-icl-u2: [DMESG-WARN][19] ([i915#1982]) -> [PASS][20]
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic.html
[i915#1250]: https://gitlab.freedesktop.org/drm/intel/issues/1250
[i915#1436]: https://gitlab.freedesktop.org/drm/intel/issues/1436
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#402]: https://gitlab.freedesktop.org/drm/intel/issues/402
[i915#541]: https://gitlab.freedesktop.org/drm/intel/issues/541
Participating hosts (44 -> 39)
------------------------------
Missing (5): fi-ilk-m540 fi-hsw-4200u fi-bsw-cyan fi-gdg-551 fi-bdw-samus
Build changes
-------------
* Linux: CI_DRM_9285 -> Patchwork_18870
CI-20190529: 20190529
CI_DRM_9285: 7e07700366213c40df3c78b23d025e4df985b2b9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5836: 4c2ec0ad123b82f42f9fe2297e1a41fec73c9229 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18870: b7d2f75809329c6aa4211dda42feb976d32b49d5 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
b7d2f7580932 drm/i915: Do not setup hpd without display
8f2b5126f82c drm/i915: move display-related to the end of intel_irq_init()
8f9258ed8a5b drm/i915: re-order if/else ladder for hpd_irq_setup
f3bc7e47002d drm/i915/display: Do not set any power wells when there is no display
065174107b4c drm/i915/display: return earlier from intel_modeset_init() without display
0594845f3ddc drm/i915/display: Do not reset display when there is none
afa4f1bc58c0 drm/i915/display: add namespace to intel_finish_reset
5377b1e6da20 drm/i915/display: add namespace to intel_prepare_reset
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/index.html
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_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 19+ messages in thread* [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (8 preceding siblings ...)
2020-11-06 23:48 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
@ 2020-11-07 1:22 ` Patchwork
2020-11-09 8:59 ` [Intel-gfx] [PATCH 1/8] " Jani Nikula
10 siblings, 0 replies; 19+ messages in thread
From: Patchwork @ 2020-11-07 1:22 UTC (permalink / raw)
To: Lucas De Marchi; +Cc: intel-gfx
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== Series Details ==
Series: series starting with [1/8] drm/i915/display: add namespace to intel_prepare_reset
URL : https://patchwork.freedesktop.org/series/83596/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_9285_full -> Patchwork_18870_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_18870_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_18870_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_18870_full:
### IGT changes ###
#### Possible regressions ####
* igt@core_hotunplug@hotrebind-lateclose:
- shard-snb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-snb6/igt@core_hotunplug@hotrebind-lateclose.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-snb7/igt@core_hotunplug@hotrebind-lateclose.html
New tests
---------
New tests have been introduced between CI_DRM_9285_full and Patchwork_18870_full:
### New CI tests (1) ###
* boot:
- Statuses : 199 pass(s)
- Exec time: [0.0] s
Known issues
------------
Here are the changes found in Patchwork_18870_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@i915_suspend@fence-restore-untiled:
- shard-kbl: [PASS][3] -> [DMESG-WARN][4] ([i915#180])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-kbl1/igt@i915_suspend@fence-restore-untiled.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-kbl6/igt@i915_suspend@fence-restore-untiled.html
* igt@kms_cursor_crc@pipe-c-cursor-128x128-sliding:
- shard-skl: [PASS][5] -> [FAIL][6] ([i915#54]) +1 similar issue
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl6/igt@kms_cursor_crc@pipe-c-cursor-128x128-sliding.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-128x128-sliding.html
* igt@kms_cursor_edge_walk@pipe-b-64x64-left-edge:
- shard-tglb: [PASS][7] -> [DMESG-WARN][8] ([i915#1982])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-tglb7/igt@kms_cursor_edge_walk@pipe-b-64x64-left-edge.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-tglb2/igt@kms_cursor_edge_walk@pipe-b-64x64-left-edge.html
- shard-iclb: [PASS][9] -> [DMESG-WARN][10] ([i915#1982]) +1 similar issue
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-iclb6/igt@kms_cursor_edge_walk@pipe-b-64x64-left-edge.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-iclb2/igt@kms_cursor_edge_walk@pipe-b-64x64-left-edge.html
* igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge:
- shard-apl: [PASS][11] -> [DMESG-WARN][12] ([i915#1635] / [i915#1982]) +2 similar issues
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-apl3/igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge.html
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-apl1/igt@kms_cursor_edge_walk@pipe-c-256x256-right-edge.html
* igt@kms_cursor_legacy@cursor-vs-flip-varying-size:
- shard-hsw: [PASS][13] -> [FAIL][14] ([i915#2370])
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw7/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw8/igt@kms_cursor_legacy@cursor-vs-flip-varying-size.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][15] -> [FAIL][16] ([i915#2122])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-glk2/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-glk1/igt@kms_flip@2x-plain-flip-ts-check-interruptible@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1:
- shard-kbl: [PASS][17] -> [DMESG-WARN][18] ([i915#1982]) +3 similar issues
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-kbl3/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-kbl6/igt@kms_flip@basic-flip-vs-wf_vblank@a-dp1.html
* igt@kms_flip@plain-flip-fb-recreate@b-edp1:
- shard-skl: [PASS][19] -> [FAIL][20] ([i915#2122]) +2 similar issues
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl3/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl8/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render:
- shard-glk: [PASS][21] -> [FAIL][22] ([i915#49])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-glk4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-glk2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render:
- shard-skl: [PASS][23] -> [DMESG-WARN][24] ([i915#1982]) +9 similar issues
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl4/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl7/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-shrfb-draw-render.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-skl: [PASS][25] -> [FAIL][26] ([i915#1188])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl4/igt@kms_hdr@bpc-switch-suspend.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl7/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-mid:
- shard-glk: [PASS][27] -> [DMESG-WARN][28] ([i915#1982]) +1 similar issue
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-glk7/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-mid.html
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-glk6/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-mid.html
* igt@kms_psr@psr2_basic:
- shard-iclb: [PASS][29] -> [SKIP][30] ([fdo#109441]) +1 similar issue
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-iclb2/igt@kms_psr@psr2_basic.html
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-iclb7/igt@kms_psr@psr2_basic.html
* igt@kms_vblank@pipe-c-ts-continuation-modeset:
- shard-hsw: [PASS][31] -> [DMESG-WARN][32] ([i915#1982]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw2/igt@kms_vblank@pipe-c-ts-continuation-modeset.html
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw6/igt@kms_vblank@pipe-c-ts-continuation-modeset.html
* igt@perf@polling-parameterized:
- shard-skl: [PASS][33] -> [FAIL][34] ([i915#1542])
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl2/igt@perf@polling-parameterized.html
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl6/igt@perf@polling-parameterized.html
#### Possible fixes ####
* igt@core_hotunplug@unbind-rebind:
- shard-tglb: [DMESG-WARN][35] ([i915#1982]) -> [PASS][36] +3 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-tglb2/igt@core_hotunplug@unbind-rebind.html
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-tglb1/igt@core_hotunplug@unbind-rebind.html
* igt@gem_exec_gttfill@all:
- shard-glk: [FAIL][37] ([i915#1888]) -> [PASS][38]
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-glk2/igt@gem_exec_gttfill@all.html
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-glk4/igt@gem_exec_gttfill@all.html
* igt@gem_exec_reloc@basic-many-active@rcs0:
- shard-apl: [FAIL][39] ([i915#1635] / [i915#2389]) -> [PASS][40]
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-apl7/igt@gem_exec_reloc@basic-many-active@rcs0.html
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-apl7/igt@gem_exec_reloc@basic-many-active@rcs0.html
* igt@gem_exec_whisper@basic-queues-priority-all:
- shard-iclb: [INCOMPLETE][41] ([i915#1895]) -> [PASS][42]
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-iclb8/igt@gem_exec_whisper@basic-queues-priority-all.html
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-iclb1/igt@gem_exec_whisper@basic-queues-priority-all.html
* igt@gem_mmap@bad-object:
- shard-iclb: [DMESG-WARN][43] ([i915#1982]) -> [PASS][44]
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-iclb5/igt@gem_mmap@bad-object.html
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-iclb1/igt@gem_mmap@bad-object.html
* igt@gem_mmap_gtt@cpuset-big-copy:
- shard-hsw: [INCOMPLETE][45] -> [PASS][46] +1 similar issue
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw5/igt@gem_mmap_gtt@cpuset-big-copy.html
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw5/igt@gem_mmap_gtt@cpuset-big-copy.html
* igt@gem_ppgtt@blt-vs-render-ctxn:
- shard-glk: [DMESG-WARN][47] ([i915#118] / [i915#95]) -> [PASS][48]
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-glk6/igt@gem_ppgtt@blt-vs-render-ctxn.html
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-glk6/igt@gem_ppgtt@blt-vs-render-ctxn.html
* igt@gem_userptr_blits@sync-unmap-cycles:
- shard-hsw: [FAIL][49] ([i915#1888]) -> [PASS][50]
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw7/igt@gem_userptr_blits@sync-unmap-cycles.html
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw4/igt@gem_userptr_blits@sync-unmap-cycles.html
* igt@i915_pm_rc6_residency@rc6-idle:
- shard-hsw: [WARN][51] ([i915#1519]) -> [PASS][52]
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw2/igt@i915_pm_rc6_residency@rc6-idle.html
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw7/igt@i915_pm_rc6_residency@rc6-idle.html
* igt@kms_cursor_crc@pipe-c-cursor-64x21-random:
- shard-skl: [FAIL][53] ([i915#54]) -> [PASS][54] +2 similar issues
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl4/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl7/igt@kms_cursor_crc@pipe-c-cursor-64x21-random.html
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled:
- shard-skl: [DMESG-WARN][55] ([i915#1982]) -> [PASS][56] +4 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl9/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl5/igt@kms_draw_crc@draw-method-xrgb8888-mmap-cpu-untiled.html
* igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled:
- shard-skl: [FAIL][57] ([i915#52] / [i915#54]) -> [PASS][58]
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl6/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl7/igt@kms_draw_crc@draw-method-xrgb8888-mmap-wc-ytiled.html
* igt@kms_flip@absolute-wf_vblank@a-dp1:
- shard-kbl: [DMESG-WARN][59] ([i915#1982]) -> [PASS][60] +1 similar issue
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-kbl2/igt@kms_flip@absolute-wf_vblank@a-dp1.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-kbl7/igt@kms_flip@absolute-wf_vblank@a-dp1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1:
- shard-skl: [FAIL][61] ([i915#79]) -> [PASS][62]
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl6/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl4/igt@kms_flip@flip-vs-expired-vblank-interruptible@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-apl: [DMESG-WARN][63] ([i915#1635] / [i915#1982]) -> [PASS][64] +5 similar issues
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-apl6/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
- shard-kbl: [DMESG-WARN][65] ([i915#180]) -> [PASS][66] +1 similar issue
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-kbl2/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-kbl3/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
* igt@kms_flip@flip-vs-wf_vblank-interruptible@a-hdmi-a1:
- shard-glk: [DMESG-WARN][67] ([i915#1982]) -> [PASS][68] +5 similar issues
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-glk1/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-hdmi-a1.html
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-glk5/igt@kms_flip@flip-vs-wf_vblank-interruptible@a-hdmi-a1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1:
- shard-skl: [FAIL][69] ([i915#2122]) -> [PASS][70]
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl3/igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1.html
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl1/igt@kms_flip@plain-flip-ts-check-interruptible@a-edp1.html
* igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
- shard-skl: [FAIL][71] ([fdo#108145] / [i915#265]) -> [PASS][72]
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-skl9/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
* igt@kms_psr@psr2_primary_page_flip:
- shard-iclb: [SKIP][73] ([fdo#109441]) -> [PASS][74] +1 similar issue
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-iclb4/igt@kms_psr@psr2_primary_page_flip.html
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-iclb2/igt@kms_psr@psr2_primary_page_flip.html
* igt@perf@polling-small-buf:
- shard-hsw: [SKIP][75] ([fdo#109271]) -> [PASS][76]
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw7/igt@perf@polling-small-buf.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw4/igt@perf@polling-small-buf.html
* igt@perf_pmu@module-unload:
- shard-hsw: [DMESG-WARN][77] ([i915#1982]) -> [PASS][78] +2 similar issues
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw1/igt@perf_pmu@module-unload.html
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw7/igt@perf_pmu@module-unload.html
#### Warnings ####
* igt@core_hotunplug@hotrebind-lateclose:
- shard-hsw: [WARN][79] ([i915#2283]) -> [FAIL][80] ([i915#2644])
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-hsw7/igt@core_hotunplug@hotrebind-lateclose.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-hsw4/igt@core_hotunplug@hotrebind-lateclose.html
* igt@kms_dp_dsc@basic-dsc-enable-edp:
- shard-iclb: [DMESG-WARN][81] ([i915#1226]) -> [SKIP][82] ([fdo#109349])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_9285/shard-iclb2/igt@kms_dp_dsc@basic-dsc-enable-edp.html
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/shard-iclb7/igt@kms_dp_dsc@basic-dsc-enable-edp.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109349]: https://bugs.freedesktop.org/show_bug.cgi?id=109349
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
[i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
[i915#1226]: https://gitlab.freedesktop.org/drm/intel/issues/1226
[i915#1519]: https://gitlab.freedesktop.org/drm/intel/issues/1519
[i915#1542]: https://gitlab.freedesktop.org/drm/intel/issues/1542
[i915#1635]: https://gitlab.freedesktop.org/drm/intel/issues/1635
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1888]: https://gitlab.freedesktop.org/drm/intel/issues/1888
[i915#1895]: https://gitlab.freedesktop.org/drm/intel/issues/1895
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2283]: https://gitlab.freedesktop.org/drm/intel/issues/2283
[i915#2370]: https://gitlab.freedesktop.org/drm/intel/issues/2370
[i915#2389]: https://gitlab.freedesktop.org/drm/intel/issues/2389
[i915#2521]: https://gitlab.freedesktop.org/drm/intel/issues/2521
[i915#2644]: https://gitlab.freedesktop.org/drm/intel/issues/2644
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#49]: https://gitlab.freedesktop.org/drm/intel/issues/49
[i915#52]: https://gitlab.freedesktop.org/drm/intel/issues/52
[i915#54]: https://gitlab.freedesktop.org/drm/intel/issues/54
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
[i915#95]: https://gitlab.freedesktop.org/drm/intel/issues/95
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Build changes
-------------
* Linux: CI_DRM_9285 -> Patchwork_18870
CI-20190529: 20190529
CI_DRM_9285: 7e07700366213c40df3c78b23d025e4df985b2b9 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5836: 4c2ec0ad123b82f42f9fe2297e1a41fec73c9229 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_18870: b7d2f75809329c6aa4211dda42feb976d32b49d5 @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_18870/index.html
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^ permalink raw reply [flat|nested] 19+ messages in thread* Re: [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset
2020-11-06 22:55 [Intel-gfx] [PATCH 1/8] drm/i915/display: add namespace to intel_prepare_reset Lucas De Marchi
` (9 preceding siblings ...)
2020-11-07 1:22 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2020-11-09 8:59 ` Jani Nikula
10 siblings, 0 replies; 19+ messages in thread
From: Jani Nikula @ 2020-11-09 8:59 UTC (permalink / raw)
To: Lucas De Marchi, intel-gfx
On Fri, 06 Nov 2020, Lucas De Marchi <lucas.demarchi@intel.com> wrote:
> Rename intel_prepare_reset to intel_display_prepare_reset, so it's clear
> from gt/ that we are calling out the display code.
>
> Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> drivers/gpu/drm/i915/display/intel_display.h | 2 +-
> drivers/gpu/drm/i915/gt/intel_reset.c | 2 +-
> 3 files changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 6faca1e739c8..4050bc60f632 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -4951,7 +4951,7 @@ static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv)
> intel_has_gpu_reset(&dev_priv->gt));
> }
>
> -void intel_prepare_reset(struct drm_i915_private *dev_priv)
> +void intel_display_prepare_reset(struct drm_i915_private *dev_priv)
> {
> struct drm_device *dev = &dev_priv->drm;
> struct drm_modeset_acquire_ctx *ctx = &dev_priv->reset_ctx;
> diff --git a/drivers/gpu/drm/i915/display/intel_display.h b/drivers/gpu/drm/i915/display/intel_display.h
> index be774f216065..30960cc8b8a6 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.h
> +++ b/drivers/gpu/drm/i915/display/intel_display.h
> @@ -590,7 +590,7 @@ void vlv_force_pll_off(struct drm_i915_private *dev_priv, enum pipe pipe);
> int lpt_get_iclkip(struct drm_i915_private *dev_priv);
> bool intel_fuzzy_clock_check(int clock1, int clock2);
>
> -void intel_prepare_reset(struct drm_i915_private *dev_priv);
> +void intel_display_prepare_reset(struct drm_i915_private *dev_priv);
> void intel_finish_reset(struct drm_i915_private *dev_priv);
> void intel_dp_get_m_n(struct intel_crtc *crtc,
> struct intel_crtc_state *pipe_config);
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index 4e5e13dc95da..d71bad8c07b7 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -1191,7 +1191,7 @@ static void intel_gt_reset_global(struct intel_gt *gt,
>
> /* Use a watchdog to ensure that our reset completes */
> intel_wedge_on_timeout(&w, gt, 5 * HZ) {
> - intel_prepare_reset(gt->i915);
> + intel_display_prepare_reset(gt->i915);
>
> /* Flush everyone using a resource about to be clobbered */
> synchronize_srcu_expedited(>->reset.backoff_srcu);
--
Jani Nikula, Intel Open Source Graphics Center
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^ permalink raw reply [flat|nested] 19+ messages in thread