From: Matthew Auld <matthew.auld@intel.com>
To: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
intel-gfx@lists.freedesktop.org, dri-devel@lists.freedesktop.org
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH v3 07/12] drm/i915/gt: Pipelined page migration
Date: Tue, 15 Jun 2021 15:45:10 +0100 [thread overview]
Message-ID: <cc1f996f-e8fe-7e74-5bc9-c7d61ebe8322@intel.com> (raw)
In-Reply-To: <20210614162612.294869-8-thomas.hellstrom@linux.intel.com>
On 14/06/2021 17:26, Thomas Hellström wrote:
> From: Chris Wilson <chris@chris-wilson.co.uk>
>
> If we pipeline the PTE updates and then do the copy of those pages
> within a single unpreemptible command packet, we can submit the copies
> and leave them to be scheduled without having to synchronously wait
> under a global lock. In order to manage migration, we need to
> preallocate the page tables (and keep them pinned and available for use
> at any time), causing a bottleneck for migrations as all clients must
> contend on the limited resources. By inlining the ppGTT updates and
> performing the blit atomically, each client only owns the PTE while in
> use, and so we can reschedule individual operations however we see fit.
> And most importantly, we do not need to take a global lock on the shared
> vm, and wait until the operation is complete before releasing the lock
> for others to claim the PTE for themselves.
>
> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
> Co-developed-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
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next prev parent reply other threads:[~2021-06-15 14:45 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-14 16:26 [Intel-gfx] [PATCH v3 00/12] i915 TTM sync accelerated migration and clear Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 01/12] drm/i915: Reference objects on the ww object list Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 02/12] drm/i915: Break out dma_resv ww locking utilities to separate files Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 03/12] drm/i915: Introduce a ww transaction helper Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 04/12] drm/i915/gt: Add an insert_entry for gen8_ppgtt Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 05/12] drm/i915/gt: Add a routine to iterate over the pagetables of a GTT Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 06/12] drm/i915/gt: Export the pinned context constructor and destructor Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 07/12] drm/i915/gt: Pipelined page migration Thomas Hellström
2021-06-15 14:45 ` Matthew Auld [this message]
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 08/12] drm/i915/gt: Pipelined clear Thomas Hellström
2021-06-15 14:47 ` Matthew Auld
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 09/12] drm/i915/gt: Setup a default migration context on the GT Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 10/12] drm/i915/ttm: accelerated move implementation Thomas Hellström
2021-06-14 17:55 ` Thomas Hellström
2021-06-15 10:06 ` [Intel-gfx] [PATCH v3] " Ramalingam C
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 11/12] drm/i915/gem: Zap the client blt code Thomas Hellström
2021-06-14 16:33 ` Matthew Auld
2021-06-14 16:40 ` Thomas Hellström
2021-06-14 16:26 ` [Intel-gfx] [PATCH v3 12/12] drm/i915/gem: Zap the i915_gem_object_blt code Thomas Hellström
2021-06-14 16:43 ` Matthew Auld
2021-06-15 0:55 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915 TTM sync accelerated migration and clear Patchwork
2021-06-15 1:24 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-06-15 10:19 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2021-06-15 11:45 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915 TTM sync accelerated migration and clear (rev2) Patchwork
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