public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
To: "Srinivas, Vidya" <vidya.srinivas@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 14/15] drm/i915: Add NV12 as supported format for sprite plane
Date: Tue, 9 Jan 2018 11:02:28 +0100	[thread overview]
Message-ID: <cc9bfa31-1879-4dcc-5792-d8ee116fe9b6@linux.intel.com> (raw)
In-Reply-To: <F653A0A18852B74D88578FA2EB7094EAB680FA11@BGSMSX108.gar.corp.intel.com>

Op 09-01-18 om 03:19 schreef Srinivas, Vidya:
>
>> -----Original Message-----
>> From: Maarten Lankhorst [mailto:maarten.lankhorst@linux.intel.com]
>> Sent: Monday, January 8, 2018 6:04 PM
>> To: Srinivas, Vidya <vidya.srinivas@intel.com>; intel-
>> gfx@lists.freedesktop.org
>> Subject: Re: [Intel-gfx] [PATCH 14/15] drm/i915: Add NV12 as supported
>> format for sprite plane
>>
>> Op 07-01-18 om 10:59 schreef Vidya Srinivas:
>>> From: Chandra Konduru <chandra.konduru@intel.com>
>>>
>>> This patch adds NV12 to list of supported formats for sprite plane.
>>>
>>> v2: Rebased (me)
>>>
>>> v3: Review comments by Ville addressed
>>> - Removed skl_plane_formats_with_nv12 and added
>>> NV12 case in existing skl_plane_formats
>>> - Added the 10bpc RGB formats
>>>
>>> v4: Addressed review comments from Clinton A Taylor "Why are we
>> adding
>>> 10 bit RGB formats with the NV12 series patches?
>>> Trying to set XR30 or AB30 results in error returned even though the
>>> modes are advertised for the planes"
>>> - Removed 10bit RGB formats added previously with NV12 series
>>>
>>> v5: Missed the Tested-by/Reviewed-by in the previous series Adding the
>>> same to commit message in this version.
>>> Addressed review comments from Clinton A Taylor "Why are we adding 10
>>> bit RGB formats with the NV12 series patches?
>>> Trying to set XR30 or AB30 results in error returned even though the
>>> modes are advertised for the planes"
>>> - Previous version has 10bit RGB format removed from VLV formats by
>>> mistake. Fixing that in this version.
>>> Removed 10bit RGB formats added previously with NV12 series for SKL.
>>>
>>> v6: Addressed review comments by Ville Restricting the NV12 to BXT and
>>> PIPE A and B
>>>
>>> v7: Rebased (me)
>>>
>>> v8: Rebased (me)
>>> Restricting NV12 changes to BXT and KBL Restricting NV12 changes for
>>> plane 0 (overlay)
>>>
>>> v9: Rebased (me)
>>>
>>> Tested-by: Clinton Taylor <clinton.a.taylor@intel.com>
>>> Reviewed-by: Clinton Taylor <clinton.a.taylor@intel.com>
>>> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
>>> Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti@intel.com>
>>> Signed-off-by: Vidya Srinivas <vidya.srinivas@intel.com>
>>> ---
>>>  drivers/gpu/drm/i915/intel_sprite.c | 24 +++++++++++++++++++++---
>>>  1 file changed, 21 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/i915/intel_sprite.c
>>> b/drivers/gpu/drm/i915/intel_sprite.c
>>> index 09732ae..1d35a18 100644
>>> --- a/drivers/gpu/drm/i915/intel_sprite.c
>>> +++ b/drivers/gpu/drm/i915/intel_sprite.c
>>> @@ -1279,6 +1279,19 @@ static const struct drm_plane_funcs
>> intel_sprite_plane_funcs = {
>>>          .format_mod_supported =
>>> intel_sprite_plane_format_mod_supported,
>>>  };
>>>
>>> +static uint32_t nv12_plane_formats[] = {
>>> +	DRM_FORMAT_RGB565,
>>> +	DRM_FORMAT_ABGR8888,
>>> +	DRM_FORMAT_ARGB8888,
>>> +	DRM_FORMAT_XBGR8888,
>>> +	DRM_FORMAT_XRGB8888,
>>> +	DRM_FORMAT_YUYV,
>>> +	DRM_FORMAT_YVYU,
>>> +	DRM_FORMAT_UYVY,
>>> +	DRM_FORMAT_VYUY,
>>> +	DRM_FORMAT_NV12,
>>> +};
>>> +
>>>  struct intel_plane *
>>>  intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>>>  			  enum pipe pipe, int plane)
>>> @@ -1323,9 +1336,14 @@ intel_sprite_plane_create(struct
>> drm_i915_private *dev_priv,
>>>  		intel_plane->update_plane = skl_update_plane;
>>>  		intel_plane->disable_plane = skl_disable_plane;
>>>  		intel_plane->get_hw_state = skl_plane_get_hw_state;
>>> -
>>> -		plane_formats = skl_plane_formats;
>>> -		num_plane_formats = ARRAY_SIZE(skl_plane_formats);
>>> +		if ((IS_BROXTON(dev_priv) || IS_KABYLAKE(dev_priv)) &&
>>> +			(pipe == PIPE_A || pipe == PIPE_B) && plane == 0) {
>>> +			plane_formats = nv12_plane_formats;
>>> +			num_plane_formats =
>> ARRAY_SIZE(nv12_plane_formats);
>>> +		} else {
>>> +			plane_formats = skl_plane_formats;
>>> +			num_plane_formats =
>> ARRAY_SIZE(skl_plane_formats);
>>> +		}
>> I understand we don't have enough scalers, but is there something wrong
>> with allowing nv12 on any plane?
>>
> On BXT (Gen9), NV12 is supported only on primary and sprite 0.
Ah ok, nm that comment then. :)

Same comment applies as for the other patch that adds it to the primary plane, would be better to have a single array and tinker with num_plane_formats, should gen10 also have NV12 support here btw?

I can't r-b the series right now, there are no tests. Judging from the comments this is what the kms_plane_scaling is about, so I started looking at it.

~Maarten
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2018-01-09 10:02 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-01-04 10:44 [PATCH 00/15] Adding NV12 support Vidya Srinivas
2018-01-04 10:44 ` [PATCH 01/15] drm/i915/skl+: rename skl_wm_values struct to skl_ddb_values Vidya Srinivas
2018-01-04 10:44 ` [PATCH 02/15] drm/i915/skl+: refactore WM calculation for NV12 Vidya Srinivas
2018-01-04 16:19   ` Maarten Lankhorst
2018-01-04 10:44 ` [PATCH 03/15] drm/i915/skl+: add NV12 in skl_format_to_fourcc Vidya Srinivas
2018-01-04 10:44 ` [PATCH 06/15] drm/i915/skl+: pass skl_wm_level struct to wm compute func Vidya Srinivas
2018-01-04 10:44 ` [PATCH 05/15] drm/i915/skl+: NV12 related changes for WM Vidya Srinivas
2018-01-04 10:44 ` [PATCH 04/15] drm/i915/skl+: support varification of DDB HW state for NV12 Vidya Srinivas
2018-01-05 12:16   ` Maarten Lankhorst
2018-01-04 10:44 ` [PATCH 07/15] drm/i915/skl+: make sure higher latency level has higher wm value Vidya Srinivas
2018-01-04 10:44 ` [PATCH 11/15] drm/i915: Update format_is_yuv() to include NV12 Vidya Srinivas
2018-01-04 10:44 ` [PATCH 09/15] drm/i915/skl: split skl_compute_ddb function Vidya Srinivas
2018-01-04 10:44 ` [PATCH 08/15] drm/i915/skl+: nv12 workaround disable WM level 1-7 Vidya Srinivas
2018-01-08 12:07   ` Maarten Lankhorst
2018-01-04 10:44 ` [PATCH 12/15] drm/i915: Upscale scaler max scale for NV12 Vidya Srinivas
2018-01-04 10:44 ` [PATCH 10/15] drm/i915: Set scaler mode " Vidya Srinivas
2018-01-04 10:44 ` [PATCH 13/15] drm/i915: Add NV12 as supported format for primary plane Vidya Srinivas
2018-01-08 12:31   ` Maarten Lankhorst
2018-01-04 10:44 ` [PATCH 14/15] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas
2018-01-08 12:33   ` Maarten Lankhorst
2018-01-09  2:19     ` Srinivas, Vidya
2018-01-09 10:02       ` Maarten Lankhorst [this message]
2018-01-09 10:06         ` Srinivas, Vidya
2018-01-11  9:57         ` Srinivas, Vidya
2018-01-04 10:44 ` [PATCH 15/15] drm/i915: Add NV12 support to intel_framebuffer_init Vidya Srinivas
2018-01-04 11:12 ` ✓ Fi.CI.BAT: success for Adding NV12 support (rev4) Patchwork
  -- strict thread matches above, loose matches on Subject: below --
2018-01-15  3:18 [PATCH 00/15] Adding NV12 support Vidya Srinivas
2018-01-15  3:18 ` [PATCH 14/15] drm/i915: Add NV12 as supported format for sprite plane Vidya Srinivas

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=cc9bfa31-1879-4dcc-5792-d8ee116fe9b6@linux.intel.com \
    --to=maarten.lankhorst@linux.intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=vidya.srinivas@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox