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From: "Souza, Jose" <jose.souza@intel.com>
To: "Nikula, Jani" <jani.nikula@intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Cc: "De Marchi, Lucas" <lucas.demarchi@intel.com>,
	"chris@chris-wilson.co.uk" <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH v3 5/8] drm/i915: switch TGL and ADL to the new stepping scheme
Date: Thu, 25 Mar 2021 20:58:28 +0000	[thread overview]
Message-ID: <ce05d139720dd610ffaa0aab9af6e56478ea1453.camel@intel.com> (raw)
In-Reply-To: <45f5b4072fba785ef23a35920176909108512794.1615211711.git.jani.nikula@intel.com>

On Mon, 2021-03-08 at 15:56 +0200, Jani Nikula wrote:
> This changes the way revids not present in the array are handled:
> 
> - For gaps in the array, the next present revid is used.
> 
> - For revids beyond the array, the new STEP_FUTURE is used instead of
>   the last revid in the array.
> 
> In both cases, we'll get debug logging of what's going on.
> 
> v2: Rename stepping->step
> 

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h   | 59 ++++++++-----------------------
>  drivers/gpu/drm/i915/intel_step.c | 17 ++++++---
>  drivers/gpu/drm/i915/intel_step.h |  8 -----
>  3 files changed, 28 insertions(+), 56 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 7f259aab4226..991318e90b5a 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1510,44 +1510,17 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define IS_JSL_EHL_REVID(p, since, until) \
>  	(IS_JSL_EHL(p) && IS_REVID(p, since, until))
>  
> 
> 
> 
> -static inline const struct i915_rev_steppings *
> -tgl_stepping_get(struct drm_i915_private *dev_priv)
> -{
> -	u8 revid = INTEL_REVID(dev_priv);
> -	u8 size;
> -	const struct i915_rev_steppings *revid_step_tbl;
> -
> -	if (IS_ALDERLAKE_S(dev_priv)) {
> -		revid_step_tbl = adls_revid_step_tbl;
> -		size = ARRAY_SIZE(adls_revid_step_tbl);
> -	} else if (IS_TGL_U(dev_priv) || IS_TGL_Y(dev_priv)) {
> -		revid_step_tbl = tgl_uy_revid_step_tbl;
> -		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
> -	} else {
> -		revid_step_tbl = tgl_revid_step_tbl;
> -		size = ARRAY_SIZE(tgl_revid_step_tbl);
> -	}
> -
> -	revid = min_t(u8, revid, size - 1);
> -
> -	return &revid_step_tbl[revid];
> -}
> -
> -#define IS_TGL_DISP_STEPPING(p, since, until) \
> -	(IS_TIGERLAKE(p) && \
> -	 tgl_stepping_get(p)->disp_stepping >= (since) && \
> -	 tgl_stepping_get(p)->disp_stepping <= (until))
> +#define IS_TGL_DISP_STEPPING(__i915, since, until) \
> +	(IS_TIGERLAKE(__i915) && \
> +	 IS_DISPLAY_STEP(__i915, since, until))
>  
> 
> 
> 
> -#define IS_TGL_UY_GT_STEPPING(p, since, until) \
> -	((IS_TGL_U(p) || IS_TGL_Y(p)) && \
> -	 tgl_stepping_get(p)->gt_stepping >= (since) && \
> -	 tgl_stepping_get(p)->gt_stepping <= (until))
> +#define IS_TGL_UY_GT_STEPPING(__i915, since, until) \
> +	((IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
> +	 IS_GT_STEP(__i915, since, until))
>  
> 
> 
> 
> -#define IS_TGL_GT_STEPPING(p, since, until) \
> -	(IS_TIGERLAKE(p) && \
> -	 !(IS_TGL_U(p) || IS_TGL_Y(p)) && \
> -	 tgl_stepping_get(p)->gt_stepping >= (since) && \
> -	 tgl_stepping_get(p)->gt_stepping <= (until))
> +#define IS_TGL_GT_STEPPING(__i915, since, until) \
> +	(IS_TIGERLAKE(__i915) && !(IS_TGL_U(__i915) || IS_TGL_Y(__i915)) && \
> +	 IS_GT_STEP(__i915, since, until))
>  
> 
> 
> 
>  #define RKL_REVID_A0		0x0
>  #define RKL_REVID_B0		0x1
> @@ -1562,15 +1535,13 @@ tgl_stepping_get(struct drm_i915_private *dev_priv)
>  #define IS_DG1_REVID(p, since, until) \
>  	(IS_DG1(p) && IS_REVID(p, since, until))
>  
> 
> 
> 
> -#define IS_ADLS_DISP_STEPPING(p, since, until) \
> -	(IS_ALDERLAKE_S(p) && \
> -	 tgl_stepping_get(p)->disp_stepping >= (since) && \
> -	 tgl_stepping_get(p)->disp_stepping <= (until))
> +#define IS_ADLS_DISP_STEPPING(__i915, since, until) \
> +	(IS_ALDERLAKE_S(__i915) && \
> +	 IS_DISPLAY_STEP(__i915, since, until))
>  
> 
> 
> 
> -#define IS_ADLS_GT_STEPPING(p, since, until) \
> -	(IS_ALDERLAKE_S(p) && \
> -	 tgl_stepping_get(p)->gt_stepping >= (since) && \
> -	 tgl_stepping_get(p)->gt_stepping <= (until))
> +#define IS_ADLS_GT_STEPPING(__i915, since, until) \
> +	(IS_ALDERLAKE_S(__i915) && \
> +	 IS_GT_STEP(__i915, since, until))
>  
> 
> 
> 
>  #define IS_LP(dev_priv)	(INTEL_INFO(dev_priv)->is_lp)
>  #define IS_GEN9_LP(dev_priv)	(IS_GEN(dev_priv, 9) && IS_LP(dev_priv))
> diff --git a/drivers/gpu/drm/i915/intel_step.c b/drivers/gpu/drm/i915/intel_step.c
> index aaa9494b0f4f..4593eba24a7d 100644
> --- a/drivers/gpu/drm/i915/intel_step.c
> +++ b/drivers/gpu/drm/i915/intel_step.c
> @@ -26,7 +26,7 @@ static const struct i915_rev_steppings kbl_revids[] = {
>  	[7] = { .gt_stepping = STEP_G0, .disp_stepping = STEP_C0 },
>  };
>  
> 
> 
> 
> -const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
> +static const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>  	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>  	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_C0 },
>  	[2] = { .gt_stepping = STEP_B1, .disp_stepping = STEP_C0 },
> @@ -34,12 +34,12 @@ const struct i915_rev_steppings tgl_uy_revid_step_tbl[] = {
>  };
>  
> 
> 
> 
>  /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */
> -const struct i915_rev_steppings tgl_revid_step_tbl[] = {
> +static const struct i915_rev_steppings tgl_revid_step_tbl[] = {
>  	[0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_B0 },
>  	[1] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_D0 },
>  };
>  
> 
> 
> 
> -const struct i915_rev_steppings adls_revid_step_tbl[] = {
> +static const struct i915_rev_steppings adls_revid_step_tbl[] = {
>  	[0x0] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A0 },
>  	[0x1] = { .gt_stepping = STEP_A0, .disp_stepping = STEP_A2 },
>  	[0x4] = { .gt_stepping = STEP_B0, .disp_stepping = STEP_B0 },
> @@ -54,7 +54,16 @@ void intel_step_init(struct drm_i915_private *i915)
>  	int revid = INTEL_REVID(i915);
>  	struct i915_rev_steppings step = {};
>  
> 
> 
> 
> -	if (IS_KABYLAKE(i915)) {
> +	if (IS_ALDERLAKE_S(i915)) {
> +		revids = adls_revid_step_tbl;
> +		size = ARRAY_SIZE(adls_revid_step_tbl);
> +	} else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
> +		revids = tgl_uy_revid_step_tbl;
> +		size = ARRAY_SIZE(tgl_uy_revid_step_tbl);
> +	} else if (IS_TIGERLAKE(i915)) {
> +		revids = tgl_revid_step_tbl;
> +		size = ARRAY_SIZE(tgl_revid_step_tbl);
> +	} else if (IS_KABYLAKE(i915)) {
>  		revids = kbl_revids;
>  		size = ARRAY_SIZE(kbl_revids);
>  	}
> diff --git a/drivers/gpu/drm/i915/intel_step.h b/drivers/gpu/drm/i915/intel_step.h
> index b29e15f71214..5cc5601794f0 100644
> --- a/drivers/gpu/drm/i915/intel_step.h
> +++ b/drivers/gpu/drm/i915/intel_step.h
> @@ -15,14 +15,6 @@ struct i915_rev_steppings {
>  	u8 disp_stepping;
>  };
>  
> 
> 
> 
> -#define TGL_UY_REVID_STEP_TBL_SIZE	4
> -#define TGL_REVID_STEP_TBL_SIZE		2
> -#define ADLS_REVID_STEP_TBL_SIZE	13
> -
> -extern const struct i915_rev_steppings tgl_uy_revid_step_tbl[TGL_UY_REVID_STEP_TBL_SIZE];
> -extern const struct i915_rev_steppings tgl_revid_step_tbl[TGL_REVID_STEP_TBL_SIZE];
> -extern const struct i915_rev_steppings adls_revid_step_tbl[ADLS_REVID_STEP_TBL_SIZE];
> -
>  /*
>   * Symbolic steppings that do not match the hardware. These are valid both as gt
>   * and display steppings as symbolic names.

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  reply	other threads:[~2021-03-25 20:58 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-08 13:56 [Intel-gfx] [PATCH v3 0/8] drm/i915: refactor KBL/TGL/ADLS stepping scheme Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 1/8] drm/i915: remove unused ADLS_REVID_* macros Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 2/8] drm/i915: split out stepping info to a new file Jani Nikula
2021-03-09  0:13   ` Lucas De Marchi
2021-03-17 17:02     ` Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 3/8] drm/i915: add new helpers for accessing stepping info Jani Nikula
2021-03-25 20:50   ` Souza, Jose
2021-03-26  8:49     ` Jani Nikula
2021-03-26 13:22       ` Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 4/8] drm/i915: switch KBL to the new stepping scheme Jani Nikula
2021-03-25 20:54   ` Souza, Jose
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 5/8] drm/i915: switch TGL and ADL " Jani Nikula
2021-03-25 20:58   ` Souza, Jose [this message]
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 6/8] drm/i915: rename DISP_STEPPING->DISPLAY_STEP and GT_STEPPING->GT_STEP Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 7/8] drm/i915: rename disp_stepping->display_step and gt_stepping->gt_step Jani Nikula
2021-03-08 13:56 ` [Intel-gfx] [PATCH v3 8/8] drm/i915: rename i915_rev_steppings->intel_step_info Jani Nikula
2021-03-25 21:00   ` Souza, Jose
2021-03-08 15:10 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: refactor KBL/TGL/ADLS stepping scheme (rev2) Patchwork
2021-03-08 15:39 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-03-08 22:52 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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