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* [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config
@ 2013-10-14 16:02 Jani Nikula
  2013-10-14 16:02 ` [PATCH 1/2] drm/i915: pass mode to write eld Jani Nikula
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Jani Nikula @ 2013-10-14 16:02 UTC (permalink / raw)
  To: intel-gfx, David Härdeman, Jasper Smet; +Cc: jani.nikula

This is a completely untested and possibly naïve attempt at fixing [1]
and [2]. Based on top of drm-intel-nightly branch of [3].

David, Jasper, please give it a try.

Thanks,
Jani.


[1] http://mid.gmane.org/CAGpEb3Ep1LRZETPxHGRfBDqr5Ts2tAc8gCukWwugUf1U5NYv1g@mail.gmail.com
[2] http://mid.gmane.org/20130206213533.GA16367@hardeman.nu
[3] git://people.freedesktop.org/~danvet/drm-intel

Jani Nikula (2):
  drm/i915: pass mode to write eld
  drm/i915: set hdmi audio clock

 drivers/gpu/drm/i915/i915_drv.h      |    3 +-
 drivers/gpu/drm/i915/i915_reg.h      |   12 ++++++-
 drivers/gpu/drm/i915/intel_display.c |   58 +++++++++++++++++++++++++++++-----
 3 files changed, 63 insertions(+), 10 deletions(-)

-- 
1.7.9.5

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [PATCH 1/2] drm/i915: pass mode to write eld
  2013-10-14 16:02 [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jani Nikula
@ 2013-10-14 16:02 ` Jani Nikula
  2013-10-14 16:02 ` [PATCH 2/2] drm/i915: set hdmi audio clock Jani Nikula
                   ` (2 subsequent siblings)
  3 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2013-10-14 16:02 UTC (permalink / raw)
  To: intel-gfx, David Härdeman, Jasper Smet; +Cc: jani.nikula

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h      |    3 ++-
 drivers/gpu/drm/i915/intel_display.c |   11 +++++++----
 2 files changed, 9 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2ea66f2..ee5cf20 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -379,7 +379,8 @@ struct drm_i915_display_funcs {
 	void (*crtc_disable)(struct drm_crtc *crtc);
 	void (*off)(struct drm_crtc *crtc);
 	void (*write_eld)(struct drm_connector *connector,
-			  struct drm_crtc *crtc);
+			  struct drm_crtc *crtc,
+			  struct drm_display_mode *mode);
 	void (*fdi_link_train)(struct drm_crtc *crtc);
 	void (*init_clock_gating)(struct drm_device *dev);
 	int (*queue_flip)(struct drm_device *dev, struct drm_crtc *crtc,
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fbd028e..d0a014b 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6752,7 +6752,8 @@ static bool intel_eld_uptodate(struct drm_connector *connector,
 }
 
 static void g4x_write_eld(struct drm_connector *connector,
-			  struct drm_crtc *crtc)
+			  struct drm_crtc *crtc,
+			  struct drm_display_mode *mode)
 {
 	struct drm_i915_private *dev_priv = connector->dev->dev_private;
 	uint8_t *eld = connector->eld;
@@ -6792,7 +6793,8 @@ static void g4x_write_eld(struct drm_connector *connector,
 }
 
 static void haswell_write_eld(struct drm_connector *connector,
-				     struct drm_crtc *crtc)
+			      struct drm_crtc *crtc,
+			      struct drm_display_mode *mode)
 {
 	struct drm_i915_private *dev_priv = connector->dev->dev_private;
 	uint8_t *eld = connector->eld;
@@ -6879,7 +6881,8 @@ static void haswell_write_eld(struct drm_connector *connector,
 }
 
 static void ironlake_write_eld(struct drm_connector *connector,
-				     struct drm_crtc *crtc)
+			       struct drm_crtc *crtc,
+			       struct drm_display_mode *mode)
 {
 	struct drm_i915_private *dev_priv = connector->dev->dev_private;
 	uint8_t *eld = connector->eld;
@@ -6974,7 +6977,7 @@ void intel_write_eld(struct drm_encoder *encoder,
 	connector->eld[6] = drm_av_sync_delay(connector, mode) / 2;
 
 	if (dev_priv->display.write_eld)
-		dev_priv->display.write_eld(connector, crtc);
+		dev_priv->display.write_eld(connector, crtc, mode);
 }
 
 static void i845_update_cursor(struct drm_crtc *crtc, u32 base)
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* [PATCH 2/2] drm/i915: set hdmi audio clock
  2013-10-14 16:02 [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jani Nikula
  2013-10-14 16:02 ` [PATCH 1/2] drm/i915: pass mode to write eld Jani Nikula
@ 2013-10-14 16:02 ` Jani Nikula
  2013-10-15  9:09 ` [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jasper Smet
  2013-10-15 20:02 ` Jasper Smet
  3 siblings, 0 replies; 6+ messages in thread
From: Jani Nikula @ 2013-10-14 16:02 UTC (permalink / raw)
  To: intel-gfx, David Härdeman, Jasper Smet; +Cc: jani.nikula

Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
 drivers/gpu/drm/i915/i915_reg.h      |   12 ++++++++-
 drivers/gpu/drm/i915/intel_display.c |   47 +++++++++++++++++++++++++++++++---
 2 files changed, 54 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index bb6bd26..1fe8253 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4875,7 +4875,17 @@
 #define   AUD_CONFIG_LOWER_N_SHIFT		4
 #define   AUD_CONFIG_LOWER_N_VALUE		(0xfff << 4)
 #define   AUD_CONFIG_PIXEL_CLOCK_HDMI_SHIFT	16
-#define   AUD_CONFIG_PIXEL_CLOCK_HDMI		(0xf << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_MASK	(0xf << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_25175	(0 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_25200	(1 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_27000	(2 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_27027	(3 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_54000	(4 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_54054	(5 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_74176	(6 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_74250	(7 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148352	(8 << 16)
+#define   AUD_CONFIG_PIXEL_CLOCK_HDMI_148500	(9 << 16)
 #define   AUD_CONFIG_DISABLE_NCTS		(1 << 3)
 
 /* HSW Audio */
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index d0a014b..18f8be0 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6722,6 +6722,43 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 	return 0;
 }
 
+static struct {
+	int clock;
+	u32 config;
+} hdmi_audio_clock[] = {
+	{ DIV_ROUND_UP(25200 * 1000, 1001), AUD_CONFIG_PIXEL_CLOCK_HDMI_25175 },
+	{ 25200, AUD_CONFIG_PIXEL_CLOCK_HDMI_25200 },
+	{ 27000, AUD_CONFIG_PIXEL_CLOCK_HDMI_27000 },
+	{ 27000 * 1001 / 1000, AUD_CONFIG_PIXEL_CLOCK_HDMI_27027 },
+	{ 54000, AUD_CONFIG_PIXEL_CLOCK_HDMI_54000 },
+	{ 54000 * 1001 / 1000, AUD_CONFIG_PIXEL_CLOCK_HDMI_54054 },
+	{ DIV_ROUND_UP(74250 * 1000, 1001), AUD_CONFIG_PIXEL_CLOCK_HDMI_74176 },
+	{ 74250, AUD_CONFIG_PIXEL_CLOCK_HDMI_74250 },
+	{ DIV_ROUND_UP(148500 * 1000, 1001), AUD_CONFIG_PIXEL_CLOCK_HDMI_148352 },
+	{ 148500, AUD_CONFIG_PIXEL_CLOCK_HDMI_148500 },
+};
+
+static u32 audio_config_hdmi_pixel_clock(struct drm_display_mode *mode)
+{
+	int i;
+
+	for (i = 0; i < ARRAY_SIZE(hdmi_audio_clock); i++) {
+		if (mode->clock == hdmi_audio_clock[i].clock)
+			break;
+	}
+
+	if (i == ARRAY_SIZE(hdmi_audio_clock)) {
+		DRM_DEBUG_KMS("HDMI audio pixel clock setting for %d not found, falling back to defaults\n", mode->clock);
+		i = 1;
+	}
+
+	DRM_DEBUG_KMS("Configuring HDMI audio for pixel clock %d (0x%08x)\n",
+		      hdmi_audio_clock[i].clock,
+		      hdmi_audio_clock[i].config);
+
+	return hdmi_audio_clock[i].config;
+}
+
 static bool intel_eld_uptodate(struct drm_connector *connector,
 			       int reg_eldv, uint32_t bits_eldv,
 			       int reg_elda, uint32_t bits_elda,
@@ -6847,8 +6884,9 @@ static void haswell_write_eld(struct drm_connector *connector,
 		DRM_DEBUG_DRIVER("ELD: DisplayPort detected\n");
 		eld[5] |= (1 << 2);	/* Conn_Type, 0x1 = DisplayPort */
 		I915_WRITE(aud_config, AUD_CONFIG_N_VALUE_INDEX); /* 0x1 = DP */
-	} else
-		I915_WRITE(aud_config, 0);
+	} else {
+		I915_WRITE(aud_config, audio_config_hdmi_pixel_clock(mode));
+	}
 
 	if (intel_eld_uptodate(connector,
 			       aud_cntrl_st2, eldv,
@@ -6926,8 +6964,9 @@ static void ironlake_write_eld(struct drm_connector *connector,
 		DRM_DEBUG_DRIVER("ELD: DisplayPort detected\n");
 		eld[5] |= (1 << 2);	/* Conn_Type, 0x1 = DisplayPort */
 		I915_WRITE(aud_config, AUD_CONFIG_N_VALUE_INDEX); /* 0x1 = DP */
-	} else
-		I915_WRITE(aud_config, 0);
+	} else {
+		I915_WRITE(aud_config, audio_config_hdmi_pixel_clock(mode));
+	}
 
 	if (intel_eld_uptodate(connector,
 			       aud_cntrl_st2, eldv,
-- 
1.7.9.5

^ permalink raw reply related	[flat|nested] 6+ messages in thread

* Re: [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config
  2013-10-14 16:02 [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jani Nikula
  2013-10-14 16:02 ` [PATCH 1/2] drm/i915: pass mode to write eld Jani Nikula
  2013-10-14 16:02 ` [PATCH 2/2] drm/i915: set hdmi audio clock Jani Nikula
@ 2013-10-15  9:09 ` Jasper Smet
  2013-10-15 20:02 ` Jasper Smet
  3 siblings, 0 replies; 6+ messages in thread
From: Jasper Smet @ 2013-10-15  9:09 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

Thanks for this,

Will apply the patches and test ASAP!

On Mon, Oct 14, 2013 at 6:02 PM, Jani Nikula <jani.nikula@intel.com> wrote:
> This is a completely untested and possibly naïve attempt at fixing [1]
> and [2]. Based on top of drm-intel-nightly branch of [3].
>
> David, Jasper, please give it a try.
>
> Thanks,
> Jani.
>
>
> [1] http://mid.gmane.org/CAGpEb3Ep1LRZETPxHGRfBDqr5Ts2tAc8gCukWwugUf1U5NYv1g@mail.gmail.com
> [2] http://mid.gmane.org/20130206213533.GA16367@hardeman.nu
> [3] git://people.freedesktop.org/~danvet/drm-intel
>
> Jani Nikula (2):
>   drm/i915: pass mode to write eld
>   drm/i915: set hdmi audio clock
>
>  drivers/gpu/drm/i915/i915_drv.h      |    3 +-
>  drivers/gpu/drm/i915/i915_reg.h      |   12 ++++++-
>  drivers/gpu/drm/i915/intel_display.c |   58 +++++++++++++++++++++++++++++-----
>  3 files changed, 63 insertions(+), 10 deletions(-)
>
> --
> 1.7.9.5
>



-- 
Met Vriendelijke Groeten

Jasper Smet
Developer

Twitter: josbeir
E-mail: josbeir@gmail.com
Mobile: 0486/41.75.45

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config
  2013-10-14 16:02 [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jani Nikula
                   ` (2 preceding siblings ...)
  2013-10-15  9:09 ` [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jasper Smet
@ 2013-10-15 20:02 ` Jasper Smet
  2013-10-15 21:25   ` David Härdeman
  3 siblings, 1 reply; 6+ messages in thread
From: Jasper Smet @ 2013-10-15 20:02 UTC (permalink / raw)
  To: Jani Nikula; +Cc: intel-gfx

Good news! Audio works now in 1080p@50/60 but only in 48000khz which
fixes most of my problems :-)

What (still) does not work in 50/60hz is 41000khz audio (still works
in lower modes) so the patch is not 100% :-)

I noticed this because menu sounds in XBMC are 41000 khz and they
wouldn't play where all me test audio content worked well. I fixed
this by adding a custom resample option where sound in menus started
working too.

Anything i can do tho help ?

I would like to thank you for all your superbly great work so far :-)
You rock dude! :-)



On Mon, Oct 14, 2013 at 6:02 PM, Jani Nikula <jani.nikula@intel.com> wrote:
> This is a completely untested and possibly naïve attempt at fixing [1]
> and [2]. Based on top of drm-intel-nightly branch of [3].
>
> David, Jasper, please give it a try.
>
> Thanks,
> Jani.
>
>
> [1] http://mid.gmane.org/CAGpEb3Ep1LRZETPxHGRfBDqr5Ts2tAc8gCukWwugUf1U5NYv1g@mail.gmail.com
> [2] http://mid.gmane.org/20130206213533.GA16367@hardeman.nu
> [3] git://people.freedesktop.org/~danvet/drm-intel
>
> Jani Nikula (2):
>   drm/i915: pass mode to write eld
>   drm/i915: set hdmi audio clock
>
>  drivers/gpu/drm/i915/i915_drv.h      |    3 +-
>  drivers/gpu/drm/i915/i915_reg.h      |   12 ++++++-
>  drivers/gpu/drm/i915/intel_display.c |   58 +++++++++++++++++++++++++++++-----
>  3 files changed, 63 insertions(+), 10 deletions(-)
>
> --
> 1.7.9.5
>



-- 
Met Vriendelijke Groeten

Jasper Smet
Developer

Twitter: josbeir
E-mail: josbeir@gmail.com
Mobile: 0486/41.75.45

^ permalink raw reply	[flat|nested] 6+ messages in thread

* Re: [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config
  2013-10-15 20:02 ` Jasper Smet
@ 2013-10-15 21:25   ` David Härdeman
  0 siblings, 0 replies; 6+ messages in thread
From: David Härdeman @ 2013-10-15 21:25 UTC (permalink / raw)
  To: Jasper Smet; +Cc: Jani Nikula, intel-gfx

Not a surprising outcome since it essentially means feature parity with
the Windows driver (48kHz working, 44.1kHz not working).

I still suspect it's a bug with the Pioneer receiver.

On Tue, Oct 15, 2013 at 10:02:54PM +0200, Jasper Smet wrote:
>Good news! Audio works now in 1080p@50/60 but only in 48000khz which
>fixes most of my problems :-)
>
>What (still) does not work in 50/60hz is 41000khz audio (still works
>in lower modes) so the patch is not 100% :-)
>
>I noticed this because menu sounds in XBMC are 41000 khz and they
>wouldn't play where all me test audio content worked well. I fixed
>this by adding a custom resample option where sound in menus started
>working too.
>
>Anything i can do tho help ?
>
>I would like to thank you for all your superbly great work so far :-)
>You rock dude! :-)
>
>
>
>On Mon, Oct 14, 2013 at 6:02 PM, Jani Nikula <jani.nikula@intel.com> wrote:
>> This is a completely untested and possibly naïve attempt at fixing [1]
>> and [2]. Based on top of drm-intel-nightly branch of [3].
>>
>> David, Jasper, please give it a try.
>>
>> Thanks,
>> Jani.
>>
>>
>> [1] http://mid.gmane.org/CAGpEb3Ep1LRZETPxHGRfBDqr5Ts2tAc8gCukWwugUf1U5NYv1g@mail.gmail.com
>> [2] http://mid.gmane.org/20130206213533.GA16367@hardeman.nu
>> [3] git://people.freedesktop.org/~danvet/drm-intel
>>
>> Jani Nikula (2):
>>   drm/i915: pass mode to write eld
>>   drm/i915: set hdmi audio clock
>>
>>  drivers/gpu/drm/i915/i915_drv.h      |    3 +-
>>  drivers/gpu/drm/i915/i915_reg.h      |   12 ++++++-
>>  drivers/gpu/drm/i915/intel_display.c |   58 +++++++++++++++++++++++++++++-----
>>  3 files changed, 63 insertions(+), 10 deletions(-)
>>
>> --
>> 1.7.9.5
>>
>
>
>
>-- 
>Met Vriendelijke Groeten
>
>Jasper Smet
>Developer
>
>Twitter: josbeir
>E-mail: josbeir@gmail.com
>Mobile: 0486/41.75.45
>

-- 
David Härdeman

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2013-10-15 21:32 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2013-10-14 16:02 [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jani Nikula
2013-10-14 16:02 ` [PATCH 1/2] drm/i915: pass mode to write eld Jani Nikula
2013-10-14 16:02 ` [PATCH 2/2] drm/i915: set hdmi audio clock Jani Nikula
2013-10-15  9:09 ` [PATCH 0/2] drm/i915: fix hdmi audio pixel clock config Jasper Smet
2013-10-15 20:02 ` Jasper Smet
2013-10-15 21:25   ` David Härdeman

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