Re: [PATCH 2/2] drm/i915: add Ivy Bridge page flip support

[Chris Wilson <chris@chris-wilson.co.uk>]

On Tue, 14 Jun 2011 11:13:08 -0700, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> Use the blit ring for submitting flips since the render ring doesn't
> generate flip complete interrupts.
> 
> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c |   25 +++++++++++++++++++++++++
>  1 files changed, 25 insertions(+), 0 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 06748f3a..3d095de 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -6379,6 +6379,28 @@ out:
>  	return ret;
>  }
>  
> +static int intel_gen7_queue_flip(struct drm_device *dev,
> +				 struct drm_crtc *crtc,
> +				 struct drm_framebuffer *fb,
> +				 struct drm_i915_gem_object *obj)
> +{
> +	struct drm_i915_private *dev_priv = dev->dev_private;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_ring_buffer *ring = &dev_priv->ring[BCS];
> +	int ret;
> +
> +	ret = intel_ring_begin(&dev_priv->ring[BCS], 4);
> +	if (ret)
> +		goto out;
> +
> +	intel_ring_emit(&dev_priv->ring[BCS], (MI_DISPLAY_FLIP_I915 | (intel_crtc->plane << 19)) | (1 << 17));
What's the magic number? 80 column limit?
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre