[PATCH 0/8] drm/i915: Provide more information on display faults

[PATCH 0/8] drm/i915: Provide more information on display faults

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Currently we just print a hardware specific bitmask when
encountering any kind of display fault error. To make these
errors a bit easier to decode (and perhps even analyze)
I now decode the actual bits, and for plane faults provide
a dump of a few (hopefully) relevant plane registers (CTL,
SURF,SURFLIVE for now, which should at least help with faults
cause by bad GTT alignment).

So far we only reported faults on bdw+, but I'm also hooking
this stuff up for all ilk+ and vlv/chv. The older gmch
platforms I left out for now, but I think i965/g4x should
at least be diable in the future.

Not sure I'm 100% satisfied with how the pipe_fault_handler 
thing is structured, but at least it works.

Ville Syrjälä (8):
  drm/i915: Add missing else to the if ladder in missing else
  drm/i915: Introduce a minimal plane error state
  drm/i915: Pimp display fault reporting
  drm/i915: Hook in display GTT faults for IVB/HSW
  drm/i915: Hook in display GTT faults for ILK/SNB
  drm/i915: Introduce i915_error_regs
  drm/i915: Un-invert {i9xx,i965}_error_mask()
  drm/i915: Hook up display fault interrupts for VLV/CHV

 drivers/gpu/drm/i915/display/i9xx_plane.c     |  41 ++
 .../gpu/drm/i915/display/intel_atomic_plane.c |   2 +-
 .../gpu/drm/i915/display/intel_atomic_plane.h |   2 +
 drivers/gpu/drm/i915/display/intel_cursor.c   |  26 ++
 .../gpu/drm/i915/display/intel_display_irq.c  | 392 +++++++++++++++++-
 .../gpu/drm/i915/display/intel_display_irq.h  |   3 +
 .../drm/i915/display/intel_display_types.h    |   7 +
 drivers/gpu/drm/i915/display/intel_sprite.c   |  36 ++
 .../drm/i915/display/skl_universal_plane.c    |  12 +
 drivers/gpu/drm/i915/i915_irq.c               |  61 ++-
 drivers/gpu/drm/i915/i915_irq.h               |   4 +
 drivers/gpu/drm/i915/i915_reg.h               |  34 ++
 drivers/gpu/drm/i915/i915_reg_defs.h          |   8 +
 drivers/gpu/drm/xe/display/ext/i915_irq.c     |  23 +
 14 files changed, 632 insertions(+), 19 deletions(-)

-- 
2.45.2

[PATCH 1/8] drm/i915: Add missing else to the if ladder in missing else

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

The if ladder in gen8_de_pipe_fault_mask() was missing one
else, add it. Doesn't actually matter since each if branch
just returns directly. But the code is less confusing when
you always do things the same way.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 069043f9d894..f06273d9bc8c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -856,7 +856,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 			GEN9_PIPE_PLANE3_FAULT |
 			GEN9_PIPE_PLANE2_FAULT |
 			GEN9_PIPE_PLANE1_FAULT;
-	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
+	else if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
 		return GEN12_PIPEDMC_FAULT |
 			GEN9_PIPE_CURSOR_FAULT |
 			GEN11_PIPE_PLANE5_FAULT |
-- 
2.45.2

Re: [PATCH 1/8] drm/i915: Add missing else to the if ladder in missing else

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> The if ladder in gen8_de_pipe_fault_mask() was missing one
> else, add it. Doesn't actually matter since each if branch
> just returns directly. But the code is less confusing when
> you always do things the same way.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display_irq.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 069043f9d894..f06273d9bc8c 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -856,7 +856,7 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  			GEN9_PIPE_PLANE3_FAULT |
>  			GEN9_PIPE_PLANE2_FAULT |
>  			GEN9_PIPE_PLANE1_FAULT;
> -	if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
> +	else if (DISPLAY_VER(display) >= 13 || HAS_D12_PLANE_MINIMIZATION(display))
>  		return GEN12_PIPEDMC_FAULT |
>  			GEN9_PIPE_CURSOR_FAULT |
>  			GEN11_PIPE_PLANE5_FAULT |

[PATCH 2/8] drm/i915: Introduce a minimal plane error state

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

I want to capture a little bit more information about the state
of the plane upon faults. To that end introduce a small plane error
state struct and provide per-plane vfuncs to read it out.

For now we just stick the CTL, SURF, and SURFLIVE (if available)
registers contents in theret.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/i9xx_plane.c     | 41 +++++++++++++++++++
 drivers/gpu/drm/i915/display/intel_cursor.c   | 26 ++++++++++++
 .../drm/i915/display/intel_display_types.h    |  7 ++++
 drivers/gpu/drm/i915/display/intel_sprite.c   | 36 ++++++++++++++++
 .../drm/i915/display/skl_universal_plane.c    | 12 ++++++
 5 files changed, 122 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
index 48e657a80a16..ebfc205a480f 100644
--- a/drivers/gpu/drm/i915/display/i9xx_plane.c
+++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
@@ -553,6 +553,40 @@ static void i9xx_plane_disable_arm(struct intel_dsb *dsb,
 		intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane), 0);
 }
 
+static void g4x_primary_capture_error(struct intel_crtc *crtc,
+				      struct intel_plane *plane,
+				      struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
+
+	error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
+	error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));
+	error->surflive = intel_de_read(display, DSPSURFLIVE(display, i9xx_plane));
+}
+
+static void i965_plane_capture_error(struct intel_crtc *crtc,
+				     struct intel_plane *plane,
+				     struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
+
+	error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
+	error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));
+}
+
+static void i8xx_plane_capture_error(struct intel_crtc *crtc,
+				     struct intel_plane *plane,
+				     struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
+
+	error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
+	error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane));
+}
+
 static void
 g4x_primary_async_flip(struct intel_dsb *dsb,
 		       struct intel_plane *plane,
@@ -955,6 +989,13 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
 	plane->get_hw_state = i9xx_plane_get_hw_state;
 	plane->check_plane = i9xx_plane_check;
 
+	if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
+		plane->capture_error = g4x_primary_capture_error;
+	else if (DISPLAY_VER(dev_priv) >= 4)
+		plane->capture_error = i965_plane_capture_error;
+	else
+		plane->capture_error = i8xx_plane_capture_error;
+
 	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
 		plane->async_flip = vlv_primary_async_flip;
 		plane->enable_flip_done = vlv_primary_enable_flip_done;
diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c b/drivers/gpu/drm/i915/display/intel_cursor.c
index 57cf8f46a458..0bc71b5bacb6 100644
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@ -758,6 +758,27 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
 	return ret;
 }
 
+static void g4x_cursor_capture_error(struct intel_crtc *crtc,
+				     struct intel_plane *plane,
+				     struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+
+	error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));
+	error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));
+	error->surflive = intel_de_read(display, CURSURFLIVE(display, crtc->pipe));
+}
+
+static void i9xx_cursor_capture_error(struct intel_crtc *crtc,
+				      struct intel_plane *plane,
+				      struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+
+	error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));
+	error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));
+}
+
 static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
 					      u32 format, u64 modifier)
 {
@@ -1020,6 +1041,11 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
 		cursor->check_plane = i9xx_check_cursor;
 	}
 
+	if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
+		cursor->capture_error = g4x_cursor_capture_error;
+	else
+		cursor->capture_error = i9xx_cursor_capture_error;
+
 	cursor->cursor.base = ~0;
 	cursor->cursor.cntl = ~0;
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 8271e50e3644..a8adae68c512 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1439,6 +1439,10 @@ struct intel_crtc {
 	bool block_dc_for_vblank;
 };
 
+struct intel_plane_error {
+	u32 ctl, surf, surflive;
+};
+
 struct intel_plane {
 	struct drm_plane base;
 	enum i9xx_plane_id i9xx_plane;
@@ -1488,6 +1492,9 @@ struct intel_plane {
 	void (*disable_arm)(struct intel_dsb *dsb,
 			    struct intel_plane *plane,
 			    const struct intel_crtc_state *crtc_state);
+	void (*capture_error)(struct intel_crtc *crtc,
+			      struct intel_plane *plane,
+			      struct intel_plane_error *error);
 	bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe);
 	int (*check_plane)(struct intel_crtc_state *crtc_state,
 			   struct intel_plane_state *plane_state);
diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index e6fadcef58e0..7197fedc4a17 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -463,6 +463,17 @@ vlv_sprite_disable_arm(struct intel_dsb *dsb,
 	intel_de_write_fw(display, SPSURF(pipe, plane_id), 0);
 }
 
+static void vlv_sprite_capture_error(struct intel_crtc *crtc,
+				     struct intel_plane *plane,
+				     struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+
+	error->ctl = intel_de_read(display, SPCNTR(crtc->pipe, plane->id));
+	error->surf = intel_de_read(display, SPSURF(crtc->pipe, plane->id));
+	error->surflive = intel_de_read(display, SPSURFLIVE(crtc->pipe, plane->id));
+}
+
 static bool
 vlv_sprite_get_hw_state(struct intel_plane *plane,
 			enum pipe *pipe)
@@ -894,6 +905,17 @@ ivb_sprite_disable_arm(struct intel_dsb *dsb,
 	intel_de_write_fw(display, SPRSURF(pipe), 0);
 }
 
+static void ivb_sprite_capture_error(struct intel_crtc *crtc,
+				     struct intel_plane *plane,
+				     struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+
+	error->ctl = intel_de_read(display, SPRCTL(crtc->pipe));
+	error->surf = intel_de_read(display, SPRSURF(crtc->pipe));
+	error->surflive = intel_de_read(display, SPRSURFLIVE(crtc->pipe));
+}
+
 static bool
 ivb_sprite_get_hw_state(struct intel_plane *plane,
 			enum pipe *pipe)
@@ -1227,6 +1249,17 @@ g4x_sprite_disable_arm(struct intel_dsb *dsb,
 	intel_de_write_fw(display, DVSSURF(pipe), 0);
 }
 
+static void g4x_sprite_capture_error(struct intel_crtc *crtc,
+				     struct intel_plane *plane,
+				     struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+
+	error->ctl = intel_de_read(display, DVSCNTR(crtc->pipe));
+	error->surf = intel_de_read(display, DVSSURF(crtc->pipe));
+	error->surflive = intel_de_read(display, DVSSURFLIVE(crtc->pipe));
+}
+
 static bool
 g4x_sprite_get_hw_state(struct intel_plane *plane,
 			enum pipe *pipe)
@@ -1613,6 +1646,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
 		plane->update_noarm = vlv_sprite_update_noarm;
 		plane->update_arm = vlv_sprite_update_arm;
 		plane->disable_arm = vlv_sprite_disable_arm;
+		plane->capture_error = vlv_sprite_capture_error;
 		plane->get_hw_state = vlv_sprite_get_hw_state;
 		plane->check_plane = vlv_sprite_check;
 		plane->max_stride = i965_plane_max_stride;
@@ -1632,6 +1666,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
 		plane->update_noarm = ivb_sprite_update_noarm;
 		plane->update_arm = ivb_sprite_update_arm;
 		plane->disable_arm = ivb_sprite_disable_arm;
+		plane->capture_error = ivb_sprite_capture_error;
 		plane->get_hw_state = ivb_sprite_get_hw_state;
 		plane->check_plane = g4x_sprite_check;
 
@@ -1653,6 +1688,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
 		plane->update_noarm = g4x_sprite_update_noarm;
 		plane->update_arm = g4x_sprite_update_arm;
 		plane->disable_arm = g4x_sprite_disable_arm;
+		plane->capture_error = g4x_sprite_capture_error;
 		plane->get_hw_state = g4x_sprite_get_hw_state;
 		plane->check_plane = g4x_sprite_check;
 		plane->max_stride = g4x_sprite_max_stride;
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index ff9764cac1e7..73f9b12da3a4 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -1594,6 +1594,17 @@ icl_plane_update_arm(struct intel_dsb *dsb,
 			   skl_plane_surf(plane_state, color_plane));
 }
 
+static void skl_plane_capture_error(struct intel_crtc *crtc,
+				    struct intel_plane *plane,
+				    struct intel_plane_error *error)
+{
+	struct intel_display *display = to_intel_display(plane);
+
+	error->ctl = intel_de_read(display, PLANE_CTL(crtc->pipe, plane->id));
+	error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id));
+	error->surflive = intel_de_read(display, PLANE_SURFLIVE(crtc->pipe, plane->id));
+}
+
 static void
 skl_plane_async_flip(struct intel_dsb *dsb,
 		     struct intel_plane *plane,
@@ -2668,6 +2679,7 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
 		plane->update_arm = skl_plane_update_arm;
 		plane->disable_arm = skl_plane_disable_arm;
 	}
+	plane->capture_error = skl_plane_capture_error;
 	plane->get_hw_state = skl_plane_get_hw_state;
 	plane->check_plane = skl_plane_check;
 
-- 
2.45.2

Re: [PATCH 2/8] drm/i915: Introduce a minimal plane error state

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> I want to capture a little bit more information about the state
> of the plane upon faults. To that end introduce a small plane error
> state struct and provide per-plane vfuncs to read it out.
> 
> For now we just stick the CTL, SURF, and SURFLIVE (if available)
> registers contents in theret.
typo?

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/display/i9xx_plane.c     | 41 +++++++++++++++++++
>  drivers/gpu/drm/i915/display/intel_cursor.c   | 26 ++++++++++++
>  .../drm/i915/display/intel_display_types.h    |  7 ++++
>  drivers/gpu/drm/i915/display/intel_sprite.c   | 36 ++++++++++++++++
>  .../drm/i915/display/skl_universal_plane.c    | 12 ++++++
>  5 files changed, 122 insertions(+)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/i9xx_plane.c b/drivers/gpu/drm/i915/display/i9xx_plane.c
> index 48e657a80a16..ebfc205a480f 100644
> --- a/drivers/gpu/drm/i915/display/i9xx_plane.c
> +++ b/drivers/gpu/drm/i915/display/i9xx_plane.c
> @@ -553,6 +553,40 @@ static void i9xx_plane_disable_arm(struct intel_dsb *dsb,
>  		intel_de_write_fw(dev_priv, DSPADDR(dev_priv, i9xx_plane), 0);
>  }
>  
> +static void g4x_primary_capture_error(struct intel_crtc *crtc,
> +				      struct intel_plane *plane,
> +				      struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> +
> +	error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
> +	error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));
> +	error->surflive = intel_de_read(display, DSPSURFLIVE(display, i9xx_plane));
> +}
> +
> +static void i965_plane_capture_error(struct intel_crtc *crtc,
> +				     struct intel_plane *plane,
> +				     struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> +
> +	error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
> +	error->surf = intel_de_read(display, DSPSURF(display, i9xx_plane));
> +}
> +
> +static void i8xx_plane_capture_error(struct intel_crtc *crtc,
> +				     struct intel_plane *plane,
> +				     struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +	enum i9xx_plane_id i9xx_plane = plane->i9xx_plane;
> +
> +	error->ctl = intel_de_read(display, DSPCNTR(display, i9xx_plane));
> +	error->surf = intel_de_read(display, DSPADDR(display, i9xx_plane));
> +}
> +
>  static void
>  g4x_primary_async_flip(struct intel_dsb *dsb,
>  		       struct intel_plane *plane,
> @@ -955,6 +989,13 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
>  	plane->get_hw_state = i9xx_plane_get_hw_state;
>  	plane->check_plane = i9xx_plane_check;
>  
> +	if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
> +		plane->capture_error = g4x_primary_capture_error;
> +	else if (DISPLAY_VER(dev_priv) >= 4)
> +		plane->capture_error = i965_plane_capture_error;
> +	else
> +		plane->capture_error = i8xx_plane_capture_error;
> +
>  	if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
>  		plane->async_flip = vlv_primary_async_flip;
>  		plane->enable_flip_done = vlv_primary_enable_flip_done;
> diff --git a/drivers/gpu/drm/i915/display/intel_cursor.c
> b/drivers/gpu/drm/i915/display/intel_cursor.c
> index 57cf8f46a458..0bc71b5bacb6 100644
> --- a/drivers/gpu/drm/i915/display/intel_cursor.c
> +++ b/drivers/gpu/drm/i915/display/intel_cursor.c
> @@ -758,6 +758,27 @@ static bool i9xx_cursor_get_hw_state(struct intel_plane *plane,
>  	return ret;
>  }
>  
> +static void g4x_cursor_capture_error(struct intel_crtc *crtc,
> +				     struct intel_plane *plane,
> +				     struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +
> +	error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));
> +	error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));
> +	error->surflive = intel_de_read(display, CURSURFLIVE(display, crtc->pipe));
> +}
> +
> +static void i9xx_cursor_capture_error(struct intel_crtc *crtc,
> +				      struct intel_plane *plane,
> +				      struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +
> +	error->ctl = intel_de_read(display, CURCNTR(display, crtc->pipe));
> +	error->surf = intel_de_read(display, CURBASE(display, crtc->pipe));
> +}
> +
>  static bool intel_cursor_format_mod_supported(struct drm_plane *_plane,
>  					      u32 format, u64 modifier)
>  {
> @@ -1020,6 +1041,11 @@ intel_cursor_plane_create(struct drm_i915_private *dev_priv,
>  		cursor->check_plane = i9xx_check_cursor;
>  	}
>  
> +	if (DISPLAY_VER(dev_priv) >= 5 || IS_G4X(dev_priv))
> +		cursor->capture_error = g4x_cursor_capture_error;
> +	else
> +		cursor->capture_error = i9xx_cursor_capture_error;
> +
>  	cursor->cursor.base = ~0;
>  	cursor->cursor.cntl = ~0;
>  
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index 8271e50e3644..a8adae68c512 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1439,6 +1439,10 @@ struct intel_crtc {
>  	bool block_dc_for_vblank;
>  };
>  
> +struct intel_plane_error {
> +	u32 ctl, surf, surflive;
> +};
> +
>  struct intel_plane {
>  	struct drm_plane base;
>  	enum i9xx_plane_id i9xx_plane;
> @@ -1488,6 +1492,9 @@ struct intel_plane {
>  	void (*disable_arm)(struct intel_dsb *dsb,
>  			    struct intel_plane *plane,
>  			    const struct intel_crtc_state *crtc_state);
> +	void (*capture_error)(struct intel_crtc *crtc,
> +			      struct intel_plane *plane,
> +			      struct intel_plane_error *error);
>  	bool (*get_hw_state)(struct intel_plane *plane, enum pipe *pipe);
>  	int (*check_plane)(struct intel_crtc_state *crtc_state,
>  			   struct intel_plane_state *plane_state);
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c
> b/drivers/gpu/drm/i915/display/intel_sprite.c
> index e6fadcef58e0..7197fedc4a17 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -463,6 +463,17 @@ vlv_sprite_disable_arm(struct intel_dsb *dsb,
>  	intel_de_write_fw(display, SPSURF(pipe, plane_id), 0);
>  }
>  
> +static void vlv_sprite_capture_error(struct intel_crtc *crtc,
> +				     struct intel_plane *plane,
> +				     struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +
> +	error->ctl = intel_de_read(display, SPCNTR(crtc->pipe, plane->id));
> +	error->surf = intel_de_read(display, SPSURF(crtc->pipe, plane->id));
> +	error->surflive = intel_de_read(display, SPSURFLIVE(crtc->pipe, plane->id));
> +}
> +
>  static bool
>  vlv_sprite_get_hw_state(struct intel_plane *plane,
>  			enum pipe *pipe)
> @@ -894,6 +905,17 @@ ivb_sprite_disable_arm(struct intel_dsb *dsb,
>  	intel_de_write_fw(display, SPRSURF(pipe), 0);
>  }
>  
> +static void ivb_sprite_capture_error(struct intel_crtc *crtc,
> +				     struct intel_plane *plane,
> +				     struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +
> +	error->ctl = intel_de_read(display, SPRCTL(crtc->pipe));
> +	error->surf = intel_de_read(display, SPRSURF(crtc->pipe));
> +	error->surflive = intel_de_read(display, SPRSURFLIVE(crtc->pipe));
> +}
> +
>  static bool
>  ivb_sprite_get_hw_state(struct intel_plane *plane,
>  			enum pipe *pipe)
> @@ -1227,6 +1249,17 @@ g4x_sprite_disable_arm(struct intel_dsb *dsb,
>  	intel_de_write_fw(display, DVSSURF(pipe), 0);
>  }
>  
> +static void g4x_sprite_capture_error(struct intel_crtc *crtc,
> +				     struct intel_plane *plane,
> +				     struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +
> +	error->ctl = intel_de_read(display, DVSCNTR(crtc->pipe));
> +	error->surf = intel_de_read(display, DVSSURF(crtc->pipe));
> +	error->surflive = intel_de_read(display, DVSSURFLIVE(crtc->pipe));
> +}
> +
>  static bool
>  g4x_sprite_get_hw_state(struct intel_plane *plane,
>  			enum pipe *pipe)
> @@ -1613,6 +1646,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>  		plane->update_noarm = vlv_sprite_update_noarm;
>  		plane->update_arm = vlv_sprite_update_arm;
>  		plane->disable_arm = vlv_sprite_disable_arm;
> +		plane->capture_error = vlv_sprite_capture_error;
>  		plane->get_hw_state = vlv_sprite_get_hw_state;
>  		plane->check_plane = vlv_sprite_check;
>  		plane->max_stride = i965_plane_max_stride;
> @@ -1632,6 +1666,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>  		plane->update_noarm = ivb_sprite_update_noarm;
>  		plane->update_arm = ivb_sprite_update_arm;
>  		plane->disable_arm = ivb_sprite_disable_arm;
> +		plane->capture_error = ivb_sprite_capture_error;
>  		plane->get_hw_state = ivb_sprite_get_hw_state;
>  		plane->check_plane = g4x_sprite_check;
>  
> @@ -1653,6 +1688,7 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
>  		plane->update_noarm = g4x_sprite_update_noarm;
>  		plane->update_arm = g4x_sprite_update_arm;
>  		plane->disable_arm = g4x_sprite_disable_arm;
> +		plane->capture_error = g4x_sprite_capture_error;
>  		plane->get_hw_state = g4x_sprite_get_hw_state;
>  		plane->check_plane = g4x_sprite_check;
>  		plane->max_stride = g4x_sprite_max_stride;
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index ff9764cac1e7..73f9b12da3a4 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1594,6 +1594,17 @@ icl_plane_update_arm(struct intel_dsb *dsb,
>  			   skl_plane_surf(plane_state, color_plane));
>  }
>  
> +static void skl_plane_capture_error(struct intel_crtc *crtc,
> +				    struct intel_plane *plane,
> +				    struct intel_plane_error *error)
> +{
> +	struct intel_display *display = to_intel_display(plane);
> +
> +	error->ctl = intel_de_read(display, PLANE_CTL(crtc->pipe, plane->id));
> +	error->surf = intel_de_read(display, PLANE_SURF(crtc->pipe, plane->id));
> +	error->surflive = intel_de_read(display, PLANE_SURFLIVE(crtc->pipe, plane->id));
> +}
> +
>  static void
>  skl_plane_async_flip(struct intel_dsb *dsb,
>  		     struct intel_plane *plane,
> @@ -2668,6 +2679,7 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
>  		plane->update_arm = skl_plane_update_arm;
>  		plane->disable_arm = skl_plane_disable_arm;
>  	}
> +	plane->capture_error = skl_plane_capture_error;
>  	plane->get_hw_state = skl_plane_get_hw_state;
>  	plane->check_plane = skl_plane_check;
>  

[PATCH 3/8] drm/i915: Pimp display fault reporting

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Decode the display faults a bit more extensively so that one
doesn't have translate the bitmask to planes/etc. manually.
Also for plane faults we can read out a bit of state from the
relevant plane(s) and dump that out.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../gpu/drm/i915/display/intel_atomic_plane.c |   2 +-
 .../gpu/drm/i915/display/intel_atomic_plane.h |   2 +
 .../gpu/drm/i915/display/intel_display_irq.c  | 156 +++++++++++++++++-
 3 files changed, 155 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
index 612e9b0ec14a..0aeb5f00d9c4 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
@@ -663,7 +663,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
 					       old_plane_state, new_plane_state);
 }
 
-static struct intel_plane *
+struct intel_plane *
 intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
 {
 	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
index 0f982f452ff3..298bb97b37a4 100644
--- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
+++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
@@ -19,6 +19,8 @@ struct intel_plane;
 struct intel_plane_state;
 enum plane_id;
 
+struct intel_plane *
+intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id);
 unsigned int intel_adjusted_rate(const struct drm_rect *src,
 				 const struct drm_rect *dst,
 				 unsigned int rate);
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index f06273d9bc8c..1b3b6b8bc794 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -10,6 +10,7 @@
 #include "i915_irq.h"
 #include "i915_reg.h"
 #include "icl_dsi_regs.h"
+#include "intel_atomic_plane.h"
 #include "intel_crtc.h"
 #include "intel_de.h"
 #include "intel_display_irq.h"
@@ -26,6 +27,52 @@
 #include "intel_psr.h"
 #include "intel_psr_regs.h"
 
+struct pipe_fault_handler {
+	bool (*handle)(struct intel_crtc *crtc, enum plane_id plane_id);
+	u32 fault;
+	enum plane_id plane_id;
+};
+
+static bool handle_plane_fault(struct intel_crtc *crtc, enum plane_id plane_id)
+{
+	struct intel_display *display = to_intel_display(crtc);
+	struct intel_plane_error error = {};
+	struct intel_plane *plane;
+
+	plane = intel_crtc_get_plane(crtc, plane_id);
+	if (!plane || !plane->capture_error)
+		return false;
+
+	plane->capture_error(crtc, plane, &error);
+
+	drm_err_ratelimited(display->drm,
+			    "[CRTC:%d:%s][PLANE:%d:%s] fault (CTL=0x%x, SURF=0x%x, SURFLIVE=0x%x)\n",
+			    crtc->base.base.id, crtc->base.name,
+			    plane->base.base.id, plane->base.name,
+			    error.ctl, error.surf, error.surflive);
+
+	return true;
+}
+
+static void intel_pipe_fault_irq_handler(struct intel_display *display,
+					 const struct pipe_fault_handler *handlers,
+					 enum pipe pipe, u32 fault_errors)
+{
+	struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
+	const struct pipe_fault_handler *handler;
+
+	for (handler = handlers; handler && handler->fault; handler++) {
+		if ((fault_errors & handler->fault) == 0)
+			continue;
+
+		if (handler->handle(crtc, handler->plane_id))
+			fault_errors &= ~handler->fault;
+	}
+
+	WARN_ONCE(fault_errors, "[CRTC:%d:%s] unreported faults 0x%x\n",
+		  crtc->base.base.id, crtc->base.name, fault_errors);
+}
+
 static void
 intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
 {
@@ -895,6 +942,108 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
 			GEN8_PIPE_PRIMARY_FAULT;
 }
 
+static bool handle_plane_ats_fault(struct intel_crtc *crtc, enum plane_id plane_id)
+{
+	struct intel_display *display = to_intel_display(crtc);
+
+	drm_err_ratelimited(display->drm,
+			    "[CRTC:%d:%s] PLANE ATS fault\n",
+			    crtc->base.base.id, crtc->base.name);
+
+	return false;
+}
+
+static bool handle_pipedmc_ats_fault(struct intel_crtc *crtc, enum plane_id plane_id)
+{
+	struct intel_display *display = to_intel_display(crtc);
+
+	drm_err_ratelimited(display->drm,
+			    "[CRTC:%d:%s] PIPEDMC ATS fault\n",
+			    crtc->base.base.id, crtc->base.name);
+
+	return false;
+}
+
+static bool handle_pipedmc_fault(struct intel_crtc *crtc, enum plane_id plane_id)
+{
+	struct intel_display *display = to_intel_display(crtc);
+
+	drm_err_ratelimited(display->drm,
+			    "[CRTC:%d:%s] PIPEDMC fault\n",
+			    crtc->base.base.id, crtc->base.name);
+
+	return false;
+}
+
+static const struct pipe_fault_handler mtl_pipe_fault_handlers[] = {
+	{ .fault = MTL_PLANE_ATS_FAULT,     .handle = handle_plane_ats_fault, },
+	{ .fault = MTL_PIPEDMC_ATS_FAULT,   .handle = handle_pipedmc_ats_fault, },
+	{ .fault = GEN12_PIPEDMC_FAULT,     .handle = handle_pipedmc_fault, },
+	{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
+	{ .fault = GEN9_PIPE_PLANE4_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_4, },
+	{ .fault = GEN9_PIPE_PLANE3_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_3, },
+	{ .fault = GEN9_PIPE_PLANE2_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_2, },
+	{ .fault = GEN9_PIPE_PLANE1_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_1, },
+	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{}
+};
+
+static const struct pipe_fault_handler tgl_pipe_fault_handlers[] = {
+	{ .fault = GEN12_PIPEDMC_FAULT,     .handle = handle_pipedmc_fault, },
+	{ .fault = GEN11_PIPE_PLANE7_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_7, },
+	{ .fault = GEN11_PIPE_PLANE6_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_6, },
+	{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
+	{ .fault = GEN9_PIPE_PLANE4_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_4, },
+	{ .fault = GEN9_PIPE_PLANE3_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_3, },
+	{ .fault = GEN9_PIPE_PLANE2_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_2, },
+	{ .fault = GEN9_PIPE_PLANE1_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_1, },
+	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{}
+};
+
+static const struct pipe_fault_handler icl_pipe_fault_handlers[] = {
+	{ .fault = GEN11_PIPE_PLANE7_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_7, },
+	{ .fault = GEN11_PIPE_PLANE6_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_6, },
+	{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
+	{ .fault = GEN9_PIPE_PLANE4_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_4, },
+	{ .fault = GEN9_PIPE_PLANE3_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_3, },
+	{ .fault = GEN9_PIPE_PLANE2_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_2, },
+	{ .fault = GEN9_PIPE_PLANE1_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_1, },
+	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{}
+};
+
+static const struct pipe_fault_handler skl_pipe_fault_handlers[] = {
+	{ .fault = GEN9_PIPE_PLANE4_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_4, },
+	{ .fault = GEN9_PIPE_PLANE3_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_3, },
+	{ .fault = GEN9_PIPE_PLANE2_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_2, },
+	{ .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
+	{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{}
+};
+
+static const struct pipe_fault_handler bdw_pipe_fault_handlers[] = {
+	{ .fault = GEN8_PIPE_SPRITE_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = GEN8_PIPE_PRIMARY_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = GEN8_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{}
+};
+
+static const struct pipe_fault_handler *
+gen8_pipe_fault_handlers(struct intel_display *display)
+{
+	if (DISPLAY_VER(display) >= 14)
+		return mtl_pipe_fault_handlers;
+	else if (DISPLAY_VER(display) >= 12)
+		return tgl_pipe_fault_handlers;
+	else if (DISPLAY_VER(display) >= 11)
+		return icl_pipe_fault_handlers;
+	else if (DISPLAY_VER(display) >= 9)
+		return skl_pipe_fault_handlers;
+	else
+		return bdw_pipe_fault_handlers;
+}
+
 static void intel_pmdemand_irq_handler(struct drm_i915_private *dev_priv)
 {
 	wake_up_all(&dev_priv->display.pmdemand.waitqueue);
@@ -1182,10 +1331,9 @@ void gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
 
 		fault_errors = iir & gen8_de_pipe_fault_mask(dev_priv);
 		if (fault_errors)
-			drm_err_ratelimited(&dev_priv->drm,
-					    "Fault errors on pipe %c: 0x%08x\n",
-					    pipe_name(pipe),
-					    fault_errors);
+			intel_pipe_fault_irq_handler(display,
+						     gen8_pipe_fault_handlers(display),
+						     pipe, fault_errors);
 	}
 
 	if (HAS_PCH_SPLIT(dev_priv) && !HAS_PCH_NOP(dev_priv) &&
-- 
2.45.2

Re: [PATCH 3/8] drm/i915: Pimp display fault reporting

[Maarten Lankhorst]

Den 2025-01-16 kl. 18:47, skrev Ville Syrjala:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Decode the display faults a bit more extensively so that one
> doesn't have translate the bitmask to planes/etc. manually.
> Also for plane faults we can read out a bit of state from the
> relevant plane(s) and dump that out.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>   .../gpu/drm/i915/display/intel_atomic_plane.c |   2 +-
>   .../gpu/drm/i915/display/intel_atomic_plane.h |   2 +
>   .../gpu/drm/i915/display/intel_display_irq.c  | 156 +++++++++++++++++-
>   3 files changed, 155 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 612e9b0ec14a..0aeb5f00d9c4 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -663,7 +663,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
>   					       old_plane_state, new_plane_state);
>   }
>   
> -static struct intel_plane *
> +struct intel_plane *
>   intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
>   {
>   	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 0f982f452ff3..298bb97b37a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -19,6 +19,8 @@ struct intel_plane;
>   struct intel_plane_state;
>   enum plane_id;
>   
> +struct intel_plane *
> +intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id);
>   unsigned int intel_adjusted_rate(const struct drm_rect *src,
>   				 const struct drm_rect *dst,
>   				 unsigned int rate);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index f06273d9bc8c..1b3b6b8bc794 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -10,6 +10,7 @@
>   #include "i915_irq.h"
>   #include "i915_reg.h"
>   #include "icl_dsi_regs.h"
> +#include "intel_atomic_plane.h"
>   #include "intel_crtc.h"
>   #include "intel_de.h"
>   #include "intel_display_irq.h"
> @@ -26,6 +27,52 @@
>   #include "intel_psr.h"
>   #include "intel_psr_regs.h"
>   
> +struct pipe_fault_handler {
> +	bool (*handle)(struct intel_crtc *crtc, enum plane_id plane_id);
> +	u32 fault;
> +	enum plane_id plane_id;
> +};
> +
> +static bool handle_plane_fault(struct intel_crtc *crtc, enum plane_id plane_id)
> +{
> +	struct intel_display *display = to_intel_display(crtc);
> +	struct intel_plane_error error = {};
> +	struct intel_plane *plane;
> +
> +	plane = intel_crtc_get_plane(crtc, plane_id);
> +	if (!plane || !plane->capture_error)
> +		return false;
> +
> +	plane->capture_error(crtc, plane, &error);
> +
> +	drm_err_ratelimited(display->drm,
> +			    "[CRTC:%d:%s][PLANE:%d:%s] fault (CTL=0x%x, SURF=0x%x, SURFLIVE=0x%x)\n",
> +			    crtc->base.base.id, crtc->base.name,
> +			    plane->base.base.id, plane->base.name,
> +			    error.ctl, error.surf, error.surflive);

Could we drop the CRTC here?
<3> [264.586596] xe 0000:00:02.0: [drm] *ERROR* [CRTC:82:pipe 
A][PLANE:32:plane 1A] fault (CTL=0x94001002, SURF=0x1800000, 
SURFLIVE=0x1800000)

Looks to be a bit redundant to print CRTC and plane here. Most likely 
PLANE is good enough. :-)

Cheers,
~Maarten

Re: [PATCH 3/8] drm/i915: Pimp display fault reporting

[Ville Syrjälä]

On Mon, Jan 20, 2025 at 02:50:50PM +0100, Maarten Lankhorst wrote:
> 
> 
> Den 2025-01-16 kl. 18:47, skrev Ville Syrjala:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Decode the display faults a bit more extensively so that one
> > doesn't have translate the bitmask to planes/etc. manually.
> > Also for plane faults we can read out a bit of state from the
> > relevant plane(s) and dump that out.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >   .../gpu/drm/i915/display/intel_atomic_plane.c |   2 +-
> >   .../gpu/drm/i915/display/intel_atomic_plane.h |   2 +
> >   .../gpu/drm/i915/display/intel_display_irq.c  | 156 +++++++++++++++++-
> >   3 files changed, 155 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > index 612e9b0ec14a..0aeb5f00d9c4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> > @@ -663,7 +663,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state *old_crtc_
> >   					       old_plane_state, new_plane_state);
> >   }
> >   
> > -static struct intel_plane *
> > +struct intel_plane *
> >   intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
> >   {
> >   	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> > diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> > index 0f982f452ff3..298bb97b37a4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> > +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> > @@ -19,6 +19,8 @@ struct intel_plane;
> >   struct intel_plane_state;
> >   enum plane_id;
> >   
> > +struct intel_plane *
> > +intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id);
> >   unsigned int intel_adjusted_rate(const struct drm_rect *src,
> >   				 const struct drm_rect *dst,
> >   				 unsigned int rate);
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > index f06273d9bc8c..1b3b6b8bc794 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > @@ -10,6 +10,7 @@
> >   #include "i915_irq.h"
> >   #include "i915_reg.h"
> >   #include "icl_dsi_regs.h"
> > +#include "intel_atomic_plane.h"
> >   #include "intel_crtc.h"
> >   #include "intel_de.h"
> >   #include "intel_display_irq.h"
> > @@ -26,6 +27,52 @@
> >   #include "intel_psr.h"
> >   #include "intel_psr_regs.h"
> >   
> > +struct pipe_fault_handler {
> > +	bool (*handle)(struct intel_crtc *crtc, enum plane_id plane_id);
> > +	u32 fault;
> > +	enum plane_id plane_id;
> > +};
> > +
> > +static bool handle_plane_fault(struct intel_crtc *crtc, enum plane_id plane_id)
> > +{
> > +	struct intel_display *display = to_intel_display(crtc);
> > +	struct intel_plane_error error = {};
> > +	struct intel_plane *plane;
> > +
> > +	plane = intel_crtc_get_plane(crtc, plane_id);
> > +	if (!plane || !plane->capture_error)
> > +		return false;
> > +
> > +	plane->capture_error(crtc, plane, &error);
> > +
> > +	drm_err_ratelimited(display->drm,
> > +			    "[CRTC:%d:%s][PLANE:%d:%s] fault (CTL=0x%x, SURF=0x%x, SURFLIVE=0x%x)\n",
> > +			    crtc->base.base.id, crtc->base.name,
> > +			    plane->base.base.id, plane->base.name,
> > +			    error.ctl, error.surf, error.surflive);
> 
> Could we drop the CRTC here?
> <3> [264.586596] xe 0000:00:02.0: [drm] *ERROR* [CRTC:82:pipe 
> A][PLANE:32:plane 1A] fault (CTL=0x94001002, SURF=0x1800000, 
> SURFLIVE=0x1800000)
> 
> Looks to be a bit redundant to print CRTC and plane here. Most likely 
> PLANE is good enough. :-)

It's helpful with cases where the plane name isn't very descriptive,
which will mainly be VLV/CHV sprites.

Would also help with gen2/3 where we swap the plane<->pipe mapping
around for FBC purposes, but as FBC seems to trigger spurious
faults on those platforms we probably can't hook this up there.

-- 
Ville Syrjälä
Intel

Re: [PATCH 3/8] drm/i915: Pimp display fault reporting

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Decode the display faults a bit more extensively so that one
> doesn't have translate the bitmask to planes/etc. manually.
> Also for plane faults we can read out a bit of state from the
> relevant plane(s) and dump that out.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../gpu/drm/i915/display/intel_atomic_plane.c |   2 +-
>  .../gpu/drm/i915/display/intel_atomic_plane.h |   2 +
>  .../gpu/drm/i915/display/intel_display_irq.c  | 156 +++++++++++++++++-
>  3 files changed, 155 insertions(+), 5 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> index 612e9b0ec14a..0aeb5f00d9c4 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.c
> @@ -663,7 +663,7 @@ int intel_plane_atomic_check_with_state(const struct intel_crtc_state
> *old_crtc_
>  					       old_plane_state, new_plane_state);
>  }
>  
> -static struct intel_plane *
> +struct intel_plane *
>  intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id)
>  {
>  	struct drm_i915_private *i915 = to_i915(crtc->base.dev);
> diff --git a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> index 0f982f452ff3..298bb97b37a4 100644
> --- a/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> +++ b/drivers/gpu/drm/i915/display/intel_atomic_plane.h
> @@ -19,6 +19,8 @@ struct intel_plane;
>  struct intel_plane_state;
>  enum plane_id;
>  
> +struct intel_plane *
> +intel_crtc_get_plane(struct intel_crtc *crtc, enum plane_id plane_id);
>  unsigned int intel_adjusted_rate(const struct drm_rect *src,
>  				 const struct drm_rect *dst,
>  				 unsigned int rate);
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index f06273d9bc8c..1b3b6b8bc794 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -10,6 +10,7 @@
>  #include "i915_irq.h"
>  #include "i915_reg.h"
>  #include "icl_dsi_regs.h"
> +#include "intel_atomic_plane.h"
>  #include "intel_crtc.h"
>  #include "intel_de.h"
>  #include "intel_display_irq.h"
> @@ -26,6 +27,52 @@
>  #include "intel_psr.h"
>  #include "intel_psr_regs.h"
>  
> +struct pipe_fault_handler {
> +	bool (*handle)(struct intel_crtc *crtc, enum plane_id plane_id);
> +	u32 fault;
> +	enum plane_id plane_id;
> +};
> +
> +static bool handle_plane_fault(struct intel_crtc *crtc, enum plane_id plane_id)
> +{
> +	struct intel_display *display = to_intel_display(crtc);
> +	struct intel_plane_error error = {};
> +	struct intel_plane *plane;
> +
> +	plane = intel_crtc_get_plane(crtc, plane_id);
> +	if (!plane || !plane->capture_error)
> +		return false;
> +
> +	plane->capture_error(crtc, plane, &error);
> +
> +	drm_err_ratelimited(display->drm,
> +			    "[CRTC:%d:%s][PLANE:%d:%s] fault (CTL=0x%x, SURF=0x%x,
> SURFLIVE=0x%x)\n",
> +			    crtc->base.base.id, crtc->base.name,
> +			    plane->base.base.id, plane->base.name,
> +			    error.ctl, error.surf, error.surflive);
> +
> +	return true;
> +}
> +
> +static void intel_pipe_fault_irq_handler(struct intel_display *display,
> +					 const struct pipe_fault_handler *handlers,
> +					 enum pipe pipe, u32 fault_errors)
> +{
> +	struct intel_crtc *crtc = intel_crtc_for_pipe(display, pipe);
> +	const struct pipe_fault_handler *handler;
> +
> +	for (handler = handlers; handler && handler->fault; handler++) {
> +		if ((fault_errors & handler->fault) == 0)
> +			continue;
> +
> +		if (handler->handle(crtc, handler->plane_id))
> +			fault_errors &= ~handler->fault;
> +	}
> +
> +	WARN_ONCE(fault_errors, "[CRTC:%d:%s] unreported faults 0x%x\n",
> +		  crtc->base.base.id, crtc->base.name, fault_errors);
> +}
> +
>  static void
>  intel_handle_vblank(struct drm_i915_private *dev_priv, enum pipe pipe)
>  {
> @@ -895,6 +942,108 @@ static u32 gen8_de_pipe_fault_mask(struct drm_i915_private *dev_priv)
>  			GEN8_PIPE_PRIMARY_FAULT;
>  }
>  
> +static bool handle_plane_ats_fault(struct intel_crtc *crtc, enum plane_id plane_id)
> +{
> +	struct intel_display *display = to_intel_display(crtc);
> +
> +	drm_err_ratelimited(display->drm,
> +			    "[CRTC:%d:%s] PLANE ATS fault\n",
> +			    crtc->base.base.id, crtc->base.name);
> +
> +	return false;
> +}
> +
> +static bool handle_pipedmc_ats_fault(struct intel_crtc *crtc, enum plane_id plane_id)
> +{
> +	struct intel_display *display = to_intel_display(crtc);
> +
> +	drm_err_ratelimited(display->drm,
> +			    "[CRTC:%d:%s] PIPEDMC ATS fault\n",
> +			    crtc->base.base.id, crtc->base.name);
> +
> +	return false;
> +}
> +
> +static bool handle_pipedmc_fault(struct intel_crtc *crtc, enum plane_id plane_id)
> +{
> +	struct intel_display *display = to_intel_display(crtc);
> +
> +	drm_err_ratelimited(display->drm,
> +			    "[CRTC:%d:%s] PIPEDMC fault\n",
> +			    crtc->base.base.id, crtc->base.name);
> +
> +	return false;
> +}
> +
> +static const struct pipe_fault_handler mtl_pipe_fault_handlers[] = {
> +	{ .fault = MTL_PLANE_ATS_FAULT,     .handle = handle_plane_ats_fault, },
> +	{ .fault = MTL_PIPEDMC_ATS_FAULT,   .handle = handle_pipedmc_ats_fault, },
> +	{ .fault = GEN12_PIPEDMC_FAULT,     .handle = handle_pipedmc_fault, },
> +	{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
> +	{ .fault = GEN9_PIPE_PLANE4_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_4, },
> +	{ .fault = GEN9_PIPE_PLANE3_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_3, },
> +	{ .fault = GEN9_PIPE_PLANE2_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_2, },
> +	{ .fault = GEN9_PIPE_PLANE1_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_1, },
> +	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{}
> +};
> +
> +static const struct pipe_fault_handler tgl_pipe_fault_handlers[] = {
> +	{ .fault = GEN12_PIPEDMC_FAULT,     .handle = handle_pipedmc_fault, },
> +	{ .fault = GEN11_PIPE_PLANE7_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_7, },
> +	{ .fault = GEN11_PIPE_PLANE6_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_6, },
> +	{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
> +	{ .fault = GEN9_PIPE_PLANE4_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_4, },
> +	{ .fault = GEN9_PIPE_PLANE3_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_3, },
> +	{ .fault = GEN9_PIPE_PLANE2_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_2, },
> +	{ .fault = GEN9_PIPE_PLANE1_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_1, },
> +	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{}
> +};
> +
> +static const struct pipe_fault_handler icl_pipe_fault_handlers[] = {
> +	{ .fault = GEN11_PIPE_PLANE7_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_7, },
> +	{ .fault = GEN11_PIPE_PLANE6_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_6, },
> +	{ .fault = GEN11_PIPE_PLANE5_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_5, },
> +	{ .fault = GEN9_PIPE_PLANE4_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_4, },
> +	{ .fault = GEN9_PIPE_PLANE3_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_3, },
> +	{ .fault = GEN9_PIPE_PLANE2_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_2, },
> +	{ .fault = GEN9_PIPE_PLANE1_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_1, },
> +	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{}
> +};
> +
> +static const struct pipe_fault_handler skl_pipe_fault_handlers[] = {
> +	{ .fault = GEN9_PIPE_PLANE4_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_4, },
> +	{ .fault = GEN9_PIPE_PLANE3_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_3, },
> +	{ .fault = GEN9_PIPE_PLANE2_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_2, },
> +	{ .fault = GEN9_PIPE_PLANE1_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_1, },
> +	{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{}
> +};
> +
> +static const struct pipe_fault_handler bdw_pipe_fault_handlers[] = {
> +	{ .fault = GEN8_PIPE_SPRITE_FAULT,  .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = GEN8_PIPE_PRIMARY_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = GEN8_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{}
> +};
> +
> +static const struct pipe_fault_handler *
> +gen8_pipe_fault_handlers(struct intel_display *display)
> +{
> +	if (DISPLAY_VER(display) >= 14)
> +		return mtl_pipe_fault_handlers;
> +	else if (DISPLAY_VER(display) >= 12)
> +		return tgl_pipe_fault_handlers;
> +	else if (DISPLAY_VER(display) >= 11)
> +		return icl_pipe_fault_handlers;
> +	else if (DISPLAY_VER(display) >= 9)
> +		return skl_pipe_fault_handlers;
> +	else
> +		return bdw_pipe_fault_handlers;
> +}
> +
>  static void intel_pmdemand_irq_handler(struct drm_i915_private *dev_priv)
>  {
>  	wake_up_all(&dev_priv->display.pmdemand.waitqueue);
> @@ -1182,10 +1331,9 @@ void gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
>  
>  		fault_errors = iir & gen8_de_pipe_fault_mask(dev_priv);
>  		if (fault_errors)
> -			drm_err_ratelimited(&dev_priv->drm,
> -					    "Fault errors on pipe %c: 0x%08x\n",
> -					    pipe_name(pipe),
> -					    fault_errors);
> +			intel_pipe_fault_irq_handler(display,
> +						     gen8_pipe_fault_handlers(display),
> +						     pipe, fault_errors);
>  	}
>  
>  	if (HAS_PCH_SPLIT(dev_priv) && !HAS_PCH_NOP(dev_priv) &&

[PATCH 4/8] drm/i915: Hook in display GTT faults for IVB/HSW

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Dump out the display fault information from the IVB/HSW
error interrupt handler.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 47 +++++++++++++++++++
 drivers/gpu/drm/i915/i915_reg.h               | 11 +++++
 2 files changed, 58 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 1b3b6b8bc794..70e5326b86d0 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -669,15 +669,57 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 		intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
 }
 
+static u32 ivb_err_int_pipe_fault_mask(enum pipe pipe)
+{
+	switch (pipe) {
+	case PIPE_A:
+		return ERR_INT_SPRITE_A_FAULT |
+			ERR_INT_PRIMARY_A_FAULT |
+			ERR_INT_CURSOR_A_FAULT;
+	case PIPE_B:
+		return ERR_INT_SPRITE_B_FAULT |
+			ERR_INT_PRIMARY_B_FAULT |
+			ERR_INT_CURSOR_B_FAULT;
+	case PIPE_C:
+		return ERR_INT_SPRITE_C_FAULT |
+			ERR_INT_PRIMARY_C_FAULT |
+			ERR_INT_CURSOR_C_FAULT;
+	default:
+		return 0;
+	}
+}
+
+static const struct pipe_fault_handler ivb_pipe_fault_handlers[] = {
+	{ .fault = ERR_INT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = ERR_INT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = ERR_INT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{ .fault = ERR_INT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = ERR_INT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = ERR_INT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{ .fault = ERR_INT_SPRITE_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = ERR_INT_PRIMARY_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = ERR_INT_CURSOR_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{}
+};
+
 static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
 {
+	struct intel_display *display = &dev_priv->display;
 	u32 err_int = intel_uncore_read(&dev_priv->uncore, GEN7_ERR_INT);
 	enum pipe pipe;
 
 	if (err_int & ERR_INT_POISON)
 		drm_err(&dev_priv->drm, "Poison interrupt\n");
 
+	if (err_int & ERR_INT_INVALID_GTT_PTE)
+		drm_err_ratelimited(display->drm, "Invalid GTT PTE\n");
+
+	if (err_int & ERR_INT_INVALID_PTE_DATA)
+		drm_err_ratelimited(display->drm, "Invalid PTE data\n");
+
 	for_each_pipe(dev_priv, pipe) {
+		u32 fault_errors;
+
 		if (err_int & ERR_INT_FIFO_UNDERRUN(pipe))
 			intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
 
@@ -687,6 +729,11 @@ static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
 			else
 				hsw_pipe_crc_irq_handler(dev_priv, pipe);
 		}
+
+		fault_errors = err_int & ivb_err_int_pipe_fault_mask(pipe);
+		if (fault_errors)
+			intel_pipe_fault_irq_handler(display, ivb_pipe_fault_handlers,
+						     pipe, fault_errors);
 	}
 
 	intel_uncore_write(&dev_priv->uncore, GEN7_ERR_INT, err_int);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 765e6c0528fb..9021f3ead7e6 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -374,6 +374,17 @@
 
 #define GEN7_ERR_INT	_MMIO(0x44040)
 #define   ERR_INT_POISON		(1 << 31)
+#define   ERR_INT_INVALID_GTT_PTE	(1 << 29)
+#define   ERR_INT_INVALID_PTE_DATA	(1 << 28)
+#define   ERR_INT_SPRITE_C_FAULT	(1 << 23)
+#define   ERR_INT_PRIMARY_C_FAULT	(1 << 22)
+#define   ERR_INT_CURSOR_C_FAULT	(1 << 21)
+#define   ERR_INT_SPRITE_B_FAULT	(1 << 20)
+#define   ERR_INT_PRIMARY_B_FAULT	(1 << 19)
+#define   ERR_INT_CURSOR_B_FAULT	(1 << 18)
+#define   ERR_INT_SPRITE_A_FAULT	(1 << 17)
+#define   ERR_INT_PRIMARY_A_FAULT	(1 << 16)
+#define   ERR_INT_CURSOR_A_FAULT	(1 << 15)
 #define   ERR_INT_MMIO_UNCLAIMED	(1 << 13)
 #define   ERR_INT_PIPE_CRC_DONE_C	(1 << 8)
 #define   ERR_INT_FIFO_UNDERRUN_C	(1 << 6)
-- 
2.45.2

Re: [PATCH 4/8] drm/i915: Hook in display GTT faults for IVB/HSW

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Dump out the display fault information from the IVB/HSW
> error interrupt handler.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_irq.c  | 47 +++++++++++++++++++
>  drivers/gpu/drm/i915/i915_reg.h               | 11 +++++
>  2 files changed, 58 insertions(+)

Bspec 8203 reference might be helpful I guess.

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>


> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 1b3b6b8bc794..70e5326b86d0 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -669,15 +669,57 @@ static void ibx_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
>  		intel_pch_fifo_underrun_irq_handler(dev_priv, PIPE_B);
>  }
>  
> +static u32 ivb_err_int_pipe_fault_mask(enum pipe pipe)
> +{
> +	switch (pipe) {
> +	case PIPE_A:
> +		return ERR_INT_SPRITE_A_FAULT |
> +			ERR_INT_PRIMARY_A_FAULT |
> +			ERR_INT_CURSOR_A_FAULT;
> +	case PIPE_B:
> +		return ERR_INT_SPRITE_B_FAULT |
> +			ERR_INT_PRIMARY_B_FAULT |
> +			ERR_INT_CURSOR_B_FAULT;
> +	case PIPE_C:
> +		return ERR_INT_SPRITE_C_FAULT |
> +			ERR_INT_PRIMARY_C_FAULT |
> +			ERR_INT_CURSOR_C_FAULT;
> +	default:
> +		return 0;
> +	}
> +}
> +
> +static const struct pipe_fault_handler ivb_pipe_fault_handlers[] = {
> +	{ .fault = ERR_INT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = ERR_INT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = ERR_INT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{ .fault = ERR_INT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = ERR_INT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = ERR_INT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{ .fault = ERR_INT_SPRITE_C_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = ERR_INT_PRIMARY_C_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = ERR_INT_CURSOR_C_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{}
> +};
> +
>  static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
>  {
> +	struct intel_display *display = &dev_priv->display;
>  	u32 err_int = intel_uncore_read(&dev_priv->uncore, GEN7_ERR_INT);
>  	enum pipe pipe;
>  
>  	if (err_int & ERR_INT_POISON)
>  		drm_err(&dev_priv->drm, "Poison interrupt\n");
>  
> +	if (err_int & ERR_INT_INVALID_GTT_PTE)
> +		drm_err_ratelimited(display->drm, "Invalid GTT PTE\n");
> +
> +	if (err_int & ERR_INT_INVALID_PTE_DATA)
> +		drm_err_ratelimited(display->drm, "Invalid PTE data\n");
> +
>  	for_each_pipe(dev_priv, pipe) {
> +		u32 fault_errors;
> +
>  		if (err_int & ERR_INT_FIFO_UNDERRUN(pipe))
>  			intel_cpu_fifo_underrun_irq_handler(dev_priv, pipe);
>  
> @@ -687,6 +729,11 @@ static void ivb_err_int_handler(struct drm_i915_private *dev_priv)
>  			else
>  				hsw_pipe_crc_irq_handler(dev_priv, pipe);
>  		}
> +
> +		fault_errors = err_int & ivb_err_int_pipe_fault_mask(pipe);
> +		if (fault_errors)
> +			intel_pipe_fault_irq_handler(display, ivb_pipe_fault_handlers,
> +						     pipe, fault_errors);
>  	}
>  
>  	intel_uncore_write(&dev_priv->uncore, GEN7_ERR_INT, err_int);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 765e6c0528fb..9021f3ead7e6 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -374,6 +374,17 @@
>  
>  #define GEN7_ERR_INT	_MMIO(0x44040)
>  #define   ERR_INT_POISON		(1 << 31)
> +#define   ERR_INT_INVALID_GTT_PTE	(1 << 29)
> +#define   ERR_INT_INVALID_PTE_DATA	(1 << 28)
> +#define   ERR_INT_SPRITE_C_FAULT	(1 << 23)
> +#define   ERR_INT_PRIMARY_C_FAULT	(1 << 22)
> +#define   ERR_INT_CURSOR_C_FAULT	(1 << 21)
> +#define   ERR_INT_SPRITE_B_FAULT	(1 << 20)
> +#define   ERR_INT_PRIMARY_B_FAULT	(1 << 19)
> +#define   ERR_INT_CURSOR_B_FAULT	(1 << 18)
> +#define   ERR_INT_SPRITE_A_FAULT	(1 << 17)
> +#define   ERR_INT_PRIMARY_A_FAULT	(1 << 16)
> +#define   ERR_INT_CURSOR_A_FAULT	(1 << 15)
>  #define   ERR_INT_MMIO_UNCLAIMED	(1 << 13)
>  #define   ERR_INT_PIPE_CRC_DONE_C	(1 << 8)
>  #define   ERR_INT_FIFO_UNDERRUN_C	(1 << 6)

[PATCH 5/8] drm/i915: Hook in display GTT faults for ILK/SNB

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Hook up display GTT fault interrupts for ILK/SNB.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 56 ++++++++++++++++++-
 drivers/gpu/drm/i915/i915_reg.h               | 10 ++++
 2 files changed, 65 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index 70e5326b86d0..c80183b0acaf 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -792,6 +792,56 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
 		cpt_serr_int_handler(dev_priv);
 }
 
+static u32 ilk_gtt_fault_pipe_fault_mask(enum pipe pipe)
+{
+	switch (pipe) {
+	case PIPE_A:
+		return GTT_FAULT_SPRITE_A_FAULT |
+			GTT_FAULT_PRIMARY_A_FAULT |
+			GTT_FAULT_CURSOR_A_FAULT;
+	case PIPE_B:
+		return GTT_FAULT_SPRITE_B_FAULT |
+			GTT_FAULT_PRIMARY_B_FAULT |
+			GTT_FAULT_CURSOR_B_FAULT;
+	default:
+		return 0;
+	}
+}
+
+static const struct pipe_fault_handler ilk_pipe_fault_handlers[] = {
+	{ .fault = GTT_FAULT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = GTT_FAULT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = GTT_FAULT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = GTT_FAULT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = GTT_FAULT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{ .fault = GTT_FAULT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },
+	{}
+};
+
+static void ilk_gtt_fault_irq_handler(struct intel_display *display)
+{
+	enum pipe pipe;
+	u32 gtt_fault;
+
+	gtt_fault = intel_de_read(display, ILK_GTT_FAULT);
+	intel_de_write(display, ILK_GTT_FAULT, gtt_fault);
+
+	if (gtt_fault & GTT_FAULT_INVALID_GTT_PTE)
+		drm_err_ratelimited(display->drm, "Invalid GTT PTE\n");
+
+	if (gtt_fault & GTT_FAULT_INVALID_PTE_DATA)
+		drm_err_ratelimited(display->drm, "Invalid PTE data\n");
+
+	for_each_pipe(display, pipe) {
+		u32 fault_errors;
+
+		fault_errors = gtt_fault & ilk_gtt_fault_pipe_fault_mask(pipe);
+		if (fault_errors)
+			intel_pipe_fault_irq_handler(display, ilk_pipe_fault_handlers,
+						     pipe, fault_errors);
+	}
+}
+
 void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
 {
 	struct intel_display *display = &dev_priv->display;
@@ -810,6 +860,9 @@ void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
 	if (de_iir & DE_POISON)
 		drm_err(&dev_priv->drm, "Poison interrupt\n");
 
+	if (de_iir & DE_GTT_FAULT)
+		ilk_gtt_fault_irq_handler(display);
+
 	for_each_pipe(dev_priv, pipe) {
 		if (de_iir & DE_PIPE_VBLANK(pipe))
 			intel_handle_vblank(dev_priv, pipe);
@@ -1933,7 +1986,8 @@ void ilk_de_irq_postinstall(struct drm_i915_private *i915)
 			      DE_PLANE_FLIP_DONE_IVB(PLANE_A) |
 			      DE_DP_A_HOTPLUG_IVB);
 	} else {
-		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
+		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE |
+				DE_PCH_EVENT | DE_GTT_FAULT |
 				DE_AUX_CHANNEL_A | DE_PIPEB_CRC_DONE |
 				DE_PIPEA_CRC_DONE | DE_POISON);
 		extra_mask = (DE_PIPEA_VBLANK | DE_PIPEB_VBLANK |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 9021f3ead7e6..71d09c21695a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -372,6 +372,16 @@
 #define GEN7_MEDIA_MAX_REQ_COUNT	_MMIO(0x4070)
 #define GEN7_GFX_MAX_REQ_COUNT		_MMIO(0x4074)
 
+#define ILK_GTT_FAULT	_MMIO(0x44040) /* ilk/snb */
+#define   GTT_FAULT_INVALID_GTT_PTE	(1 << 7)
+#define   GTT_FAULT_INVALID_PTE_DATA	(1 << 6)
+#define   GTT_FAULT_CURSOR_B_FAULT	(1 << 5)
+#define   GTT_FAULT_CURSOR_A_FAULT	(1 << 4)
+#define   GTT_FAULT_SPRITE_B_FAULT	(1 << 3)
+#define   GTT_FAULT_SPRITE_A_FAULT	(1 << 2)
+#define   GTT_FAULT_PRIMARY_B_FAULT	(1 << 1)
+#define   GTT_FAULT_PRIMARY_A_FAULT	(1 << 0)
+
 #define GEN7_ERR_INT	_MMIO(0x44040)
 #define   ERR_INT_POISON		(1 << 31)
 #define   ERR_INT_INVALID_GTT_PTE	(1 << 29)
-- 
2.45.2

Re: [PATCH 5/8] drm/i915: Hook in display GTT faults for ILK/SNB

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Hook up display GTT fault interrupts for ILK/SNB.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_irq.c  | 56 ++++++++++++++++++-
>  drivers/gpu/drm/i915/i915_reg.h               | 10 ++++
>  2 files changed, 65 insertions(+), 1 deletion(-)

Bspec: 8559

Reviewed by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index 70e5326b86d0..c80183b0acaf 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -792,6 +792,56 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
>  		cpt_serr_int_handler(dev_priv);
>  }
>  
> +static u32 ilk_gtt_fault_pipe_fault_mask(enum pipe pipe)
> +{
> +	switch (pipe) {
> +	case PIPE_A:
> +		return GTT_FAULT_SPRITE_A_FAULT |
> +			GTT_FAULT_PRIMARY_A_FAULT |
> +			GTT_FAULT_CURSOR_A_FAULT;
> +	case PIPE_B:
> +		return GTT_FAULT_SPRITE_B_FAULT |
> +			GTT_FAULT_PRIMARY_B_FAULT |
> +			GTT_FAULT_CURSOR_B_FAULT;
> +	default:
> +		return 0;
> +	}
> +}
> +
> +static const struct pipe_fault_handler ilk_pipe_fault_handlers[] = {
> +	{ .fault = GTT_FAULT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = GTT_FAULT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = GTT_FAULT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = GTT_FAULT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = GTT_FAULT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{ .fault = GTT_FAULT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR, },
> +	{}
> +};
> +
> +static void ilk_gtt_fault_irq_handler(struct intel_display *display)
> +{
> +	enum pipe pipe;
> +	u32 gtt_fault;
> +
> +	gtt_fault = intel_de_read(display, ILK_GTT_FAULT);
> +	intel_de_write(display, ILK_GTT_FAULT, gtt_fault);
> +
> +	if (gtt_fault & GTT_FAULT_INVALID_GTT_PTE)
> +		drm_err_ratelimited(display->drm, "Invalid GTT PTE\n");
> +
> +	if (gtt_fault & GTT_FAULT_INVALID_PTE_DATA)
> +		drm_err_ratelimited(display->drm, "Invalid PTE data\n");
> +
> +	for_each_pipe(display, pipe) {
> +		u32 fault_errors;
> +
> +		fault_errors = gtt_fault & ilk_gtt_fault_pipe_fault_mask(pipe);
> +		if (fault_errors)
> +			intel_pipe_fault_irq_handler(display, ilk_pipe_fault_handlers,
> +						     pipe, fault_errors);
> +	}
> +}
> +
>  void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
>  {
>  	struct intel_display *display = &dev_priv->display;
> @@ -810,6 +860,9 @@ void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
>  	if (de_iir & DE_POISON)
>  		drm_err(&dev_priv->drm, "Poison interrupt\n");
>  
> +	if (de_iir & DE_GTT_FAULT)
> +		ilk_gtt_fault_irq_handler(display);
> +
>  	for_each_pipe(dev_priv, pipe) {
>  		if (de_iir & DE_PIPE_VBLANK(pipe))
>  			intel_handle_vblank(dev_priv, pipe);
> @@ -1933,7 +1986,8 @@ void ilk_de_irq_postinstall(struct drm_i915_private *i915)
>  			      DE_PLANE_FLIP_DONE_IVB(PLANE_A) |
>  			      DE_DP_A_HOTPLUG_IVB);
>  	} else {
> -		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
> +		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE |
> +				DE_PCH_EVENT | DE_GTT_FAULT |
>  				DE_AUX_CHANNEL_A | DE_PIPEB_CRC_DONE |
>  				DE_PIPEA_CRC_DONE | DE_POISON);
>  		extra_mask = (DE_PIPEA_VBLANK | DE_PIPEB_VBLANK |
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9021f3ead7e6..71d09c21695a 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -372,6 +372,16 @@
>  #define GEN7_MEDIA_MAX_REQ_COUNT	_MMIO(0x4070)
>  #define GEN7_GFX_MAX_REQ_COUNT		_MMIO(0x4074)
>  
> +#define ILK_GTT_FAULT	_MMIO(0x44040) /* ilk/snb */
> +#define   GTT_FAULT_INVALID_GTT_PTE	(1 << 7)
> +#define   GTT_FAULT_INVALID_PTE_DATA	(1 << 6)
> +#define   GTT_FAULT_CURSOR_B_FAULT	(1 << 5)
> +#define   GTT_FAULT_CURSOR_A_FAULT	(1 << 4)
> +#define   GTT_FAULT_SPRITE_B_FAULT	(1 << 3)
> +#define   GTT_FAULT_SPRITE_A_FAULT	(1 << 2)
> +#define   GTT_FAULT_PRIMARY_B_FAULT	(1 << 1)
> +#define   GTT_FAULT_PRIMARY_A_FAULT	(1 << 0)
> +
>  #define GEN7_ERR_INT	_MMIO(0x44040)
>  #define   ERR_INT_POISON		(1 << 31)
>  #define   ERR_INT_INVALID_GTT_PTE	(1 << 29)

Re: [PATCH 5/8] drm/i915: Hook in display GTT faults for ILK/SNB

[Govindapillai, Vinod]

On Thu, 2025-02-13 at 22:09 +0200, Govindapillai, Vinod wrote:
> On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > 
> > Hook up display GTT fault interrupts for ILK/SNB.
> > 
> > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> > ---
> >  .../gpu/drm/i915/display/intel_display_irq.c  | 56 ++++++++++++++++++-
> >  drivers/gpu/drm/i915/i915_reg.h               | 10 ++++
> >  2 files changed, 65 insertions(+), 1 deletion(-)
> 
> Bspec: 8559
> 
> Reviewed by: Vinod Govindapillai <vinod.govindapillai@intel.com>

Fixing the RB-ed..

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > index 70e5326b86d0..c80183b0acaf 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> > @@ -792,6 +792,56 @@ static void cpt_irq_handler(struct drm_i915_private *dev_priv, u32 pch_iir)
> >  		cpt_serr_int_handler(dev_priv);
> >  }
> >  
> > +static u32 ilk_gtt_fault_pipe_fault_mask(enum pipe pipe)
> > +{
> > +	switch (pipe) {
> > +	case PIPE_A:
> > +		return GTT_FAULT_SPRITE_A_FAULT |
> > +			GTT_FAULT_PRIMARY_A_FAULT |
> > +			GTT_FAULT_CURSOR_A_FAULT;
> > +	case PIPE_B:
> > +		return GTT_FAULT_SPRITE_B_FAULT |
> > +			GTT_FAULT_PRIMARY_B_FAULT |
> > +			GTT_FAULT_CURSOR_B_FAULT;
> > +	default:
> > +		return 0;
> > +	}
> > +}
> > +
> > +static const struct pipe_fault_handler ilk_pipe_fault_handlers[] = {
> > +	{ .fault = GTT_FAULT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id =
> > PLANE_SPRITE0, },
> > +	{ .fault = GTT_FAULT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id =
> > PLANE_SPRITE0, },
> > +	{ .fault = GTT_FAULT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id =
> > PLANE_PRIMARY, },
> > +	{ .fault = GTT_FAULT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id =
> > PLANE_PRIMARY, },
> > +	{ .fault = GTT_FAULT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id =
> > PLANE_CURSOR, },
> > +	{ .fault = GTT_FAULT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id =
> > PLANE_CURSOR, },
> > +	{}
> > +};
> > +
> > +static void ilk_gtt_fault_irq_handler(struct intel_display *display)
> > +{
> > +	enum pipe pipe;
> > +	u32 gtt_fault;
> > +
> > +	gtt_fault = intel_de_read(display, ILK_GTT_FAULT);
> > +	intel_de_write(display, ILK_GTT_FAULT, gtt_fault);
> > +
> > +	if (gtt_fault & GTT_FAULT_INVALID_GTT_PTE)
> > +		drm_err_ratelimited(display->drm, "Invalid GTT PTE\n");
> > +
> > +	if (gtt_fault & GTT_FAULT_INVALID_PTE_DATA)
> > +		drm_err_ratelimited(display->drm, "Invalid PTE data\n");
> > +
> > +	for_each_pipe(display, pipe) {
> > +		u32 fault_errors;
> > +
> > +		fault_errors = gtt_fault & ilk_gtt_fault_pipe_fault_mask(pipe);
> > +		if (fault_errors)
> > +			intel_pipe_fault_irq_handler(display, ilk_pipe_fault_handlers,
> > +						     pipe, fault_errors);
> > +	}
> > +}
> > +
> >  void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
> >  {
> >  	struct intel_display *display = &dev_priv->display;
> > @@ -810,6 +860,9 @@ void ilk_display_irq_handler(struct drm_i915_private *dev_priv, u32 de_iir)
> >  	if (de_iir & DE_POISON)
> >  		drm_err(&dev_priv->drm, "Poison interrupt\n");
> >  
> > +	if (de_iir & DE_GTT_FAULT)
> > +		ilk_gtt_fault_irq_handler(display);
> > +
> >  	for_each_pipe(dev_priv, pipe) {
> >  		if (de_iir & DE_PIPE_VBLANK(pipe))
> >  			intel_handle_vblank(dev_priv, pipe);
> > @@ -1933,7 +1986,8 @@ void ilk_de_irq_postinstall(struct drm_i915_private *i915)
> >  			      DE_PLANE_FLIP_DONE_IVB(PLANE_A) |
> >  			      DE_DP_A_HOTPLUG_IVB);
> >  	} else {
> > -		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE | DE_PCH_EVENT |
> > +		display_mask = (DE_MASTER_IRQ_CONTROL | DE_GSE |
> > +				DE_PCH_EVENT | DE_GTT_FAULT |
> >  				DE_AUX_CHANNEL_A | DE_PIPEB_CRC_DONE |
> >  				DE_PIPEA_CRC_DONE | DE_POISON);
> >  		extra_mask = (DE_PIPEA_VBLANK | DE_PIPEB_VBLANK |
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 9021f3ead7e6..71d09c21695a 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -372,6 +372,16 @@
> >  #define GEN7_MEDIA_MAX_REQ_COUNT	_MMIO(0x4070)
> >  #define GEN7_GFX_MAX_REQ_COUNT		_MMIO(0x4074)
> >  
> > +#define ILK_GTT_FAULT	_MMIO(0x44040) /* ilk/snb */
> > +#define   GTT_FAULT_INVALID_GTT_PTE	(1 << 7)
> > +#define   GTT_FAULT_INVALID_PTE_DATA	(1 << 6)
> > +#define   GTT_FAULT_CURSOR_B_FAULT	(1 << 5)
> > +#define   GTT_FAULT_CURSOR_A_FAULT	(1 << 4)
> > +#define   GTT_FAULT_SPRITE_B_FAULT	(1 << 3)
> > +#define   GTT_FAULT_SPRITE_A_FAULT	(1 << 2)
> > +#define   GTT_FAULT_PRIMARY_B_FAULT	(1 << 1)
> > +#define   GTT_FAULT_PRIMARY_A_FAULT	(1 << 0)
> > +
> >  #define GEN7_ERR_INT	_MMIO(0x44040)
> >  #define   ERR_INT_POISON		(1 << 31)
> >  #define   ERR_INT_INVALID_GTT_PTE	(1 << 29)
> 

[PATCH 6/8] drm/i915: Introduce i915_error_regs

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Introduce i915_error_regs as the EIR/EMR counterpart
to the IIR/IMR/IER i915_irq_regs, and update the irq
reset/postingstall to utilize them accordingly.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c      | 29 ++++++++++++++++++++++++++--
 drivers/gpu/drm/i915/i915_irq.h      |  4 ++++
 drivers/gpu/drm/i915/i915_reg.h      |  3 +++
 drivers/gpu/drm/i915/i915_reg_defs.h |  8 ++++++++
 4 files changed, 42 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 202eb1b6ae54..3040c000f837 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -120,6 +120,29 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
 	intel_uncore_posting_read(uncore, regs.imr);
 }
 
+void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+{
+	intel_uncore_write(uncore, regs.emr, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.emr);
+
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+}
+
+void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+		     u32 emr_val)
+{
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+
+	intel_uncore_write(uncore, regs.emr, emr_val);
+	intel_uncore_posting_read(uncore, regs.emr);
+}
+
 /**
  * ivb_parity_work - Workqueue called when a parity error interrupt
  * occurred.
@@ -867,6 +890,7 @@ static void i915_irq_reset(struct drm_i915_private *dev_priv)
 
 	i9xx_display_irq_reset(dev_priv);
 
+	gen2_error_reset(uncore, GEN2_ERROR_REGS);
 	gen2_irq_reset(uncore, GEN2_IRQ_REGS);
 	dev_priv->irq_mask = ~0u;
 }
@@ -876,7 +900,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
 	struct intel_uncore *uncore = &dev_priv->uncore;
 	u32 enable_mask;
 
-	intel_uncore_write(uncore, EMR, i9xx_error_mask(dev_priv));
+	gen2_error_init(uncore, GEN2_ERROR_REGS, i9xx_error_mask(dev_priv));
 
 	dev_priv->irq_mask =
 		~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
@@ -972,6 +996,7 @@ static void i965_irq_reset(struct drm_i915_private *dev_priv)
 
 	i9xx_display_irq_reset(dev_priv);
 
+	gen2_error_reset(uncore, GEN2_ERROR_REGS);
 	gen2_irq_reset(uncore, GEN2_IRQ_REGS);
 	dev_priv->irq_mask = ~0u;
 }
@@ -1000,7 +1025,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
 	struct intel_uncore *uncore = &dev_priv->uncore;
 	u32 enable_mask;
 
-	intel_uncore_write(uncore, EMR, i965_error_mask(dev_priv));
+	gen2_error_init(uncore, GEN2_ERROR_REGS, i965_error_mask(dev_priv));
 
 	dev_priv->irq_mask =
 		~(I915_ASLE_INTERRUPT |
diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
index 0457f6402e05..58789b264575 100644
--- a/drivers/gpu/drm/i915/i915_irq.h
+++ b/drivers/gpu/drm/i915/i915_irq.h
@@ -47,4 +47,8 @@ void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs);
 void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
 		   u32 imr_val, u32 ier_val);
 
+void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
+void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+		     u32 emr_val);
+
 #endif /* __I915_IRQ_H__ */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 71d09c21695a..aed109adfedf 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -472,6 +472,9 @@
 #define   GM45_ERROR_CP_PRIV				(1 << 3)
 #define   I915_ERROR_MEMORY_REFRESH			(1 << 1)
 #define   I915_ERROR_INSTRUCTION			(1 << 0)
+
+#define GEN2_ERROR_REGS		I915_ERROR_REGS(EMR, EIR)
+
 #define INSTPM	        _MMIO(0x20c0)
 #define   INSTPM_SELF_EN (1 << 12) /* 915GM only */
 #define   INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts
diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
index e251bcc0c89f..94a8f902689e 100644
--- a/drivers/gpu/drm/i915/i915_reg_defs.h
+++ b/drivers/gpu/drm/i915/i915_reg_defs.h
@@ -294,4 +294,12 @@ struct i915_irq_regs {
 #define I915_IRQ_REGS(_imr, _ier, _iir) \
 	((const struct i915_irq_regs){ .imr = (_imr), .ier = (_ier), .iir = (_iir) })
 
+struct i915_error_regs {
+	i915_reg_t emr;
+	i915_reg_t eir;
+};
+
+#define I915_ERROR_REGS(_emr, _eir) \
+	((const struct i915_error_regs){ .emr = (_emr), .eir = (_eir) })
+
 #endif /* __I915_REG_DEFS__ */
-- 
2.45.2

Re: [PATCH 6/8] drm/i915: Introduce i915_error_regs

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Introduce i915_error_regs as the EIR/EMR counterpart
> to the IIR/IMR/IER i915_irq_regs, and update the irq
> reset/postingstall to utilize them accordingly.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c      | 29 ++++++++++++++++++++++++++--
>  drivers/gpu/drm/i915/i915_irq.h      |  4 ++++
>  drivers/gpu/drm/i915/i915_reg.h      |  3 +++
>  drivers/gpu/drm/i915/i915_reg_defs.h |  8 ++++++++
>  4 files changed, 42 insertions(+), 2 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 202eb1b6ae54..3040c000f837 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -120,6 +120,29 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
>  	intel_uncore_posting_read(uncore, regs.imr);
>  }
>  
> +void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
> +{
> +	intel_uncore_write(uncore, regs.emr, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.emr);
> +
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +}
> +
> +void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
> +		     u32 emr_val)
> +{
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +
> +	intel_uncore_write(uncore, regs.emr, emr_val);
> +	intel_uncore_posting_read(uncore, regs.emr);
> +}
> +
>  /**
>   * ivb_parity_work - Workqueue called when a parity error interrupt
>   * occurred.
> @@ -867,6 +890,7 @@ static void i915_irq_reset(struct drm_i915_private *dev_priv)
>  
>  	i9xx_display_irq_reset(dev_priv);
>  
> +	gen2_error_reset(uncore, GEN2_ERROR_REGS);
>  	gen2_irq_reset(uncore, GEN2_IRQ_REGS);
>  	dev_priv->irq_mask = ~0u;
>  }
> @@ -876,7 +900,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
>  	struct intel_uncore *uncore = &dev_priv->uncore;
>  	u32 enable_mask;
>  
> -	intel_uncore_write(uncore, EMR, i9xx_error_mask(dev_priv));
> +	gen2_error_init(uncore, GEN2_ERROR_REGS, i9xx_error_mask(dev_priv));
>  
>  	dev_priv->irq_mask =
>  		~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> @@ -972,6 +996,7 @@ static void i965_irq_reset(struct drm_i915_private *dev_priv)
>  
>  	i9xx_display_irq_reset(dev_priv);
>  
> +	gen2_error_reset(uncore, GEN2_ERROR_REGS);
>  	gen2_irq_reset(uncore, GEN2_IRQ_REGS);
>  	dev_priv->irq_mask = ~0u;
>  }
> @@ -1000,7 +1025,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
>  	struct intel_uncore *uncore = &dev_priv->uncore;
>  	u32 enable_mask;
>  
> -	intel_uncore_write(uncore, EMR, i965_error_mask(dev_priv));
> +	gen2_error_init(uncore, GEN2_ERROR_REGS, i965_error_mask(dev_priv));
>  
>  	dev_priv->irq_mask =
>  		~(I915_ASLE_INTERRUPT |
> diff --git a/drivers/gpu/drm/i915/i915_irq.h b/drivers/gpu/drm/i915/i915_irq.h
> index 0457f6402e05..58789b264575 100644
> --- a/drivers/gpu/drm/i915/i915_irq.h
> +++ b/drivers/gpu/drm/i915/i915_irq.h
> @@ -47,4 +47,8 @@ void gen2_irq_reset(struct intel_uncore *uncore, struct i915_irq_regs regs);
>  void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
>  		   u32 imr_val, u32 ier_val);
>  
> +void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs);
> +void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
> +		     u32 emr_val);
> +
>  #endif /* __I915_IRQ_H__ */
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 71d09c21695a..aed109adfedf 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -472,6 +472,9 @@
>  #define   GM45_ERROR_CP_PRIV				(1 << 3)
>  #define   I915_ERROR_MEMORY_REFRESH			(1 << 1)
>  #define   I915_ERROR_INSTRUCTION			(1 << 0)
> +
> +#define GEN2_ERROR_REGS		I915_ERROR_REGS(EMR, EIR)
> +
>  #define INSTPM	        _MMIO(0x20c0)
>  #define   INSTPM_SELF_EN (1 << 12) /* 915GM only */
>  #define   INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts
> diff --git a/drivers/gpu/drm/i915/i915_reg_defs.h b/drivers/gpu/drm/i915/i915_reg_defs.h
> index e251bcc0c89f..94a8f902689e 100644
> --- a/drivers/gpu/drm/i915/i915_reg_defs.h
> +++ b/drivers/gpu/drm/i915/i915_reg_defs.h
> @@ -294,4 +294,12 @@ struct i915_irq_regs {
>  #define I915_IRQ_REGS(_imr, _ier, _iir) \
>  	((const struct i915_irq_regs){ .imr = (_imr), .ier = (_ier), .iir = (_iir) })
>  
> +struct i915_error_regs {
> +	i915_reg_t emr;
> +	i915_reg_t eir;
> +};
> +
> +#define I915_ERROR_REGS(_emr, _eir) \
> +	((const struct i915_error_regs){ .emr = (_emr), .eir = (_eir) })
> +
>  #endif /* __I915_REG_DEFS__ */

[PATCH 7/8] drm/i915: Un-invert {i9xx,i965}_error_mask()

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Make life a bit more straightforward by removing the bitwise
not from {i9xx,i965}_error_mask() and instead do it when feeding
the value to gen2_error_init(). Make life a bit easier I think.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 3040c000f837..bd5956262c6d 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -838,10 +838,10 @@ static u32 i9xx_error_mask(struct drm_i915_private *i915)
 	 * so we just have to mask off all page table errors via EMR.
 	 */
 	if (HAS_FBC(i915))
-		return ~I915_ERROR_MEMORY_REFRESH;
+		return I915_ERROR_MEMORY_REFRESH;
 	else
-		return ~(I915_ERROR_PAGE_TABLE |
-			 I915_ERROR_MEMORY_REFRESH);
+		return I915_ERROR_PAGE_TABLE |
+			I915_ERROR_MEMORY_REFRESH;
 }
 
 static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
@@ -900,7 +900,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
 	struct intel_uncore *uncore = &dev_priv->uncore;
 	u32 enable_mask;
 
-	gen2_error_init(uncore, GEN2_ERROR_REGS, i9xx_error_mask(dev_priv));
+	gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
 
 	dev_priv->irq_mask =
 		~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
@@ -1011,13 +1011,13 @@ static u32 i965_error_mask(struct drm_i915_private *i915)
 	 * so we can always enable the page table errors.
 	 */
 	if (IS_G4X(i915))
-		return ~(GM45_ERROR_PAGE_TABLE |
-			 GM45_ERROR_MEM_PRIV |
-			 GM45_ERROR_CP_PRIV |
-			 I915_ERROR_MEMORY_REFRESH);
+		return GM45_ERROR_PAGE_TABLE |
+			GM45_ERROR_MEM_PRIV |
+			GM45_ERROR_CP_PRIV |
+			I915_ERROR_MEMORY_REFRESH;
 	else
-		return ~(I915_ERROR_PAGE_TABLE |
-			 I915_ERROR_MEMORY_REFRESH);
+		return I915_ERROR_PAGE_TABLE |
+			I915_ERROR_MEMORY_REFRESH;
 }
 
 static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
@@ -1025,7 +1025,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
 	struct intel_uncore *uncore = &dev_priv->uncore;
 	u32 enable_mask;
 
-	gen2_error_init(uncore, GEN2_ERROR_REGS, i965_error_mask(dev_priv));
+	gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
 
 	dev_priv->irq_mask =
 		~(I915_ASLE_INTERRUPT |
-- 
2.45.2

Re: [PATCH 7/8] drm/i915: Un-invert {i9xx,i965}_error_mask()

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Make life a bit more straightforward by removing the bitwise
> not from {i9xx,i965}_error_mask() and instead do it when feeding
> the value to gen2_error_init(). Make life a bit easier I think.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 22 +++++++++++-----------
>  1 file changed, 11 insertions(+), 11 deletions(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 3040c000f837..bd5956262c6d 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -838,10 +838,10 @@ static u32 i9xx_error_mask(struct drm_i915_private *i915)
>  	 * so we just have to mask off all page table errors via EMR.
>  	 */
>  	if (HAS_FBC(i915))
> -		return ~I915_ERROR_MEMORY_REFRESH;
> +		return I915_ERROR_MEMORY_REFRESH;
>  	else
> -		return ~(I915_ERROR_PAGE_TABLE |
> -			 I915_ERROR_MEMORY_REFRESH);
> +		return I915_ERROR_PAGE_TABLE |
> +			I915_ERROR_MEMORY_REFRESH;
>  }
>  
>  static void i9xx_error_irq_ack(struct drm_i915_private *dev_priv,
> @@ -900,7 +900,7 @@ static void i915_irq_postinstall(struct drm_i915_private *dev_priv)
>  	struct intel_uncore *uncore = &dev_priv->uncore;
>  	u32 enable_mask;
>  
> -	gen2_error_init(uncore, GEN2_ERROR_REGS, i9xx_error_mask(dev_priv));
> +	gen2_error_init(uncore, GEN2_ERROR_REGS, ~i9xx_error_mask(dev_priv));
>  
>  	dev_priv->irq_mask =
>  		~(I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
> @@ -1011,13 +1011,13 @@ static u32 i965_error_mask(struct drm_i915_private *i915)
>  	 * so we can always enable the page table errors.
>  	 */
>  	if (IS_G4X(i915))
> -		return ~(GM45_ERROR_PAGE_TABLE |
> -			 GM45_ERROR_MEM_PRIV |
> -			 GM45_ERROR_CP_PRIV |
> -			 I915_ERROR_MEMORY_REFRESH);
> +		return GM45_ERROR_PAGE_TABLE |
> +			GM45_ERROR_MEM_PRIV |
> +			GM45_ERROR_CP_PRIV |
> +			I915_ERROR_MEMORY_REFRESH;
>  	else
> -		return ~(I915_ERROR_PAGE_TABLE |
> -			 I915_ERROR_MEMORY_REFRESH);
> +		return I915_ERROR_PAGE_TABLE |
> +			I915_ERROR_MEMORY_REFRESH;
>  }
>  
>  static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
> @@ -1025,7 +1025,7 @@ static void i965_irq_postinstall(struct drm_i915_private *dev_priv)
>  	struct intel_uncore *uncore = &dev_priv->uncore;
>  	u32 enable_mask;
>  
> -	gen2_error_init(uncore, GEN2_ERROR_REGS, i965_error_mask(dev_priv));
> +	gen2_error_init(uncore, GEN2_ERROR_REGS, ~i965_error_mask(dev_priv));
>  
>  	dev_priv->irq_mask =
>  		~(I915_ASLE_INTERRUPT |

[PATCH 8/8] drm/i915: Hook up display fault interrupts for VLV/CHV

[Ville Syrjala]

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

Hook up the display fault irq handlers for VLV/CHV.

Unfortunately the actual hardware doesn't agree with the
spec on how DPINVGTT should behave. The docs claim that
the status bits can be cleared by writing '1' to them,
but in reality there doesn't seem to be any way to clear
them. So we must disable and ignore any fault we've already
seen in the past. The entire register does reset when
the display power well goes down, so we can just always
re-enable all the bits in irq postinstall without having
to track the state beyond that.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 .../gpu/drm/i915/display/intel_display_irq.c  | 131 +++++++++++++++++-
 .../gpu/drm/i915/display/intel_display_irq.h  |   3 +
 drivers/gpu/drm/i915/i915_irq.c               |  14 ++
 drivers/gpu/drm/i915/i915_reg.h               |  10 ++
 drivers/gpu/drm/xe/display/ext/i915_irq.c     |  23 +++
 5 files changed, 180 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c b/drivers/gpu/drm/i915/display/intel_display_irq.c
index c80183b0acaf..071b7fdf7da3 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.c
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
@@ -1729,6 +1729,115 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
 		schedule_work(&display->irq.vblank_dc_work);
 }
 
+static u32 vlv_dpinvgtt_pipe_fault_mask(enum pipe pipe)
+{
+	switch (pipe) {
+	case PIPE_A:
+		return SPRITEB_INVALID_GTT_STATUS |
+			SPRITEA_INVALID_GTT_STATUS |
+			PLANEA_INVALID_GTT_STATUS |
+			CURSORA_INVALID_GTT_STATUS;
+	case PIPE_B:
+		return SPRITED_INVALID_GTT_STATUS |
+			SPRITEC_INVALID_GTT_STATUS |
+			PLANEB_INVALID_GTT_STATUS |
+			CURSORB_INVALID_GTT_STATUS;
+	case PIPE_C:
+		return SPRITEF_INVALID_GTT_STATUS |
+			SPRITEE_INVALID_GTT_STATUS |
+			PLANEC_INVALID_GTT_STATUS |
+			CURSORC_INVALID_GTT_STATUS;
+	default:
+		return 0;
+	}
+}
+
+static const struct pipe_fault_handler vlv_pipe_fault_handlers[] = {
+	{ .fault = SPRITEB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },
+	{ .fault = SPRITEA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = PLANEA_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = CURSORA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR,  },
+	{ .fault = SPRITED_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },
+	{ .fault = SPRITEC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = PLANEB_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = CURSORB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR,  },
+	{ .fault = SPRITEF_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },
+	{ .fault = SPRITEE_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },
+	{ .fault = PLANEC_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },
+	{ .fault = CURSORC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR,  },
+	{}
+};
+
+static void vlv_page_table_error_irq_ack(struct drm_i915_private *i915, u32 *dpinvgtt)
+{
+	u32 status, enable, tmp;
+
+	tmp = intel_uncore_read(&i915->uncore, DPINVGTT);
+
+	enable = tmp >> 16;
+	status = tmp & 0xffff;
+
+	/*
+	 * Despite what the docs claim, the status bits seem to get
+	 * stuck permanently (similar the old PGTBL_ER register), so
+	 * we have to disable and ignore them once set. They do get
+	 * reset if the display power well goes down, so no need to
+	 * track the enable mask explicitly.
+	 */
+	*dpinvgtt = status & enable;
+	enable &= ~status;
+
+	/* customary ack+disable then re-enable to guarantee an edge */
+	intel_uncore_write(&i915->uncore, DPINVGTT, status);
+	intel_uncore_write(&i915->uncore, DPINVGTT, enable << 16);
+}
+
+static void vlv_page_table_error_irq_handler(struct drm_i915_private *i915, u32 dpinvgtt)
+{
+	struct intel_display *display = &i915->display;
+	enum pipe pipe;
+
+	for_each_pipe(i915, pipe) {
+		u32 fault_errors;
+
+		fault_errors = dpinvgtt & vlv_dpinvgtt_pipe_fault_mask(pipe);
+		if (fault_errors)
+			intel_pipe_fault_irq_handler(display, vlv_pipe_fault_handlers,
+						     pipe, fault_errors);
+	}
+}
+
+void vlv_display_error_irq_ack(struct drm_i915_private *dev_priv,
+			       u32 *eir, u32 *dpinvgtt)
+{
+	u32 emr;
+
+	*eir = intel_uncore_read(&dev_priv->uncore, VLV_EIR);
+
+	if (*eir & VLV_ERROR_PAGE_TABLE)
+		vlv_page_table_error_irq_ack(dev_priv, dpinvgtt);
+
+	intel_uncore_write(&dev_priv->uncore, VLV_EIR, *eir);
+
+	/*
+	 * Toggle all EMR bits to make sure we get an edge
+	 * in the ISR master error bit if we don't clear
+	 * all the EIR bits.
+	 */
+	emr = intel_uncore_read(&dev_priv->uncore, VLV_EMR);
+	intel_uncore_write(&dev_priv->uncore, VLV_EMR, 0xffffffff);
+	intel_uncore_write(&dev_priv->uncore, VLV_EMR, emr);
+}
+
+void vlv_display_error_irq_handler(struct drm_i915_private *dev_priv,
+				   u32 eir, u32 dpinvgtt)
+{
+	drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
+
+	if (eir & VLV_ERROR_PAGE_TABLE)
+		vlv_page_table_error_irq_handler(dev_priv, dpinvgtt);
+}
+
 static void _vlv_display_irq_reset(struct drm_i915_private *dev_priv)
 {
 	struct intel_uncore *uncore = &dev_priv->uncore;
@@ -1738,6 +1847,8 @@ static void _vlv_display_irq_reset(struct drm_i915_private *dev_priv)
 	else
 		intel_uncore_write(uncore, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
 
+	gen2_error_reset(&dev_priv->uncore, VLV_ERROR_REGS);
+
 	i915_hotplug_interrupt_update_locked(dev_priv, 0xffffffff, 0);
 	intel_uncore_rmw(uncore, PORT_HOTPLUG_STAT(dev_priv), 0, 0);
 
@@ -1764,6 +1875,12 @@ void i9xx_display_irq_reset(struct drm_i915_private *i915)
 	i9xx_pipestat_irq_reset(i915);
 }
 
+static u32 vlv_error_mask(void)
+{
+	/* TODO enable other errors too? */
+	return VLV_ERROR_PAGE_TABLE;
+}
+
 void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
 {
 	struct intel_uncore *uncore = &dev_priv->uncore;
@@ -1775,6 +1892,17 @@ void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
 	if (!dev_priv->display.irq.vlv_display_irqs_enabled)
 		return;
 
+	if (IS_CHERRYVIEW(dev_priv))
+		intel_uncore_write(uncore, DPINVGTT,
+				   DPINVGTT_STATUS_MASK_CHV |
+				   DPINVGTT_EN_MASK_CHV);
+	else
+		intel_uncore_write(uncore, DPINVGTT,
+				   DPINVGTT_STATUS_MASK_VLV |
+				   DPINVGTT_EN_MASK_VLV);
+
+	gen2_error_init(&dev_priv->uncore, VLV_ERROR_REGS, ~vlv_error_mask());
+
 	pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
 
 	i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
@@ -1785,7 +1913,8 @@ void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
 		I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
 		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
 		I915_LPE_PIPE_A_INTERRUPT |
-		I915_LPE_PIPE_B_INTERRUPT;
+		I915_LPE_PIPE_B_INTERRUPT |
+		I915_MASTER_ERROR_INTERRUPT;
 
 	if (IS_CHERRYVIEW(dev_priv))
 		enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT |
diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h b/drivers/gpu/drm/i915/display/intel_display_irq.h
index b077712b7be1..c3651a4750e4 100644
--- a/drivers/gpu/drm/i915/display/intel_display_irq.h
+++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
@@ -75,6 +75,9 @@ void i915_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_
 void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_stats[I915_MAX_PIPES]);
 void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32 pipe_stats[I915_MAX_PIPES]);
 
+void vlv_display_error_irq_ack(struct drm_i915_private *i915, u32 *eir, u32 *dpinvgtt);
+void vlv_display_error_irq_handler(struct drm_i915_private *i915, u32 eir, u32 dpinvgtt);
+
 void intel_display_irq_init(struct drm_i915_private *i915);
 
 void i915gm_irq_cstate_wa(struct drm_i915_private *i915, bool enable);
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index bd5956262c6d..e582a33fac23 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -241,6 +241,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 
 	do {
 		u32 iir, gt_iir, pm_iir;
+		u32 eir = 0, dpinvgtt = 0;
 		u32 pipe_stats[I915_MAX_PIPES] = {};
 		u32 hotplug_status = 0;
 		u32 ier = 0;
@@ -278,6 +279,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 		if (iir & I915_DISPLAY_PORT_INTERRUPT)
 			hotplug_status = i9xx_hpd_irq_ack(dev_priv);
 
+		if (iir & I915_MASTER_ERROR_INTERRUPT)
+			vlv_display_error_irq_ack(dev_priv, &eir, &dpinvgtt);
+
 		/* Call regardless, as some status bits might not be
 		 * signalled in IIR */
 		i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats);
@@ -304,6 +308,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
 		if (hotplug_status)
 			i9xx_hpd_irq_handler(dev_priv, hotplug_status);
 
+		if (iir & I915_MASTER_ERROR_INTERRUPT)
+			vlv_display_error_irq_handler(dev_priv, eir, dpinvgtt);
+
 		valleyview_pipestat_irq_handler(dev_priv, pipe_stats);
 	} while (0);
 
@@ -328,6 +335,7 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 
 	do {
 		u32 master_ctl, iir;
+		u32 eir = 0, dpinvgtt = 0;
 		u32 pipe_stats[I915_MAX_PIPES] = {};
 		u32 hotplug_status = 0;
 		u32 ier = 0;
@@ -361,6 +369,9 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 		if (iir & I915_DISPLAY_PORT_INTERRUPT)
 			hotplug_status = i9xx_hpd_irq_ack(dev_priv);
 
+		if (iir & I915_MASTER_ERROR_INTERRUPT)
+			vlv_display_error_irq_ack(dev_priv, &eir, &dpinvgtt);
+
 		/* Call regardless, as some status bits might not be
 		 * signalled in IIR */
 		i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats);
@@ -383,6 +394,9 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
 		if (hotplug_status)
 			i9xx_hpd_irq_handler(dev_priv, hotplug_status);
 
+		if (iir & I915_MASTER_ERROR_INTERRUPT)
+			vlv_display_error_irq_handler(dev_priv, eir, dpinvgtt);
+
 		valleyview_pipestat_irq_handler(dev_priv, pipe_stats);
 	} while (0);
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index aed109adfedf..de67547e738c 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -475,6 +475,16 @@
 
 #define GEN2_ERROR_REGS		I915_ERROR_REGS(EMR, EIR)
 
+#define VLV_EIR		_MMIO(VLV_DISPLAY_BASE + 0x20b0)
+#define VLV_EMR		_MMIO(VLV_DISPLAY_BASE + 0x20b4)
+#define VLV_ESR		_MMIO(VLV_DISPLAY_BASE + 0x20b8)
+#define   VLV_ERROR_GUNIT_TLB_DATA			(1 << 6)
+#define   VLV_ERROR_GUNIT_TLB_PTE			(1 << 5)
+#define   VLV_ERROR_PAGE_TABLE				(1 << 4)
+#define   VLV_ERROR_CLAIM				(1 << 0)
+
+#define VLV_ERROR_REGS		I915_ERROR_REGS(VLV_EMR, VLV_EIR)
+
 #define INSTPM	        _MMIO(0x20c0)
 #define   INSTPM_SELF_EN (1 << 12) /* 915GM only */
 #define   INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts
diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
index ac4cda2d81c7..3c6bca66ddab 100644
--- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
+++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
@@ -51,6 +51,29 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
 	intel_uncore_posting_read(uncore, regs.imr);
 }
 
+void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
+{
+	intel_uncore_write(uncore, regs.emr, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.emr);
+
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+}
+
+void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
+		     u32 emr_val)
+{
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+	intel_uncore_write(uncore, regs.eir, 0xffffffff);
+	intel_uncore_posting_read(uncore, regs.eir);
+
+	intel_uncore_write(uncore, regs.emr, emr_val);
+	intel_uncore_posting_read(uncore, regs.emr);
+}
+
 bool intel_irqs_enabled(struct xe_device *xe)
 {
 	return atomic_read(&xe->irq.enabled);
-- 
2.45.2

Re: [PATCH 8/8] drm/i915: Hook up display fault interrupts for VLV/CHV

[Govindapillai, Vinod]

On Thu, 2025-01-16 at 19:47 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Hook up the display fault irq handlers for VLV/CHV.
> 
> Unfortunately the actual hardware doesn't agree with the
> spec on how DPINVGTT should behave. The docs claim that
> the status bits can be cleared by writing '1' to them,
> but in reality there doesn't seem to be any way to clear
> them. So we must disable and ignore any fault we've already
> seen in the past. The entire register does reset when
> the display power well goes down, so we can just always
> re-enable all the bits in irq postinstall without having
> to track the state beyond that.
> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../gpu/drm/i915/display/intel_display_irq.c  | 131 +++++++++++++++++-
>  .../gpu/drm/i915/display/intel_display_irq.h  |   3 +
>  drivers/gpu/drm/i915/i915_irq.c               |  14 ++
>  drivers/gpu/drm/i915/i915_reg.h               |  10 ++
>  drivers/gpu/drm/xe/display/ext/i915_irq.c     |  23 +++
>  5 files changed, 180 insertions(+), 1 deletion(-)

Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>

> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.c
> b/drivers/gpu/drm/i915/display/intel_display_irq.c
> index c80183b0acaf..071b7fdf7da3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.c
> @@ -1729,6 +1729,115 @@ void bdw_disable_vblank(struct drm_crtc *_crtc)
>  		schedule_work(&display->irq.vblank_dc_work);
>  }
>  
> +static u32 vlv_dpinvgtt_pipe_fault_mask(enum pipe pipe)
> +{
> +	switch (pipe) {
> +	case PIPE_A:
> +		return SPRITEB_INVALID_GTT_STATUS |
> +			SPRITEA_INVALID_GTT_STATUS |
> +			PLANEA_INVALID_GTT_STATUS |
> +			CURSORA_INVALID_GTT_STATUS;
> +	case PIPE_B:
> +		return SPRITED_INVALID_GTT_STATUS |
> +			SPRITEC_INVALID_GTT_STATUS |
> +			PLANEB_INVALID_GTT_STATUS |
> +			CURSORB_INVALID_GTT_STATUS;
> +	case PIPE_C:
> +		return SPRITEF_INVALID_GTT_STATUS |
> +			SPRITEE_INVALID_GTT_STATUS |
> +			PLANEC_INVALID_GTT_STATUS |
> +			CURSORC_INVALID_GTT_STATUS;
> +	default:
> +		return 0;
> +	}
> +}
> +
> +static const struct pipe_fault_handler vlv_pipe_fault_handlers[] = {
> +	{ .fault = SPRITEB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE1, },
> +	{ .fault = SPRITEA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = PLANEA_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = CURSORA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR,  },
> +	{ .fault = SPRITED_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE1, },
> +	{ .fault = SPRITEC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = PLANEB_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = CURSORB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR,  },
> +	{ .fault = SPRITEF_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE1, },
> +	{ .fault = SPRITEE_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_SPRITE0, },
> +	{ .fault = PLANEC_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id =
> PLANE_PRIMARY, },
> +	{ .fault = CURSORC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id =
> PLANE_CURSOR,  },
> +	{}
> +};
> +
> +static void vlv_page_table_error_irq_ack(struct drm_i915_private *i915, u32 *dpinvgtt)
> +{
> +	u32 status, enable, tmp;
> +
> +	tmp = intel_uncore_read(&i915->uncore, DPINVGTT);
> +
> +	enable = tmp >> 16;
> +	status = tmp & 0xffff;
> +
> +	/*
> +	 * Despite what the docs claim, the status bits seem to get
> +	 * stuck permanently (similar the old PGTBL_ER register), so
> +	 * we have to disable and ignore them once set. They do get
> +	 * reset if the display power well goes down, so no need to
> +	 * track the enable mask explicitly.
> +	 */
> +	*dpinvgtt = status & enable;
> +	enable &= ~status;
> +
> +	/* customary ack+disable then re-enable to guarantee an edge */
> +	intel_uncore_write(&i915->uncore, DPINVGTT, status);
> +	intel_uncore_write(&i915->uncore, DPINVGTT, enable << 16);
> +}
> +
> +static void vlv_page_table_error_irq_handler(struct drm_i915_private *i915, u32 dpinvgtt)
> +{
> +	struct intel_display *display = &i915->display;
> +	enum pipe pipe;
> +
> +	for_each_pipe(i915, pipe) {
> +		u32 fault_errors;
> +
> +		fault_errors = dpinvgtt & vlv_dpinvgtt_pipe_fault_mask(pipe);
> +		if (fault_errors)
> +			intel_pipe_fault_irq_handler(display, vlv_pipe_fault_handlers,
> +						     pipe, fault_errors);
> +	}
> +}
> +
> +void vlv_display_error_irq_ack(struct drm_i915_private *dev_priv,
> +			       u32 *eir, u32 *dpinvgtt)
> +{
> +	u32 emr;
> +
> +	*eir = intel_uncore_read(&dev_priv->uncore, VLV_EIR);
> +
> +	if (*eir & VLV_ERROR_PAGE_TABLE)
> +		vlv_page_table_error_irq_ack(dev_priv, dpinvgtt);
> +
> +	intel_uncore_write(&dev_priv->uncore, VLV_EIR, *eir);
> +
> +	/*
> +	 * Toggle all EMR bits to make sure we get an edge
> +	 * in the ISR master error bit if we don't clear
> +	 * all the EIR bits.
> +	 */
> +	emr = intel_uncore_read(&dev_priv->uncore, VLV_EMR);
> +	intel_uncore_write(&dev_priv->uncore, VLV_EMR, 0xffffffff);
> +	intel_uncore_write(&dev_priv->uncore, VLV_EMR, emr);
> +}
> +
> +void vlv_display_error_irq_handler(struct drm_i915_private *dev_priv,
> +				   u32 eir, u32 dpinvgtt)
> +{
> +	drm_dbg(&dev_priv->drm, "Master Error, EIR 0x%08x\n", eir);
> +
> +	if (eir & VLV_ERROR_PAGE_TABLE)
> +		vlv_page_table_error_irq_handler(dev_priv, dpinvgtt);
> +}
> +
>  static void _vlv_display_irq_reset(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_uncore *uncore = &dev_priv->uncore;
> @@ -1738,6 +1847,8 @@ static void _vlv_display_irq_reset(struct drm_i915_private *dev_priv)
>  	else
>  		intel_uncore_write(uncore, DPINVGTT, DPINVGTT_STATUS_MASK_VLV);
>  
> +	gen2_error_reset(&dev_priv->uncore, VLV_ERROR_REGS);
> +
>  	i915_hotplug_interrupt_update_locked(dev_priv, 0xffffffff, 0);
>  	intel_uncore_rmw(uncore, PORT_HOTPLUG_STAT(dev_priv), 0, 0);
>  
> @@ -1764,6 +1875,12 @@ void i9xx_display_irq_reset(struct drm_i915_private *i915)
>  	i9xx_pipestat_irq_reset(i915);
>  }
>  
> +static u32 vlv_error_mask(void)
> +{
> +	/* TODO enable other errors too? */
> +	return VLV_ERROR_PAGE_TABLE;
> +}
> +
>  void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
>  {
>  	struct intel_uncore *uncore = &dev_priv->uncore;
> @@ -1775,6 +1892,17 @@ void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
>  	if (!dev_priv->display.irq.vlv_display_irqs_enabled)
>  		return;
>  
> +	if (IS_CHERRYVIEW(dev_priv))
> +		intel_uncore_write(uncore, DPINVGTT,
> +				   DPINVGTT_STATUS_MASK_CHV |
> +				   DPINVGTT_EN_MASK_CHV);
> +	else
> +		intel_uncore_write(uncore, DPINVGTT,
> +				   DPINVGTT_STATUS_MASK_VLV |
> +				   DPINVGTT_EN_MASK_VLV);
> +
> +	gen2_error_init(&dev_priv->uncore, VLV_ERROR_REGS, ~vlv_error_mask());
> +
>  	pipestat_mask = PIPE_CRC_DONE_INTERRUPT_STATUS;
>  
>  	i915_enable_pipestat(dev_priv, PIPE_A, PIPE_GMBUS_INTERRUPT_STATUS);
> @@ -1785,7 +1913,8 @@ void vlv_display_irq_postinstall(struct drm_i915_private *dev_priv)
>  		I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
>  		I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
>  		I915_LPE_PIPE_A_INTERRUPT |
> -		I915_LPE_PIPE_B_INTERRUPT;
> +		I915_LPE_PIPE_B_INTERRUPT |
> +		I915_MASTER_ERROR_INTERRUPT;
>  
>  	if (IS_CHERRYVIEW(dev_priv))
>  		enable_mask |= I915_DISPLAY_PIPE_C_EVENT_INTERRUPT |
> diff --git a/drivers/gpu/drm/i915/display/intel_display_irq.h
> b/drivers/gpu/drm/i915/display/intel_display_irq.h
> index b077712b7be1..c3651a4750e4 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_irq.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_irq.h
> @@ -75,6 +75,9 @@ void i915_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32 pipe_
>  void i965_pipestat_irq_handler(struct drm_i915_private *i915, u32 iir, u32
> pipe_stats[I915_MAX_PIPES]);
>  void valleyview_pipestat_irq_handler(struct drm_i915_private *i915, u32
> pipe_stats[I915_MAX_PIPES]);
>  
> +void vlv_display_error_irq_ack(struct drm_i915_private *i915, u32 *eir, u32 *dpinvgtt);
> +void vlv_display_error_irq_handler(struct drm_i915_private *i915, u32 eir, u32 dpinvgtt);
> +
>  void intel_display_irq_init(struct drm_i915_private *i915);
>  
>  void i915gm_irq_cstate_wa(struct drm_i915_private *i915, bool enable);
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index bd5956262c6d..e582a33fac23 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -241,6 +241,7 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
>  
>  	do {
>  		u32 iir, gt_iir, pm_iir;
> +		u32 eir = 0, dpinvgtt = 0;
>  		u32 pipe_stats[I915_MAX_PIPES] = {};
>  		u32 hotplug_status = 0;
>  		u32 ier = 0;
> @@ -278,6 +279,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
>  		if (iir & I915_DISPLAY_PORT_INTERRUPT)
>  			hotplug_status = i9xx_hpd_irq_ack(dev_priv);
>  
> +		if (iir & I915_MASTER_ERROR_INTERRUPT)
> +			vlv_display_error_irq_ack(dev_priv, &eir, &dpinvgtt);
> +
>  		/* Call regardless, as some status bits might not be
>  		 * signalled in IIR */
>  		i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats);
> @@ -304,6 +308,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
>  		if (hotplug_status)
>  			i9xx_hpd_irq_handler(dev_priv, hotplug_status);
>  
> +		if (iir & I915_MASTER_ERROR_INTERRUPT)
> +			vlv_display_error_irq_handler(dev_priv, eir, dpinvgtt);
> +
>  		valleyview_pipestat_irq_handler(dev_priv, pipe_stats);
>  	} while (0);
>  
> @@ -328,6 +335,7 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
>  
>  	do {
>  		u32 master_ctl, iir;
> +		u32 eir = 0, dpinvgtt = 0;
>  		u32 pipe_stats[I915_MAX_PIPES] = {};
>  		u32 hotplug_status = 0;
>  		u32 ier = 0;
> @@ -361,6 +369,9 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
>  		if (iir & I915_DISPLAY_PORT_INTERRUPT)
>  			hotplug_status = i9xx_hpd_irq_ack(dev_priv);
>  
> +		if (iir & I915_MASTER_ERROR_INTERRUPT)
> +			vlv_display_error_irq_ack(dev_priv, &eir, &dpinvgtt);
> +
>  		/* Call regardless, as some status bits might not be
>  		 * signalled in IIR */
>  		i9xx_pipestat_irq_ack(dev_priv, iir, pipe_stats);
> @@ -383,6 +394,9 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
>  		if (hotplug_status)
>  			i9xx_hpd_irq_handler(dev_priv, hotplug_status);
>  
> +		if (iir & I915_MASTER_ERROR_INTERRUPT)
> +			vlv_display_error_irq_handler(dev_priv, eir, dpinvgtt);
> +
>  		valleyview_pipestat_irq_handler(dev_priv, pipe_stats);
>  	} while (0);
>  
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index aed109adfedf..de67547e738c 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -475,6 +475,16 @@
>  
>  #define GEN2_ERROR_REGS		I915_ERROR_REGS(EMR, EIR)
>  
> +#define VLV_EIR		_MMIO(VLV_DISPLAY_BASE + 0x20b0)
> +#define VLV_EMR		_MMIO(VLV_DISPLAY_BASE + 0x20b4)
> +#define VLV_ESR		_MMIO(VLV_DISPLAY_BASE + 0x20b8)
> +#define   VLV_ERROR_GUNIT_TLB_DATA			(1 << 6)
> +#define   VLV_ERROR_GUNIT_TLB_PTE			(1 << 5)
> +#define   VLV_ERROR_PAGE_TABLE				(1 << 4)
> +#define   VLV_ERROR_CLAIM				(1 << 0)
> +
> +#define VLV_ERROR_REGS		I915_ERROR_REGS(VLV_EMR, VLV_EIR)
> +
>  #define INSTPM	        _MMIO(0x20c0)
>  #define   INSTPM_SELF_EN (1 << 12) /* 915GM only */
>  #define   INSTPM_AGPBUSY_INT_EN (1 << 11) /* gen3: when disabled, pending interrupts
> diff --git a/drivers/gpu/drm/xe/display/ext/i915_irq.c b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> index ac4cda2d81c7..3c6bca66ddab 100644
> --- a/drivers/gpu/drm/xe/display/ext/i915_irq.c
> +++ b/drivers/gpu/drm/xe/display/ext/i915_irq.c
> @@ -51,6 +51,29 @@ void gen2_irq_init(struct intel_uncore *uncore, struct i915_irq_regs regs,
>  	intel_uncore_posting_read(uncore, regs.imr);
>  }
>  
> +void gen2_error_reset(struct intel_uncore *uncore, struct i915_error_regs regs)
> +{
> +	intel_uncore_write(uncore, regs.emr, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.emr);
> +
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +}
> +
> +void gen2_error_init(struct intel_uncore *uncore, struct i915_error_regs regs,
> +		     u32 emr_val)
> +{
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +	intel_uncore_write(uncore, regs.eir, 0xffffffff);
> +	intel_uncore_posting_read(uncore, regs.eir);
> +
> +	intel_uncore_write(uncore, regs.emr, emr_val);
> +	intel_uncore_posting_read(uncore, regs.emr);
> +}
> +
>  bool intel_irqs_enabled(struct xe_device *xe)
>  {
>  	return atomic_read(&xe->irq.enabled);

✗ Fi.CI.CHECKPATCH: warning for drm/i915: Provide more information on display faults

[Patchwork]

== Series Details ==

Series: drm/i915: Provide more information on display faults
URL   : https://patchwork.freedesktop.org/series/143627/
State : warning

== Summary ==

Error: dim checkpatch failed
6b7b98cd5382 drm/i915: Add missing else to the if ladder in missing else
2a71d86b35ea drm/i915: Introduce a minimal plane error state
67e946535de8 drm/i915: Pimp display fault reporting
-:153: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#153: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:987:
+	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

-:166: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#166: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1000:
+	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

-:178: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#178: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1012:
+	{ .fault = GEN9_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

-:187: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#187: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1021:
+	{ .fault = GEN9_PIPE_CURSOR_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

-:192: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#192: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1026:
+	{ .fault = GEN8_PIPE_SPRITE_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:193: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#193: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1027:
+	{ .fault = GEN8_PIPE_PRIMARY_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:194: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#194: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1028:
+	{ .fault = GEN8_PIPE_CURSOR_FAULT,  .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

total: 0 errors, 7 warnings, 0 checks, 196 lines checked
31062ac20415 drm/i915: Hook in display GTT faults for IVB/HSW
-:43: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#43: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:693:
+	{ .fault = ERR_INT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:44: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#44: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:694:
+	{ .fault = ERR_INT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:45: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#45: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:695:
+	{ .fault = ERR_INT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

-:46: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#46: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:696:
+	{ .fault = ERR_INT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:47: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#47: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:697:
+	{ .fault = ERR_INT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:48: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#48: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:698:
+	{ .fault = ERR_INT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

-:49: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#49: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:699:
+	{ .fault = ERR_INT_SPRITE_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:50: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#50: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:700:
+	{ .fault = ERR_INT_PRIMARY_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:51: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#51: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:701:
+	{ .fault = ERR_INT_CURSOR_C_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

total: 0 errors, 9 warnings, 0 checks, 85 lines checked
635fcb3b7a61 drm/i915: Hook in display GTT faults for ILK/SNB
-:38: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#38: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:812:
+	{ .fault = GTT_FAULT_SPRITE_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:39: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#39: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:813:
+	{ .fault = GTT_FAULT_SPRITE_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:40: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#40: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:814:
+	{ .fault = GTT_FAULT_PRIMARY_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:41: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#41: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:815:
+	{ .fault = GTT_FAULT_PRIMARY_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:42: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#42: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:816:
+	{ .fault = GTT_FAULT_CURSOR_A_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

-:43: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#43: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:817:
+	{ .fault = GTT_FAULT_CURSOR_B_FAULT, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR, },

total: 0 errors, 6 warnings, 0 checks, 90 lines checked
3d482fc57669 drm/i915: Introduce i915_error_regs
1f229066cf16 drm/i915: Un-invert {i9xx,i965}_error_mask()
82f31b98721b drm/i915: Hook up display fault interrupts for VLV/CHV
-:55: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#55: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1756:
+	{ .fault = SPRITEB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },

-:56: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#56: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1757:
+	{ .fault = SPRITEA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:57: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#57: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1758:
+	{ .fault = PLANEA_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:58: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#58: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1759:
+	{ .fault = CURSORA_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR,  },

-:59: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#59: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1760:
+	{ .fault = SPRITED_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },

-:60: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#60: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1761:
+	{ .fault = SPRITEC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:61: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#61: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1762:
+	{ .fault = PLANEB_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:62: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#62: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1763:
+	{ .fault = CURSORB_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR,  },

-:63: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#63: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1764:
+	{ .fault = SPRITEF_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE1, },

-:64: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#64: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1765:
+	{ .fault = SPRITEE_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_SPRITE0, },

-:65: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#65: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1766:
+	{ .fault = PLANEC_INVALID_GTT_STATUS,  .handle = handle_plane_fault, .plane_id = PLANE_PRIMARY, },

-:66: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#66: FILE: drivers/gpu/drm/i915/display/intel_display_irq.c:1767:
+	{ .fault = CURSORC_INVALID_GTT_STATUS, .handle = handle_plane_fault, .plane_id = PLANE_CURSOR,  },

total: 0 errors, 12 warnings, 0 checks, 265 lines checked

✗ Fi.CI.SPARSE: warning for drm/i915: Provide more information on display faults

[Patchwork]

== Series Details ==

Series: drm/i915: Provide more information on display faults
URL   : https://patchwork.freedesktop.org/series/143627/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ i915.CI.BAT: success for drm/i915: Provide more information on display faults

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 3623 bytes --]

== Series Details ==

Series: drm/i915: Provide more information on display faults
URL   : https://patchwork.freedesktop.org/series/143627/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_15970 -> Patchwork_143627v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/index.html

Participating hosts (42 -> 41)
------------------------------

  Missing    (1): fi-snb-2520m 

Known issues
------------

  Here are the changes found in Patchwork_143627v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_pm_rpm@module-reload:
    - bat-dg2-11:         [PASS][1] -> [FAIL][2] ([i915#13401])
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/bat-dg2-11/igt@i915_pm_rpm@module-reload.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/bat-dg2-11/igt@i915_pm_rpm@module-reload.html

  * igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
    - bat-dg2-11:         [PASS][3] -> [SKIP][4] ([i915#9197]) +2 other tests skip
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/bat-dg2-11/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - bat-twl-2:          [DMESG-WARN][5] ([i915#1982]) -> [PASS][6]
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/bat-twl-2/igt@core_hotunplug@unbind-rebind.html
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/bat-twl-2/igt@core_hotunplug@unbind-rebind.html

  * igt@dmabuf@all-tests:
    - bat-apl-1:          [INCOMPLETE][7] ([i915#12904]) -> [PASS][8] +1 other test pass
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/bat-apl-1/igt@dmabuf@all-tests.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/bat-apl-1/igt@dmabuf@all-tests.html

  * igt@dmabuf@all-tests@dma_fence_chain:
    - bat-dg2-11:         [INCOMPLETE][9] ([i915#12904]) -> [PASS][10] +1 other test pass
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/bat-dg2-11/igt@dmabuf@all-tests@dma_fence_chain.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/bat-dg2-11/igt@dmabuf@all-tests@dma_fence_chain.html

  * igt@i915_selftest@live:
    - fi-glk-j4005:       [DMESG-FAIL][11] ([i915#12435]) -> [PASS][12] +1 other test pass
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/fi-glk-j4005/igt@i915_selftest@live.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/fi-glk-j4005/igt@i915_selftest@live.html

  
  [i915#12435]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12435
  [i915#12904]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12904
  [i915#13401]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13401
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#9197]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9197


Build changes
-------------

  * Linux: CI_DRM_15970 -> Patchwork_143627v1

  CI-20190529: 20190529
  CI_DRM_15970: 596a18adf934dd4a61e15c72b7e1e4ddae489474 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8195: 8195
  Patchwork_143627v1: 596a18adf934dd4a61e15c72b7e1e4ddae489474 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/index.html

[-- Attachment #2: Type: text/html, Size: 4437 bytes --]

✗ i915.CI.Full: failure for drm/i915: Provide more information on display faults

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 100279 bytes --]

== Series Details ==

Series: drm/i915: Provide more information on display faults
URL   : https://patchwork.freedesktop.org/series/143627/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_15970_full -> Patchwork_143627v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_143627v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_143627v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (12 -> 12)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_143627v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@gem_tiled_swapping@non-threaded:
    - shard-tglu:         [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-tglu-7/igt@gem_tiled_swapping@non-threaded.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-3/igt@gem_tiled_swapping@non-threaded.html

  * igt@i915_selftest@live@requests:
    - shard-mtlp:         [PASS][3] -> [INCOMPLETE][4] +1 other test incomplete
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-mtlp-4/igt@i915_selftest@live@requests.html
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-2/igt@i915_selftest@live@requests.html

  * igt@kms_flip@2x-flip-vs-fences@ab-vga1-hdmi-a1:
    - shard-snb:          NOTRUN -> [INCOMPLETE][5] +1 other test incomplete
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb5/igt@kms_flip@2x-flip-vs-fences@ab-vga1-hdmi-a1.html

  * igt@perf_pmu@module-unload:
    - shard-dg1:          [PASS][6] -> [ABORT][7]
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-12/igt@perf_pmu@module-unload.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@perf_pmu@module-unload.html

  
#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@system-suspend-devices:
    - {shard-dg2-9}:      NOTRUN -> [INCOMPLETE][8]
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-9/igt@i915_pm_rpm@system-suspend-devices.html

  
Known issues
------------

  Here are the changes found in Patchwork_143627v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@api_intel_bb@crc32:
    - shard-tglu:         NOTRUN -> [SKIP][9] ([i915#6230])
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@api_intel_bb@crc32.html

  * igt@api_intel_bb@object-reloc-purge-cache:
    - shard-rkl:          NOTRUN -> [SKIP][10] ([i915#8411])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@api_intel_bb@object-reloc-purge-cache.html

  * igt@debugfs_test@basic-hwmon:
    - shard-tglu-1:       NOTRUN -> [SKIP][11] ([i915#9318])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@debugfs_test@basic-hwmon.html

  * igt@drm_fdinfo@virtual-busy-hang:
    - shard-dg2:          NOTRUN -> [SKIP][12] ([i915#8414]) +2 other tests skip
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@drm_fdinfo@virtual-busy-hang.html
    - shard-dg1:          NOTRUN -> [SKIP][13] ([i915#8414])
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@drm_fdinfo@virtual-busy-hang.html

  * igt@gem_basic@multigpu-create-close:
    - shard-tglu-1:       NOTRUN -> [SKIP][14] ([i915#7697])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@gem_basic@multigpu-create-close.html

  * igt@gem_busy@semaphore:
    - shard-dg2:          NOTRUN -> [SKIP][15] ([i915#3936])
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@gem_busy@semaphore.html

  * igt@gem_ccs@block-copy-compressed:
    - shard-snb:          NOTRUN -> [SKIP][16] +227 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb7/igt@gem_ccs@block-copy-compressed.html
    - shard-tglu:         NOTRUN -> [SKIP][17] ([i915#3555] / [i915#9323])
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@gem_ccs@block-copy-compressed.html

  * igt@gem_ccs@block-multicopy-compressed:
    - shard-tglu-1:       NOTRUN -> [SKIP][18] ([i915#9323])
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@gem_ccs@block-multicopy-compressed.html

  * igt@gem_ccs@block-multicopy-inplace:
    - shard-rkl:          NOTRUN -> [SKIP][19] ([i915#3555] / [i915#9323]) +1 other test skip
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@gem_ccs@block-multicopy-inplace.html

  * igt@gem_ccs@ctrl-surf-copy-new-ctx:
    - shard-tglu:         NOTRUN -> [SKIP][20] ([i915#9323])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@gem_ccs@ctrl-surf-copy-new-ctx.html

  * igt@gem_ccs@suspend-resume:
    - shard-dg2:          [PASS][21] -> [INCOMPLETE][22] ([i915#7297])
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-8/igt@gem_ccs@suspend-resume.html
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-5/igt@gem_ccs@suspend-resume.html
    - shard-mtlp:         NOTRUN -> [SKIP][23] ([i915#9323])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_ccs@suspend-resume.html

  * igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0:
    - shard-dg2:          [PASS][24] -> [INCOMPLETE][25] ([i915#12392])
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-8/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-5/igt@gem_ccs@suspend-resume@linear-compressed-compfmt0-lmem0-lmem0.html

  * igt@gem_close_race@multigpu-basic-process:
    - shard-dg2:          NOTRUN -> [SKIP][26] ([i915#7697])
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@gem_close_race@multigpu-basic-process.html

  * igt@gem_close_race@multigpu-basic-threads:
    - shard-rkl:          NOTRUN -> [SKIP][27] ([i915#7697])
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@gem_close_race@multigpu-basic-threads.html

  * igt@gem_create@create-ext-set-pat:
    - shard-dg2:          NOTRUN -> [SKIP][28] ([i915#8562])
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@gem_create@create-ext-set-pat.html
    - shard-dg1:          NOTRUN -> [SKIP][29] ([i915#8562])
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@gem_create@create-ext-set-pat.html

  * igt@gem_ctx_persistence@heartbeat-hostile:
    - shard-mtlp:         NOTRUN -> [SKIP][30] ([i915#8555])
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_ctx_persistence@heartbeat-hostile.html

  * igt@gem_ctx_persistence@processes:
    - shard-snb:          NOTRUN -> [SKIP][31] ([i915#1099]) +2 other tests skip
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb7/igt@gem_ctx_persistence@processes.html

  * igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs0:
    - shard-mtlp:         NOTRUN -> [SKIP][32] ([i915#5882]) +6 other tests skip
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_ctx_persistence@saturated-hostile-nopreempt@vcs0.html

  * igt@gem_ctx_sseu@engines:
    - shard-rkl:          NOTRUN -> [SKIP][33] ([i915#280])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@gem_ctx_sseu@engines.html

  * igt@gem_ctx_sseu@invalid-sseu:
    - shard-tglu:         NOTRUN -> [SKIP][34] ([i915#280])
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@gem_ctx_sseu@invalid-sseu.html

  * igt@gem_ctx_sseu@mmap-args:
    - shard-dg2:          NOTRUN -> [SKIP][35] ([i915#280])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@gem_ctx_sseu@mmap-args.html

  * igt@gem_exec_balancer@bonded-pair:
    - shard-dg2:          NOTRUN -> [SKIP][36] ([i915#4771])
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@gem_exec_balancer@bonded-pair.html

  * igt@gem_exec_balancer@bonded-sync:
    - shard-dg1:          NOTRUN -> [SKIP][37] ([i915#4771])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@gem_exec_balancer@bonded-sync.html

  * igt@gem_exec_balancer@parallel-balancer:
    - shard-rkl:          NOTRUN -> [SKIP][38] ([i915#4525]) +2 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@gem_exec_balancer@parallel-balancer.html

  * igt@gem_exec_balancer@parallel-keep-in-fence:
    - shard-tglu:         NOTRUN -> [SKIP][39] ([i915#4525])
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@gem_exec_balancer@parallel-keep-in-fence.html

  * igt@gem_exec_capture@capture-invisible:
    - shard-dg2:          NOTRUN -> [SKIP][40] ([i915#6334]) +2 other tests skip
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@gem_exec_capture@capture-invisible.html

  * igt@gem_exec_capture@capture@vecs0-lmem0:
    - shard-dg1:          NOTRUN -> [FAIL][41] ([i915#11965]) +2 other tests fail
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@gem_exec_capture@capture@vecs0-lmem0.html

  * igt@gem_exec_fence@submit3:
    - shard-dg2:          NOTRUN -> [SKIP][42] ([i915#4812])
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@gem_exec_fence@submit3.html

  * igt@gem_exec_flush@basic-uc-ro-default:
    - shard-dg2:          NOTRUN -> [SKIP][43] ([i915#3539] / [i915#4852]) +3 other tests skip
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@gem_exec_flush@basic-uc-ro-default.html

  * igt@gem_exec_flush@basic-wb-ro-before-default:
    - shard-dg1:          NOTRUN -> [SKIP][44] ([i915#3539] / [i915#4852]) +1 other test skip
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@gem_exec_flush@basic-wb-ro-before-default.html

  * igt@gem_exec_reloc@basic-gtt-cpu:
    - shard-dg1:          NOTRUN -> [SKIP][45] ([i915#3281]) +7 other tests skip
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@gem_exec_reloc@basic-gtt-cpu.html

  * igt@gem_exec_reloc@basic-softpin:
    - shard-dg2:          NOTRUN -> [SKIP][46] ([i915#3281]) +10 other tests skip
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@gem_exec_reloc@basic-softpin.html

  * igt@gem_exec_reloc@basic-write-read-noreloc:
    - shard-rkl:          NOTRUN -> [SKIP][47] ([i915#3281]) +11 other tests skip
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@gem_exec_reloc@basic-write-read-noreloc.html

  * igt@gem_exec_schedule@reorder-wide:
    - shard-dg1:          NOTRUN -> [SKIP][48] ([i915#4812]) +1 other test skip
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@gem_exec_schedule@reorder-wide.html

  * igt@gem_exec_schedule@semaphore-power:
    - shard-rkl:          NOTRUN -> [SKIP][49] ([i915#7276])
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@gem_exec_schedule@semaphore-power.html

  * igt@gem_exec_suspend@basic-s0:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][50] ([i915#11441] / [i915#13304])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-10/igt@gem_exec_suspend@basic-s0.html

  * igt@gem_exec_suspend@basic-s0@lmem0:
    - shard-dg2:          NOTRUN -> [INCOMPLETE][51] ([i915#11441])
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-10/igt@gem_exec_suspend@basic-s0@lmem0.html

  * igt@gem_fence_thrash@bo-copy:
    - shard-mtlp:         NOTRUN -> [SKIP][52] ([i915#4860])
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_fence_thrash@bo-copy.html

  * igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][53] ([i915#4860]) +1 other test skip
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@gem_fenced_exec_thrash@no-spare-fences-busy-interruptible.html

  * igt@gem_lmem_evict@dontneed-evict-race:
    - shard-tglu:         NOTRUN -> [SKIP][54] ([i915#4613] / [i915#7582])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@gem_lmem_evict@dontneed-evict-race.html

  * igt@gem_lmem_swapping@heavy-verify-random-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][55] ([i915#4613]) +5 other tests skip
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@gem_lmem_swapping@heavy-verify-random-ccs.html

  * igt@gem_lmem_swapping@massive-random:
    - shard-mtlp:         NOTRUN -> [SKIP][56] ([i915#4613])
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_lmem_swapping@massive-random.html

  * igt@gem_lmem_swapping@parallel-random-engines:
    - shard-tglu-1:       NOTRUN -> [SKIP][57] ([i915#4613]) +1 other test skip
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@gem_lmem_swapping@parallel-random-engines.html

  * igt@gem_lmem_swapping@smem-oom@lmem0:
    - shard-dg2:          [PASS][58] -> [TIMEOUT][59] ([i915#5493]) +1 other test timeout
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-10/igt@gem_lmem_swapping@smem-oom@lmem0.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-2/igt@gem_lmem_swapping@smem-oom@lmem0.html

  * igt@gem_mmap_gtt@cpuset-medium-copy-odd:
    - shard-mtlp:         NOTRUN -> [SKIP][60] ([i915#4077])
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_mmap_gtt@cpuset-medium-copy-odd.html

  * igt@gem_mmap_wc@bad-size:
    - shard-dg2:          NOTRUN -> [SKIP][61] ([i915#4083]) +3 other tests skip
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@gem_mmap_wc@bad-size.html

  * igt@gem_mmap_wc@copy:
    - shard-mtlp:         NOTRUN -> [SKIP][62] ([i915#4083])
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_mmap_wc@copy.html

  * igt@gem_mmap_wc@write-read-distinct:
    - shard-dg1:          NOTRUN -> [SKIP][63] ([i915#4083]) +5 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@gem_mmap_wc@write-read-distinct.html

  * igt@gem_partial_pwrite_pread@writes-after-reads:
    - shard-rkl:          NOTRUN -> [SKIP][64] ([i915#3282]) +7 other tests skip
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@gem_partial_pwrite_pread@writes-after-reads.html
    - shard-dg1:          NOTRUN -> [SKIP][65] ([i915#3282]) +2 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@gem_partial_pwrite_pread@writes-after-reads.html

  * igt@gem_pread@uncached:
    - shard-dg2:          NOTRUN -> [SKIP][66] ([i915#3282]) +5 other tests skip
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-10/igt@gem_pread@uncached.html

  * igt@gem_pwrite@basic-exhaustion:
    - shard-glk:          NOTRUN -> [WARN][67] ([i915#2658])
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk8/igt@gem_pwrite@basic-exhaustion.html

  * igt@gem_pxp@regular-baseline-src-copy-readible:
    - shard-dg1:          NOTRUN -> [SKIP][68] ([i915#4270]) +2 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@gem_pxp@regular-baseline-src-copy-readible.html

  * igt@gem_pxp@verify-pxp-execution-after-suspend-resume:
    - shard-rkl:          NOTRUN -> [TIMEOUT][69] ([i915#12917] / [i915#12964]) +3 other tests timeout
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@gem_pxp@verify-pxp-execution-after-suspend-resume.html

  * igt@gem_pxp@verify-pxp-stale-buf-optout-execution:
    - shard-dg2:          NOTRUN -> [SKIP][70] ([i915#4270]) +3 other tests skip
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@gem_pxp@verify-pxp-stale-buf-optout-execution.html

  * igt@gem_render_copy@y-tiled-to-vebox-yf-tiled:
    - shard-dg2:          NOTRUN -> [SKIP][71] ([i915#5190] / [i915#8428]) +5 other tests skip
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@gem_render_copy@y-tiled-to-vebox-yf-tiled.html

  * igt@gem_render_copy@yf-tiled-to-vebox-y-tiled:
    - shard-mtlp:         NOTRUN -> [SKIP][72] ([i915#8428])
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_render_copy@yf-tiled-to-vebox-y-tiled.html

  * igt@gem_render_tiled_blits@basic:
    - shard-dg2:          NOTRUN -> [SKIP][73] ([i915#4079])
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@gem_render_tiled_blits@basic.html

  * igt@gem_tiled_partial_pwrite_pread@writes:
    - shard-dg2:          NOTRUN -> [SKIP][74] ([i915#4077]) +11 other tests skip
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@gem_tiled_partial_pwrite_pread@writes.html

  * igt@gem_tiled_swapping@non-threaded:
    - shard-glk:          NOTRUN -> [ABORT][75] ([i915#13263] / [i915#13449])
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk8/igt@gem_tiled_swapping@non-threaded.html

  * igt@gem_userptr_blits@dmabuf-sync:
    - shard-tglu-1:       NOTRUN -> [SKIP][76] ([i915#3297] / [i915#3323])
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@gem_userptr_blits@dmabuf-sync.html

  * igt@gem_userptr_blits@dmabuf-unsync:
    - shard-tglu-1:       NOTRUN -> [SKIP][77] ([i915#3297]) +1 other test skip
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@gem_userptr_blits@dmabuf-unsync.html

  * igt@gem_userptr_blits@map-fixed-invalidate:
    - shard-dg2:          NOTRUN -> [SKIP][78] ([i915#3297] / [i915#4880]) +1 other test skip
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@gem_userptr_blits@map-fixed-invalidate.html

  * igt@gem_userptr_blits@relocations:
    - shard-dg2:          NOTRUN -> [SKIP][79] ([i915#3281] / [i915#3297])
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@gem_userptr_blits@relocations.html

  * igt@gem_userptr_blits@unsync-unmap-after-close:
    - shard-rkl:          NOTRUN -> [SKIP][80] ([i915#3297]) +3 other tests skip
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@gem_userptr_blits@unsync-unmap-after-close.html

  * igt@gen9_exec_parse@batch-invalid-length:
    - shard-dg1:          NOTRUN -> [SKIP][81] ([i915#2527]) +2 other tests skip
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@gen9_exec_parse@batch-invalid-length.html

  * igt@gen9_exec_parse@bb-large:
    - shard-tglu:         NOTRUN -> [SKIP][82] ([i915#2527] / [i915#2856])
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@gen9_exec_parse@bb-large.html

  * igt@gen9_exec_parse@bb-oversize:
    - shard-rkl:          NOTRUN -> [SKIP][83] ([i915#2527]) +3 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@gen9_exec_parse@bb-oversize.html

  * igt@gen9_exec_parse@unaligned-access:
    - shard-dg2:          NOTRUN -> [SKIP][84] ([i915#2856]) +2 other tests skip
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@gen9_exec_parse@unaligned-access.html

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-glk:          [PASS][85] -> [ABORT][86] ([i915#9820])
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-glk1/igt@i915_module_load@reload-with-fault-injection.html
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk6/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_pm_freq_api@freq-reset:
    - shard-rkl:          NOTRUN -> [SKIP][87] ([i915#8399])
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@i915_pm_freq_api@freq-reset.html

  * igt@i915_pm_rps@basic-api:
    - shard-dg1:          NOTRUN -> [SKIP][88] ([i915#11681] / [i915#6621])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@i915_pm_rps@basic-api.html

  * igt@i915_pm_rps@min-max-config-loaded:
    - shard-dg2:          NOTRUN -> [SKIP][89] ([i915#11681] / [i915#6621]) +1 other test skip
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@i915_pm_rps@min-max-config-loaded.html

  * igt@i915_pm_rps@reset:
    - shard-mtlp:         NOTRUN -> [FAIL][90] ([i915#8346])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@i915_pm_rps@reset.html

  * igt@i915_pm_rps@thresholds-idle:
    - shard-dg1:          NOTRUN -> [SKIP][91] ([i915#11681])
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@i915_pm_rps@thresholds-idle.html

  * igt@i915_pm_sseu@full-enable:
    - shard-rkl:          NOTRUN -> [SKIP][92] ([i915#4387])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@i915_pm_sseu@full-enable.html

  * igt@i915_suspend@basic-s3-without-i915:
    - shard-tglu:         NOTRUN -> [INCOMPLETE][93] ([i915#7443])
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@i915_suspend@basic-s3-without-i915.html

  * igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling:
    - shard-dg1:          NOTRUN -> [SKIP][94] ([i915#4212])
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_addfb_basic@addfb25-framebuffer-vs-set-tiling.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
    - shard-dg1:          NOTRUN -> [SKIP][95] ([i915#4215])
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_addfb_basic@basic-y-tiled-legacy.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic:
    - shard-tglu:         [PASS][96] -> [FAIL][97] ([i915#10991] / [i915#13320])
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-tglu-7/igt@kms_async_flips@alternate-sync-async-flip-atomic.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-3/igt@kms_async_flips@alternate-sync-async-flip-atomic.html

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-d-hdmi-a-1:
    - shard-tglu:         [PASS][98] -> [FAIL][99] ([i915#13320])
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-tglu-7/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-d-hdmi-a-1.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-3/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-d-hdmi-a-1.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-4-y-rc-ccs-cc:
    - shard-dg1:          NOTRUN -> [SKIP][100] ([i915#8709]) +15 other tests skip
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-a-hdmi-a-4-y-rc-ccs-cc.html

  * igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-b-hdmi-a-3-4-rc-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][101] ([i915#8709]) +11 other tests skip
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_async_flips@async-flip-with-page-flip-events-atomic@pipe-b-hdmi-a-3-4-rc-ccs.html

  * igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [SKIP][102] ([i915#8709]) +7 other tests skip
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-1-y-rc-ccs-cc.html

  * igt@kms_async_flips@invalid-async-flip:
    - shard-dg2:          NOTRUN -> [SKIP][103] ([i915#12967] / [i915#6228])
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_async_flips@invalid-async-flip.html

  * igt@kms_atomic@plane-primary-overlay-mutable-zpos:
    - shard-rkl:          NOTRUN -> [SKIP][104] ([i915#9531])
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@kms_atomic@plane-primary-overlay-mutable-zpos.html

  * igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels:
    - shard-rkl:          NOTRUN -> [SKIP][105] ([i915#1769] / [i915#3555])
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@kms_atomic_transition@plane-all-modeset-transition-fencing-internal-panels.html

  * igt@kms_big_fb@4-tiled-32bpp-rotate-90:
    - shard-tglu:         NOTRUN -> [SKIP][106] ([i915#5286]) +3 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][107] ([i915#5286]) +5 other tests skip
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-tglu-1:       NOTRUN -> [SKIP][108] ([i915#5286]) +3 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][109] ([i915#4538] / [i915#5286]) +4 other tests skip
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@linear-64bpp-rotate-90:
    - shard-rkl:          NOTRUN -> [SKIP][110] ([i915#3638]) +1 other test skip
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_big_fb@linear-64bpp-rotate-90.html

  * igt@kms_big_fb@x-tiled-64bpp-rotate-270:
    - shard-dg1:          NOTRUN -> [SKIP][111] ([i915#3638]) +2 other tests skip
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_big_fb@x-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-dg2:          NOTRUN -> [SKIP][112] ([i915#5190])
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0:
    - shard-mtlp:         NOTRUN -> [SKIP][113] +1 other test skip
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-16bpp-rotate-90:
    - shard-dg2:          NOTRUN -> [SKIP][114] ([i915#4538] / [i915#5190]) +9 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_big_fb@yf-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-dg1:          NOTRUN -> [SKIP][115] ([i915#4538]) +4 other tests skip
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
    - shard-dg1:          NOTRUN -> [SKIP][116] ([i915#12313])
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][117] ([i915#10307] / [i915#6095]) +79 other tests skip
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-8/igt@kms_ccs@bad-rotation-90-4-tiled-mtl-mc-ccs@pipe-b-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][118] ([i915#12313]) +1 other test skip
   [118]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_ccs@crc-primary-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-d-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][119] ([i915#6095]) +9 other tests skip
   [119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_ccs@crc-primary-basic-y-tiled-ccs@pipe-d-edp-1.html

  * igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
    - shard-dg2:          NOTRUN -> [SKIP][120] ([i915#10307] / [i915#10434] / [i915#6095]) +1 other test skip
   [120]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
    - shard-tglu-1:       NOTRUN -> [SKIP][121] ([i915#12313])
   [121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
    - shard-dg2:          NOTRUN -> [SKIP][122] ([i915#12313])
   [122]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][123] ([i915#6095]) +74 other tests skip
   [123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc:
    - shard-glk:          NOTRUN -> [SKIP][124] +29 other tests skip
   [124]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk8/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-rkl:          NOTRUN -> [SKIP][125] ([i915#12805])
   [125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-3:
    - shard-dg2:          NOTRUN -> [SKIP][126] ([i915#6095]) +8 other tests skip
   [126]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs-cc@pipe-b-hdmi-a-3.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2:
    - shard-glk:          NOTRUN -> [INCOMPLETE][127] ([i915#12796])
   [127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk7/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-2.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1:
    - shard-tglu:         NOTRUN -> [SKIP][128] ([i915#6095]) +24 other tests skip
   [128]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_ccs@crc-primary-suspend-y-tiled-gen12-mc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
    - shard-mtlp:         NOTRUN -> [SKIP][129] ([i915#12313])
   [129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html

  * igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-c-hdmi-a-1:
    - shard-tglu-1:       NOTRUN -> [SKIP][130] ([i915#6095]) +19 other tests skip
   [130]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_ccs@missing-ccs-buffer-y-tiled-ccs@pipe-c-hdmi-a-1.html

  * igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs:
    - shard-tglu:         NOTRUN -> [SKIP][131] ([i915#12313])
   [131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_ccs@random-ccs-data-4-tiled-bmg-ccs.html

  * igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3:
    - shard-dg1:          NOTRUN -> [SKIP][132] ([i915#6095]) +184 other tests skip
   [132]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_ccs@random-ccs-data-yf-tiled-ccs@pipe-a-hdmi-a-3.html

  * igt@kms_cdclk@mode-transition:
    - shard-rkl:          NOTRUN -> [SKIP][133] ([i915#3742])
   [133]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_cdclk@mode-transition.html

  * igt@kms_cdclk@mode-transition-all-outputs:
    - shard-dg2:          NOTRUN -> [SKIP][134] ([i915#11616] / [i915#7213])
   [134]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_cdclk@mode-transition-all-outputs.html

  * igt@kms_chamelium_audio@dp-audio:
    - shard-tglu:         NOTRUN -> [SKIP][135] ([i915#11151] / [i915#7828]) +2 other tests skip
   [135]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_chamelium_audio@dp-audio.html

  * igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k:
    - shard-tglu-1:       NOTRUN -> [SKIP][136] ([i915#11151] / [i915#7828]) +2 other tests skip
   [136]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_chamelium_edid@dp-edid-stress-resolution-non-4k.html

  * igt@kms_chamelium_edid@hdmi-edid-read:
    - shard-dg1:          NOTRUN -> [SKIP][137] ([i915#11151] / [i915#7828]) +6 other tests skip
   [137]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_chamelium_edid@hdmi-edid-read.html

  * igt@kms_chamelium_frames@hdmi-crc-fast:
    - shard-dg2:          NOTRUN -> [SKIP][138] ([i915#11151] / [i915#7828]) +7 other tests skip
   [138]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_chamelium_frames@hdmi-crc-fast.html

  * igt@kms_chamelium_hpd@dp-hpd:
    - shard-rkl:          NOTRUN -> [SKIP][139] ([i915#11151] / [i915#7828]) +11 other tests skip
   [139]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_chamelium_hpd@dp-hpd.html

  * igt@kms_content_protection@atomic:
    - shard-tglu-1:       NOTRUN -> [SKIP][140] ([i915#6944] / [i915#7116] / [i915#7118] / [i915#9424])
   [140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-dg2:          NOTRUN -> [SKIP][141] ([i915#3299]) +1 other test skip
   [141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg1:          NOTRUN -> [SKIP][142] ([i915#3299])
   [142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@lic-type-0:
    - shard-rkl:          NOTRUN -> [SKIP][143] ([i915#9424]) +1 other test skip
   [143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@kms_content_protection@lic-type-0.html

  * igt@kms_content_protection@mei-interface:
    - shard-tglu-1:       NOTRUN -> [SKIP][144] ([i915#6944] / [i915#9424])
   [144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_content_protection@mei-interface.html

  * igt@kms_content_protection@type1:
    - shard-rkl:          NOTRUN -> [SKIP][145] ([i915#7118] / [i915#9424])
   [145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_content_protection@type1.html

  * igt@kms_content_protection@uevent:
    - shard-dg2:          NOTRUN -> [SKIP][146] ([i915#7118] / [i915#9424])
   [146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_content_protection@uevent.html

  * igt@kms_cursor_crc@cursor-onscreen-512x170:
    - shard-tglu:         NOTRUN -> [SKIP][147] ([i915#13049])
   [147]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_cursor_crc@cursor-onscreen-512x170.html

  * igt@kms_cursor_crc@cursor-random-256x256:
    - shard-dg1:          [PASS][148] -> [DMESG-WARN][149] ([i915#4423]) +1 other test dmesg-warn
   [148]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-18/igt@kms_cursor_crc@cursor-random-256x256.html
   [149]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-14/igt@kms_cursor_crc@cursor-random-256x256.html

  * igt@kms_cursor_crc@cursor-random-512x170:
    - shard-rkl:          NOTRUN -> [SKIP][150] ([i915#13049]) +2 other tests skip
   [150]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_cursor_crc@cursor-random-512x170.html
    - shard-dg1:          NOTRUN -> [SKIP][151] ([i915#13049])
   [151]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_cursor_crc@cursor-random-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-32x10:
    - shard-mtlp:         NOTRUN -> [SKIP][152] ([i915#3555] / [i915#8814]) +1 other test skip
   [152]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_cursor_crc@cursor-rapid-movement-32x10.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-dg2:          NOTRUN -> [SKIP][153] ([i915#13049])
   [153]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_cursor_crc@cursor-rapid-movement-max-size:
    - shard-tglu:         NOTRUN -> [SKIP][154] ([i915#3555]) +1 other test skip
   [154]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_cursor_crc@cursor-rapid-movement-max-size.html

  * igt@kms_cursor_crc@cursor-sliding-512x512:
    - shard-tglu-1:       NOTRUN -> [SKIP][155] ([i915#13049])
   [155]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_cursor_crc@cursor-sliding-512x512.html

  * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
    - shard-dg2:          NOTRUN -> [SKIP][156] ([i915#13046] / [i915#5354]) +1 other test skip
   [156]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][157] ([i915#4213])
   [157]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-legacy:
    - shard-mtlp:         NOTRUN -> [SKIP][158] ([i915#9809])
   [158]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_cursor_legacy@cursorb-vs-flipb-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions:
    - shard-glk:          [PASS][159] -> [FAIL][160] ([i915#2346])
   [159]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-glk6/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html
   [160]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk3/igt@kms_cursor_legacy@flip-vs-cursor-atomic-transitions.html

  * igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot:
    - shard-tglu-1:       NOTRUN -> [SKIP][161] ([i915#9067])
   [161]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_cursor_legacy@modeset-atomic-cursor-hotspot.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-rkl:          NOTRUN -> [SKIP][162] ([i915#4103])
   [162]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
    - shard-dg1:          NOTRUN -> [SKIP][163] ([i915#4103] / [i915#4213])
   [163]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_dirtyfb@drrs-dirtyfb-ioctl:
    - shard-tglu:         NOTRUN -> [SKIP][164] ([i915#9723])
   [164]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_dirtyfb@drrs-dirtyfb-ioctl.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-dg2:          NOTRUN -> [SKIP][165] ([i915#3555]) +2 other tests skip
   [165]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2:
    - shard-rkl:          NOTRUN -> [SKIP][166] ([i915#3804])
   [166]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-2.html

  * igt@kms_dp_aux_dev:
    - shard-dg2:          NOTRUN -> [SKIP][167] ([i915#1257])
   [167]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_dp_aux_dev.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-rkl:          NOTRUN -> [SKIP][168] ([i915#12402])
   [168]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
    - shard-dg1:          NOTRUN -> [SKIP][169] ([i915#12402])
   [169]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_draw_crc@draw-method-mmap-wc:
    - shard-dg2:          NOTRUN -> [SKIP][170] ([i915#8812]) +1 other test skip
   [170]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_draw_crc@draw-method-mmap-wc.html

  * igt@kms_dsc@dsc-basic:
    - shard-rkl:          NOTRUN -> [SKIP][171] ([i915#3555] / [i915#3840]) +1 other test skip
   [171]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_dsc@dsc-basic.html

  * igt@kms_dsc@dsc-fractional-bpp-with-bpc:
    - shard-mtlp:         NOTRUN -> [SKIP][172] ([i915#3840])
   [172]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_dsc@dsc-fractional-bpp-with-bpc.html

  * igt@kms_dsc@dsc-with-bpc:
    - shard-tglu:         NOTRUN -> [SKIP][173] ([i915#3555] / [i915#3840])
   [173]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_dsc@dsc-with-bpc.html

  * igt@kms_dsc@dsc-with-output-formats:
    - shard-tglu-1:       NOTRUN -> [SKIP][174] ([i915#3555] / [i915#3840])
   [174]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_dsc@dsc-with-output-formats.html

  * igt@kms_dsc@dsc-with-output-formats-with-bpc:
    - shard-rkl:          NOTRUN -> [SKIP][175] ([i915#3840] / [i915#9053])
   [175]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_dsc@dsc-with-output-formats-with-bpc.html

  * igt@kms_fbcon_fbt@psr-suspend:
    - shard-dg2:          NOTRUN -> [SKIP][176] ([i915#3469])
   [176]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_fbcon_fbt@psr-suspend.html

  * igt@kms_feature_discovery@chamelium:
    - shard-tglu-1:       NOTRUN -> [SKIP][177] ([i915#2065] / [i915#4854])
   [177]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_feature_discovery@chamelium.html

  * igt@kms_feature_discovery@display-4x:
    - shard-dg1:          NOTRUN -> [SKIP][178] ([i915#1839])
   [178]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_feature_discovery@display-4x.html

  * igt@kms_flip@2x-flip-vs-fences:
    - shard-dg1:          NOTRUN -> [SKIP][179] ([i915#8381])
   [179]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_flip@2x-flip-vs-fences.html
    - shard-dg2:          NOTRUN -> [SKIP][180] ([i915#8381])
   [180]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_flip@2x-flip-vs-fences.html

  * igt@kms_flip@2x-flip-vs-panning:
    - shard-dg1:          NOTRUN -> [SKIP][181] ([i915#9934]) +4 other tests skip
   [181]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_flip@2x-flip-vs-panning.html

  * igt@kms_flip@2x-flip-vs-panning-interruptible:
    - shard-dg2:          NOTRUN -> [SKIP][182] ([i915#9934]) +10 other tests skip
   [182]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_flip@2x-flip-vs-panning-interruptible.html

  * igt@kms_flip@2x-flip-vs-rmfb:
    - shard-tglu:         NOTRUN -> [SKIP][183] ([i915#3637])
   [183]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_flip@2x-flip-vs-rmfb.html

  * igt@kms_flip@2x-modeset-vs-vblank-race:
    - shard-rkl:          NOTRUN -> [SKIP][184] ([i915#9934]) +5 other tests skip
   [184]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_flip@2x-modeset-vs-vblank-race.html

  * igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible:
    - shard-tglu-1:       NOTRUN -> [SKIP][185] ([i915#3637]) +2 other tests skip
   [185]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_flip@2x-single-buffer-flip-vs-dpms-off-vs-modeset-interruptible.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible:
    - shard-tglu:         NOTRUN -> [FAIL][186] ([i915#11989]) +2 other tests fail
   [186]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a3:
    - shard-dg2:          NOTRUN -> [FAIL][187] ([i915#11989]) +3 other tests fail
   [187]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_flip@flip-vs-blocking-wf-vblank@c-hdmi-a3.html

  * igt@kms_flip@plain-flip-fb-recreate@a-edp1:
    - shard-mtlp:         [PASS][188] -> [FAIL][189] ([i915#11989]) +1 other test fail
   [188]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-mtlp-6/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html
   [189]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-5/igt@kms_flip@plain-flip-fb-recreate@a-edp1.html

  * igt@kms_flip@plain-flip-fb-recreate@c-hdmi-a1:
    - shard-tglu:         [PASS][190] -> [FAIL][191] ([i915#11989]) +3 other tests fail
   [190]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-tglu-8/igt@kms_flip@plain-flip-fb-recreate@c-hdmi-a1.html
   [191]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-10/igt@kms_flip@plain-flip-fb-recreate@c-hdmi-a1.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@a-vga1:
    - shard-snb:          [PASS][192] -> [FAIL][193] ([i915#11989]) +1 other test fail
   [192]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-snb7/igt@kms_flip@wf_vblank-ts-check-interruptible@a-vga1.html
   [193]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb2/igt@kms_flip@wf_vblank-ts-check-interruptible@a-vga1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
    - shard-tglu:         NOTRUN -> [SKIP][194] ([i915#2672] / [i915#3555]) +1 other test skip
   [194]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html

  * igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode:
    - shard-tglu:         NOTRUN -> [SKIP][195] ([i915#2587] / [i915#2672]) +1 other test skip
   [195]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_flip_scaled_crc@flip-32bpp-yftileccs-to-64bpp-yftile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-valid-mode:
    - shard-dg2:          NOTRUN -> [SKIP][196] ([i915#2672]) +1 other test skip
   [196]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
    - shard-mtlp:         NOTRUN -> [SKIP][197] ([i915#2672] / [i915#3555] / [i915#8813]) +2 other tests skip
   [197]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-default-mode:
    - shard-mtlp:         NOTRUN -> [SKIP][198] ([i915#2672] / [i915#8813])
   [198]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling@pipe-a-default-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-rkl:          NOTRUN -> [SKIP][199] ([i915#2672] / [i915#3555]) +4 other tests skip
   [199]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-rkl:          NOTRUN -> [SKIP][200] ([i915#2672]) +4 other tests skip
   [200]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
    - shard-dg2:          NOTRUN -> [SKIP][201] ([i915#2672] / [i915#3555] / [i915#5190]) +1 other test skip
   [201]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html

  * igt@kms_flip_tiling@flip-change-tiling:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][202] ([i915#12917] / [i915#12964])
   [202]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_flip_tiling@flip-change-tiling.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-2-y-rc-ccs-to-y-rc-ccs-cc:
    - shard-rkl:          NOTRUN -> [DMESG-WARN][203] ([i915#12964]) +17 other tests dmesg-warn
   [203]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_flip_tiling@flip-change-tiling@pipe-a-hdmi-a-2-y-rc-ccs-to-y-rc-ccs-cc.html

  * igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc:
    - shard-dg1:          NOTRUN -> [SKIP][204] ([i915#8708]) +8 other tests skip
   [204]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move:
    - shard-tglu:         NOTRUN -> [SKIP][205] +33 other tests skip
   [205]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-move.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc:
    - shard-snb:          [PASS][206] -> [SKIP][207] +2 other tests skip
   [206]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-snb5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html
   [207]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-cur-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
    - shard-dg2:          NOTRUN -> [SKIP][208] ([i915#5354]) +30 other tests skip
   [208]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-4:
    - shard-tglu-1:       NOTRUN -> [SKIP][209] ([i915#5439]) +1 other test skip
   [209]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_frontbuffer_tracking@fbc-tiling-4.html

  * igt@kms_frontbuffer_tracking@fbc-tiling-y:
    - shard-dg2:          NOTRUN -> [SKIP][210] ([i915#10055])
   [210]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_frontbuffer_tracking@fbc-tiling-y.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc:
    - shard-rkl:          NOTRUN -> [SKIP][211] ([i915#3023]) +26 other tests skip
   [211]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render:
    - shard-dg2:          NOTRUN -> [SKIP][212] ([i915#3458]) +11 other tests skip
   [212]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-cur-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-cpu:
    - shard-mtlp:         NOTRUN -> [SKIP][213] ([i915#1825]) +3 other tests skip
   [213]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite:
    - shard-dg1:          NOTRUN -> [SKIP][214] +28 other tests skip
   [214]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-spr-indfb-draw-pwrite.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][215] ([i915#8708]) +15 other tests skip
   [215]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-shrfb-fliptrack-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][216] ([i915#8708])
   [216]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_frontbuffer_tracking@psr-2p-primscrn-cur-indfb-draw-mmap-gtt.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt:
    - shard-rkl:          NOTRUN -> [SKIP][217] ([i915#1825]) +42 other tests skip
   [217]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-indfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary:
    - shard-dg2:          NOTRUN -> [SKIP][218] ([i915#10433] / [i915#3458]) +2 other tests skip
   [218]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_frontbuffer_tracking@psr-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu:
    - shard-dg1:          NOTRUN -> [SKIP][219] ([i915#3458]) +13 other tests skip
   [219]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc:
    - shard-tglu-1:       NOTRUN -> [SKIP][220] +37 other tests skip
   [220]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_frontbuffer_tracking@psr-rgb101010-draw-mmap-wc.html

  * igt@kms_hdr@bpc-switch-dpms:
    - shard-dg1:          NOTRUN -> [SKIP][221] ([i915#3555] / [i915#8228]) +1 other test skip
   [221]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_hdr@bpc-switch-dpms.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-rkl:          NOTRUN -> [SKIP][222] ([i915#12713])
   [222]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_hdr@invalid-metadata-sizes:
    - shard-dg2:          [PASS][223] -> [SKIP][224] ([i915#3555] / [i915#8228])
   [223]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-10/igt@kms_hdr@invalid-metadata-sizes.html
   [224]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-2/igt@kms_hdr@invalid-metadata-sizes.html

  * igt@kms_hdr@static-toggle:
    - shard-dg2:          NOTRUN -> [SKIP][225] ([i915#3555] / [i915#8228]) +1 other test skip
   [225]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_hdr@static-toggle.html

  * igt@kms_joiner@basic-ultra-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][226] ([i915#12339])
   [226]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_joiner@basic-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-big-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][227] ([i915#10656])
   [227]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_joiner@invalid-modeset-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-big-joiner:
    - shard-dg2:          NOTRUN -> [SKIP][228] ([i915#12388])
   [228]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_joiner@invalid-modeset-force-big-joiner.html
    - shard-dg1:          NOTRUN -> [SKIP][229] ([i915#12388])
   [229]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_joiner@invalid-modeset-force-big-joiner.html

  * igt@kms_joiner@invalid-modeset-force-ultra-joiner:
    - shard-rkl:          NOTRUN -> [SKIP][230] ([i915#12394] / [i915#13522])
   [230]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html

  * igt@kms_joiner@invalid-modeset-ultra-joiner:
    - shard-mtlp:         NOTRUN -> [SKIP][231] ([i915#12339])
   [231]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_joiner@invalid-modeset-ultra-joiner.html

  * igt@kms_panel_fitting@legacy:
    - shard-dg2:          NOTRUN -> [SKIP][232] ([i915#6301])
   [232]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_panel_fitting@legacy.html
    - shard-dg1:          NOTRUN -> [SKIP][233] ([i915#6301])
   [233]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_panel_fitting@legacy.html

  * igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes:
    - shard-dg2:          NOTRUN -> [SKIP][234] +13 other tests skip
   [234]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_pipe_b_c_ivb@from-pipe-c-to-b-with-3-lanes.html

  * igt@kms_plane_multiple@tiling-yf:
    - shard-rkl:          NOTRUN -> [SKIP][235] ([i915#3555]) +2 other tests skip
   [235]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_plane_multiple@tiling-yf.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a:
    - shard-rkl:          NOTRUN -> [SKIP][236] ([i915#12247]) +7 other tests skip
   [236]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-a.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format:
    - shard-tglu-1:       NOTRUN -> [SKIP][237] ([i915#12247]) +13 other tests skip
   [237]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html

  * igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation:
    - shard-dg2:          NOTRUN -> [SKIP][238] ([i915#12247] / [i915#9423])
   [238]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-rotation.html

  * igt@kms_plane_scaling@plane-scaler-unity-scaling-with-pixel-format@pipe-b:
    - shard-rkl:          [PASS][239] -> [DMESG-WARN][240] ([i915#12917] / [i915#12964])
   [239]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-rkl-1/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-pixel-format@pipe-b.html
   [240]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-5/igt@kms_plane_scaling@plane-scaler-unity-scaling-with-pixel-format@pipe-b.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation:
    - shard-dg1:          NOTRUN -> [SKIP][241] ([i915#3555]) +3 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation.html

  * igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b:
    - shard-dg1:          NOTRUN -> [SKIP][242] ([i915#12247]) +7 other tests skip
   [242]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_plane_scaling@plane-scaler-with-clipping-clamping-rotation@pipe-b.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25:
    - shard-tglu-1:       NOTRUN -> [SKIP][243] ([i915#12247] / [i915#6953])
   [243]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_plane_scaling@planes-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25:
    - shard-dg2:          NOTRUN -> [SKIP][244] ([i915#12247] / [i915#6953] / [i915#9423]) +2 other tests skip
   [244]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25:
    - shard-dg1:          NOTRUN -> [SKIP][245] ([i915#12247] / [i915#6953])
   [245]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25.html

  * igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c:
    - shard-dg2:          NOTRUN -> [SKIP][246] ([i915#12247]) +15 other tests skip
   [246]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-25@pipe-c.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5:
    - shard-mtlp:         NOTRUN -> [SKIP][247] ([i915#12247] / [i915#3555] / [i915#6953])
   [247]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5.html

  * igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a:
    - shard-mtlp:         NOTRUN -> [SKIP][248] ([i915#12247]) +3 other tests skip
   [248]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-5@pipe-a.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-tglu-1:       NOTRUN -> [SKIP][249] ([i915#9812])
   [249]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][250] ([i915#12343])
   [250]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_pm_backlight@brightness-with-dpms.html
    - shard-dg1:          NOTRUN -> [SKIP][251] ([i915#12343])
   [251]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-tglu:         NOTRUN -> [SKIP][252] ([i915#9812])
   [252]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc5-dpms-negative:
    - shard-rkl:          [PASS][253] -> [DMESG-WARN][254] ([i915#12964]) +6 other tests dmesg-warn
   [253]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-rkl-3/igt@kms_pm_dc@dc5-dpms-negative.html
   [254]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_pm_dc@dc5-dpms-negative.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-dg2:          NOTRUN -> [SKIP][255] ([i915#9685])
   [255]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-rkl:          NOTRUN -> [SKIP][256] ([i915#3361])
   [256]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@modeset-lpsp-stress:
    - shard-rkl:          NOTRUN -> [SKIP][257] ([i915#9519])
   [257]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_pm_rpm@modeset-lpsp-stress.html

  * igt@kms_pm_rpm@modeset-lpsp-stress-no-wait:
    - shard-rkl:          [PASS][258] -> [SKIP][259] ([i915#9519])
   [258]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-rkl-2/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html
   [259]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_pm_rpm@modeset-lpsp-stress-no-wait.html

  * igt@kms_pm_rpm@pm-caching:
    - shard-dg1:          NOTRUN -> [SKIP][260] ([i915#4077]) +10 other tests skip
   [260]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_pm_rpm@pm-caching.html

  * igt@kms_prime@basic-crc-hybrid:
    - shard-rkl:          NOTRUN -> [SKIP][261] ([i915#6524])
   [261]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_prime@basic-crc-hybrid.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf:
    - shard-dg2:          NOTRUN -> [SKIP][262] ([i915#11520]) +5 other tests skip
   [262]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
    - shard-rkl:          NOTRUN -> [SKIP][263] ([i915#11520]) +9 other tests skip
   [263]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html
    - shard-snb:          NOTRUN -> [SKIP][264] ([i915#11520]) +5 other tests skip
   [264]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb7/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][265] ([i915#9808])
   [265]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-a-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1:
    - shard-mtlp:         NOTRUN -> [SKIP][266] ([i915#12316]) +1 other test skip
   [266]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_psr2_sf@fbc-psr2-plane-move-sf-dmg-area@pipe-b-edp-1.html

  * igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area:
    - shard-tglu:         NOTRUN -> [SKIP][267] ([i915#11520]) +4 other tests skip
   [267]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area:
    - shard-glk:          NOTRUN -> [SKIP][268] ([i915#11520])
   [268]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk8/igt@kms_psr2_sf@pr-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf:
    - shard-tglu-1:       NOTRUN -> [SKIP][269] ([i915#11520]) +3 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_psr2_sf@psr2-cursor-plane-move-continuous-exceed-fully-sf.html

  * igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb:
    - shard-dg1:          NOTRUN -> [SKIP][270] ([i915#11520]) +5 other tests skip
   [270]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_psr2_sf@psr2-primary-plane-update-sf-dmg-area-big-fb.html

  * igt@kms_psr2_su@page_flip-p010:
    - shard-dg2:          NOTRUN -> [SKIP][271] ([i915#9683]) +2 other tests skip
   [271]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@kms_psr2_su@page_flip-p010.html
    - shard-dg1:          NOTRUN -> [SKIP][272] ([i915#9683])
   [272]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_psr2_su@page_flip-p010.html

  * igt@kms_psr2_su@page_flip-xrgb8888:
    - shard-mtlp:         NOTRUN -> [SKIP][273] ([i915#4348])
   [273]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_psr2_su@page_flip-xrgb8888.html

  * igt@kms_psr@fbc-psr-primary-mmap-gtt:
    - shard-dg2:          NOTRUN -> [SKIP][274] ([i915#1072] / [i915#9732]) +18 other tests skip
   [274]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_psr@fbc-psr-primary-mmap-gtt.html

  * igt@kms_psr@fbc-psr2-cursor-mmap-gtt:
    - shard-mtlp:         NOTRUN -> [SKIP][275] ([i915#9688]) +2 other tests skip
   [275]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@kms_psr@fbc-psr2-cursor-mmap-gtt.html

  * igt@kms_psr@fbc-psr2-sprite-mmap-gtt:
    - shard-dg1:          NOTRUN -> [SKIP][276] ([i915#1072] / [i915#9732]) +13 other tests skip
   [276]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@kms_psr@fbc-psr2-sprite-mmap-gtt.html

  * igt@kms_psr@psr-sprite-plane-move:
    - shard-rkl:          NOTRUN -> [SKIP][277] ([i915#1072] / [i915#9732]) +25 other tests skip
   [277]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@kms_psr@psr-sprite-plane-move.html

  * igt@kms_psr@psr2-cursor-plane-onoff:
    - shard-tglu:         NOTRUN -> [SKIP][278] ([i915#9732]) +6 other tests skip
   [278]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_psr@psr2-cursor-plane-onoff.html

  * igt@kms_psr@psr2-sprite-mmap-gtt:
    - shard-tglu-1:       NOTRUN -> [SKIP][279] ([i915#9732]) +9 other tests skip
   [279]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_psr@psr2-sprite-mmap-gtt.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-rkl:          NOTRUN -> [SKIP][280] ([i915#9685]) +1 other test skip
   [280]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
    - shard-dg1:          NOTRUN -> [SKIP][281] ([i915#9685])
   [281]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-dg2:          NOTRUN -> [SKIP][282] ([i915#12755] / [i915#5190])
   [282]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0:
    - shard-tglu:         NOTRUN -> [SKIP][283] ([i915#5289])
   [283]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@sprite-rotation-90:
    - shard-dg2:          NOTRUN -> [SKIP][284] ([i915#12755])
   [284]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_rotation_crc@sprite-rotation-90.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-tglu-1:       NOTRUN -> [SKIP][285] ([i915#3555]) +5 other tests skip
   [285]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-rkl:          NOTRUN -> [SKIP][286] ([i915#8623])
   [286]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-1:
    - shard-rkl:          NOTRUN -> [DMESG-FAIL][287] ([i915#12964])
   [287]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-7/igt@kms_vblank@ts-continuation-suspend@pipe-a-hdmi-a-1.html

  * igt@kms_vrr@lobf:
    - shard-rkl:          NOTRUN -> [SKIP][288] ([i915#11920])
   [288]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-6/igt@kms_vrr@lobf.html
    - shard-dg1:          NOTRUN -> [SKIP][289] ([i915#11920])
   [289]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_vrr@lobf.html

  * igt@kms_vrr@max-min:
    - shard-rkl:          NOTRUN -> [SKIP][290] ([i915#9906])
   [290]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@kms_vrr@max-min.html

  * igt@kms_vrr@negative-basic:
    - shard-rkl:          NOTRUN -> [SKIP][291] ([i915#3555] / [i915#9906])
   [291]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-1/igt@kms_vrr@negative-basic.html

  * igt@kms_vrr@seamless-rr-switch-drrs:
    - shard-dg2:          NOTRUN -> [SKIP][292] ([i915#9906])
   [292]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@kms_vrr@seamless-rr-switch-drrs.html

  * igt@kms_vrr@seamless-rr-switch-vrr:
    - shard-dg1:          NOTRUN -> [SKIP][293] ([i915#9906])
   [293]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_vrr@seamless-rr-switch-vrr.html

  * igt@kms_writeback@writeback-check-output-xrgb2101010:
    - shard-tglu-1:       NOTRUN -> [SKIP][294] ([i915#2437] / [i915#9412])
   [294]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@kms_writeback@writeback-check-output-xrgb2101010.html

  * igt@kms_writeback@writeback-fb-id:
    - shard-rkl:          NOTRUN -> [SKIP][295] ([i915#2437])
   [295]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@kms_writeback@writeback-fb-id.html

  * igt@kms_writeback@writeback-fb-id-xrgb2101010:
    - shard-dg2:          NOTRUN -> [SKIP][296] ([i915#2437] / [i915#9412])
   [296]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@kms_writeback@writeback-fb-id-xrgb2101010.html

  * igt@kms_writeback@writeback-pixel-formats:
    - shard-tglu:         NOTRUN -> [SKIP][297] ([i915#2437] / [i915#9412])
   [297]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-4/igt@kms_writeback@writeback-pixel-formats.html

  * igt@perf_pmu@rc6@other-idle-gt0:
    - shard-dg2:          NOTRUN -> [SKIP][298] ([i915#8516])
   [298]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-3/igt@perf_pmu@rc6@other-idle-gt0.html
    - shard-dg1:          NOTRUN -> [SKIP][299] ([i915#8516])
   [299]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-18/igt@perf_pmu@rc6@other-idle-gt0.html

  * igt@prime_vgem@basic-fence-flip:
    - shard-dg1:          NOTRUN -> [SKIP][300] ([i915#3708]) +1 other test skip
   [300]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@prime_vgem@basic-fence-flip.html

  * igt@prime_vgem@basic-fence-read:
    - shard-rkl:          NOTRUN -> [SKIP][301] ([i915#3291] / [i915#3708])
   [301]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@prime_vgem@basic-fence-read.html

  * igt@prime_vgem@fence-write-hang:
    - shard-rkl:          NOTRUN -> [SKIP][302] ([i915#3708])
   [302]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-3/igt@prime_vgem@fence-write-hang.html

  * igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-all:
    - shard-tglu-1:       NOTRUN -> [FAIL][303] ([i915#12910]) +9 other tests fail
   [303]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-1/igt@sriov_basic@enable-vfs-autoprobe-off@numvfs-all.html

  * igt@sriov_basic@enable-vfs-autoprobe-on:
    - shard-rkl:          NOTRUN -> [SKIP][304] ([i915#9917]) +1 other test skip
   [304]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-2/igt@sriov_basic@enable-vfs-autoprobe-on.html

  * igt@sriov_basic@enable-vfs-bind-unbind-each:
    - shard-dg2:          NOTRUN -> [SKIP][305] ([i915#9917])
   [305]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-4/igt@sriov_basic@enable-vfs-bind-unbind-each.html

  * igt@tools_test@sysfs_l3_parity:
    - shard-rkl:          NOTRUN -> [SKIP][306] +31 other tests skip
   [306]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@tools_test@sysfs_l3_parity.html

  
#### Possible fixes ####

  * igt@gem_create@create-ext-cpu-access-big:
    - shard-dg2:          [ABORT][307] ([i915#13427]) -> [PASS][308]
   [307]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-1/igt@gem_create@create-ext-cpu-access-big.html
   [308]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-1/igt@gem_create@create-ext-cpu-access-big.html

  * igt@gem_eio@in-flight-external:
    - shard-mtlp:         [ABORT][309] -> [PASS][310]
   [309]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-mtlp-4/igt@gem_eio@in-flight-external.html
   [310]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-4/igt@gem_eio@in-flight-external.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-180:
    - shard-mtlp:         [FAIL][311] ([i915#5138]) -> [PASS][312]
   [311]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-mtlp-3/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html
   [312]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-3/igt@kms_big_fb@4-tiled-64bpp-rotate-180.html

  * igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1:
    - shard-glk:          [INCOMPLETE][313] ([i915#12796]) -> [PASS][314]
   [313]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-glk9/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html
   [314]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk7/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
    - shard-mtlp:         [FAIL][315] ([i915#2346]) -> [PASS][316]
   [315]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-mtlp-3/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
   [316]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-3/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html

  * igt@kms_dither@fb-8bpc-vs-panel-8bpc:
    - shard-dg2:          [SKIP][317] ([i915#3555]) -> [PASS][318]
   [317]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-5/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html
   [318]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-10/igt@kms_dither@fb-8bpc-vs-panel-8bpc.html

  * igt@kms_flip@2x-blocking-wf_vblank@ab-vga1-hdmi-a1:
    - shard-snb:          [FAIL][319] ([i915#11989]) -> [PASS][320] +1 other test pass
   [319]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-snb5/igt@kms_flip@2x-blocking-wf_vblank@ab-vga1-hdmi-a1.html
   [320]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb2/igt@kms_flip@2x-blocking-wf_vblank@ab-vga1-hdmi-a1.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1:
    - shard-tglu:         [FAIL][321] ([i915#11989]) -> [PASS][322] +2 other tests pass
   [321]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-tglu-7/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html
   [322]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-6/igt@kms_flip@plain-flip-ts-check-interruptible@b-hdmi-a1.html

  * igt@kms_hdr@bpc-switch:
    - shard-dg2:          [SKIP][323] ([i915#3555] / [i915#8228]) -> [PASS][324]
   [323]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-5/igt@kms_hdr@bpc-switch.html
   [324]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-10/igt@kms_hdr@bpc-switch.html

  * igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling:
    - shard-dg1:          [DMESG-WARN][325] ([i915#4423]) -> [PASS][326]
   [325]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-17/igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling.html
   [326]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-12/igt@kms_plane_scaling@planes-downscale-factor-0-75-unity-scaling.html

  * igt@kms_pm_dc@dc9-dpms:
    - shard-tglu:         [SKIP][327] ([i915#4281]) -> [PASS][328]
   [327]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-tglu-9/igt@kms_pm_dc@dc9-dpms.html
   [328]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-tglu-6/igt@kms_pm_dc@dc9-dpms.html

  * igt@kms_pm_rpm@modeset-lpsp:
    - shard-dg2:          [SKIP][329] ([i915#9519]) -> [PASS][330]
   [329]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-10/igt@kms_pm_rpm@modeset-lpsp.html
   [330]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-8/igt@kms_pm_rpm@modeset-lpsp.html

  * igt@perf_pmu@module-unload:
    - shard-glk:          [ABORT][331] -> [PASS][332]
   [331]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-glk7/igt@perf_pmu@module-unload.html
   [332]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk8/igt@perf_pmu@module-unload.html

  * igt@testdisplay:
    - shard-rkl:          [DMESG-WARN][333] ([i915#12964]) -> [PASS][334] +8 other tests pass
   [333]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-rkl-4/igt@testdisplay.html
   [334]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-rkl-4/igt@testdisplay.html

  
#### Warnings ####

  * igt@i915_module_load@reload-with-fault-injection:
    - shard-mtlp:         [DMESG-WARN][335] ([i915#13475]) -> [ABORT][336] ([i915#10131] / [i915#10887] / [i915#9820])
   [335]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-mtlp-8/igt@i915_module_load@reload-with-fault-injection.html
   [336]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-mtlp-1/igt@i915_module_load@reload-with-fault-injection.html

  * igt@i915_selftest@mock:
    - shard-glk:          [DMESG-WARN][337] ([i915#1982] / [i915#9311]) -> [DMESG-WARN][338] ([i915#9311])
   [337]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-glk9/igt@i915_selftest@mock.html
   [338]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk4/igt@i915_selftest@mock.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-dg1:          [SKIP][339] ([i915#4423] / [i915#4538] / [i915#5286]) -> [SKIP][340] ([i915#4538] / [i915#5286])
   [339]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-13/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
   [340]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-17/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip:
    - shard-dg1:          [SKIP][341] ([i915#4538]) -> [SKIP][342] ([i915#4423] / [i915#4538])
   [341]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-18/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html
   [342]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-async-flip.html

  * igt@kms_content_protection@atomic-dpms:
    - shard-snb:          [INCOMPLETE][343] ([i915#8816]) -> [SKIP][344]
   [343]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-snb5/igt@kms_content_protection@atomic-dpms.html
   [344]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb2/igt@kms_content_protection@atomic-dpms.html

  * igt@kms_content_protection@mei-interface:
    - shard-dg1:          [SKIP][345] ([i915#9433]) -> [SKIP][346] ([i915#9424])
   [345]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-13/igt@kms_content_protection@mei-interface.html
   [346]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-17/igt@kms_content_protection@mei-interface.html

  * igt@kms_flip@2x-flip-vs-suspend-interruptible:
    - shard-glk:          [INCOMPLETE][347] ([i915#12314] / [i915#12745] / [i915#4839]) -> [INCOMPLETE][348] ([i915#12745] / [i915#4839])
   [347]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-glk8/igt@kms_flip@2x-flip-vs-suspend-interruptible.html
   [348]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-glk9/igt@kms_flip@2x-flip-vs-suspend-interruptible.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank:
    - shard-snb:          [INCOMPLETE][349] ([i915#12314]) -> [FAIL][350] ([i915#11989])
   [349]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-snb1/igt@kms_flip@flip-vs-blocking-wf-vblank.html
   [350]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb5/igt@kms_flip@flip-vs-blocking-wf-vblank.html

  * igt@kms_flip@flip-vs-blocking-wf-vblank@b-vga1:
    - shard-snb:          [INCOMPLETE][351] -> [FAIL][352] ([i915#11989])
   [351]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-snb1/igt@kms_flip@flip-vs-blocking-wf-vblank@b-vga1.html
   [352]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-snb5/igt@kms_flip@flip-vs-blocking-wf-vblank@b-vga1.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu:
    - shard-dg2:          [SKIP][353] ([i915#10433] / [i915#3458]) -> [SKIP][354] ([i915#3458]) +1 other test skip
   [353]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg2-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html
   [354]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg2-8/igt@kms_frontbuffer_tracking@fbcpsr-1p-offscren-pri-shrfb-draw-mmap-cpu.html

  * igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt:
    - shard-dg1:          [SKIP][355] -> [SKIP][356] ([i915#4423])
   [355]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-18/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html
   [356]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-13/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-dg1:          [SKIP][357] ([i915#1187] / [i915#12713]) -> [SKIP][358] ([i915#12713])
   [357]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_15970/shard-dg1-13/igt@kms_hdr@brightness-with-hdr.html
   [358]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/shard-dg1-17/igt@kms_hdr@brightness-with-hdr.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10055]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10055
  [i915#10131]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10131
  [i915#10307]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10307
  [i915#10433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10433
  [i915#10434]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10434
  [i915#10656]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10656
  [i915#1072]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1072
  [i915#10887]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10887
  [i915#1099]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1099
  [i915#10991]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/10991
  [i915#11151]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11151
  [i915#11441]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11441
  [i915#11520]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11520
  [i915#11527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11527
  [i915#11616]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11616
  [i915#11681]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11681
  [i915#11823]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11823
  [i915#1187]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1187
  [i915#11920]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11920
  [i915#11965]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11965
  [i915#11989]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11989
  [i915#12247]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12247
  [i915#12313]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12313
  [i915#12314]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12314
  [i915#12316]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12316
  [i915#12339]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12339
  [i915#12343]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12343
  [i915#12388]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12388
  [i915#12392]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12392
  [i915#12394]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12394
  [i915#12402]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12402
  [i915#1257]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1257
  [i915#12713]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12713
  [i915#12745]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12745
  [i915#12755]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12755
  [i915#12796]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12796
  [i915#12805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12805
  [i915#12910]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12910
  [i915#12917]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12917
  [i915#12964]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12964
  [i915#12967]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/12967
  [i915#13046]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13046
  [i915#13049]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13049
  [i915#13263]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13263
  [i915#13304]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13304
  [i915#13320]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13320
  [i915#13427]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13427
  [i915#13449]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13449
  [i915#13475]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13475
  [i915#13522]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/13522
  [i915#1769]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1769
  [i915#1825]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1839
  [i915#1982]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/1982
  [i915#2065]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2065
  [i915#2346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2346
  [i915#2436]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2436
  [i915#2437]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2527
  [i915#2587]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2587
  [i915#2658]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2658
  [i915#2672]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2672
  [i915#280]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/280
  [i915#2856]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2856
  [i915#3023]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3023
  [i915#3281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3281
  [i915#3282]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3282
  [i915#3291]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3291
  [i915#3297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3299
  [i915#3323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3323
  [i915#3361]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3361
  [i915#3458]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3458
  [i915#3469]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3469
  [i915#3539]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3539
  [i915#3555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3555
  [i915#3637]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3637
  [i915#3638]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3638
  [i915#3708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804
  [i915#3840]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3840
  [i915#3936]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3936
  [i915#4077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4077
  [i915#4079]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4079
  [i915#4083]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4083
  [i915#4103]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4103
  [i915#4212]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4212
  [i915#4213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4213
  [i915#4215]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4215
  [i915#4270]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4270
  [i915#4281]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4281
  [i915#4348]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4348
  [i915#4387]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4387
  [i915#4423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4423
  [i915#4525]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4525
  [i915#4537]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4537
  [i915#4538]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4538
  [i915#4613]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4613
  [i915#4771]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4771
  [i915#4812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4812
  [i915#4816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4816
  [i915#4839]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4839
  [i915#4852]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4852
  [i915#4854]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4854
  [i915#4860]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4860
  [i915#4880]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4880
  [i915#4885]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/4885
  [i915#5138]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5138
  [i915#5190]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5190
  [i915#5274]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5274
  [i915#5286]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5286
  [i915#5289]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5289
  [i915#5354]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5354
  [i915#5439]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5439
  [i915#5493]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5493
  [i915#5882]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/5882
  [i915#6095]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6095
  [i915#6228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6228
  [i915#6230]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6230
  [i915#6301]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6301
  [i915#6334]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6334
  [i915#6524]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6524
  [i915#6621]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6621
  [i915#6805]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6805
  [i915#6944]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6944
  [i915#6953]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6953
  [i915#7116]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7116
  [i915#7118]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7118
  [i915#7213]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7213
  [i915#7276]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7276
  [i915#7297]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7297
  [i915#7443]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7443
  [i915#7582]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7582
  [i915#7697]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7697
  [i915#7828]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/7828
  [i915#8228]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8228
  [i915#8346]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8346
  [i915#8381]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8381
  [i915#8399]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8399
  [i915#8411]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8411
  [i915#8414]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8414
  [i915#8428]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8428
  [i915#8516]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8516
  [i915#8555]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8555
  [i915#8562]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8562
  [i915#8623]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8623
  [i915#8708]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8708
  [i915#8709]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8709
  [i915#8812]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8812
  [i915#8813]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8813
  [i915#8814]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8814
  [i915#8816]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8816
  [i915#8821]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/8821
  [i915#9053]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9053
  [i915#9067]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9067
  [i915#9311]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9311
  [i915#9318]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9318
  [i915#9323]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9323
  [i915#9412]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9412
  [i915#9423]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9423
  [i915#9424]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9424
  [i915#9433]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9433
  [i915#9519]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9519
  [i915#9531]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9531
  [i915#9683]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/9683
  [i915#9685]: https://gitlab.freedesktop.org/drm/i915/kernel

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_143627v1/index.html

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