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From: "Nautiyal, Ankit K" <ankit.k.nautiyal@intel.com>
To: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>,
	<intel-gfx@lists.freedesktop.org>
Cc: <dri-devel@lists.freedesktop.org>, <jani.nikula@intel.com>
Subject: Re: [PATCH v11 6/8] drm/i915/display: Compute Adaptive sync SDP params
Date: Mon, 3 Jun 2024 18:18:47 +0530	[thread overview]
Message-ID: <dc7604b7-5068-4055-9c60-927a5e932a4f@intel.com> (raw)
In-Reply-To: <20240603054904.222589-7-mitulkumar.ajitkumar.golani@intel.com>


On 6/3/2024 11:19 AM, Mitul Golani wrote:
> Compute params for Adaptive Sync SDP when Fixed Average Vtotal
> mode is enabled.
>
> --v2:
> Since vrr.enable is set in case of cmrr also, handle accordingly(Ankit).
>
> --v3:
> - Since vrr.enable is set in case of cmrr also, handle
> accordingly(Ankit).
> - check cmrr.enable when CMRR flags are set during intel_dp_compute_as_sdp.
>
> Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
> ---
>   drivers/gpu/drm/i915/display/intel_dp.c | 15 ++++++++++++---
>   1 file changed, 12 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index ac81b172b1ec..be3b9ba943a5 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -2637,11 +2637,20 @@ static void intel_dp_compute_as_sdp(struct intel_dp *intel_dp,
>   	/* Currently only DP_AS_SDP_AVT_FIXED_VTOTAL mode supported */
>   	as_sdp->sdp_type = DP_SDP_ADAPTIVE_SYNC;
>   	as_sdp->length = 0x9;
> -	as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL;
> -	as_sdp->vtotal = adjusted_mode->vtotal;
> -	as_sdp->target_rr = 0;
>   	as_sdp->duration_incr_ms = 0;
>   	as_sdp->duration_incr_ms = 0;
> +
> +	if (crtc_state->cmrr.enable) {
> +		as_sdp->mode = DP_AS_SDP_FAVT_TRR_REACHED;
> +		as_sdp->vtotal = adjusted_mode->vtotal;
> +		as_sdp->target_rr = DIV_ROUND_UP(adjusted_mode->clock * 1000,
> +						 adjusted_mode->htotal * adjusted_mode->vtotal);

Perhpas drm_mode_vrefresh() here.

With that change, this is:

Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>


> +		as_sdp->target_rr_divider = true;
> +	} else {
> +		as_sdp->mode = DP_AS_SDP_AVT_FIXED_VTOTAL;
> +		as_sdp->vtotal = adjusted_mode->vtotal;
> +		as_sdp->target_rr = 0;
> +	}
>   }
>   
>   static void intel_dp_compute_vsc_sdp(struct intel_dp *intel_dp,

  reply	other threads:[~2024-06-03 12:49 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-03  5:48 [PATCH v11 0/8] Implement CMRR Support Mitul Golani
2024-06-03  5:48 ` [PATCH v11 1/8] drm/i915: Separate VRR related register definitions Mitul Golani
2024-06-04  5:54   ` Nautiyal, Ankit K
2024-06-03  5:48 ` [PATCH v11 2/8] drm/i915: Define and compute Transcoder CMRR registers Mitul Golani
2024-06-04  6:28   ` Nautiyal, Ankit K
2024-06-03  5:48 ` [PATCH v11 3/8] drm/i915: Update trans_vrr_ctl flag when cmrr is computed Mitul Golani
2024-06-03  5:49 ` [PATCH v11 4/8] drm/dp: Add refresh rate divider to struct representing AS SDP Mitul Golani
2024-06-03  5:49 ` [PATCH v11 5/8] drm/i915/display: Add support for pack and unpack Mitul Golani
2024-06-03  5:49 ` [PATCH v11 6/8] drm/i915/display: Compute Adaptive sync SDP params Mitul Golani
2024-06-03 12:48   ` Nautiyal, Ankit K [this message]
2024-06-03  5:49 ` [PATCH v11 7/8] drm/i915/display: Compute vrr vsync params Mitul Golani
2024-06-03  5:49 ` [PATCH v11 8/8] drm/i915: Compute CMRR and calculate vtotal Mitul Golani
2024-06-03  6:38 ` ✗ Fi.CI.CHECKPATCH: warning for Implement CMRR Support (rev11) Patchwork
2024-06-03  6:38 ` ✗ Fi.CI.SPARSE: " Patchwork
2024-06-03  6:46 ` ✓ Fi.CI.BAT: success " Patchwork
2024-06-03  8:43 ` ✗ Fi.CI.IGT: failure " Patchwork

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