From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/6] drm/i915/uncore: Drop gen11 mmio read handlers
Date: Fri, 10 Sep 2021 13:54:08 +0100 [thread overview]
Message-ID: <dea9503f-cca0-5811-9140-c93ae908ebbd@linux.intel.com> (raw)
In-Reply-To: <20210910053317.3379249-6-matthew.d.roper@intel.com>
On 10/09/2021 06:33, Matt Roper wrote:
> Consolidate down to just a single 'fwtable' implementation. For reads
> we don't need to worry about shadow tables. Also, the
> NEEDS_FORCE_WAKE() check we previously had in the fwtable implementation
> can be dropped --- if a register is outside that range on one of the old
> platforms, then it won't belong to any forcewake range and 0 will be
> returned anyway.
>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/intel_uncore.c | 45 +++++++++++------------------
> 1 file changed, 17 insertions(+), 28 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index c181e74fbf43..95398cb69722 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -935,14 +935,6 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = {
> };
>
> #define __fwtable_reg_read_fw_domains(uncore, offset) \
> -({ \
> - enum forcewake_domains __fwd = 0; \
> - if (NEEDS_FORCE_WAKE((offset))) \
> - __fwd = find_fw_domain(uncore, offset); \
> - __fwd; \
> -})
> -
> -#define __gen11_fwtable_reg_read_fw_domains(uncore, offset) \
> find_fw_domain(uncore, offset)
Looks like you can drop this macro and just call find_fw_domain or you
think there is value to keep it?
Regards,
Tvrtko
>
> /* *Must* be sorted by offset! See intel_shadow_table_check(). */
> @@ -1577,33 +1569,30 @@ static inline void __force_wake_auto(struct intel_uncore *uncore,
> ___force_wake_auto(uncore, fw_domains);
> }
>
> -#define __gen_read(func, x) \
> +#define __gen_fwtable_read(x) \
> static u##x \
> -func##_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
> +fwtable_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) \
> +{ \
> enum forcewake_domains fw_engine; \
> GEN6_READ_HEADER(x); \
> - fw_engine = __##func##_reg_read_fw_domains(uncore, offset); \
> + fw_engine = __fwtable_reg_read_fw_domains(uncore, offset); \
> if (fw_engine) \
> __force_wake_auto(uncore, fw_engine); \
> val = __raw_uncore_read##x(uncore, reg); \
> GEN6_READ_FOOTER; \
> }
>
> -#define __gen_reg_read_funcs(func) \
> -static enum forcewake_domains \
> -func##_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
> - return __##func##_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
> -} \
> -\
> -__gen_read(func, 8) \
> -__gen_read(func, 16) \
> -__gen_read(func, 32) \
> -__gen_read(func, 64)
> +static enum forcewake_domains
> +fwtable_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) {
> + return __fwtable_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg));
> +}
>
> -__gen_reg_read_funcs(gen11_fwtable);
> -__gen_reg_read_funcs(fwtable);
> +__gen_fwtable_read(8)
> +__gen_fwtable_read(16)
> +__gen_fwtable_read(32)
> +__gen_fwtable_read(64)
>
> -#undef __gen_reg_read_funcs
> +#undef __gen_fwtable_read
> #undef GEN6_READ_FOOTER
> #undef GEN6_READ_HEADER
>
> @@ -2069,22 +2058,22 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
> ASSIGN_FW_DOMAINS_TABLE(uncore, __dg2_fw_ranges);
> ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
> ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> - ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> + ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
> } else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
> ASSIGN_FW_DOMAINS_TABLE(uncore, __xehp_fw_ranges);
> ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
> ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> - ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> + ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
> } else if (GRAPHICS_VER(i915) >= 12) {
> ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges);
> ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
> ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> - ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> + ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
> } else if (GRAPHICS_VER(i915) == 11) {
> ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges);
> ASSIGN_SHADOW_TABLE(uncore, gen11_shadowed_regs);
> ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> - ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> + ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
> } else if (IS_GRAPHICS_VER(i915, 9, 10)) {
> ASSIGN_FW_DOMAINS_TABLE(uncore, __gen9_fw_ranges);
> ASSIGN_SHADOW_TABLE(uncore, gen8_shadowed_regs);
>
next prev parent reply other threads:[~2021-09-10 12:54 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-09-10 5:33 [Intel-gfx] [PATCH 0/6] i915: Simplify mmio handling & add new DG2 shadow table Matt Roper
2021-09-10 5:33 ` [Intel-gfx] [PATCH 1/6] drm/i915/uncore: Convert gen6/gen7 read operations to fwtable Matt Roper
2021-09-10 12:55 ` Tvrtko Ursulin
2021-09-10 5:33 ` [Intel-gfx] [PATCH 2/6] drm/i915/uncore: Associate shadow table with uncore Matt Roper
2021-09-10 5:33 ` [Intel-gfx] [PATCH 3/6] drm/i915/uncore: Replace gen8 write functions with general fwtable Matt Roper
2021-09-10 5:33 ` [Intel-gfx] [PATCH 4/6] drm/i915/uncore: Drop gen11/gen12 mmio write handlers Matt Roper
2021-09-10 5:33 ` [Intel-gfx] [PATCH 5/6] drm/i915/uncore: Drop gen11 mmio read handlers Matt Roper
2021-09-10 12:54 ` Tvrtko Ursulin [this message]
2021-09-10 5:33 ` [Intel-gfx] [PATCH 6/6] drm/i915/dg2: Add DG2-specific shadow register table Matt Roper
2021-09-10 5:53 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Simplify mmio handling & add new DG2 shadow table Patchwork
2021-09-10 5:55 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-10 6:22 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-10 7:41 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-10 13:03 ` [Intel-gfx] [PATCH 0/6] " Tvrtko Ursulin
2021-09-10 14:24 ` Matt Roper
2021-09-10 15:03 ` Tvrtko Ursulin
2021-09-10 15:07 ` Matt Roper
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