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* [PATCH] drm/i915: flush overlay regfile writes
@ 2011-11-29 17:32 Daniel Vetter
  2011-11-29 18:06 ` Chris Wilson
  0 siblings, 1 reply; 2+ messages in thread
From: Daniel Vetter @ 2011-11-29 17:32 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

Better be paranoid. The wmb should flush the wc writes, and
the chipset_flush hopefully flushes any mch buffers. There've been a
few overlay hangs I've never really diagnosed, unfortunately all the
reporters disappeared.

Maybe-related: https://bugs.freedesktop.org/show_bug.cgi?id=33309
Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_overlay.c |    3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index cdf17d4..f75e892 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -209,6 +209,9 @@ static void intel_overlay_unmap_regs(struct intel_overlay *overlay,
 {
 	if (!OVERLAY_NEEDS_PHYSICAL(overlay->dev))
 		io_mapping_unmap(regs);
+
+	wmb();
+	intel_gtt_chipset_flush();
 }
 
 static int intel_overlay_do_wait_request(struct intel_overlay *overlay,
-- 
1.7.7.3

^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] drm/i915: flush overlay regfile writes
  2011-11-29 17:32 [PATCH] drm/i915: flush overlay regfile writes Daniel Vetter
@ 2011-11-29 18:06 ` Chris Wilson
  0 siblings, 0 replies; 2+ messages in thread
From: Chris Wilson @ 2011-11-29 18:06 UTC (permalink / raw)
  To: intel-gfx; +Cc: Daniel Vetter

On Tue, 29 Nov 2011 18:32:18 +0100, Daniel Vetter <daniel.vetter@ffwll.ch> wrote:
> Better be paranoid. The wmb should flush the wc writes, and
> the chipset_flush hopefully flushes any mch buffers. There've been a
> few overlay hangs I've never really diagnosed, unfortunately all the
> reporters disappeared.

One of the worries I've had in the past has been whether we need a wmb()
inside intel_ring_begin() so that all the register writes (assuming we
get WC registers one day) and the WC gtt writes are coherent with
initiating work on the GPU. I attacked
i915_gem_object_flush_gtt_write_domain() instead in the belief that
would be sufficient. I think this demonstrates I was wrong. However, you
could argue that the overlay code is circumventing the cache domain
tracking of gem objects established for this very purpose. Though
calling i915_gem_object_set_to_gtt_domain(obj,true) in map and
i915_gem_object_flush_gtt_write_domain() in unmap might be overkill...
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre

^ permalink raw reply	[flat|nested] 2+ messages in thread

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