Re: [Intel-gfx] [PATCH v3 1/6] drm/panelreplay: dpcd register definition for panelreplay

["Hogander, Jouni" <jouni.hogander@intel.com>]

On Fri, 2023-07-28 at 18:16 +0530, Animesh Manna wrote:
> DPCD register definition added to check and enable panel replay
> capability of the sink.

I think this patch shoud go to dri-devel@lists.freedesktop.org as well.

BR,

Jouni Högander

> 
> Cc: Jouni Högander <jouni.hogander@intel.com>
> Signed-off-by: Animesh Manna <animesh.manna@intel.com>
> ---
>  include/drm/display/drm_dp.h | 11 +++++++++++
>  1 file changed, 11 insertions(+)
> 
> diff --git a/include/drm/display/drm_dp.h
> b/include/drm/display/drm_dp.h
> index 02f2ac4dd2df..c48696266d23 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -543,6 +543,10 @@
>  /* DFP Capability Extension */
>  #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT    0x0a3   /* 2.0 */
>  
> +#define DP_PANEL_REPLAY_CAP                 0x0b0
> +# define DP_PANEL_REPLAY_SUPPORT            (1 << 0)
> +# define DP_PR_SELECTIVE_UPDATE_SUPPORT     (1 << 1)
> +
>  /* Link Configuration */
>  #define        DP_LINK_BW_SET                      0x100
>  # define DP_LINK_RATE_TABLE                0x00    /* eDP 1.4 */
> @@ -716,6 +720,13 @@
>  #define DP_BRANCH_DEVICE_CTRL              0x1a1
>  # define DP_BRANCH_DEVICE_IRQ_HPD          (1 << 0)
>  
> +#define PANEL_REPLAY_CONFIG                 0x1b0
> +# define DP_PANEL_REPLAY_ENABLE             (1 << 0)
> +# define DP_PR_UNRECOVERABLE_ERROR          (1 << 3)
> +# define DP_PR_RFB_STORAGE_ERROR            (1 << 4)
> +# define DP_PR_ACTIVE_FRAME_CRC_ERROR       (1 << 5)
> +# define DP_PR_SELECTIVE_UPDATE_ENABLE      (1 << 6)
> +
>  #define DP_PAYLOAD_ALLOCATE_SET                    0x1c0
>  #define DP_PAYLOAD_ALLOCATE_START_TIME_SLOT 0x1c1
>  #define DP_PAYLOAD_ALLOCATE_TIME_SLOT_COUNT 0x1c2