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From: kernel test robot <lkp@intel.com>
To: Animesh Manna <animesh.manna@intel.com>, intel-gfx@lists.freedesktop.org
Cc: llvm@lists.linux.dev, oe-kbuild-all@lists.linux.dev
Subject: Re: [Intel-gfx] [PATCH v3 4/6] drm/i915/panelreplay: Initializaton and compute config for panel replay
Date: Fri, 28 Jul 2023 23:51:20 +0800	[thread overview]
Message-ID: <202307282318.EVEl6EsL-lkp@intel.com> (raw)
In-Reply-To: <20230728124609.2911830-5-animesh.manna@intel.com>

Hi Animesh,

kernel test robot noticed the following build warnings:

[auto build test WARNING on drm-tip/drm-tip]

url:    https://github.com/intel-lab-lkp/linux/commits/Animesh-Manna/drm-panelreplay-dpcd-register-definition-for-panelreplay/20230728-205902
base:   git://anongit.freedesktop.org/drm/drm-tip drm-tip
patch link:    https://lore.kernel.org/r/20230728124609.2911830-5-animesh.manna%40intel.com
patch subject: [Intel-gfx] [PATCH v3 4/6] drm/i915/panelreplay: Initializaton and compute config for panel replay
config: x86_64-randconfig-x001-20230728 (https://download.01.org/0day-ci/archive/20230728/202307282318.EVEl6EsL-lkp@intel.com/config)
compiler: clang version 16.0.4 (https://github.com/llvm/llvm-project.git ae42196bc493ffe877a7e3dff8be32035dea4d07)
reproduce: (https://download.01.org/0day-ci/archive/20230728/202307282318.EVEl6EsL-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202307282318.EVEl6EsL-lkp@intel.com/

All warnings (new ones prefixed by >>):

>> drivers/gpu/drm/i915/display/intel_dp.c:3386:27: warning: overlapping comparisons always evaluate to true [-Wtautological-overlap-compare]
           if (vsc->revision != 0x5 || vsc->revision != 0x7)
               ~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~
   1 warning generated.


vim +3386 drivers/gpu/drm/i915/display/intel_dp.c

  3361	
  3362	static ssize_t intel_dp_vsc_sdp_pack(const struct drm_dp_vsc_sdp *vsc,
  3363					     struct dp_sdp *sdp, size_t size)
  3364	{
  3365		size_t length = sizeof(struct dp_sdp);
  3366	
  3367		if (size < length)
  3368			return -ENOSPC;
  3369	
  3370		memset(sdp, 0, size);
  3371	
  3372		/*
  3373		 * Prepare VSC Header for SU as per DP 1.4a spec, Table 2-119
  3374		 * VSC SDP Header Bytes
  3375		 */
  3376		sdp->sdp_header.HB0 = 0; /* Secondary-Data Packet ID = 0 */
  3377		sdp->sdp_header.HB1 = vsc->sdp_type; /* Secondary-data Packet Type */
  3378		sdp->sdp_header.HB2 = vsc->revision; /* Revision Number */
  3379		sdp->sdp_header.HB3 = vsc->length; /* Number of Valid Data Bytes */
  3380	
  3381		/*
  3382		 * Other than revision 0x5 which supports Pixel Encoding/Colorimetry
  3383		 * Format as per DP 1.4a spec, revision 0x7 also supports Pixel
  3384		 * Encoding/Colorimetry Format as per DP 2.0 spec.
  3385		 */
> 3386		if (vsc->revision != 0x5 || vsc->revision != 0x7)
  3387			goto out;
  3388	
  3389		/* VSC SDP Payload for DB16 through DB18 */
  3390		/* Pixel Encoding and Colorimetry Formats  */
  3391		sdp->db[16] = (vsc->pixelformat & 0xf) << 4; /* DB16[7:4] */
  3392		sdp->db[16] |= vsc->colorimetry & 0xf; /* DB16[3:0] */
  3393	
  3394		switch (vsc->bpc) {
  3395		case 6:
  3396			/* 6bpc: 0x0 */
  3397			break;
  3398		case 8:
  3399			sdp->db[17] = 0x1; /* DB17[3:0] */
  3400			break;
  3401		case 10:
  3402			sdp->db[17] = 0x2;
  3403			break;
  3404		case 12:
  3405			sdp->db[17] = 0x3;
  3406			break;
  3407		case 16:
  3408			sdp->db[17] = 0x4;
  3409			break;
  3410		default:
  3411			MISSING_CASE(vsc->bpc);
  3412			break;
  3413		}
  3414		/* Dynamic Range and Component Bit Depth */
  3415		if (vsc->dynamic_range == DP_DYNAMIC_RANGE_CTA)
  3416			sdp->db[17] |= 0x80;  /* DB17[7] */
  3417	
  3418		/* Content Type */
  3419		sdp->db[18] = vsc->content_type & 0x7;
  3420	
  3421	out:
  3422		return length;
  3423	}
  3424	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

  reply	other threads:[~2023-07-28 15:53 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-28 12:46 [Intel-gfx] [PATCH v3 0/6] Panel replay phase1 implementation Animesh Manna
2023-07-28 12:46 ` [Intel-gfx] [PATCH v3 1/6] drm/panelreplay: dpcd register definition for panelreplay Animesh Manna
2023-07-31  6:19   ` Hogander, Jouni
2023-08-01  6:31     ` Manna, Animesh
2023-07-28 12:46 ` [Intel-gfx] [PATCH v3 2/6] drm/i915/panelreplay: Added HAS_PANEL_REPLAY() macro Animesh Manna
2023-07-31  6:26   ` Hogander, Jouni
2023-08-01  6:38     ` Manna, Animesh
2023-07-28 12:46 ` [Intel-gfx] [PATCH v3 3/6] drm/i915/psr: Move psr specific dpcd init into own function Animesh Manna
2023-07-28 12:46 ` [Intel-gfx] [PATCH v3 4/6] drm/i915/panelreplay: Initializaton and compute config for panel replay Animesh Manna
2023-07-28 15:51   ` kernel test robot [this message]
2023-07-31  6:47   ` Hogander, Jouni
2023-08-10 11:02   ` Hogander, Jouni
2023-07-28 12:46 ` [Intel-gfx] [PATCH v3 5/6] drm/i915/panelreplay: Enable panel replay dpcd initialization for DP Animesh Manna
2023-07-28 12:46 ` [Intel-gfx] [PATCH v3 6/6] drm/i915/panelreplay: enable/disable panel replay Animesh Manna
2023-08-10 10:59   ` Hogander, Jouni
2023-07-28 13:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Panel replay phase1 implementation (rev5) Patchwork
2023-07-28 13:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2023-07-28 13:53 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2023-07-28 16:39 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork
2023-07-31  6:13 ` [Intel-gfx] [PATCH v3 0/6] Panel replay phase1 implementation Hogander, Jouni
2023-08-01  6:30   ` Manna, Animesh

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