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From: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org, Chris Wilson <chris@chris-wilson.co.uk>
Subject: Re: [Intel-gfx] [PATCH v2 5/6] drm/i915/uncore: Drop gen11 mmio read handlers
Date: Tue, 21 Sep 2021 15:40:13 +0100	[thread overview]
Message-ID: <e7268aa1-727e-82b6-de7d-50e0827acd07@linux.intel.com> (raw)
In-Reply-To: <20210910201030.3436066-6-matthew.d.roper@intel.com>


On 10/09/2021 21:10, Matt Roper wrote:
> Consolidate down to just a single 'fwtable' implementation.  For reads
> we don't need to worry about shadow tables.  Also, the
> NEEDS_FORCE_WAKE() check we previously had in the fwtable implementation
> can be dropped --- if a register is outside that range on one of the old
> platforms, then it won't belong to any forcewake range and 0 will be
> returned anyway.
> 
> v2:
>   - Restore NEEDS_FORCE_WAKE() check.  (Chris, Tvrtko)

I started liking rewording the commit message when the revision log 
starts contradicting it, but it is just a suggestion.

> 
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>   drivers/gpu/drm/i915/intel_uncore.c | 40 ++++++++++++-----------------
>   1 file changed, 17 insertions(+), 23 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
> index bfb2a6337f9d..10f124297e7c 100644
> --- a/drivers/gpu/drm/i915/intel_uncore.c
> +++ b/drivers/gpu/drm/i915/intel_uncore.c
> @@ -935,9 +935,6 @@ static const struct intel_forcewake_range __vlv_fw_ranges[] = {
>   	__fwd; \
>   })
>   
> -#define __gen11_fwtable_reg_read_fw_domains(uncore, offset) \
> -	find_fw_domain(uncore, offset)
> -
>   /* *Must* be sorted by offset! See intel_shadow_table_check(). */
>   static const struct i915_range gen8_shadowed_regs[] = {
>   	{ .start =  0x2030, .end =  0x2030 },
> @@ -1570,33 +1567,30 @@ static inline void __force_wake_auto(struct intel_uncore *uncore,
>   		___force_wake_auto(uncore, fw_domains);
>   }
>   
> -#define __gen_read(func, x) \
> +#define __gen_fwtable_read(x) \
>   static u##x \
> -func##_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
> +fwtable_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) \
> +{ \
>   	enum forcewake_domains fw_engine; \
>   	GEN6_READ_HEADER(x); \
> -	fw_engine = __##func##_reg_read_fw_domains(uncore, offset); \
> +	fw_engine = __fwtable_reg_read_fw_domains(uncore, offset); \
>   	if (fw_engine) \
>   		__force_wake_auto(uncore, fw_engine); \
>   	val = __raw_uncore_read##x(uncore, reg); \
>   	GEN6_READ_FOOTER; \
>   }
>   
> -#define __gen_reg_read_funcs(func) \
> -static enum forcewake_domains \
> -func##_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) { \
> -	return __##func##_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg)); \
> -} \
> -\
> -__gen_read(func, 8) \
> -__gen_read(func, 16) \
> -__gen_read(func, 32) \
> -__gen_read(func, 64)
> +static enum forcewake_domains
> +fwtable_reg_read_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) {
> +	return __fwtable_reg_read_fw_domains(uncore, i915_mmio_reg_offset(reg));
> +}
>   
> -__gen_reg_read_funcs(gen11_fwtable);
> -__gen_reg_read_funcs(fwtable);
> +__gen_fwtable_read(8)
> +__gen_fwtable_read(16)
> +__gen_fwtable_read(32)
> +__gen_fwtable_read(64)
>   
> -#undef __gen_reg_read_funcs
> +#undef __gen_fwtable_read
>   #undef GEN6_READ_FOOTER
>   #undef GEN6_READ_HEADER
>   
> @@ -2062,22 +2056,22 @@ static int uncore_forcewake_init(struct intel_uncore *uncore)
>   		ASSIGN_FW_DOMAINS_TABLE(uncore, __dg2_fw_ranges);
>   		ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
>   		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> +		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
>   	} else if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) {
>   		ASSIGN_FW_DOMAINS_TABLE(uncore, __xehp_fw_ranges);
>   		ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
>   		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> +		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
>   	} else if (GRAPHICS_VER(i915) >= 12) {
>   		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen12_fw_ranges);
>   		ASSIGN_SHADOW_TABLE(uncore, gen12_shadowed_regs);
>   		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> +		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
>   	} else if (GRAPHICS_VER(i915) == 11) {
>   		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen11_fw_ranges);
>   		ASSIGN_SHADOW_TABLE(uncore, gen11_shadowed_regs);
>   		ASSIGN_WRITE_MMIO_VFUNCS(uncore, fwtable);
> -		ASSIGN_READ_MMIO_VFUNCS(uncore, gen11_fwtable);
> +		ASSIGN_READ_MMIO_VFUNCS(uncore, fwtable);
>   	} else if (IS_GRAPHICS_VER(i915, 9, 10)) {
>   		ASSIGN_FW_DOMAINS_TABLE(uncore, __gen9_fw_ranges);
>   		ASSIGN_SHADOW_TABLE(uncore, gen8_shadowed_regs);
> 

Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>

Regards,

Tvrtko

  reply	other threads:[~2021-09-21 14:40 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-10 20:10 [Intel-gfx] [PATCH v2 0/6] i915: Simplify mmio handling & add new DG2 shadow table Matt Roper
2021-09-10 20:10 ` [Intel-gfx] [PATCH v2 1/6] drm/i915/uncore: Convert gen6/gen7 read operations to fwtable Matt Roper
2021-09-21 13:50   ` Tvrtko Ursulin
2021-09-10 20:10 ` [Intel-gfx] [PATCH v2 2/6] drm/i915/uncore: Associate shadow table with uncore Matt Roper
2021-09-21 13:54   ` Tvrtko Ursulin
2021-09-10 20:10 ` [Intel-gfx] [PATCH v2 3/6] drm/i915/uncore: Replace gen8 write functions with general fwtable Matt Roper
2021-09-21 13:54   ` Tvrtko Ursulin
2021-09-10 20:10 ` [Intel-gfx] [PATCH v2 4/6] drm/i915/uncore: Drop gen11/gen12 mmio write handlers Matt Roper
2021-09-21 14:35   ` Tvrtko Ursulin
2021-09-10 20:10 ` [Intel-gfx] [PATCH v2 5/6] drm/i915/uncore: Drop gen11 mmio read handlers Matt Roper
2021-09-21 14:40   ` Tvrtko Ursulin [this message]
2021-09-21 17:36   ` Lucas De Marchi
2021-09-10 20:10 ` [Intel-gfx] [PATCH v2 6/6] drm/i915/dg2: Add DG2-specific shadow register table Matt Roper
2021-09-21 22:35   ` Lucas De Marchi
2021-09-10 20:25 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Simplify mmio handling & add new DG2 shadow table (rev2) Patchwork
2021-09-10 20:27 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-10 20:56 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2021-09-10 21:09   ` Matt Roper
2021-09-21 22:18     ` Vudum, Lakshminarayana
2021-09-21 16:57 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: Simplify mmio handling & add new DG2 shadow table (rev3) Patchwork
2021-09-21 16:59 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-09-21 17:28 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-09-21 21:32 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2021-09-21 22:05   ` Matt Roper
2021-09-21 22:24     ` Vudum, Lakshminarayana
2021-09-21 22:14 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork
2021-09-22  0:19   ` Matt Roper

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