From: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
To: "José Roberto de Souza" <jose.souza@intel.com>,
intel-gfx@lists.freedesktop.org
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks
Date: Mon, 10 Dec 2018 19:52:00 -0800 [thread overview]
Message-ID: <efb59eb8d23129778aca69caec2420d561da4ffa.camel@intel.com> (raw)
In-Reply-To: <20181204230032.6352-1-jose.souza@intel.com>
On Tue, 2018-12-04 at 15:00 -0800, José Roberto de Souza wrote:
> For now PSR2 is still disabled by default for all platforms but is
> our intention to let debugfs to enable it for debug and tests
> proporses, so intel_psr2_enabled() that is also used by debugfs to
> decide if PSR2 is going to be enabled needs to take in consideration
> the debug field.
>
> Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
> drivers/gpu/drm/i915/intel_psr.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 4c4dd1c310ce..15a2121aa64f 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -71,8 +71,11 @@ static bool psr_global_enabled(u32 debug)
> static bool intel_psr2_enabled(struct drm_i915_private *dev_priv,
> const struct intel_crtc_state
> *crtc_state)
> {
> + const u32 debug_mode = dev_priv->psr.debug &
> I915_PSR_DEBUG_MODE_MASK;
> +
> /* Disable PSR2 by default for all platforms */
> - if (i915_modparams.enable_psr == -1)
> + if (i915_modparams.enable_psr == -1 &&
> + debug_mode != I915_PSR_DEBUG_ENABLE)
> return false;
@@ -71,17 +71,17 @@ static bool psr_global_enabled(u32 debug)
static bool intel_psr2_enabled(struct drm_i915_private *dev_priv,
const struct intel_crtc_state
*crtc_state)
{
- /* Disable PSR2 by default for all platforms */
- if (i915_modparams.enable_psr == -1)
- return false;
-
/* Cannot enable DSC and PSR2 simultaneously */
WARN_ON(crtc_state->dsc_params.compression_enable &&
crtc_state->has_psr2);
switch (dev_priv->psr.debug & I915_PSR_DEBUG_MODE_MASK) {
+ case I915_PSR_DEBUG_DISABLE:
case I915_PSR_DEBUG_FORCE_PSR1:
return false;
+ case I915_PSR_DEBUG_DEFAULT:
+ if (i915_modparams.enable_psr <= 0)
+ return false;
default:
return crtc_state->has_psr2;
}
Does this read any better? Keeping the condition checks together and
also having a consistent priority between debugfs and module parameter
options is easier to follow IMHO.
>
> /* Cannot enable DSC and PSR2 simultaneously */
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next prev parent reply other threads:[~2018-12-11 3:52 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 23:00 [PATCH 1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks José Roberto de Souza
2018-12-04 23:00 ` [PATCH 2/5] drm/i915: Refactor PSR status debugfs José Roberto de Souza
2018-12-11 6:51 ` Dhinakaran Pandiyan
2018-12-11 12:44 ` Souza, Jose
2018-12-11 18:32 ` Dhinakaran Pandiyan
2018-12-11 18:54 ` Souza, Jose
2019-01-02 17:09 ` Souza, Jose
2019-01-02 19:02 ` Dhinakaran Pandiyan
2018-12-04 23:00 ` [PATCH 3/5] drm/i915/psr: Do not print last attempted entry or exit in PSR debugfs while in PSR2 José Roberto de Souza
2018-12-11 7:03 ` Dhinakaran Pandiyan
2018-12-11 14:01 ` Souza, Jose
2018-12-04 23:00 ` [PATCH 4/5] drm/i915: Add PSR2 selective update status registers and bits definitions José Roberto de Souza
2018-12-11 7:51 ` Dhinakaran Pandiyan
2018-12-11 14:20 ` Souza, Jose
2018-12-04 23:00 ` [PATCH 5/5] drm/i915/debugfs: Print PSR selective update status register values José Roberto de Souza
2018-12-11 22:20 ` Dhinakaran Pandiyan
2018-12-13 18:06 ` Souza, Jose
2018-12-04 23:10 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks Patchwork
2018-12-04 23:27 ` ✓ Fi.CI.BAT: success " Patchwork
2018-12-05 11:38 ` ✓ Fi.CI.IGT: " Patchwork
2018-12-11 3:52 ` Dhinakaran Pandiyan [this message]
2018-12-11 12:29 ` [PATCH 1/5] " Souza, Jose
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