From: "Souza, Jose" <jose.souza@intel.com>
To: "intel-gfx@lists.freedesktop.org"
<intel-gfx@lists.freedesktop.org>,
"Pandiyan, Dhinakaran" <dhinakaran.pandiyan@intel.com>
Cc: "Vivi, Rodrigo" <rodrigo.vivi@intel.com>
Subject: Re: [PATCH 3/5] drm/i915/psr: Do not print last attempted entry or exit in PSR debugfs while in PSR2
Date: Tue, 11 Dec 2018 14:01:01 +0000 [thread overview]
Message-ID: <a0a714fd989a4772e9294f752a0be1c47d522beb.camel@intel.com> (raw)
In-Reply-To: <b401b81298097998e277d84e30a61f2f8ed1c683.camel@intel.com>
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On Mon, 2018-12-10 at 23:03 -0800, Dhinakaran Pandiyan wrote:
> On Tue, 2018-12-04 at 15:00 -0800, José Roberto de Souza wrote:
> > PSR2 only trigger interruptions for AUX error, so let's not print
> > useless information in debugsfs.
> > Also adding a comment to intel_psr_irq_handler() about that.
>
> The code still allows the enabling of interrupt debugging for PSR2.
> Fix
> that to reject debugfs writes?
Done
>
>
> > Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> > drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
> > drivers/gpu/drm/i915/intel_psr.c | 1 +
> > 2 files changed, 2 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> > b/drivers/gpu/drm/i915/i915_debugfs.c
> > index 86303ba02666..505d93b31eb6 100644
> > --- a/drivers/gpu/drm/i915/i915_debugfs.c
> > +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> > @@ -2760,7 +2760,7 @@ static int i915_edp_psr_status(struct
> > seq_file
> > *m, void *data)
> > seq_printf(m, "Performance counter: %u\n", val);
> > }
> >
> > - if (psr->debug & I915_PSR_DEBUG_IRQ) {
> > + if ((psr->debug & I915_PSR_DEBUG_IRQ) && !psr->psr2_enabled) {
> > seq_printf(m, "Last attempted entry at: %lld\n",
> > psr->last_entry_attempt);
> > seq_printf(m, "Last exit at: %lld\n", psr->last_exit);
> > diff --git a/drivers/gpu/drm/i915/intel_psr.c
> > b/drivers/gpu/drm/i915/intel_psr.c
> > index 15a2121aa64f..85349a57689c 100644
> > --- a/drivers/gpu/drm/i915/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/intel_psr.c
> > @@ -203,6 +203,7 @@ void intel_psr_irq_handler(struct
> > drm_i915_private *dev_priv, u32 psr_iir)
> > mask |= EDP_PSR_ERROR(shift);
> > }
> >
> > + /* PSR2 don't trigger PRE_ENTRY and POST_EXIT
> > interruptions */
> > if (psr_iir & EDP_PSR_PRE_ENTRY(shift)) {
> > dev_priv->psr.last_entry_attempt = time_ns;
> > DRM_DEBUG_KMS("[transcoder %s] PSR entry
> > attempt in 2 vblanks\n",
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next prev parent reply other threads:[~2018-12-11 14:01 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-04 23:00 [PATCH 1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks José Roberto de Souza
2018-12-04 23:00 ` [PATCH 2/5] drm/i915: Refactor PSR status debugfs José Roberto de Souza
2018-12-11 6:51 ` Dhinakaran Pandiyan
2018-12-11 12:44 ` Souza, Jose
2018-12-11 18:32 ` Dhinakaran Pandiyan
2018-12-11 18:54 ` Souza, Jose
2019-01-02 17:09 ` Souza, Jose
2019-01-02 19:02 ` Dhinakaran Pandiyan
2018-12-04 23:00 ` [PATCH 3/5] drm/i915/psr: Do not print last attempted entry or exit in PSR debugfs while in PSR2 José Roberto de Souza
2018-12-11 7:03 ` Dhinakaran Pandiyan
2018-12-11 14:01 ` Souza, Jose [this message]
2018-12-04 23:00 ` [PATCH 4/5] drm/i915: Add PSR2 selective update status registers and bits definitions José Roberto de Souza
2018-12-11 7:51 ` Dhinakaran Pandiyan
2018-12-11 14:20 ` Souza, Jose
2018-12-04 23:00 ` [PATCH 5/5] drm/i915/debugfs: Print PSR selective update status register values José Roberto de Souza
2018-12-11 22:20 ` Dhinakaran Pandiyan
2018-12-13 18:06 ` Souza, Jose
2018-12-04 23:10 ` ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915/psr: Allow PSR2 to be enabled when debugfs asks Patchwork
2018-12-04 23:27 ` ✓ Fi.CI.BAT: success " Patchwork
2018-12-05 11:38 ` ✓ Fi.CI.IGT: " Patchwork
2018-12-11 3:52 ` [PATCH 1/5] " Dhinakaran Pandiyan
2018-12-11 12:29 ` Souza, Jose
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