From: shuang.he@intel.com
To: shuang.he@intel.com, ethan.gao@intel.com,
intel-gfx@lists.freedesktop.org, mika.kuoppala@linux.intel.com
Subject: Re: [PATCH 2/2] drm/i915: Rename unpin_count to pin_count
Date: 13 Jan 2015 07:12:42 -0800 [thread overview]
Message-ID: <f539c7$jmglvv@fmsmga002.fm.intel.com> (raw)
In-Reply-To: <1421141545-14233-2-git-send-email-mika.kuoppala@intel.com>
Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
-------------------------------------Summary-------------------------------------
Platform Delta drm-intel-nightly Series Applied
PNV -1 354/354 353/354
ILK 354/354 354/354
SNB +1-1 401/424 401/424
IVB 488/488 488/488
BYT 278/278 278/278
HSW -40 529/529 489/529
BDW -1 405/405 404/405
-------------------------------------Detailed-------------------------------------
Platform Test drm-intel-nightly Series Applied
*PNV igt_gen3_mixed_blits PASS(3, M7M23) CRASH(1, M23)
SNB igt_kms_flip_flip-vs-dpms-off-vs-modeset-interruptible NSPT(1, M35)PASS(9, M35M22) PASS(1, M22)
*SNB igt_gem_concurrent_blit_gtt-rcs-early-read-interruptible PASS(10, M35M22) DMESG_WARN(1, M22)
HSW igt_kms_cursor_crc_cursor-size-change NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_kms_fence_pin_leak NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_kms_mmio_vs_cs_flip_setcrtc_vs_cs_flip NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_kms_mmio_vs_cs_flip_setplane_vs_cs_flip NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_lpsp_non-edp NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_cursor NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_cursor-dpms NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_dpms-mode-unset-non-lpsp NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_dpms-non-lpsp NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_drm-resources-equal NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_fences NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_fences-dpms NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_gem-execbuf NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_gem-mmap-cpu NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_gem-mmap-gtt NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_gem-pread NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_i2c NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_modeset-non-lpsp NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_modeset-non-lpsp-stress-no-wait NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_pci-d3-state NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_pm_rpm_rte NSPT(5, M40M19)PASS(1, M20) NSPT(1, M40)
HSW igt_gem_concurrent_blit_gtt-bcs-early-read-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-bcs-early-read-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-bcs-gpu-read-after-write-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-bcs-gpu-read-after-write-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-bcs-overwrite-source-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-rcs-early-read-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-rcs-early-read-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-rcs-gpu-read-after-write-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-rcs-gpu-read-after-write-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-rcs-overwrite-source-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gtt-rcs-overwrite-source-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-bcs-early-read-interruptible DMESG_WARN(4, M40)PASS(2, M20M19) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-bcs-gpu-read-after-write-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-bcs-overwrite-source-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-bcs-overwrite-source-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-rcs-early-read-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-rcs-gpu-read-after-write-interruptible DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-rcs-overwrite-source-forked DMESG_WARN(5, M40M19)PASS(1, M20) DMESG_WARN(1, M40)
HSW igt_gem_concurrent_blit_gttX-rcs-overwrite-source-interruptible DMESG_WARN(2, M40M19)PASS(2, M20M40) DMESG_WARN(1, M40)
*BDW igt_gem_concurrent_blit_gtt-bcs-gpu-read-after-write-interruptible PASS(9, M30M28) DMESG_WARN(1, M28)
Note: You need to pay more attention to line start with '*'
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next prev parent reply other threads:[~2015-01-13 15:13 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-01-13 9:32 [PATCH 1/2] drm/i915: Balance context pinning on reset cleanup Mika Kuoppala
2015-01-13 9:32 ` [PATCH 2/2] drm/i915: Rename unpin_count to pin_count Mika Kuoppala
2015-01-13 15:12 ` shuang.he [this message]
2015-01-20 16:16 ` Daniel, Thomas
2015-01-20 16:14 ` [PATCH 1/2] drm/i915: Balance context pinning on reset cleanup Daniel, Thomas
2015-01-21 8:31 ` Daniel Vetter
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