public inbox for intel-gfx@lists.freedesktop.org
 help / color / mirror / Atom feed
From: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
To: Matt Roper <matthew.d.roper@intel.com>, intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH v2 2/6] drm/i915/xehp: Drop GETPARAM lookups of I915_PARAM_[SUB]SLICE_MASK
Date: Wed, 1 Jun 2022 08:59:55 +0300	[thread overview]
Message-ID: <f78258ce-24ec-eaec-b2de-9baf544676b6@intel.com> (raw)
In-Reply-To: <20220517032005.2694737-3-matthew.d.roper@intel.com>

On 17/05/2022 06:20, Matt Roper wrote:
> Slice/subslice/EU information should be obtained via the topology
> queries provided by the I915_QUERY interface; let's turn off support for
> the old GETPARAM lookups on Xe_HP and beyond where we can't return
> meaningful values.
>
> The slice mask lookup is meaningless since Xe_HP doesn't support
> traditional slices (and we make no attempt to return the various new
> units like gslices, cslices, mslices, etc.) here.
>
> The subslice mask lookup is even more problematic; given the distinct
> masks for geometry vs compute purposes, the combined mask returned here
> is likely not what userspace would want to act upon anyway.  The value
> is also limited to 32-bits by the nature of the GETPARAM ioctl which is
> sufficient for the initial Xe_HP platforms, but is unable to convey the
> larger masks that will be needed on other upcoming platforms.  Finally,
> the value returned here becomes even less meaningful when used on
> multi-tile platforms where each tile will have its own masks.
>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>


Sounds fair. We've been relying on the topology query in Mesa since it's 
available and it's a requirement for Gfx10+.

FYI, we're also not using I915_PARAM_EU_TOTAL on Gfx10+ for the same reason.


Acked-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>


> ---
>   drivers/gpu/drm/i915/i915_getparam.c | 8 ++++++++
>   1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_getparam.c b/drivers/gpu/drm/i915/i915_getparam.c
> index c12a0adefda5..ac9767c56619 100644
> --- a/drivers/gpu/drm/i915/i915_getparam.c
> +++ b/drivers/gpu/drm/i915/i915_getparam.c
> @@ -148,11 +148,19 @@ int i915_getparam_ioctl(struct drm_device *dev, void *data,
>   		value = intel_engines_has_context_isolation(i915);
>   		break;
>   	case I915_PARAM_SLICE_MASK:
> +		/* Not supported from Xe_HP onward; use topology queries */
> +		if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50))
> +			return -EINVAL;
> +
>   		value = sseu->slice_mask;
>   		if (!value)
>   			return -ENODEV;
>   		break;
>   	case I915_PARAM_SUBSLICE_MASK:
> +		/* Not supported from Xe_HP onward; use topology queries */
> +		if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50))
> +			return -EINVAL;
> +
>   		/* Only copy bits from the first slice */
>   		memcpy(&value, sseu->subslice_mask,
>   		       min(sseu->ss_stride, (u8)sizeof(value)));



  parent reply	other threads:[~2022-06-01  6:00 UTC|newest]

Thread overview: 29+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-17  3:19 [Intel-gfx] [PATCH v2 0/6] i915: SSEU handling updates Matt Roper
2022-05-17  3:20 ` [Intel-gfx] [PATCH v2 1/6] drm/i915/xehp: Use separate sseu init function Matt Roper
2022-05-17  3:20 ` [Intel-gfx] [PATCH v2 2/6] drm/i915/xehp: Drop GETPARAM lookups of I915_PARAM_[SUB]SLICE_MASK Matt Roper
2022-05-20  9:15   ` Tvrtko Ursulin
2022-05-20 20:42     ` Matt Roper
2022-05-24  8:51       ` Tvrtko Ursulin
2022-06-01  5:59   ` Lionel Landwerlin [this message]
2022-05-17  3:20 ` [Intel-gfx] [PATCH v2 3/6] drm/i915/sseu: Simplify gen11+ SSEU handling Matt Roper
2022-05-20  9:21   ` Tvrtko Ursulin
2022-05-17  3:20 ` [Intel-gfx] [PATCH v2 4/6] drm/i915/sseu: Don't try to store EU mask internally in UAPI format Matt Roper
2022-05-20  9:32   ` Tvrtko Ursulin
2022-05-17  3:20 ` [Intel-gfx] [PATCH v2 5/6] drm/i915/sseu: Disassociate internal subslice mask representation from uapi Matt Roper
2022-05-17 15:15   ` [Intel-gfx] [PATCH v3 " Matt Roper
2022-05-20 10:07     ` Tvrtko Ursulin
2022-05-17  3:20 ` [Intel-gfx] [PATCH v2 6/6] drm/i915/pvc: Add SSEU changes Matt Roper
2022-05-17  3:40 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: SSEU handling updates (rev3) Patchwork
2022-05-17  3:40 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-17  4:05 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-17  6:25 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-17 18:44 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for i915: SSEU handling updates (rev4) Patchwork
2022-05-17 18:44 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2022-05-17 19:08 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
2022-05-17 19:19   ` Matt Roper
2022-05-17 20:44     ` Vudum, Lakshminarayana
2022-05-17 20:20 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2022-05-18  0:34 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-18  3:24   ` Matt Roper
2022-05-18 16:51     ` Vudum, Lakshminarayana
2022-05-18 15:55 ` [Intel-gfx] ✓ Fi.CI.IGT: success " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=f78258ce-24ec-eaec-b2de-9baf544676b6@intel.com \
    --to=lionel.g.landwerlin@intel.com \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=matthew.d.roper@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox