[PATCH] drm/i915: perform scaler_id check for skl+

[PATCH] drm/i915: perform scaler_id check for skl+

[Chandra Konduru]

Scaler id is added for skylake to handle its shared scalers.
This is not applicable for platforms before SKL. This patch limits
the scaler_id check during intel_pipe_config_compare to platforms
SKL and above.

Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c |    4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c297cdc..fc1b7f9 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -11846,7 +11846,9 @@ intel_pipe_config_compare(struct drm_device *dev,
 		PIPE_CONF_CHECK_I(pch_pfit.size);
 	}
 
-	PIPE_CONF_CHECK_I(scaler_state.scaler_id);
+	if (INTEL_INFO(dev)->gen >= 9) {
+		PIPE_CONF_CHECK_I(scaler_state.scaler_id);
+	}
 
 	/* BDW+ don't expose a synchronous way to read the state */
 	if (IS_HASWELL(dev))
-- 
1.7.9.5

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Re: [PATCH] drm/i915: perform scaler_id check for skl+

[Daniel Vetter]

On Thu, May 07, 2015 at 06:16:04PM -0700, Chandra Konduru wrote:
> Scaler id is added for skylake to handle its shared scalers.
> This is not applicable for platforms before SKL. This patch limits
> the scaler_id check during intel_pipe_config_compare to platforms
> SKL and above.

Please add a References: line here with the bug report from mailing lists.
Also please do a quick query of bugzilla, QA should have hit this too and
filed it.

Also please reference the commit that introduce this warning (or the most
likely one).

> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_display.c |    4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c297cdc..fc1b7f9 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -11846,7 +11846,9 @@ intel_pipe_config_compare(struct drm_device *dev,
>  		PIPE_CONF_CHECK_I(pch_pfit.size);
>  	}
>  
> -	PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> +	}

In general all the state should be left as 0 on platforms that don't
support it. We only have conditionals for platforms where we compute
state, but for some hw-specific reason can't always reconstruct it from hw
state alone. Hence the correct fix would be to make sure that we leave
scaler_id == 0 in both compute_config and read_hw_state functions for gen
< 9.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH] drm/i915: perform scaler_id check for skl+

[Konduru, Chandra]

> > Scaler id is added for skylake to handle its shared scalers.
> > This is not applicable for platforms before SKL. This patch limits
> > the scaler_id check during intel_pipe_config_compare to platforms
> > SKL and above.
> 
> Please add a References: line here with the bug report from mailing lists.
> Also please do a quick query of bugzilla, QA should have hit this too and
> filed it.
> 
> Also please reference the commit that introduce this warning (or the most
> likely one).

Will update and send updated patch with references to commit and mailing list.

> >
> > -	PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> > +	if (INTEL_INFO(dev)->gen >= 9) {
> > +		PIPE_CONF_CHECK_I(scaler_state.scaler_id);
> > +	}
> 
> In general all the state should be left as 0 on platforms that don't
> support it. We only have conditionals for platforms where we compute
> state, but for some hw-specific reason can't always reconstruct it from hw
> state alone. Hence the correct fix would be to make sure that we leave
> scaler_id == 0 in both compute_config and read_hw_state functions for gen
> < 9.	

Working on updated patch leaving scaler_id as 0 for gen<9 and sending soon.
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Re: [PATCH] drm/i915: perform scaler_id check for skl+

[shuang.he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6353
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  302/302              302/302
SNB                                  316/316              316/316
IVB                                  342/342              342/342
BYT                                  286/286              286/286
BDW                                  321/321              321/321
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
Note: You need to pay more attention to line start with '*'
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[PATCH] drm/i915: Make scaler_id check in check_crtc_state work for all gens

[Chandra Konduru]

During check_crtc_state, scaler_id mispatch is being reported for HSW.
This is applicable for skl+ and not for HSW. It is introduced by
commit id:
    commit a1b2278e4dfcd2dbea85e319ebf73a6b7b2f180b
    Author: Chandra Konduru <chandra.konduru@intel.com>
    Date:   Tue Apr 7 15:28:45 2015 -0700

        drm/i915: skylake panel fitting using shared scalers

This patch will make sure that we leave scaler_id as 0 for platforms
before skl and set for skl+ only. This way scaler_id check during
check_crtc_state will pass for both prior to skl and skl+ platforms.

v2:
-Leave scaler_id as 0 for gen < 9 (Daniel)

Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
References: http://lists.freedesktop.org/archives/intel-gfx/2015-May/065741.html
---
 drivers/gpu/drm/i915/intel_display.c |   16 ++++++++++------
 1 file changed, 10 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index c297cdc..5c9f358 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -9351,6 +9351,12 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
 	}
 
 	pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
+
+	if (INTEL_INFO(dev)->gen >= 9) {
+		pipe_config->scaler_state.scaler_id = -1;
+		pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
+	}
+
 	if (intel_display_power_is_enabled(dev_priv, pfit_domain)) {
 		if (INTEL_INFO(dev)->gen == 9)
 			skylake_get_pfit_config(crtc, pipe_config);
@@ -9358,10 +9364,6 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
 			ironlake_get_pfit_config(crtc, pipe_config);
 		else
 			MISSING_CASE(INTEL_INFO(dev)->gen);
-
-	} else {
-		pipe_config->scaler_state.scaler_id = -1;
-		pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
 	}
 
 	if (IS_HASWELL(dev))
@@ -13248,8 +13250,8 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
 	primary->max_downscale = 1;
 	if (INTEL_INFO(dev)->gen >= 9) {
 		primary->can_scale = true;
+		state->scaler_id = -1;
 	}
-	state->scaler_id = -1;
 	primary->pipe = pipe;
 	primary->plane = pipe;
 	primary->check_plane = intel_check_primary_plane;
@@ -13431,7 +13433,6 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
 	cursor->max_downscale = 1;
 	cursor->pipe = pipe;
 	cursor->plane = pipe;
-	state->scaler_id = -1;
 	cursor->check_plane = intel_check_cursor_plane;
 	cursor->commit_plane = intel_commit_cursor_plane;
 	cursor->disable_plane = intel_disable_cursor_plane;
@@ -13454,6 +13455,9 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
 				state->base.rotation);
 	}
 
+	if (INTEL_INFO(dev)->gen >=9)
+		state->scaler_id = -1;
+
 	drm_plane_helper_add(&cursor->base, &intel_plane_helper_funcs);
 
 	return &cursor->base;
-- 
1.7.9.5

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Re: [PATCH] drm/i915: Make scaler_id check in check_crtc_state work for all gens

[Daniel Vetter]

On Mon, May 11, 2015 at 02:35:47PM -0700, Chandra Konduru wrote:
> During check_crtc_state, scaler_id mispatch is being reported for HSW.
> This is applicable for skl+ and not for HSW. It is introduced by
> commit id:
>     commit a1b2278e4dfcd2dbea85e319ebf73a6b7b2f180b
>     Author: Chandra Konduru <chandra.konduru@intel.com>
>     Date:   Tue Apr 7 15:28:45 2015 -0700
> 
>         drm/i915: skylake panel fitting using shared scalers
> 
> This patch will make sure that we leave scaler_id as 0 for platforms
> before skl and set for skl+ only. This way scaler_id check during
> check_crtc_state will pass for both prior to skl and skl+ platforms.
> 
> v2:
> -Leave scaler_id as 0 for gen < 9 (Daniel)
> 
> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> References: http://lists.freedesktop.org/archives/intel-gfx/2015-May/065741.html

Queued for -next, thanks for the patch.
-Daniel

> ---
>  drivers/gpu/drm/i915/intel_display.c |   16 ++++++++++------
>  1 file changed, 10 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c297cdc..5c9f358 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9351,6 +9351,12 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>  	}
>  
>  	pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
> +
> +	if (INTEL_INFO(dev)->gen >= 9) {
> +		pipe_config->scaler_state.scaler_id = -1;
> +		pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
> +	}
> +
>  	if (intel_display_power_is_enabled(dev_priv, pfit_domain)) {
>  		if (INTEL_INFO(dev)->gen == 9)
>  			skylake_get_pfit_config(crtc, pipe_config);
> @@ -9358,10 +9364,6 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
>  			ironlake_get_pfit_config(crtc, pipe_config);
>  		else
>  			MISSING_CASE(INTEL_INFO(dev)->gen);
> -
> -	} else {
> -		pipe_config->scaler_state.scaler_id = -1;
> -		pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
>  	}
>  
>  	if (IS_HASWELL(dev))
> @@ -13248,8 +13250,8 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
>  	primary->max_downscale = 1;
>  	if (INTEL_INFO(dev)->gen >= 9) {
>  		primary->can_scale = true;
> +		state->scaler_id = -1;
>  	}
> -	state->scaler_id = -1;
>  	primary->pipe = pipe;
>  	primary->plane = pipe;
>  	primary->check_plane = intel_check_primary_plane;
> @@ -13431,7 +13433,6 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
>  	cursor->max_downscale = 1;
>  	cursor->pipe = pipe;
>  	cursor->plane = pipe;
> -	state->scaler_id = -1;
>  	cursor->check_plane = intel_check_cursor_plane;
>  	cursor->commit_plane = intel_commit_cursor_plane;
>  	cursor->disable_plane = intel_disable_cursor_plane;
> @@ -13454,6 +13455,9 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
>  				state->base.rotation);
>  	}
>  
> +	if (INTEL_INFO(dev)->gen >=9)
> +		state->scaler_id = -1;
> +
>  	drm_plane_helper_add(&cursor->base, &intel_plane_helper_funcs);
>  
>  	return &cursor->base;
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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Re: [PATCH] drm/i915: Make scaler_id check in check_crtc_state work for all gens

[Nicolas Kalkhof]

 
 

Gesendet: Dienstag, 12. Mai 2015 um 08:40 Uhr
Von: "Daniel Vetter" <daniel@ffwll.ch>
An: "Chandra Konduru" <chandra.konduru@intel.com>
Cc: daniel.vetter@intel.com, intel-gfx@lists.freedesktop.org
Betreff: Re: [Intel-gfx] [PATCH] drm/i915: Make scaler_id check in check_crtc_state work for all gens
On Mon, May 11, 2015 at 02:35:47PM -0700, Chandra Konduru wrote:
> During check_crtc_state, scaler_id mispatch is being reported for HSW.
> This is applicable for skl+ and not for HSW. It is introduced by
> commit id:
> commit a1b2278e4dfcd2dbea85e319ebf73a6b7b2f180b
> Author: Chandra Konduru <chandra.konduru@intel.com>
> Date: Tue Apr 7 15:28:45 2015 -0700
>
> drm/i915: skylake panel fitting using shared scalers
>
> This patch will make sure that we leave scaler_id as 0 for platforms
> before skl and set for skl+ only. This way scaler_id check during
> check_crtc_state will pass for both prior to skl and skl+ platforms.
>
> v2:
> -Leave scaler_id as 0 for gen < 9 (Daniel)
>
> Signed-off-by: Chandra Konduru <chandra.konduru@intel.com>
> References: http://lists.freedesktop.org/archives/intel-gfx/2015-May/065741.html

Queued for -next, thanks for the patch.
-Daniel

> ---
> drivers/gpu/drm/i915/intel_display.c | 16 ++++++++++------
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index c297cdc..5c9f358 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -9351,6 +9351,12 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> }
>
> pfit_domain = POWER_DOMAIN_PIPE_PANEL_FITTER(crtc->pipe);
> +
> + if (INTEL_INFO(dev)->gen >= 9) {
> + pipe_config->scaler_state.scaler_id = -1;
> + pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
> + }
> +
> if (intel_display_power_is_enabled(dev_priv, pfit_domain)) {
> if (INTEL_INFO(dev)->gen == 9)
> skylake_get_pfit_config(crtc, pipe_config);
> @@ -9358,10 +9364,6 @@ static bool haswell_get_pipe_config(struct intel_crtc *crtc,
> ironlake_get_pfit_config(crtc, pipe_config);
> else
> MISSING_CASE(INTEL_INFO(dev)->gen);
> -
> - } else {
> - pipe_config->scaler_state.scaler_id = -1;
> - pipe_config->scaler_state.scaler_users &= ~(1 << SKL_CRTC_INDEX);
> }
>
> if (IS_HASWELL(dev))
> @@ -13248,8 +13250,8 @@ static struct drm_plane *intel_primary_plane_create(struct drm_device *dev,
> primary->max_downscale = 1;
> if (INTEL_INFO(dev)->gen >= 9) {
> primary->can_scale = true;
> + state->scaler_id = -1;
> }
> - state->scaler_id = -1;
> primary->pipe = pipe;
> primary->plane = pipe;
> primary->check_plane = intel_check_primary_plane;
> @@ -13431,7 +13433,6 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
> cursor->max_downscale = 1;
> cursor->pipe = pipe;
> cursor->plane = pipe;
> - state->scaler_id = -1;
> cursor->check_plane = intel_check_cursor_plane;
> cursor->commit_plane = intel_commit_cursor_plane;
> cursor->disable_plane = intel_disable_cursor_plane;
> @@ -13454,6 +13455,9 @@ static struct drm_plane *intel_cursor_plane_create(struct drm_device *dev,
> state->base.rotation);
> }
>
> + if (INTEL_INFO(dev)->gen >=9)
> + state->scaler_id = -1;
> +
> drm_plane_helper_add(&cursor->base, &intel_plane_helper_funcs);
>
> return &cursor->base;
> --
> 1.7.9.5


yeah the error message about mismatch in scaler_state.scaler_id is gone with this commit however intel_display is still broken:

[   35.159170] ------------[ cut here ]------------
[   35.159195] WARNING: CPU: 1 PID: 1314 at drivers/gpu/drm/i915/intel_display.c:12023 intel_modeset_check_state+0x208/0xb50 [i915]()
[   35.159197] active encoder's pipe doesn't match(expected 1, found 0)
[   35.159198] Modules linked in: snd_hda_codec_hdmi i915 fbcon bitblit snd_hda_codec_realtek cfbfillrect softcursor font cfbimgblt snd_hda_codec_generic intel_gtt cfbcopyarea drm_kms_helper drm snd_hda_intel fb iwlmvm fbdev snd_hda_codec snd_hwdep snd_hda_core snd_pcm iwlwifi
[   35.159222] CPU: 1 PID: 1314 Comm: X Not tainted 4.1.0-rc3+ #11
[   35.159223] Hardware name: LENOVO qqqqENX407/qqqqENX407, BIOS GLET77WW (2.31 ) 01/27/2015
[   35.159225]  0000000000000000 ffffffffa02df138 ffffffff8155c7ab ffff88040b097bc8
[   35.159229]  ffffffff810451b7 ffff88040bbf6400 ffff88040ba47000 0000000000000001
[   35.159232]  ffff88040ba47340 ffff88040ba47328 ffffffff81045235 ffffffffa02e2588
[   35.159235] Call Trace:
[   35.159243]  [<ffffffff8155c7ab>] ? dump_stack+0x40/0x50
[   35.159248]  [<ffffffff810451b7>] ? warn_slowpath_common+0x77/0xb0
[   35.159251]  [<ffffffff81045235>] ? warn_slowpath_fmt+0x45/0x50
[   35.159264]  [<ffffffffa027f308>] ? intel_modeset_check_state+0x208/0xb50 [i915]
[   35.159278]  [<ffffffffa0279dcb>] ? __intel_set_mode+0xa8b/0xcb0 [i915]
[   35.159291]  [<ffffffffa0280238>] ? intel_crtc_set_config+0x578/0x650 [i915]
[   35.159303]  [<ffffffffa01243d7>] ? drm_crtc_check_viewport+0x27/0xf0 [drm]
[   35.159312]  [<ffffffffa012505f>] ? drm_mode_set_config_internal+0x5f/0x100 [drm]
[   35.159321]  [<ffffffffa01299ca>] ? drm_mode_setcrtc+0x22a/0x5f0 [drm]
[   35.159328]  [<ffffffffa011be2a>] ? drm_ioctl+0x15a/0x580 [drm]
[   35.159333]  [<ffffffff81101268>] ? do_vfs_ioctl+0x2e8/0x4f0
[   35.159336]  [<ffffffff810f2138>] ? __sb_end_write+0x28/0x60
[   35.159341]  [<ffffffff810f0274>] ? vfs_write+0x154/0x180
[   35.159344]  [<ffffffff811014a6>] ? SyS_ioctl+0x36/0x80
[   35.159348]  [<ffffffff815637db>] ? system_call_fastpath+0x16/0x6e
[   35.159350] ---[ end trace 6fdc7b6ed4615ffc ]---


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Re: [PATCH] drm/i915: Make scaler_id check in check_crtc_state work for all gens

[shuang.he]

Tested-By: Intel Graphics QA PRTS (Patch Regression Test System Contact: shuang.he@intel.com)
Task id: 6384
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                                  276/276              276/276
ILK                                  302/302              302/302
SNB                 -1              314/314              313/314
IVB                                  338/338              338/338
BYT                                  286/286              286/286
BDW                                  320/320              320/320
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
 SNB  igt@pm_rpm@dpms-mode-unset-non-lpsp      DMESG_WARN(13)PASS(1)      DMESG_WARN(1)
(dmesg patch applied)WARNING:at_drivers/gpu/drm/i915/intel_uncore.c:#assert_device_not_suspended[i915]()@WARNING:.* at .* assert_device_not_suspended+0x
Note: You need to pay more attention to line start with '*'
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