From: Keith Packard <keithp@keithp.com>
To: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: intel-gfx@lists.freedesktop.org, Paulo Zanoni <paulo.r.zanoni@intel.com>
Subject: Re: [PATCH] drm/i915: add missing "break"
Date: Thu, 22 Sep 2011 21:35:51 -0700 [thread overview]
Message-ID: <yunlitf27vc.fsf@aiko.keithp.com> (raw)
In-Reply-To: <20110923081315.7a327fcd@jbarnes-x220>
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On Fri, 23 Sep 2011 08:13:15 +0530, Jesse Barnes <jbarnes@virtuousgeek.org> wrote:
> I think it depends on the platform. On some, enabling SSC may actually
> create more noise than not for some components (not that I've run the
> EMF calculations...).
So, why is the MBA EFI code enabling SSC while the VBT table says not to
use it? It's all mysterious to me.
> I don't have this code in my tree though... is this the patch I sent
> awhile back? I thought it broke external outputs too? The last time
> we touched this we broke the dual head case (a config change caused one
> head to go blank), did you test that?
You sent two pieces, I think; the second one tried to turn unused clocks
off and that broke stuff. Which is understandable given that it was only
looking at one CRTC when doing the global configuration.
> What I don't understand about the refclk code is that we should be able
> to leave everything enabled and just select the right clock source in
> the DPLL_SEL bits. But that doesn't seem to help the wavy VGA bug,
> since in that case I think we're explicitly choosing the non-SSC clock
> and we still get waviness.
We don't have any hardware anywhere which exhibits this problem, do we?
Getting hold of some would let us poke at it.
> I *think* the code you changed is ok; just needs lots of testing and
> verification that the SSC bits are set like we expect as we change
> configurations. I like the "has_panel" cleanup too; previous versions
> of this code had is_lvds || is_edp && pch_edp etc sprinkled all over.
Yeah, it's longer, but I think it's more readable now.
My big concern is that we're guessing which pipes will use SSC in this
function and then computing which pipes actually use SSC separately. I
think we should figure out which pipes want to use SSC and then go set
the refclks. as needed.
--
keith.packard@intel.com
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next prev parent reply other threads:[~2011-09-23 4:35 UTC|newest]
Thread overview: 41+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-09-22 18:13 [PATCH] drm/i915: add missing "break" przanoni
2011-09-22 19:55 ` Keith Packard
2011-09-23 2:43 ` Jesse Barnes
2011-09-23 4:35 ` Keith Packard [this message]
2011-09-23 12:06 ` Paulo Zanoni
2011-09-23 16:15 ` Keith Packard
2011-09-23 16:30 ` Paulo Zanoni
2011-09-23 19:07 ` Chris Wilson
2011-09-26 20:56 ` Keith Packard
2011-09-26 23:05 ` Keith Packard
2011-09-27 6:11 ` PCH reference clock cleanups Keith Packard
2011-09-27 6:11 ` [PATCH 1/9] drm/i915: broken copyright encoding in intel_bios.c Keith Packard
2011-09-27 6:11 ` [PATCH 2/9] drm/i915: Use DRM_DEBUG_KMS for all messages " Keith Packard
2011-09-27 16:39 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 3/9] drv/i915: Pull display_clock_mode out of VBT table Keith Packard
2011-09-27 16:40 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 4/9] drm/i915: Document a few more BDB_GENERAL_FEATURES bits from PCH BIOS Keith Packard
2011-09-27 6:11 ` [PATCH 5/9] drm/i915: Allow SSC parameter to override VBT value Keith Packard
2011-09-27 16:41 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 6/9] drm/i915: Fix PCH SSC reference clock settings Keith Packard
2011-09-27 16:47 ` Chris Wilson
2011-09-27 18:03 ` Keith Packard
2011-09-28 9:09 ` Chris Wilson
2011-09-28 16:36 ` Keith Packard
2011-09-27 6:11 ` [PATCH 7/9] drm/i915: Use CK505 as non-SSC source where available Keith Packard
2011-09-27 16:49 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 8/9] drm/i915: All PCH refclks are 120MHz Keith Packard
2011-09-27 16:53 ` Chris Wilson
2011-09-27 6:11 ` [PATCH 9/9] drm/i915: Initialize PCH refclks at modeset init time Keith Packard
2011-09-27 16:56 ` Chris Wilson
2011-09-27 18:11 ` Keith Packard
2011-10-03 21:12 ` [Intel-gfx] " Jesse Barnes
2011-09-28 23:15 ` Keith Packard
2011-09-27 9:01 ` PCH reference clock cleanups Chris Wilson
2011-09-27 16:54 ` Keith Packard
2011-09-28 18:22 ` [Intel-gfx] " Paulo Zanoni
2011-09-28 20:02 ` Keith Packard
2011-10-03 21:14 ` Jesse Barnes
2011-10-03 23:18 ` [Intel-gfx] " Keith Packard
2011-10-03 23:21 ` Jesse Barnes
2011-10-03 23:39 ` Keith Packard
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