* [Intel-wired-lan] [PATCH iwl-net v2 1/1] igc: Fix the typo in the PTM Control macro
@ 2023-08-03 2:37 Sasha Neftin
2023-08-04 21:39 ` Tony Nguyen
0 siblings, 1 reply; 4+ messages in thread
From: Sasha Neftin @ 2023-08-03 2:37 UTC (permalink / raw)
To: intel-wired-lan
The IGC_PTM_CTRL_SHRT_CYC defines the time between two consecutive PTM
requests. The bit resolution of this field is six bits. That bit five was
missing in the mask. This patch comes to correct the typo in the
IGC_PTM_CTRL_SHRT_CYC macro.
Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()")
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
---
v1->v2: Fixed commit message
---
drivers/net/ethernet/intel/igc/igc_defines.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h
index c3722f524ea7..0bac6eeb42c0 100644
--- a/drivers/net/ethernet/intel/igc/igc_defines.h
+++ b/drivers/net/ethernet/intel/igc/igc_defines.h
@@ -546,7 +546,7 @@
#define IGC_PTM_CTRL_START_NOW BIT(29) /* Start PTM Now */
#define IGC_PTM_CTRL_EN BIT(30) /* Enable PTM */
#define IGC_PTM_CTRL_TRIG BIT(31) /* PTM Cycle trigger */
-#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x2f) << 2)
+#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x3f) << 2)
#define IGC_PTM_CTRL_PTM_TO(usec) (((usec) & 0xff) << 8)
#define IGC_PTM_SHORT_CYC_DEFAULT 1 /* Default short cycle interval */
--
2.25.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [Intel-wired-lan] [PATCH iwl-net v2 1/1] igc: Fix the typo in the PTM Control macro
2023-08-03 2:37 [Intel-wired-lan] [PATCH iwl-net v2 1/1] igc: Fix the typo in the PTM Control macro Sasha Neftin
@ 2023-08-04 21:39 ` Tony Nguyen
0 siblings, 0 replies; 4+ messages in thread
From: Tony Nguyen @ 2023-08-04 21:39 UTC (permalink / raw)
To: Sasha Neftin, intel-wired-lan
On 8/2/2023 7:37 PM, Sasha Neftin wrote:
> The IGC_PTM_CTRL_SHRT_CYC defines the time between two consecutive PTM
> requests. The bit resolution of this field is six bits. That bit five was
> missing in the mask. This patch comes to correct the typo in the
> IGC_PTM_CTRL_SHRT_CYC macro.
This doesn't apply
> Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()")
> Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
> ---
> v1->v2: Fixed commit message
> ---
> drivers/net/ethernet/intel/igc/igc_defines.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h
> index c3722f524ea7..0bac6eeb42c0 100644
> --- a/drivers/net/ethernet/intel/igc/igc_defines.h
> +++ b/drivers/net/ethernet/intel/igc/igc_defines.h
> @@ -546,7 +546,7 @@
> #define IGC_PTM_CTRL_START_NOW BIT(29) /* Start PTM Now */
> #define IGC_PTM_CTRL_EN BIT(30) /* Enable PTM */
> #define IGC_PTM_CTRL_TRIG BIT(31) /* PTM Cycle trigger */
> -#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x2f) << 2)
> +#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x3f) << 2)
> #define IGC_PTM_CTRL_PTM_TO(usec) (((usec) & 0xff) << 8)
>
> #define IGC_PTM_SHORT_CYC_DEFAULT 1 /* Default short cycle interval */
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^ permalink raw reply [flat|nested] 4+ messages in thread
* [Intel-wired-lan] [PATCH iwl-net v2 1/1] igc: Fix the typo in the PTM Control macro
@ 2023-08-08 4:23 Sasha Neftin
2023-08-21 7:38 ` naamax.meir
0 siblings, 1 reply; 4+ messages in thread
From: Sasha Neftin @ 2023-08-08 4:23 UTC (permalink / raw)
To: intel-wired-lan
The IGC_PTM_CTRL_SHRT_CYC defines the time between two consecutive PTM
requests. The bit resolution of this field is six bits. That bit five was
missing in the mask. This patch comes to correct the typo in the
IGC_PTM_CTRL_SHRT_CYC macro.
Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()")
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
---
v1->v2: Fixed commit message
---
drivers/net/ethernet/intel/igc/igc_defines.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h
index 44a507029946..2f780cc90883 100644
--- a/drivers/net/ethernet/intel/igc/igc_defines.h
+++ b/drivers/net/ethernet/intel/igc/igc_defines.h
@@ -546,7 +546,7 @@
#define IGC_PTM_CTRL_START_NOW BIT(29) /* Start PTM Now */
#define IGC_PTM_CTRL_EN BIT(30) /* Enable PTM */
#define IGC_PTM_CTRL_TRIG BIT(31) /* PTM Cycle trigger */
-#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x2f) << 2)
+#define IGC_PTM_CTRL_SHRT_CYC(usec) (((usec) & 0x3f) << 2)
#define IGC_PTM_CTRL_PTM_TO(usec) (((usec) & 0xff) << 8)
#define IGC_PTM_SHORT_CYC_DEFAULT 10 /* Default Short/interrupted cycle interval */
--
2.25.1
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^ permalink raw reply related [flat|nested] 4+ messages in thread* Re: [Intel-wired-lan] [PATCH iwl-net v2 1/1] igc: Fix the typo in the PTM Control macro
2023-08-08 4:23 Sasha Neftin
@ 2023-08-21 7:38 ` naamax.meir
0 siblings, 0 replies; 4+ messages in thread
From: naamax.meir @ 2023-08-21 7:38 UTC (permalink / raw)
To: Sasha Neftin, intel-wired-lan
On 8/8/2023 07:23, Sasha Neftin wrote:
> The IGC_PTM_CTRL_SHRT_CYC defines the time between two consecutive PTM
> requests. The bit resolution of this field is six bits. That bit five was
> missing in the mask. This patch comes to correct the typo in the
> IGC_PTM_CTRL_SHRT_CYC macro.
>
> Fixes: a90ec8483732 ("igc: Add support for PTP getcrosststamp()")
> Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
> ---
> v1->v2: Fixed commit message
> ---
> drivers/net/ethernet/intel/igc/igc_defines.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Tested-by: Naama Meir <naamax.meir@linux.intel.com>
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2023-08-03 2:37 [Intel-wired-lan] [PATCH iwl-net v2 1/1] igc: Fix the typo in the PTM Control macro Sasha Neftin
2023-08-04 21:39 ` Tony Nguyen
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2023-08-08 4:23 Sasha Neftin
2023-08-21 7:38 ` naamax.meir
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