From: Jiri Pirko <jiri@resnulli.us>
To: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
Cc: vadim.fedorenko@linux.dev, corbet@lwn.net,
netdev@vger.kernel.org, linux-doc@vger.kernel.org,
jesse.brandeburg@intel.com, anthony.l.nguyen@intel.com,
intel-wired-lan@lists.osuosl.org, kuba@kernel.org,
pabeni@redhat.com, davem@davemloft.net
Subject: Re: [Intel-wired-lan] [PATCH net-next v3 5/5] dpll: netlink/core: change pin frequency set behavior
Date: Fri, 6 Oct 2023 14:35:25 +0200 [thread overview]
Message-ID: <ZR//DY6xMPi1AQ5i@nanopsycho> (raw)
In-Reply-To: <20231006114101.1608796-6-arkadiusz.kubalewski@intel.com>
Fri, Oct 06, 2023 at 01:41:01PM CEST, arkadiusz.kubalewski@intel.com wrote:
>Align the aproach of pin frequency set behavior with the approach
>introduced with pin phase adjust set.
>Fail the request if any of devices did not registered the callback ops.
>If callback op on any pin's registered device fails, return error and
>rollback the value to previous one.
>
>Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>
>---
> drivers/dpll/dpll_netlink.c | 50 +++++++++++++++++++++++++++++--------
> 1 file changed, 40 insertions(+), 10 deletions(-)
>
>diff --git a/drivers/dpll/dpll_netlink.c b/drivers/dpll/dpll_netlink.c
>index 97319a9e4667..8e5fea74aec1 100644
>--- a/drivers/dpll/dpll_netlink.c
>+++ b/drivers/dpll/dpll_netlink.c
>@@ -615,30 +615,60 @@ static int
> dpll_pin_freq_set(struct dpll_pin *pin, struct nlattr *a,
> struct netlink_ext_ack *extack)
> {
>- u64 freq = nla_get_u64(a);
>- struct dpll_pin_ref *ref;
>+ u64 freq = nla_get_u64(a), old_freq;
>+ struct dpll_pin_ref *ref, *failed;
>+ const struct dpll_pin_ops *ops;
>+ struct dpll_device *dpll;
> unsigned long i;
> int ret;
>
> if (!dpll_pin_is_freq_supported(pin, freq)) {
>- NL_SET_ERR_MSG_ATTR(extack, a, "frequency is not supported by the device");
>+ NL_SET_ERR_MSG_ATTR(extack, a,
>+ "frequency is not supported by the device");
No need for this wrapping. Seems unrelated to the rest of the patch
anyway.
> return -EINVAL;
> }
>-
No need for this too.
> xa_for_each(&pin->dpll_refs, i, ref) {
>- const struct dpll_pin_ops *ops = dpll_pin_ops(ref);
>- struct dpll_device *dpll = ref->dpll;
>-
>- if (!ops->frequency_set)
>+ ops = dpll_pin_ops(ref);
>+ if (!ops->frequency_set || !ops->frequency_get)
> return -EOPNOTSUPP;
Add an extack msg while you are at it - could be a separate patch.
>+ }
>+ ref = dpll_xa_ref_dpll_first(&pin->dpll_refs);
>+ ops = dpll_pin_ops(ref);
>+ dpll = ref->dpll;
>+ ret = ops->frequency_get(pin, dpll_pin_on_dpll_priv(dpll, pin), dpll,
>+ dpll_priv(dpll), &old_freq, extack);
>+ if (ret) {
>+ NL_SET_ERR_MSG(extack, "unable to get old frequency value");
>+ return ret;
>+ }
>+ if (freq == old_freq)
>+ return 0;
>+
>+ xa_for_each(&pin->dpll_refs, i, ref) {
>+ ops = dpll_pin_ops(ref);
>+ dpll = ref->dpll;
> ret = ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin),
> dpll, dpll_priv(dpll), freq, extack);
>- if (ret)
>- return ret;
>+ if (ret) {
>+ failed = ref;
Extack msg.
>+ goto rollback;
>+ }
> }
> __dpll_pin_change_ntf(pin);
>
> return 0;
>+
>+rollback:
>+ xa_for_each(&pin->dpll_refs, i, ref) {
>+ if (ref == failed)
>+ break;
>+ ops = dpll_pin_ops(ref);
>+ dpll = ref->dpll;
>+ if (ops->frequency_set(pin, dpll_pin_on_dpll_priv(dpll, pin),
>+ dpll, dpll_priv(dpll), old_freq, extack))
>+ NL_SET_ERR_MSG(extack, "set frequency rollback failed");
>+ }
>+ return ret;
> }
>
> static int
>--
>2.38.1
>
_______________________________________________
Intel-wired-lan mailing list
Intel-wired-lan@osuosl.org
https://lists.osuosl.org/mailman/listinfo/intel-wired-lan
prev parent reply other threads:[~2023-10-06 12:35 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-06 11:40 [Intel-wired-lan] [PATCH net-next v3 0/5] dpll: add phase-offset and phase-adjust Arkadiusz Kubalewski
2023-10-06 11:40 ` [Intel-wired-lan] [PATCH net-next v3 1/5] dpll: docs: add support for pin signal phase offset/adjust Arkadiusz Kubalewski
2023-10-06 11:40 ` [Intel-wired-lan] [PATCH net-next v3 2/5] dpll: spec: add support for pin-dpll " Arkadiusz Kubalewski
2023-10-06 12:30 ` Jiri Pirko
2023-10-06 14:55 ` Jakub Kicinski
2023-10-06 16:53 ` Jiri Pirko
2023-10-06 19:44 ` Kuba Kicinski
2023-10-07 10:29 ` Jiri Pirko
2023-10-09 15:22 ` Jakub Kicinski
2023-10-09 22:55 ` Kubalewski, Arkadiusz
2023-10-06 11:40 ` [Intel-wired-lan] [PATCH net-next v3 3/5] dpll: netlink/core: " Arkadiusz Kubalewski
2023-10-06 12:38 ` Jiri Pirko
2023-10-09 22:49 ` Kubalewski, Arkadiusz
2023-10-06 11:41 ` [Intel-wired-lan] [PATCH net-next v3 4/5] ice: dpll: implement phase related callbacks Arkadiusz Kubalewski
2023-10-06 12:33 ` Simon Horman
2023-10-06 12:41 ` Jiri Pirko
2023-10-06 11:41 ` [Intel-wired-lan] [PATCH net-next v3 5/5] dpll: netlink/core: change pin frequency set behavior Arkadiusz Kubalewski
2023-10-06 12:35 ` Jiri Pirko [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZR//DY6xMPi1AQ5i@nanopsycho \
--to=jiri@resnulli.us \
--cc=anthony.l.nguyen@intel.com \
--cc=arkadiusz.kubalewski@intel.com \
--cc=corbet@lwn.net \
--cc=davem@davemloft.net \
--cc=intel-wired-lan@lists.osuosl.org \
--cc=jesse.brandeburg@intel.com \
--cc=kuba@kernel.org \
--cc=linux-doc@vger.kernel.org \
--cc=netdev@vger.kernel.org \
--cc=pabeni@redhat.com \
--cc=vadim.fedorenko@linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox