From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>,
intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [RFC v2 2/6] drm/xe/xe2: Determine bios enablement for flat ccs on igfx.
Date: Fri, 24 Nov 2023 12:05:43 +0100 [thread overview]
Message-ID: <0876b09852ce6391b04be329692a29b161ec5154.camel@linux.intel.com> (raw)
In-Reply-To: <20231121100906.3587649-3-himal.prasad.ghimiray@intel.com>
On Tue, 2023-11-21 at 15:39 +0530, Himal Prasad Ghimiray wrote:
> If bios disables flat ccs on igfx make has_flat_ccs as 0 and notify
double space above ^^
>
> via drm_info.
>
> Bspec:59255
>
> Cc: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> Signed-off-by: Himal Prasad Ghimiray
> <himal.prasad.ghimiray@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 3 +++
> drivers/gpu/drm/xe/xe_device.c | 30
> ++++++++++++++++++++++++++++
> 2 files changed, 33 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index cc27fe8fc363..b642301947f5 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -142,6 +142,9 @@
> #define XEHP_SLICE_COMMON_ECO_CHICKEN1 XE_REG_MCR(0x731c,
> XE_REG_OPTION_MASKED)
> #define MSC_MSAA_REODER_BUF_BYPASS_DISABLE REG_BIT(14)
>
> +#define XE2_FLAT_CCS_BASE_RANGE_LOWER XE_REG_MCR(0x8800)
> +#define XE2_FLAT_CCS_ENABLE REG_BIT(0)
> +
> #define VF_PREEMPTION XE_REG(0x83a4,
> XE_REG_OPTION_MASKED)
> #define PREEMPTION_VERTEX_COUNT REG_GENMASK(15, 0)
>
> diff --git a/drivers/gpu/drm/xe/xe_device.c
> b/drivers/gpu/drm/xe/xe_device.c
> index 8be765adf702..07a3e4cf48d1 100644
> --- a/drivers/gpu/drm/xe/xe_device.c
> +++ b/drivers/gpu/drm/xe/xe_device.c
> @@ -16,6 +16,7 @@
> #include <drm/xe_drm.h>
>
> #include "regs/xe_regs.h"
> +#include "regs/xe_gt_regs.h"
> #include "xe_bo.h"
> #include "xe_debugfs.h"
> #include "xe_display.h"
> @@ -25,6 +26,7 @@
> #include "xe_exec_queue.h"
> #include "xe_exec.h"
> #include "xe_gt.h"
> +#include "xe_gt_mcr.h"
> #include "xe_irq.h"
> #include "xe_mmio.h"
> #include "xe_module.h"
> @@ -342,6 +344,29 @@ static void xe_device_sanitize(struct drm_device
> *drm, void *arg)
> xe_gt_sanitize(gt);
> }
>
> +static int xe_device_set_has_flat_ccs(struct xe_device *xe)
> +{
> + u32 reg;
> + int err;
> +
> + if (IS_DGFX(xe) || GRAPHICS_VER(xe) < 20 || !xe-
> >info.has_flat_ccs)
> + return 0;
Depending on the outcome of the iommu discussion we might need to check
for iommu present here as well?
> +
> + struct xe_gt *gt = xe_root_mmio_gt(xe);
> +
> + err = xe_force_wake_get(gt_to_fw(gt), XE_FW_GT);
> + if (err)
> + return err;
> +
> + reg = xe_gt_mcr_unicast_read_any(gt,
> XE2_FLAT_CCS_BASE_RANGE_LOWER);
> + xe->info.has_flat_ccs = (reg & XE2_FLAT_CCS_ENABLE);
> +
> + if (!xe->info.has_flat_ccs)
> + drm_info(&xe->drm,
> + "Flat CCS has been disabled in bios, May
> lead to performance impact");
> + return 0;
> +}
> +
> int xe_device_probe(struct xe_device *xe)
> {
> struct xe_tile *tile;
> @@ -352,6 +377,7 @@ int xe_device_probe(struct xe_device *xe)
> xe_pat_init_early(xe);
>
> xe->info.mem_region_mask = 1;
> +
Unrelated change.
> err = xe_display_init_nommio(xe);
> if (err)
> return err;
> @@ -390,6 +416,10 @@ int xe_device_probe(struct xe_device *xe)
> goto err_irq_shutdown;
> }
>
> + err = xe_device_set_has_flat_ccs(xe);
> + if (err)
> + return err;
> +
> err = xe_mmio_probe_vram(xe);
> if (err)
> goto err_irq_shutdown;
next prev parent reply other threads:[~2023-11-24 11:06 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-21 10:09 [Intel-xe] [RFC v2 0/6] Enable compression handling on LNL Himal Prasad Ghimiray
2023-11-21 10:09 ` [Intel-xe] [RFC v2 1/6] drm/xe/xe2: Support flat ccs Himal Prasad Ghimiray
2023-11-23 16:28 ` Matthew Auld
2023-11-27 3:04 ` Ghimiray, Himal Prasad
2023-11-24 11:02 ` Thomas Hellström
2023-11-27 3:05 ` Ghimiray, Himal Prasad
2023-11-21 10:09 ` [Intel-xe] [RFC v2 2/6] drm/xe/xe2: Determine bios enablement for flat ccs on igfx Himal Prasad Ghimiray
2023-11-23 16:37 ` Matthew Auld
2023-11-23 17:01 ` Matthew Auld
2023-11-27 3:11 ` Ghimiray, Himal Prasad
2023-11-24 11:05 ` Thomas Hellström [this message]
2023-11-27 3:12 ` Ghimiray, Himal Prasad
2023-11-21 10:09 ` [Intel-xe] [RFC v2 3/6] drm/xe/xe2: Allocate extra pages for ccs during bo create Himal Prasad Ghimiray
2023-11-24 11:09 ` Thomas Hellström
2023-11-27 3:19 ` Ghimiray, Himal Prasad
2023-11-27 9:41 ` Thomas Hellström
2023-11-29 4:53 ` Ghimiray, Himal Prasad
2023-11-21 10:09 ` [Intel-xe] [RFC v2 4/6] drm/xe/xe2: Updates on XY_CTRL_SURF_COPY_BLT Himal Prasad Ghimiray
2023-11-24 11:11 ` Thomas Hellström
2023-11-27 3:21 ` Ghimiray, Himal Prasad
2023-11-21 10:09 ` [Intel-xe] [RFC v2 5/6] drm/xe/xe_migrate.c: Use NULL 1G PTE mapped at 255GiB VA for ccs clear Himal Prasad Ghimiray
2023-11-24 11:19 ` Thomas Hellström
2023-11-27 3:23 ` Ghimiray, Himal Prasad
2023-11-21 10:09 ` [Intel-xe] [RFC v2 6/6] drm/xe/xe2: Handle flat ccs move for igfx Himal Prasad Ghimiray
2023-11-24 15:48 ` Thomas Hellström
2023-11-27 3:25 ` Ghimiray, Himal Prasad
2023-11-28 13:36 ` [Intel-xe] [RFC v2 0/6] Enable compression handling on LNL Thomas Hellström
2023-11-29 4:49 ` Ghimiray, Himal Prasad
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