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* [PATCH] drm/xe/hwmon: Resolved incompatible cast
@ 2025-09-04 10:58 mallesh.koujalagi
  2025-09-04 11:37 ` ✓ CI.KUnit: success for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 5+ messages in thread
From: mallesh.koujalagi @ 2025-09-04 10:58 UTC (permalink / raw)
  To: intel-xe, rodrigo.vivi
  Cc: anshuman.gupta, badal.nilawar, riana.tauro, karthik.poosa,
	sk.anirban, raag.jadav, Mallesh Koujalagi

From: Mallesh Koujalagi <mallesh.koujalagi@intel.com>

The issue is that casting of u64* to u32* cause an endianness
problem because on little-endian systems, the function will
write to the lower 32 bits, but on big-endian systems,
it will write to the upper 32 bits

Signed-off-by: Mallesh Koujalagi <mallesh.koujalagi@intel.com>
---
 drivers/gpu/drm/xe/xe_hwmon.c | 10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_hwmon.c b/drivers/gpu/drm/xe/xe_hwmon.c
index f08fc4377d25..d21f8f8678ab 100644
--- a/drivers/gpu/drm/xe/xe_hwmon.c
+++ b/drivers/gpu/drm/xe/xe_hwmon.c
@@ -294,7 +294,11 @@ static void xe_hwmon_power_max_read(struct xe_hwmon *hwmon, u32 attr, int channe
 	mutex_lock(&hwmon->hwmon_lock);
 
 	if (hwmon->xe->info.has_mbx_power_limits) {
-		xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, (u32 *)&reg_val);
+		u32 reg_val_32 = 0;
+
+		xe_hwmon_pcode_read_power_limit(hwmon, attr, channel, &reg_val_32);
+		/* Explicit, endian-safe conversion */
+		reg_val = reg_val_32;
 	} else {
 		rapl_limit = xe_hwmon_get_reg(hwmon, REG_PKG_RAPL_LIMIT, channel);
 		pkg_power_sku = xe_hwmon_get_reg(hwmon, REG_PKG_POWER_SKU, channel);
@@ -490,7 +494,9 @@ xe_hwmon_power_max_interval_show(struct device *dev, struct device_attribute *at
 	mutex_lock(&hwmon->hwmon_lock);
 
 	if (hwmon->xe->info.has_mbx_power_limits) {
-		ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, (u32 *)&r);
+		ret = xe_hwmon_pcode_read_power_limit(hwmon, power_attr, channel, &x);
+		/* Explicit, endian-safe conversion */
+		r = x;
 		if (ret) {
 			drm_err(&hwmon->xe->drm,
 				"power interval read fail, ch %d, attr %d, r 0%llx, ret %d\n",
-- 
2.34.1


^ permalink raw reply related	[flat|nested] 5+ messages in thread
end of thread, other threads:[~2025-09-08 14:47 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-04 10:58 [PATCH] drm/xe/hwmon: Resolved incompatible cast mallesh.koujalagi
2025-09-04 11:37 ` ✓ CI.KUnit: success for " Patchwork
2025-09-04 12:14 ` ✓ Xe.CI.BAT: " Patchwork
2025-09-04 23:59 ` ✗ Xe.CI.Full: failure " Patchwork
2025-09-08 14:47 ` Poosa, Karthik

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