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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
	<intel-gfx@lists.freedesktop.org>,
	<intel-xe@lists.freedesktop.org>
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Subject: Re: [PATCH v2 1/3] drm/pcids: Split PTL pciids group to make wcl subplatform
Date: Fri, 19 Sep 2025 17:19:55 -0300	[thread overview]
Message-ID: <175831319590.1987.1863648853233528@intel.com> (raw)
In-Reply-To: <20250919162233.1624905-2-dnyaneshwar.bhadane@intel.com>

Quoting Dnyaneshwar Bhadane (2025-09-19 13:22:31-03:00)
>To form the WCL platform as a subplatform of PTL in definition,
>WCL pci ids are splited into saparate group from PTL.
>So update the pciidlist struct to cover all the pci ids.
>
>v2: 
>- Squash wcl description in single patch for display and xe.(jani,gustavo)
>
>Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>

Reviewed-by: Gustavo Sousa <gustavo.sousa@intel.com>

>---
> drivers/gpu/drm/i915/display/intel_display_device.c | 1 +
> drivers/gpu/drm/xe/xe_pci.c                         | 1 +
> include/drm/intel/pciids.h                          | 5 ++++-
> 3 files changed, 6 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/i915/display/intel_display_device.c b/drivers/gpu/drm/i915/display/intel_display_device.c
>index a002bc6ce7b0..a9a36176096f 100644
>--- a/drivers/gpu/drm/i915/display/intel_display_device.c
>+++ b/drivers/gpu/drm/i915/display/intel_display_device.c
>@@ -1482,6 +1482,7 @@ static const struct {
>         INTEL_LNL_IDS(INTEL_DISPLAY_DEVICE, &lnl_desc),
>         INTEL_BMG_IDS(INTEL_DISPLAY_DEVICE, &bmg_desc),
>         INTEL_PTL_IDS(INTEL_DISPLAY_DEVICE, &ptl_desc),
>+        INTEL_WCL_IDS(INTEL_DISPLAY_DEVICE, &ptl_desc),
> };
> 
> static const struct {
>diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
>index 77bee811a150..3f42b91efa28 100644
>--- a/drivers/gpu/drm/xe/xe_pci.c
>+++ b/drivers/gpu/drm/xe/xe_pci.c
>@@ -376,6 +376,7 @@ static const struct pci_device_id pciidlist[] = {
>         INTEL_LNL_IDS(INTEL_VGA_DEVICE, &lnl_desc),
>         INTEL_BMG_IDS(INTEL_VGA_DEVICE, &bmg_desc),
>         INTEL_PTL_IDS(INTEL_VGA_DEVICE, &ptl_desc),
>+        INTEL_WCL_IDS(INTEL_VGA_DEVICE, &ptl_desc),
>         { }
> };
> MODULE_DEVICE_TABLE(pci, pciidlist);
>diff --git a/include/drm/intel/pciids.h b/include/drm/intel/pciids.h
>index da6301a6fcea..69d4ae92d822 100644
>--- a/include/drm/intel/pciids.h
>+++ b/include/drm/intel/pciids.h
>@@ -877,7 +877,10 @@
>         MACRO__(0xB08F, ## __VA_ARGS__), \
>         MACRO__(0xB090, ## __VA_ARGS__), \
>         MACRO__(0xB0A0, ## __VA_ARGS__), \
>-        MACRO__(0xB0B0, ## __VA_ARGS__), \
>+        MACRO__(0xB0B0, ## __VA_ARGS__)
>+
>+/* WCL */
>+#define INTEL_WCL_IDS(MACRO__, ...) \
>         MACRO__(0xFD80, ## __VA_ARGS__), \
>         MACRO__(0xFD81, ## __VA_ARGS__)
> 
>-- 
>2.51.0
>

  reply	other threads:[~2025-09-19 20:20 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-19 16:22 [PATCH v2 0/3] drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A Dnyaneshwar Bhadane
2025-09-19 16:22 ` [PATCH v2 1/3] drm/pcids: Split PTL pciids group to make wcl subplatform Dnyaneshwar Bhadane
2025-09-19 20:19   ` Gustavo Sousa [this message]
2025-09-19 16:22 ` [PATCH v2 2/3] drm/i915/display: Add definition for wcl as subplatform Dnyaneshwar Bhadane
2025-09-19 20:32   ` Gustavo Sousa
2025-09-22  8:55     ` Jani Nikula
2025-09-19 16:22 ` [PATCH v2 3/3] drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A Dnyaneshwar Bhadane
2025-09-19 21:01   ` Gustavo Sousa
2025-09-22 15:14     ` Bhadane, Dnyaneshwar
2025-09-19 16:59 ` ✗ CI.checkpatch: warning for drm/i915/xe3: Restrict PTL intel_encoder_is_c10phy() to only PHY A (rev2) Patchwork
2025-09-19 17:00 ` ✓ CI.KUnit: success " Patchwork
2025-09-19 17:15 ` ✗ CI.checksparse: warning " Patchwork
2025-09-19 17:34 ` ✓ Xe.CI.BAT: success " Patchwork
2025-09-20  1:41 ` ✗ Xe.CI.Full: failure " Patchwork

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