[PATCH v3 0/5] drm/i915/display: reduce clock_gating interface between core and display

[PATCH v3 0/5] drm/i915/display: reduce clock_gating interface between core and display

[Luca Coelho]

Hi,

As a follow up to my previous clock-gating patches, this series
reduces the interface between core and display by combining all the
platform-specific exported functions and letting the display code
decide what to do for each platform.

In v2:

  * Reworked the previous version so we have only one entry point,
    instead of an _early() and a _late() function.  It turns out that
    this is not necessary because some platforms were using only
    _early() and the others were using _late() (not both);
    
  * Removed back-dependency from the display code into the core code
    by avoiding calls to intel_clock_gating_init() (Jani);

In v3:

   * Added intel_display_clock_gating.o to xe's Makefile to prevent
     linking breakage;

Please review.

Cheers,
Luca.


Luca Coelho (5):
  drm/i915/display: consolidate Gen9 clock gating initialization
  drm/i915/display: consolidate remaining clock gating initialization
  drm/i915/display: remove unnecessary clock_gating include from
    intel_display.c
  drm/i915/display: add a way to restore only display/pch registers in
    clock_gating
  drm/i915/display: split part of intel_display_reset_finish() to a new
    function

 drivers/gpu/drm/i915/display/intel_display.c  |  1 -
 .../i915/display/intel_display_clock_gating.c | 74 +++++++++++++++----
 .../i915/display/intel_display_clock_gating.h | 17 +----
 .../drm/i915/display/intel_display_power.c    |  4 +-
 .../drm/i915/display/intel_display_reset.c    | 19 +++--
 .../drm/i915/display/intel_display_reset.h    |  1 +
 drivers/gpu/drm/i915/gt/intel_reset.c         |  5 ++
 drivers/gpu/drm/i915/intel_clock_gating.c     | 30 +++-----
 drivers/gpu/drm/xe/Makefile                   |  1 +
 9 files changed, 95 insertions(+), 57 deletions(-)

-- 
2.53.0

[PATCH v3 1/5] drm/i915/display: consolidate Gen9 clock gating initialization

[Luca Coelho]

Instead of exporting many of the display clock gating functions,
consolidate them into a single function that checks the platform and
calls the appropriate platform-specific function.

Start consolidating the Gen 9 functions first into a new
intel_display_init_clock_gating() function.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 .../i915/display/intel_display_clock_gating.c | 24 +++++++++++++++----
 .../i915/display/intel_display_clock_gating.h |  6 +----
 drivers/gpu/drm/i915/intel_clock_gating.c     | 10 ++++----
 3 files changed, 25 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
index d036c7e5863d..d5ecdaeab421 100644
--- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
+++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
@@ -27,7 +27,7 @@ static void intel_display_gen9_init_clock_gating(struct intel_display *display)
 	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_MEMORY_WAKE);
 }
 
-void intel_display_skl_init_clock_gating(struct intel_display *display)
+static void intel_display_skl_init_clock_gating(struct intel_display *display)
 {
 	/*
 	 * WaCompressedResourceDisplayNewHashMode:skl,kbl
@@ -47,7 +47,7 @@ void intel_display_skl_init_clock_gating(struct intel_display *display)
 	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
 }
 
-void intel_display_kbl_init_clock_gating(struct intel_display *display)
+static void intel_display_kbl_init_clock_gating(struct intel_display *display)
 {
 	/*
 	 * WaCompressedResourceDisplayNewHashMode:skl,kbl
@@ -67,7 +67,7 @@ void intel_display_kbl_init_clock_gating(struct intel_display *display)
 	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
 }
 
-void intel_display_cfl_init_clock_gating(struct intel_display *display)
+static void intel_display_cfl_init_clock_gating(struct intel_display *display)
 {
 	/*
 	 * WaCompressedResourceDisplayNewHashMode:skl,kbl (and cfl, cml)
@@ -93,7 +93,7 @@ void intel_display_cfl_init_clock_gating(struct intel_display *display)
 	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
 }
 
-void intel_display_bxt_init_clock_gating(struct intel_display *display)
+static void intel_display_bxt_init_clock_gating(struct intel_display *display)
 {
 	intel_display_gen9_init_clock_gating(display);
 
@@ -120,7 +120,7 @@ void intel_display_bxt_init_clock_gating(struct intel_display *display)
 	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
 }
 
-void intel_display_glk_init_clock_gating(struct intel_display *display)
+static void intel_display_glk_init_clock_gating(struct intel_display *display)
 {
 	intel_display_gen9_init_clock_gating(display);
 
@@ -268,3 +268,17 @@ void intel_display_i965gm_init_clock_gating(struct intel_display *display)
 {
 	intel_de_write(display, DSPCLK_GATE_D, 0);
 }
+
+void intel_display_init_clock_gating(struct intel_display *display)
+{
+	if (display->platform.skylake)
+		intel_display_skl_init_clock_gating(display);
+	else if (display->platform.kabylake)
+		intel_display_kbl_init_clock_gating(display);
+	else if (display->platform.coffeelake || display->platform.cometlake)
+		intel_display_cfl_init_clock_gating(display);
+	else if (display->platform.broxton)
+		intel_display_bxt_init_clock_gating(display);
+	else if (display->platform.geminilake)
+		intel_display_glk_init_clock_gating(display);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
index b6dd34ca92dd..4e50e388656a 100644
--- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
+++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
@@ -8,11 +8,7 @@
 
 struct intel_display;
 
-void intel_display_skl_init_clock_gating(struct intel_display *display);
-void intel_display_kbl_init_clock_gating(struct intel_display *display);
-void intel_display_cfl_init_clock_gating(struct intel_display *display);
-void intel_display_bxt_init_clock_gating(struct intel_display *display);
-void intel_display_glk_init_clock_gating(struct intel_display *display);
+void intel_display_init_clock_gating(struct intel_display *display);
 void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display);
 void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display);
 void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c
index 86bdeb20f427..84f838c660fd 100644
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -57,12 +57,12 @@ static void bxt_init_clock_gating(struct drm_i915_private *i915)
 	 */
 	intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
 
-	intel_display_bxt_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 }
 
 static void glk_init_clock_gating(struct drm_i915_private *i915)
 {
-	intel_display_glk_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 }
 
 static void ilk_init_clock_gating(struct drm_i915_private *i915)
@@ -170,7 +170,7 @@ static void cfl_init_clock_gating(struct drm_i915_private *i915)
 	/* WAC6entrylatency:cfl */
 	intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);
 
-	intel_display_cfl_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 }
 
 static void kbl_init_clock_gating(struct drm_i915_private *i915)
@@ -188,7 +188,7 @@ static void kbl_init_clock_gating(struct drm_i915_private *i915)
 		intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1,
 				 0, GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
 
-	intel_display_kbl_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 }
 
 static void skl_init_clock_gating(struct drm_i915_private *i915)
@@ -200,7 +200,7 @@ static void skl_init_clock_gating(struct drm_i915_private *i915)
 	/* WAC6entrylatency:skl */
 	intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);
 
-	intel_display_skl_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 }
 
 static void bdw_init_clock_gating(struct drm_i915_private *i915)
-- 
2.53.0

[PATCH v3 2/5] drm/i915/display: consolidate remaining clock gating initialization

[Luca Coelho]

The remaining platform-specific display clock gating functions are
still called directly by i915.

Extend intel_display_init_clock_gating() so that it calls the correct
functions for the remaining platforms.

This groups Broadwell's three display operations into a single
function.  This changes the call order slighlty in relation to
non-display workarounds, but it shouldn't be a problem.  For IVB, we
move the trickle-feed programming to the display helper and runs with
the other display register setup.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 .../i915/display/intel_display_clock_gating.c | 43 ++++++++++++++-----
 .../i915/display/intel_display_clock_gating.h | 10 -----
 drivers/gpu/drm/i915/intel_clock_gating.c     | 20 +++------
 3 files changed, 40 insertions(+), 33 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
index d5ecdaeab421..ef1ee72494df 100644
--- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
+++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
@@ -134,13 +134,13 @@ static void intel_display_glk_init_clock_gating(struct intel_display *display)
 		       PWM1_GATING_DIS | PWM2_GATING_DIS);
 }
 
-void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display)
+static void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display)
 {
 	/* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */
 	intel_de_rmw(display, CHICKEN_PIPESL_1(PIPE_A), 0, HSW_FBCQ_DIS);
 }
 
-void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display)
+static void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display)
 {
 	enum pipe pipe;
 
@@ -154,14 +154,21 @@ void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display)
 	}
 }
 
-void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display)
+static void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display)
 {
 	/* WaKVMNotificationOnConfigChange:bdw */
 	intel_de_rmw(display, CHICKEN_PAR2_1, 0,
 		     KVM_CONFIG_CHANGE_NOTIFICATION_SELECT);
 }
 
-void intel_display_hsw_init_clock_gating(struct intel_display *display)
+static void intel_display_bdw_init_clock_gating(struct intel_display *display)
+{
+	intel_display_bdw_clock_gating_disable_fbcq(display);
+	intel_display_bdw_clock_gating_vblank_in_srd(display);
+	intel_display_bdw_clock_gating_kvm_notif(display);
+}
+
+static void intel_display_hsw_init_clock_gating(struct intel_display *display)
 {
 	enum pipe pipe;
 
@@ -178,7 +185,7 @@ void intel_display_hsw_init_clock_gating(struct intel_display *display)
 	}
 }
 
-void intel_display_disable_trickle_feed(struct intel_display *display)
+static void intel_display_disable_trickle_feed(struct intel_display *display)
 {
 	enum pipe pipe;
 
@@ -191,7 +198,7 @@ void intel_display_disable_trickle_feed(struct intel_display *display)
 	}
 }
 
-void intel_display_ilk_init_clock_gating(struct intel_display *display)
+static void intel_display_ilk_init_clock_gating(struct intel_display *display)
 {
 	u32 dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
 
@@ -223,7 +230,7 @@ void intel_display_ilk_init_clock_gating(struct intel_display *display)
 	intel_display_disable_trickle_feed(display);
 }
 
-void intel_display_gen6_init_clock_gating(struct intel_display *display)
+static void intel_display_gen6_init_clock_gating(struct intel_display *display)
 {
 	u32 dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
 
@@ -244,13 +251,15 @@ void intel_display_gen6_init_clock_gating(struct intel_display *display)
 	intel_display_disable_trickle_feed(display);
 }
 
-void intel_display_ivb_init_clock_gating(struct intel_display *display)
+static void intel_display_ivb_init_clock_gating(struct intel_display *display)
 {
 	intel_de_write(display, ILK_DSPCLK_GATE_D, ILK_VRHUNIT_CLOCK_GATE_DISABLE);
 	intel_de_rmw(display, ILK_DISPLAY_CHICKEN1, 0, ILK_FBCQ_DIS);
+
+	intel_display_disable_trickle_feed(display);
 }
 
-void intel_display_g4x_init_clock_gating(struct intel_display *display)
+static void intel_display_g4x_init_clock_gating(struct intel_display *display)
 {
 	u32 dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE |
 			  OVRUNIT_CLOCK_GATE_DISABLE |
@@ -264,7 +273,7 @@ void intel_display_g4x_init_clock_gating(struct intel_display *display)
 	intel_display_disable_trickle_feed(display);
 }
 
-void intel_display_i965gm_init_clock_gating(struct intel_display *display)
+static void intel_display_i965gm_init_clock_gating(struct intel_display *display)
 {
 	intel_de_write(display, DSPCLK_GATE_D, 0);
 }
@@ -281,4 +290,18 @@ void intel_display_init_clock_gating(struct intel_display *display)
 		intel_display_bxt_init_clock_gating(display);
 	else if (display->platform.geminilake)
 		intel_display_glk_init_clock_gating(display);
+	else if (display->platform.broadwell)
+		intel_display_bdw_init_clock_gating(display);
+	else if (display->platform.haswell)
+		intel_display_hsw_init_clock_gating(display);
+	else if (display->platform.ivybridge)
+		intel_display_ivb_init_clock_gating(display);
+	else if (display->platform.sandybridge)
+		intel_display_gen6_init_clock_gating(display);
+	else if (display->platform.ironlake)
+		intel_display_ilk_init_clock_gating(display);
+	else if (display->platform.g4x)
+		intel_display_g4x_init_clock_gating(display);
+	else if (display->platform.i965gm)
+		intel_display_i965gm_init_clock_gating(display);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
index 4e50e388656a..dbfa5892cffe 100644
--- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
+++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
@@ -9,15 +9,5 @@
 struct intel_display;
 
 void intel_display_init_clock_gating(struct intel_display *display);
-void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display);
-void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display);
-void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display);
-void intel_display_hsw_init_clock_gating(struct intel_display *display);
-void intel_display_disable_trickle_feed(struct intel_display *display);
-void intel_display_ilk_init_clock_gating(struct intel_display *display);
-void intel_display_gen6_init_clock_gating(struct intel_display *display);
-void intel_display_ivb_init_clock_gating(struct intel_display *display);
-void intel_display_g4x_init_clock_gating(struct intel_display *display);
-void intel_display_i965gm_init_clock_gating(struct intel_display *display);
 
 #endif /* __INTEL_DISPLAY_CLOCK_GATING_H__ */
diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c
index 84f838c660fd..c5c4441f3a61 100644
--- a/drivers/gpu/drm/i915/intel_clock_gating.c
+++ b/drivers/gpu/drm/i915/intel_clock_gating.c
@@ -73,7 +73,7 @@ static void ilk_init_clock_gating(struct drm_i915_private *i915)
 	intel_uncore_write(&i915->uncore, PCH_3DCGDIS1,
 			   VFMUNIT_CLOCK_GATE_DISABLE);
 
-	intel_display_ilk_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 	intel_pch_init_clock_gating(i915->display);
 }
 
@@ -90,7 +90,7 @@ static void gen6_check_mch_setup(struct drm_i915_private *i915)
 
 static void gen6_init_clock_gating(struct drm_i915_private *i915)
 {
-	intel_display_gen6_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 
 	intel_uncore_write(&i915->uncore, GEN6_UCGCTL1,
 			   intel_uncore_read(&i915->uncore, GEN6_UCGCTL1) |
@@ -205,13 +205,11 @@ static void skl_init_clock_gating(struct drm_i915_private *i915)
 
 static void bdw_init_clock_gating(struct drm_i915_private *i915)
 {
-	intel_display_bdw_clock_gating_disable_fbcq(i915->display);
+	intel_display_init_clock_gating(i915->display);
 
 	/* WaSwitchSolVfFArbitrationPriority:bdw */
 	intel_uncore_rmw(&i915->uncore, GAM_ECOCHK, 0, HSW_ECOCHK_ARB_PRIO_SOL);
 
-	intel_display_bdw_clock_gating_vblank_in_srd(i915->display);
-
 	/* WaVSRefCountFullforceMissDisable:bdw */
 	/* WaDSRefCountFullforceMissDisable:bdw */
 	intel_uncore_rmw(&i915->uncore, GEN7_FF_THREAD_MODE,
@@ -226,8 +224,6 @@ static void bdw_init_clock_gating(struct drm_i915_private *i915)
 	/* WaProgramL3SqcReg1Default:bdw */
 	gen8_set_l3sqc_credits(i915, 30, 2);
 
-	intel_display_bdw_clock_gating_kvm_notif(i915->display);
-
 	intel_pch_init_clock_gating(i915->display);
 
 	/* WaDisableDopClockGating:bdw
@@ -240,7 +236,7 @@ static void bdw_init_clock_gating(struct drm_i915_private *i915)
 
 static void hsw_init_clock_gating(struct drm_i915_private *i915)
 {
-	intel_display_hsw_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 
 	/* This is required by WaCatErrorRejectionIssue:hsw */
 	intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
@@ -256,7 +252,7 @@ static void ivb_init_clock_gating(struct drm_i915_private *i915)
 {
 	struct intel_display *display = i915->display;
 
-	intel_display_ivb_init_clock_gating(display);
+	intel_display_init_clock_gating(display);
 
 	/* WaDisableBackToBackFlipFix:ivb */
 	intel_uncore_write(&i915->uncore, IVB_CHICKEN3,
@@ -285,8 +281,6 @@ static void ivb_init_clock_gating(struct drm_i915_private *i915)
 	intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
 			 0, GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
 
-	intel_display_disable_trickle_feed(display);
-
 	intel_uncore_rmw(&i915->uncore, GEN6_MBCUNIT_SNPCR, GEN6_MBC_SNPCR_MASK,
 			 GEN6_MBC_SNPCR_MED);
 
@@ -362,7 +356,7 @@ static void g4x_init_clock_gating(struct drm_i915_private *i915)
 			   GS_UNIT_CLOCK_GATE_DISABLE |
 			   CL_UNIT_CLOCK_GATE_DISABLE);
 	intel_uncore_write(&i915->uncore, RAMCLK_GATE_D, 0);
-	intel_display_g4x_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 }
 
 static void i965gm_init_clock_gating(struct drm_i915_private *i915)
@@ -371,7 +365,7 @@ static void i965gm_init_clock_gating(struct drm_i915_private *i915)
 
 	intel_uncore_write(uncore, RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);
 	intel_uncore_write(uncore, RENCLK_GATE_D2, 0);
-	intel_display_i965gm_init_clock_gating(i915->display);
+	intel_display_init_clock_gating(i915->display);
 	intel_uncore_write(uncore, RAMCLK_GATE_D, 0);
 	intel_uncore_write16(uncore, DEUC, 0);
 	intel_uncore_write(uncore,
-- 
2.53.0

[PATCH v3 3/5] drm/i915/display: remove unnecessary clock_gating include from intel_display.c

[Luca Coelho]

We don't use any of the functions inclued in intel_clock_gating.h in
the intel_display.c code anymore.  Remove the respective include.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 553c60d452dd..fc30a455bed3 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -60,7 +60,6 @@
 #include "intel_bo.h"
 #include "intel_bw.h"
 #include "intel_cdclk.h"
-#include "intel_clock_gating.h"
 #include "intel_cmtg.h"
 #include "intel_color.h"
 #include "intel_crt.h"
-- 
2.53.0

[PATCH v3 4/5] drm/i915/display: add a way to restore only display/pch registers in clock_gating

[Luca Coelho]

We are currently calling intel_clock_gating_init() when disabling PC8
in the display code.  This adds an unnecessary dependency to the core
i915 code.  Only the display and PCH registers need to be restored
here, so we can do this directly in the display code, removing the
dependency.

Add intel_display_restore_clock_gating() to do this.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_clock_gating.c | 7 +++++++
 drivers/gpu/drm/i915/display/intel_display_clock_gating.h | 1 +
 drivers/gpu/drm/i915/display/intel_display_power.c        | 4 ++--
 drivers/gpu/drm/xe/Makefile                               | 1 +
 4 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
index ef1ee72494df..6716c377ef93 100644
--- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
+++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
@@ -11,6 +11,7 @@
 #include "intel_display_clock_gating.h"
 #include "intel_display_core.h"
 #include "intel_display_regs.h"
+#include "intel_pch.h"
 
 static void intel_display_gen9_init_clock_gating(struct intel_display *display)
 {
@@ -305,3 +306,9 @@ void intel_display_init_clock_gating(struct intel_display *display)
 	else if (display->platform.i965gm)
 		intel_display_i965gm_init_clock_gating(display);
 }
+
+void intel_display_restore_clock_gating(struct intel_display *display)
+{
+	intel_display_init_clock_gating(display);
+	intel_pch_init_clock_gating(display);
+}
diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
index dbfa5892cffe..074708a22436 100644
--- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
+++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
@@ -9,5 +9,6 @@
 struct intel_display;
 
 void intel_display_init_clock_gating(struct intel_display *display);
+void intel_display_restore_clock_gating(struct intel_display *display);
 
 #endif /* __INTEL_DISPLAY_CLOCK_GATING_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
index 0ebec6e0c240..aab934f43530 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -12,7 +12,7 @@
 
 #include "intel_backlight_regs.h"
 #include "intel_cdclk.h"
-#include "intel_clock_gating.h"
+#include "intel_display_clock_gating.h"
 #include "intel_combo_phy.h"
 #include "intel_crtc.h"
 #include "intel_de.h"
@@ -1588,7 +1588,7 @@ static void hsw_disable_pc8(struct intel_display *display)
 	intel_init_pch_refclk(display);
 
 	/* Many display registers don't survive PC8+ */
-	intel_clock_gating_init(display->drm);
+	intel_display_restore_clock_gating(display);
 }
 
 static void intel_pch_reset_handshake(struct intel_display *display,
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 92134709d998..b4c90bf50951 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -258,6 +258,7 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
 	i915-display/intel_ddi_buf_trans.o \
 	i915-display/intel_de.o \
 	i915-display/intel_display.o \
+	i915-display/intel_display_clock_gating.o \
 	i915-display/intel_display_conversion.o \
 	i915-display/intel_display_device.o \
 	i915-display/intel_display_driver.o \
-- 
2.53.0

[PATCH v3 5/5] drm/i915/display: split part of intel_display_reset_finish() to a new function

[Luca Coelho]

In the intel_display_reset_finish() function, we are currently calling
the non-display function intel_clock_gating_init(), creating an
unnecessary dependency.

In order to avoid this, split out the function calls that happen
before the call to intel_clock_gating_init() to a new function that
can be directly called by intel_gt_reset_global(), which then calls
intel_clock_gating_init() itself, if needed.

Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
 .../drm/i915/display/intel_display_reset.c    | 19 +++++++++++++------
 .../drm/i915/display/intel_display_reset.h    |  1 +
 drivers/gpu/drm/i915/gt/intel_reset.c         |  5 +++++
 3 files changed, 19 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.c b/drivers/gpu/drm/i915/display/intel_display_reset.c
index 504ec7043cd9..529dd1c1fa5d 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.c
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.c
@@ -8,7 +8,6 @@
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_print.h>
 
-#include "intel_clock_gating.h"
 #include "intel_cx0_phy.h"
 #include "intel_display_core.h"
 #include "intel_display_driver.h"
@@ -73,6 +72,17 @@ void intel_display_reset_prepare(struct intel_display *display)
 	state->acquire_ctx = ctx;
 }
 
+bool intel_display_reset_reinit(struct intel_display *display)
+{
+	if (!display->restore.modeset_state)
+		return false;
+
+	intel_pps_unlock_regs_wa(display);
+	intel_display_driver_init_hw(display);
+
+	return true;
+}
+
 void intel_display_reset_finish(struct intel_display *display, bool test_only)
 {
 	struct drm_modeset_acquire_ctx *ctx = &display->restore.reset_ctx;
@@ -94,12 +104,9 @@ void intel_display_reset_finish(struct intel_display *display, bool test_only)
 		}
 	} else {
 		/*
-		 * The display has been reset as well,
-		 * so need a full re-initialization.
+		 * The display has been reset as well, so complete the
+		 * re-initialization started by intel_display_reset_reinit().
 		 */
-		intel_pps_unlock_regs_wa(display);
-		intel_display_driver_init_hw(display);
-		intel_clock_gating_init(display->drm);
 		intel_cx0_pll_power_save_wa(display);
 		intel_hpd_init(display);
 
diff --git a/drivers/gpu/drm/i915/display/intel_display_reset.h b/drivers/gpu/drm/i915/display/intel_display_reset.h
index b88c330a3441..e741e969d877 100644
--- a/drivers/gpu/drm/i915/display/intel_display_reset.h
+++ b/drivers/gpu/drm/i915/display/intel_display_reset.h
@@ -13,6 +13,7 @@ struct intel_display;
 bool intel_display_reset_supported(struct intel_display *display);
 bool intel_display_reset_test(struct intel_display *display);
 void intel_display_reset_prepare(struct intel_display *display);
+bool intel_display_reset_reinit(struct intel_display *display);
 void intel_display_reset_finish(struct intel_display *display, bool test_only);
 
 void intel_display_reset_debugfs_register(struct intel_display *display);
diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 6053f3e8aa27..be282cfbe615 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -24,6 +24,7 @@
 #include "i915_reg.h"
 #include "i915_wait_util.h"
 #include "intel_breadcrumbs.h"
+#include "intel_clock_gating.h"
 #include "intel_engine_pm.h"
 #include "intel_engine_regs.h"
 #include "intel_gt.h"
@@ -1445,6 +1446,10 @@ static void intel_gt_reset_global(struct intel_gt *gt,
 
 		intel_gt_reset(gt, engine_mask, reason);
 
+		if (need_display_reset &&
+		    intel_display_reset_reinit(display))
+			intel_clock_gating_init(&i915->drm);
+
 		if (reset_display)
 			intel_display_reset_finish(display, !need_display_reset);
 	}
-- 
2.53.0

Re: [PATCH v3 4/5] drm/i915/display: add a way to restore only display/pch registers in clock_gating

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] Replacing `intel_clock_gating_init()` with `intel_display_restore_clock_gating()` in `hsw_disable_pc8()` causes GT and uncore clock gating workarounds to be permanently lost after runtime suspend on Haswell and Broadwell.
--

--- Patch [4]: [PATCH v3 4/5] drm/i915/display: add a way to restore only display/pch registers in clock_gating ---
commit d0464f11c51adf2ddadf337dda54d674de543139
Author: Luca Coelho <luciano.coelho@intel.com>
drm/i915/display: add a way to restore only display/pch registers in clock_gating

This commit introduces intel_display_restore_clock_gating() to isolate display
and PCH register restoration from core i915 clock gating initialization. It
updates hsw_disable_pc8() to use this new function instead of the broader
intel_clock_gating_init().

> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 0ebec6e0c2400..aab934f435308 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c

[ ... ]

> @@ -1588,7 +1588,7 @@ static void hsw_disable_pc8(struct intel_display *display)
>  	intel_init_pch_refclk(display);
>  
>  	/* Many display registers don't survive PC8+ */
> -	intel_clock_gating_init(display->drm);
> +	intel_display_restore_clock_gating(display);
>  }

[Severity: High]
Does replacing intel_clock_gating_init() with
intel_display_restore_clock_gating() here cause GT and uncore clock gating
workarounds to be permanently lost after runtime suspend on Haswell and
Broadwell?

When the hardware enters PC8 during runtime suspend, it loses uncore and GT
register state. Upon system wake, hsw_disable_pc8() is called in the resume
path. Bypassing the core intel_clock_gating_init() seems to leave the GT
workarounds unrestored.

Could this lead to subsequent GPU workloads executing with missing
workarounds, potentially causing GPU hangs or system instability under load?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260817092911.342072-1-luciano.coelho@intel.com?part=4

Re: [PATCH v3 1/5] drm/i915/display: consolidate Gen9 clock gating initialization

[Jani Nikula]

On Mon, 17 Aug 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
> Instead of exporting many of the display clock gating functions,
> consolidate them into a single function that checks the platform and
> calls the appropriate platform-specific function.
>
> Start consolidating the Gen 9 functions first into a new
> intel_display_init_clock_gating() function.
>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

> ---
>  .../i915/display/intel_display_clock_gating.c | 24 +++++++++++++++----
>  .../i915/display/intel_display_clock_gating.h |  6 +----
>  drivers/gpu/drm/i915/intel_clock_gating.c     | 10 ++++----
>  3 files changed, 25 insertions(+), 15 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
> index d036c7e5863d..d5ecdaeab421 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
> @@ -27,7 +27,7 @@ static void intel_display_gen9_init_clock_gating(struct intel_display *display)
>  	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_MEMORY_WAKE);
>  }
>  
> -void intel_display_skl_init_clock_gating(struct intel_display *display)
> +static void intel_display_skl_init_clock_gating(struct intel_display *display)
>  {
>  	/*
>  	 * WaCompressedResourceDisplayNewHashMode:skl,kbl
> @@ -47,7 +47,7 @@ void intel_display_skl_init_clock_gating(struct intel_display *display)
>  	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
>  }
>  
> -void intel_display_kbl_init_clock_gating(struct intel_display *display)
> +static void intel_display_kbl_init_clock_gating(struct intel_display *display)
>  {
>  	/*
>  	 * WaCompressedResourceDisplayNewHashMode:skl,kbl
> @@ -67,7 +67,7 @@ void intel_display_kbl_init_clock_gating(struct intel_display *display)
>  	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
>  }
>  
> -void intel_display_cfl_init_clock_gating(struct intel_display *display)
> +static void intel_display_cfl_init_clock_gating(struct intel_display *display)
>  {
>  	/*
>  	 * WaCompressedResourceDisplayNewHashMode:skl,kbl (and cfl, cml)
> @@ -93,7 +93,7 @@ void intel_display_cfl_init_clock_gating(struct intel_display *display)
>  	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
>  }
>  
> -void intel_display_bxt_init_clock_gating(struct intel_display *display)
> +static void intel_display_bxt_init_clock_gating(struct intel_display *display)
>  {
>  	intel_display_gen9_init_clock_gating(display);
>  
> @@ -120,7 +120,7 @@ void intel_display_bxt_init_clock_gating(struct intel_display *display)
>  	intel_de_rmw(display, DISP_ARB_CTL, 0, DISP_FBC_WM_DIS);
>  }
>  
> -void intel_display_glk_init_clock_gating(struct intel_display *display)
> +static void intel_display_glk_init_clock_gating(struct intel_display *display)
>  {
>  	intel_display_gen9_init_clock_gating(display);
>  
> @@ -268,3 +268,17 @@ void intel_display_i965gm_init_clock_gating(struct intel_display *display)
>  {
>  	intel_de_write(display, DSPCLK_GATE_D, 0);
>  }
> +
> +void intel_display_init_clock_gating(struct intel_display *display)
> +{
> +	if (display->platform.skylake)
> +		intel_display_skl_init_clock_gating(display);
> +	else if (display->platform.kabylake)
> +		intel_display_kbl_init_clock_gating(display);
> +	else if (display->platform.coffeelake || display->platform.cometlake)
> +		intel_display_cfl_init_clock_gating(display);
> +	else if (display->platform.broxton)
> +		intel_display_bxt_init_clock_gating(display);
> +	else if (display->platform.geminilake)
> +		intel_display_glk_init_clock_gating(display);
> +}
> diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
> index b6dd34ca92dd..4e50e388656a 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
> @@ -8,11 +8,7 @@
>  
>  struct intel_display;
>  
> -void intel_display_skl_init_clock_gating(struct intel_display *display);
> -void intel_display_kbl_init_clock_gating(struct intel_display *display);
> -void intel_display_cfl_init_clock_gating(struct intel_display *display);
> -void intel_display_bxt_init_clock_gating(struct intel_display *display);
> -void intel_display_glk_init_clock_gating(struct intel_display *display);
> +void intel_display_init_clock_gating(struct intel_display *display);
>  void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display);
>  void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display);
>  void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display);
> diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c
> index 86bdeb20f427..84f838c660fd 100644
> --- a/drivers/gpu/drm/i915/intel_clock_gating.c
> +++ b/drivers/gpu/drm/i915/intel_clock_gating.c
> @@ -57,12 +57,12 @@ static void bxt_init_clock_gating(struct drm_i915_private *i915)
>  	 */
>  	intel_uncore_rmw(&i915->uncore, GEN8_UCGCTL6, 0, GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ);
>  
> -	intel_display_bxt_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  }
>  
>  static void glk_init_clock_gating(struct drm_i915_private *i915)
>  {
> -	intel_display_glk_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  }
>  
>  static void ilk_init_clock_gating(struct drm_i915_private *i915)
> @@ -170,7 +170,7 @@ static void cfl_init_clock_gating(struct drm_i915_private *i915)
>  	/* WAC6entrylatency:cfl */
>  	intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);
>  
> -	intel_display_cfl_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  }
>  
>  static void kbl_init_clock_gating(struct drm_i915_private *i915)
> @@ -188,7 +188,7 @@ static void kbl_init_clock_gating(struct drm_i915_private *i915)
>  		intel_uncore_rmw(&i915->uncore, GEN6_UCGCTL1,
>  				 0, GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
>  
> -	intel_display_kbl_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  }
>  
>  static void skl_init_clock_gating(struct drm_i915_private *i915)
> @@ -200,7 +200,7 @@ static void skl_init_clock_gating(struct drm_i915_private *i915)
>  	/* WAC6entrylatency:skl */
>  	intel_uncore_rmw(&i915->uncore, FBC_LLC_READ_CTRL, 0, FBC_LLC_FULLY_OPEN);
>  
> -	intel_display_skl_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  }
>  
>  static void bdw_init_clock_gating(struct drm_i915_private *i915)

-- 
Jani Nikula, Intel

Re: [PATCH v3 2/5] drm/i915/display: consolidate remaining clock gating initialization

[Jani Nikula]

On Mon, 17 Aug 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
> The remaining platform-specific display clock gating functions are
> still called directly by i915.
>
> Extend intel_display_init_clock_gating() so that it calls the correct
> functions for the remaining platforms.
>
> This groups Broadwell's three display operations into a single
> function.  This changes the call order slighlty in relation to

*slightly

> non-display workarounds, but it shouldn't be a problem.  For IVB, we
> move the trickle-feed programming to the display helper and runs with
> the other display register setup.

In general, I'd prefer not mixing the refactoring and the functional
changes, e.g. the reordering could've come first as a tiny functional
change, and the rest could be just movement.

But it's benign.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>

>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
>  .../i915/display/intel_display_clock_gating.c | 43 ++++++++++++++-----
>  .../i915/display/intel_display_clock_gating.h | 10 -----
>  drivers/gpu/drm/i915/intel_clock_gating.c     | 20 +++------
>  3 files changed, 40 insertions(+), 33 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
> index d5ecdaeab421..ef1ee72494df 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.c
> @@ -134,13 +134,13 @@ static void intel_display_glk_init_clock_gating(struct intel_display *display)
>  		       PWM1_GATING_DIS | PWM2_GATING_DIS);
>  }
>  
> -void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display)
> +static void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display)
>  {
>  	/* WaFbcAsynchFlipDisableFbcQueue:hsw,bdw */
>  	intel_de_rmw(display, CHICKEN_PIPESL_1(PIPE_A), 0, HSW_FBCQ_DIS);
>  }
>  
> -void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display)
> +static void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display)
>  {
>  	enum pipe pipe;
>  
> @@ -154,14 +154,21 @@ void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display)
>  	}
>  }
>  
> -void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display)
> +static void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display)
>  {
>  	/* WaKVMNotificationOnConfigChange:bdw */
>  	intel_de_rmw(display, CHICKEN_PAR2_1, 0,
>  		     KVM_CONFIG_CHANGE_NOTIFICATION_SELECT);
>  }
>  
> -void intel_display_hsw_init_clock_gating(struct intel_display *display)
> +static void intel_display_bdw_init_clock_gating(struct intel_display *display)
> +{
> +	intel_display_bdw_clock_gating_disable_fbcq(display);
> +	intel_display_bdw_clock_gating_vblank_in_srd(display);
> +	intel_display_bdw_clock_gating_kvm_notif(display);
> +}
> +
> +static void intel_display_hsw_init_clock_gating(struct intel_display *display)
>  {
>  	enum pipe pipe;
>  
> @@ -178,7 +185,7 @@ void intel_display_hsw_init_clock_gating(struct intel_display *display)
>  	}
>  }
>  
> -void intel_display_disable_trickle_feed(struct intel_display *display)
> +static void intel_display_disable_trickle_feed(struct intel_display *display)
>  {
>  	enum pipe pipe;
>  
> @@ -191,7 +198,7 @@ void intel_display_disable_trickle_feed(struct intel_display *display)
>  	}
>  }
>  
> -void intel_display_ilk_init_clock_gating(struct intel_display *display)
> +static void intel_display_ilk_init_clock_gating(struct intel_display *display)
>  {
>  	u32 dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
>  
> @@ -223,7 +230,7 @@ void intel_display_ilk_init_clock_gating(struct intel_display *display)
>  	intel_display_disable_trickle_feed(display);
>  }
>  
> -void intel_display_gen6_init_clock_gating(struct intel_display *display)
> +static void intel_display_gen6_init_clock_gating(struct intel_display *display)
>  {
>  	u32 dspclk_gate = ILK_VRHUNIT_CLOCK_GATE_DISABLE;
>  
> @@ -244,13 +251,15 @@ void intel_display_gen6_init_clock_gating(struct intel_display *display)
>  	intel_display_disable_trickle_feed(display);
>  }
>  
> -void intel_display_ivb_init_clock_gating(struct intel_display *display)
> +static void intel_display_ivb_init_clock_gating(struct intel_display *display)
>  {
>  	intel_de_write(display, ILK_DSPCLK_GATE_D, ILK_VRHUNIT_CLOCK_GATE_DISABLE);
>  	intel_de_rmw(display, ILK_DISPLAY_CHICKEN1, 0, ILK_FBCQ_DIS);
> +
> +	intel_display_disable_trickle_feed(display);
>  }
>  
> -void intel_display_g4x_init_clock_gating(struct intel_display *display)
> +static void intel_display_g4x_init_clock_gating(struct intel_display *display)
>  {
>  	u32 dspclk_gate = VRHUNIT_CLOCK_GATE_DISABLE |
>  			  OVRUNIT_CLOCK_GATE_DISABLE |
> @@ -264,7 +273,7 @@ void intel_display_g4x_init_clock_gating(struct intel_display *display)
>  	intel_display_disable_trickle_feed(display);
>  }
>  
> -void intel_display_i965gm_init_clock_gating(struct intel_display *display)
> +static void intel_display_i965gm_init_clock_gating(struct intel_display *display)
>  {
>  	intel_de_write(display, DSPCLK_GATE_D, 0);
>  }
> @@ -281,4 +290,18 @@ void intel_display_init_clock_gating(struct intel_display *display)
>  		intel_display_bxt_init_clock_gating(display);
>  	else if (display->platform.geminilake)
>  		intel_display_glk_init_clock_gating(display);
> +	else if (display->platform.broadwell)
> +		intel_display_bdw_init_clock_gating(display);
> +	else if (display->platform.haswell)
> +		intel_display_hsw_init_clock_gating(display);
> +	else if (display->platform.ivybridge)
> +		intel_display_ivb_init_clock_gating(display);
> +	else if (display->platform.sandybridge)
> +		intel_display_gen6_init_clock_gating(display);
> +	else if (display->platform.ironlake)
> +		intel_display_ilk_init_clock_gating(display);
> +	else if (display->platform.g4x)
> +		intel_display_g4x_init_clock_gating(display);
> +	else if (display->platform.i965gm)
> +		intel_display_i965gm_init_clock_gating(display);
>  }
> diff --git a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
> index 4e50e388656a..dbfa5892cffe 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_clock_gating.h
> @@ -9,15 +9,5 @@
>  struct intel_display;
>  
>  void intel_display_init_clock_gating(struct intel_display *display);
> -void intel_display_bdw_clock_gating_disable_fbcq(struct intel_display *display);
> -void intel_display_bdw_clock_gating_vblank_in_srd(struct intel_display *display);
> -void intel_display_bdw_clock_gating_kvm_notif(struct intel_display *display);
> -void intel_display_hsw_init_clock_gating(struct intel_display *display);
> -void intel_display_disable_trickle_feed(struct intel_display *display);
> -void intel_display_ilk_init_clock_gating(struct intel_display *display);
> -void intel_display_gen6_init_clock_gating(struct intel_display *display);
> -void intel_display_ivb_init_clock_gating(struct intel_display *display);
> -void intel_display_g4x_init_clock_gating(struct intel_display *display);
> -void intel_display_i965gm_init_clock_gating(struct intel_display *display);
>  
>  #endif /* __INTEL_DISPLAY_CLOCK_GATING_H__ */
> diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c b/drivers/gpu/drm/i915/intel_clock_gating.c
> index 84f838c660fd..c5c4441f3a61 100644
> --- a/drivers/gpu/drm/i915/intel_clock_gating.c
> +++ b/drivers/gpu/drm/i915/intel_clock_gating.c
> @@ -73,7 +73,7 @@ static void ilk_init_clock_gating(struct drm_i915_private *i915)
>  	intel_uncore_write(&i915->uncore, PCH_3DCGDIS1,
>  			   VFMUNIT_CLOCK_GATE_DISABLE);
>  
> -	intel_display_ilk_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  	intel_pch_init_clock_gating(i915->display);
>  }
>  
> @@ -90,7 +90,7 @@ static void gen6_check_mch_setup(struct drm_i915_private *i915)
>  
>  static void gen6_init_clock_gating(struct drm_i915_private *i915)
>  {
> -	intel_display_gen6_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  
>  	intel_uncore_write(&i915->uncore, GEN6_UCGCTL1,
>  			   intel_uncore_read(&i915->uncore, GEN6_UCGCTL1) |
> @@ -205,13 +205,11 @@ static void skl_init_clock_gating(struct drm_i915_private *i915)
>  
>  static void bdw_init_clock_gating(struct drm_i915_private *i915)
>  {
> -	intel_display_bdw_clock_gating_disable_fbcq(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  
>  	/* WaSwitchSolVfFArbitrationPriority:bdw */
>  	intel_uncore_rmw(&i915->uncore, GAM_ECOCHK, 0, HSW_ECOCHK_ARB_PRIO_SOL);
>  
> -	intel_display_bdw_clock_gating_vblank_in_srd(i915->display);
> -
>  	/* WaVSRefCountFullforceMissDisable:bdw */
>  	/* WaDSRefCountFullforceMissDisable:bdw */
>  	intel_uncore_rmw(&i915->uncore, GEN7_FF_THREAD_MODE,
> @@ -226,8 +224,6 @@ static void bdw_init_clock_gating(struct drm_i915_private *i915)
>  	/* WaProgramL3SqcReg1Default:bdw */
>  	gen8_set_l3sqc_credits(i915, 30, 2);
>  
> -	intel_display_bdw_clock_gating_kvm_notif(i915->display);
> -
>  	intel_pch_init_clock_gating(i915->display);
>  
>  	/* WaDisableDopClockGating:bdw
> @@ -240,7 +236,7 @@ static void bdw_init_clock_gating(struct drm_i915_private *i915)
>  
>  static void hsw_init_clock_gating(struct drm_i915_private *i915)
>  {
> -	intel_display_hsw_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  
>  	/* This is required by WaCatErrorRejectionIssue:hsw */
>  	intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
> @@ -256,7 +252,7 @@ static void ivb_init_clock_gating(struct drm_i915_private *i915)
>  {
>  	struct intel_display *display = i915->display;
>  
> -	intel_display_ivb_init_clock_gating(display);
> +	intel_display_init_clock_gating(display);
>  
>  	/* WaDisableBackToBackFlipFix:ivb */
>  	intel_uncore_write(&i915->uncore, IVB_CHICKEN3,
> @@ -285,8 +281,6 @@ static void ivb_init_clock_gating(struct drm_i915_private *i915)
>  	intel_uncore_rmw(&i915->uncore, GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
>  			 0, GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
>  
> -	intel_display_disable_trickle_feed(display);
> -
>  	intel_uncore_rmw(&i915->uncore, GEN6_MBCUNIT_SNPCR, GEN6_MBC_SNPCR_MASK,
>  			 GEN6_MBC_SNPCR_MED);
>  
> @@ -362,7 +356,7 @@ static void g4x_init_clock_gating(struct drm_i915_private *i915)
>  			   GS_UNIT_CLOCK_GATE_DISABLE |
>  			   CL_UNIT_CLOCK_GATE_DISABLE);
>  	intel_uncore_write(&i915->uncore, RAMCLK_GATE_D, 0);
> -	intel_display_g4x_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  }
>  
>  static void i965gm_init_clock_gating(struct drm_i915_private *i915)
> @@ -371,7 +365,7 @@ static void i965gm_init_clock_gating(struct drm_i915_private *i915)
>  
>  	intel_uncore_write(uncore, RENCLK_GATE_D1, I965_RCC_CLOCK_GATE_DISABLE);
>  	intel_uncore_write(uncore, RENCLK_GATE_D2, 0);
> -	intel_display_i965gm_init_clock_gating(i915->display);
> +	intel_display_init_clock_gating(i915->display);
>  	intel_uncore_write(uncore, RAMCLK_GATE_D, 0);
>  	intel_uncore_write16(uncore, DEUC, 0);
>  	intel_uncore_write(uncore,

-- 
Jani Nikula, Intel

Re: [PATCH v3 3/5] drm/i915/display: remove unnecessary clock_gating include from intel_display.c

[Jani Nikula]

On Mon, 17 Aug 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
> We don't use any of the functions inclued in intel_clock_gating.h in

inclued?

Reviewed-by: Jani Nikula <jani.nikula@intel.com>


> the intel_display.c code anymore.  Remove the respective include.
>
> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_display.c | 1 -
>  1 file changed, 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 553c60d452dd..fc30a455bed3 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -60,7 +60,6 @@
>  #include "intel_bo.h"
>  #include "intel_bw.h"
>  #include "intel_cdclk.h"
> -#include "intel_clock_gating.h"
>  #include "intel_cmtg.h"
>  #include "intel_color.h"
>  #include "intel_crt.h"

-- 
Jani Nikula, Intel

Re: [PATCH v3 3/5] drm/i915/display: remove unnecessary clock_gating include from intel_display.c

[Luca Coelho]

On Thu, 2026-08-27 at 10:28 +0300, Jani Nikula wrote:
> On Mon, 17 Aug 2026, Luca Coelho <luciano.coelho@intel.com> wrote:
> > We don't use any of the functions inclued in intel_clock_gating.h in
> 
> inclued?
> 
> Reviewed-by: Jani Nikula <jani.nikula@intel.com>
> 
> 
> > the intel_display.c code anymore.  Remove the respective include.
> > 
> > Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
> > ---
> >  drivers/gpu/drm/i915/display/intel_display.c | 1 -
> >  1 file changed, 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> > index 553c60d452dd..fc30a455bed3 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display.c
> > +++ b/drivers/gpu/drm/i915/display/intel_display.c
> > @@ -60,7 +60,6 @@
> >  #include "intel_bo.h"
> >  #include "intel_bw.h"
> >  #include "intel_cdclk.h"
> > -#include "intel_clock_gating.h"
> >  #include "intel_cmtg.h"
> >  #include "intel_color.h"
> >  #include "intel_crt.h"

Thanks for the review!

I have now pushed patches 1-3 to drm-intel-next.

--
Cheers,
Luca.