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From: "Nilawar, Badal" <badal.nilawar@intel.com>
To: <sashiko-reviews@lists.linux.dev>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting
Date: Fri, 9 Oct 2026 17:57:41 +0530	[thread overview]
Message-ID: <1cce4e92-2fc6-4eef-9439-a64a1c6a5d90@intel.com> (raw)
In-Reply-To: <sashiko-outbox-165261@kernel.org>


On 09-10-2026 16:16, sashiko-bot@kernel.org wrote:
> Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
> - [High] drm/xe: out-of-bounds array access on informational or reserved RAS errors
> --
>
> commit 27317cc719f71d74be0f7fcd94c5a8fbf53f9e5e
> Author: Badal Nilawar <badal.nilawar@intel.com>
>
> drm/xe/cper: Retrieve the error counter record for CPER reporting
>      
> Retrieve error counter record required to build a CPER record.
>
>> diff --git a/drivers/gpu/drm/xe/xe_ras.c b/drivers/gpu/drm/xe/xe_ras.c
>> index 7a85735c57d58..5cfc9beff8c13 100644
>> --- a/drivers/gpu/drm/xe/xe_ras.c
>> +++ b/drivers/gpu/drm/xe/xe_ras.c
> [ ... ]
>> @@ -284,21 +282,21 @@ static void ras_send_error_event(struct xe_device *xe, u8 severity, u8 component)
>>   {
>>   	struct xe_ras_error_class counter = {0};
>> +	struct xe_ras_get_counter_response response = {0};
>>   	u8 drm_severity, drm_component;
>> -	u32 value;
>>   	int ret;
>>   
>>   	counter.common.severity = severity;
>>   	counter.common.component = component;
>>   
>> -	ret = get_counter(xe, &counter, &value);
>> +	ret = xe_ras_get_counter_response(xe, &counter, &response);
>>   	if (ret)
>>   		return;
>>   
>>   	drm_severity = xe_to_drm_ras_severity(severity);
>>   	drm_component = xe_to_drm_ras_component(component);
>>   
>> -	xe_drm_ras_event(xe, drm_component, drm_severity, value);
>> +	xe_drm_ras_event(xe, drm_component, drm_severity, response.value);
> [Severity: High]
> When firmware returns valid but unmapped values, like
> XE_RAS_SEV_INFORMATIONAL or XE_RAS_COMP_RESERVED, is it possible that
> xe_to_drm_ras_severity() and xe_to_drm_ras_component() will map these to
> their MAX values (DRM_XE_RAS_ERR_SEV_MAX and DRM_XE_RAS_ERR_COMP_MAX)?
>
> If so, does this call to xe_drm_ras_event() cause out-of-bounds array
> accesses?
>
> In drivers/gpu/drm/xe/xe_drm_ras.c:xe_drm_ras_event():
>
>      struct xe_drm_ras_counter *info = ras->info[severity];
>      ...
>      node = &ras->node[severity];
>
>      if (!info || !info[component].name)
>          return;
>
> Since the arrays are sized for the valid drm enum mappings, using the MAX
> values as indices would lead to wild pointer dereferences.

Good catch. This is pre-existing (from 6a9493e47075) and is not 
introduced by this series.

I'll send a separate fix that skips the drm_ras event when the severity 
or component has no drm mapping.

Thanks,
Badal

>
>>   }
>>   
>>   static u8 handle_core_compute_errors(struct xe_ras_error_array *arr)

  reply	other threads:[~2026-10-09 12:27 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-10-09 10:46 [PATCH v4 00/12] Add CPER logging support for CRI Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 01/12] drm/xe/cper: Add CPER reporting entry point for xe_log Badal Nilawar
2026-10-09 10:43   ` sashiko-bot
2026-10-09 12:17     ` Nilawar, Badal
2026-10-12  6:18   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 02/12] drm/xe/cper: Retrieve the error counter record for CPER reporting Badal Nilawar
2026-10-09 10:46   ` sashiko-bot
2026-10-09 12:27     ` Nilawar, Badal [this message]
2026-10-12  9:07   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 03/12] drm/xe/cper: Initialize Intel-specific error section header Badal Nilawar
2026-10-14  7:27   ` Raag Jadav
2026-10-09 10:46 ` [PATCH v4 04/12] drm/xe/cper: Construct CPER record for hardware errors Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 05/12] drm/xe/xe_ras: Add support to retrieve info queue data for CRI Badal Nilawar
2026-10-09 10:40   ` sashiko-bot
2026-10-09 12:45     ` Nilawar, Badal
2026-10-09 10:46 ` [PATCH v4 06/12] drm/xe/cper: Prepare Intel CPER error info records Badal Nilawar
2026-10-09 10:41   ` sashiko-bot
2026-10-09 13:07     ` Nilawar, Badal
2026-10-09 10:46 ` [PATCH v4 07/12] drm/xe/cper: Log CPER records for aggregate counter retrieval Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 08/12] drm/xe/cper: Emit cper record to trace buf Badal Nilawar
2026-10-09 10:38   ` sashiko-bot
2026-10-09 10:46 ` [PATCH v4 09/12] drm/xe/xe_ras: Report device memory errors using SIGID Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 10/12] drm/xe/xe_ras: Report core compute " Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 11/12] drm/xe/xe_ras: Report soc internal " Badal Nilawar
2026-10-09 10:46 ` [PATCH v4 12/12] drm/xe/xe_ras: Report correctable " Badal Nilawar
2026-10-09 10:50   ` sashiko-bot
2026-10-09 10:54 ` ✗ CI.checkpatch: warning for Add CPER logging support for CRI (rev4) Patchwork
2026-10-09 10:56 ` ✓ CI.KUnit: success " Patchwork
2026-10-09 12:03 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-10-09 15:13 ` ✓ Xe.CI.FULL: success " Patchwork
2026-10-12  6:14 ` [PATCH v4 00/12] Add CPER logging support for CRI Raag Jadav

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