From: Matt Roper <matthew.d.roper@intel.com>
To: Lucas De Marchi <lucas.demarchi@intel.com>
Cc: Matthew Auld <matthew.auld@intel.com>, intel-xe@lists.freedesktop.org
Subject: Re: [Intel-xe] [RFC 3/5] drm/xe: move pat_table into device info
Date: Tue, 29 Aug 2023 15:20:02 -0700 [thread overview]
Message-ID: <20230829222002.GR6080@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <2atx3jvuevvb3a4duzqkym3n3rglbcbxjfn4smamcmuz3wazhq@kpwcva26aenl>
On Tue, Aug 29, 2023 at 02:49:59PM -0700, Lucas De Marchi wrote:
> On Tue, Aug 29, 2023 at 05:28:44PM +0100, Matthew Auld wrote:
> > We need to able to know the max pat_index range for a given platform, as
> > well being able to lookup the pat_index for a given platform in upcoming
> > vm_bind uapi, where userspace can directly provide the pat_index. Move
> > the platform definition of the pat_table into the device info with the
> > idea of encoding more information about each pat_index in a future
> > patch.
> >
> > Signed-off-by: Matthew Auld <matthew.auld@intel.com>
> > Cc: Pallavi Mishra <pallavi.mishra@intel.com>
> > Cc: Lucas De Marchi <lucas.demarchi@intel.com>
> > Cc: Matt Roper <matthew.d.roper@intel.com>
> > ---
...
> > diff --git a/drivers/gpu/drm/xe/xe_pat.h b/drivers/gpu/drm/xe/xe_pat.h
> > index 54022f591621..9ab059758ad1 100644
> > --- a/drivers/gpu/drm/xe/xe_pat.h
> > +++ b/drivers/gpu/drm/xe/xe_pat.h
> > @@ -26,8 +26,9 @@
> > #define XELPG_PAT_WB_CACHE_1_WAY 3
> >
> > struct xe_gt;
> > -extern struct xe_device *xe;
> > +struct xe_device;
>
> leftover from a previous patch? what was the base you used? I can't see
> this on drm-xe-next.
I think his series is based on top of the latest copy of Ravi's PTE
encoding series.
Matt
>
> Lucas De Marchi
>
> >
> > +int xe_pat_fill_info(struct xe_device *xe);
> > void xe_pat_init(struct xe_gt *gt);
> > void xe_pte_pat_init(struct xe_device *xe);
> > unsigned int xe_pat_get_index(struct xe_device *xe, enum xe_cache_level cache);
> > diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
> > index 791107dec045..24f2021aae22 100644
> > --- a/drivers/gpu/drm/xe/xe_pci.c
> > +++ b/drivers/gpu/drm/xe/xe_pci.c
> > @@ -22,6 +22,7 @@
> > #include "xe_gt.h"
> > #include "xe_macros.h"
> > #include "xe_module.h"
> > +#include "xe_pat.h"
> > #include "xe_pci_types.h"
> > #include "xe_pm.h"
> > #include "xe_step.h"
> > @@ -553,6 +554,7 @@ static int xe_info_init(struct xe_device *xe,
> > struct xe_tile *tile;
> > struct xe_gt *gt;
> > u8 id;
> > + int err;
> >
> > xe->info.platform = desc->platform;
> > xe->info.subplatform = subplatform_desc ?
> > @@ -601,6 +603,10 @@ static int xe_info_init(struct xe_device *xe,
> > xe->info.enable_display = IS_ENABLED(CONFIG_DRM_XE_DISPLAY) &&
> > enable_display &&
> > desc->has_display;
> > +
> > + err = xe_pat_fill_info(xe);
> > + if (err)
> > + return err;
> > /*
> > * All platforms have at least one primary GT. Any platform with media
> > * version 13 or higher has an additional dedicated media GT. And
> > --
> > 2.41.0
> >
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
next prev parent reply other threads:[~2023-08-29 22:20 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-29 16:28 [Intel-xe] [RFC 0/5] PAT and cache coherency support Matthew Auld
2023-08-29 16:28 ` [Intel-xe] [RFC 1/5] drm/xe/uapi: Add support for cache and coherency mode Matthew Auld
2023-08-29 18:09 ` Matt Roper
2023-08-30 11:13 ` Matthew Auld
2023-09-04 20:00 ` Souza, Jose
2023-09-05 9:04 ` Matthew Auld
2023-09-05 15:30 ` Souza, Jose
2023-08-29 16:28 ` [Intel-xe] [RFC 2/5] drm/xe: fix has_llc on rkl Matthew Auld
2023-08-29 18:46 ` Matt Roper
2023-08-30 1:20 ` Mishra, Pallavi
2023-08-29 16:28 ` [Intel-xe] [RFC 3/5] drm/xe: move pat_table into device info Matthew Auld
2023-08-29 19:14 ` Matt Roper
2023-08-29 21:49 ` Lucas De Marchi
2023-08-29 22:20 ` Matt Roper [this message]
2023-08-30 9:34 ` Matthew Auld
2023-08-30 9:43 ` Matthew Auld
2023-08-30 5:14 ` Mishra, Pallavi
2023-09-05 20:50 ` Souza, Jose
2023-08-29 16:28 ` [Intel-xe] [RFC 4/5] drm/xe/pat: annotate pat_index with coherency mode Matthew Auld
2023-08-29 21:08 ` Matt Roper
2023-08-30 9:32 ` Matthew Auld
2023-08-30 19:40 ` Matt Roper
2023-08-29 22:02 ` Lucas De Marchi
2023-08-29 16:28 ` [Intel-xe] [RFC 5/5] drm/xe/uapi: support pat_index selection with vm_bind Matthew Auld
2023-08-29 21:36 ` Matt Roper
2023-08-30 6:38 ` Thomas Hellström
2023-08-30 19:28 ` Matt Roper
2023-08-30 11:28 ` Matthew Auld
2023-08-30 15:27 ` Zhang, Carl
2023-08-30 16:02 ` Matthew Auld
2023-08-31 8:24 ` Zhang, Carl
2023-08-31 10:44 ` Matthew Auld
2023-09-01 9:34 ` Zhang, Carl
2023-09-04 9:23 ` Matthew Auld
2023-09-05 9:12 ` Zhang, Carl
2023-09-05 9:46 ` Matthew Auld
2023-09-05 13:50 ` Zhang, Carl
2023-09-05 14:07 ` Matthew Auld
2023-09-04 20:21 ` Souza, Jose
2023-09-05 9:08 ` Matthew Auld
2023-09-07 18:56 ` Souza, Jose
2023-09-08 6:51 ` Matthew Auld
2023-09-13 15:35 ` Souza, Jose
2023-09-13 15:50 ` Matthew Auld
2023-08-29 16:40 ` [Intel-xe] ✗ CI.Patch_applied: failure for PAT and cache coherency support Patchwork
2023-09-04 20:25 ` [Intel-xe] [RFC 0/5] " Souza, Jose
2023-09-05 9:16 ` Matthew Auld
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230829222002.GR6080@mdroper-desk1.amr.corp.intel.com \
--to=matthew.d.roper@intel.com \
--cc=intel-xe@lists.freedesktop.org \
--cc=lucas.demarchi@intel.com \
--cc=matthew.auld@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox