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* [PATCH v3 00/19] Enable display support for Battlemage
@ 2024-04-30 17:28 Radhakrishna Sripada
  2024-04-30 17:28 ` [PATCH v3 01/19] drm/i915/bmg: Lane reversal requires writes to both context lanes Radhakrishna Sripada
                   ` (25 more replies)
  0 siblings, 26 replies; 32+ messages in thread
From: Radhakrishna Sripada @ 2024-04-30 17:28 UTC (permalink / raw)
  To: intel-gfx; +Cc: intel-xe, Radhakrishna Sripada


Adds display support for Battlemage.

v4:
* Dropped patch "drm/i915/xe2hpd: Skip CCS modifiers" as there is 
  already a patch merged taking care of this fix.
* Dropped patch "drm/i915/display: Enable RM timeout detection" as it 
  is not really a BMG enablement patch. Will be posted as a separate 
  series.
* Macros renamed and rearranged to match the existing style in the
  file for patch "Add new C20 PHY SRAM address"

v3:
* use s/XE_LPDP_FEATURES/XE_LPD_FEATURE as base for BMG display info
  structure
* Limit "BW Credits" programming only to xelpdp
* Removed UHBR20 support
* Commit description improved for patch - "Skip CCS modifiers for Xe2 platforms"
* Still retained the patch "Enable RM timeout detection" in this series
  hoping there are no further comments and could be merged with this
  series.
* Removed the check where RM timeout interrupt was enabled only for
  xe2hpd
* Redesigned how the right C20 PHY offsets are selected for different
  display IP versions

v2: Rebased on latest drm-tip
v3: Rebase and fix a white space error(RK)

Ankit Nautiyal (1):
  Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping"

Anusha Srivatsa (1):
  drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes

Balasubramani Vivekanandan (5):
  drm/i915/bmg: Define IS_BATTLEMAGE macro
  drm/i915/xe2hpd: Add new C20 PHY SRAM address
  drm/i915/xe2hpd: Add support for eDP PLL configuration
  drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5
  drm/xe/bmg: Enable the display support

Clint Taylor (2):
  drm/i915/bmg: Lane reversal requires writes to both context lanes
  drm/i915/xe2hpd: Initial cdclk table

José Roberto de Souza (2):
  drm/i915/xe2hpd: Properly disable power in port A
  drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits

Lucas De Marchi (1):
  drm/i915/xe2hpd: Add display info

Matt Roper (2):
  drm/i915/xe2hpd: Add max memory bandwidth algorithm
  drm/i915/bmg: BMG should re-use MTL's south display logic

Matthew Auld (2):
  drm/xe/gt_print: add xe_gt_err_once()
  drm/i915/display: perform transient flush

Nirmoy Das (1):
  drm/xe/device: implement transient flush

Radhakrishna Sripada (1):
  drm/i915/bmg: Extend DG2 tc check to future

Ravi Kumar Vodapalli (1):
  drm/i915/xe2hpd: update pll values in sync with Bspec

 drivers/gpu/drm/i915/display/intel_bios.c     |   5 +-
 drivers/gpu/drm/i915/display/intel_bw.c       |  65 +++-
 drivers/gpu/drm/i915/display/intel_cdclk.c    |  11 +
 drivers/gpu/drm/i915/display/intel_cx0_phy.c  | 285 +++++++++++++++---
 .../gpu/drm/i915/display/intel_cx0_phy_regs.h |  48 ++-
 drivers/gpu/drm/i915/display/intel_display.c  |  10 +-
 .../drm/i915/display/intel_display_device.c   |   7 +
 .../drm/i915/display/intel_display_power.c    |   4 +
 drivers/gpu/drm/i915/display/intel_dp.c       |   3 +
 .../gpu/drm/i915/display/intel_frontbuffer.c  |   2 +
 drivers/gpu/drm/i915/display/intel_tdf.h      |  25 ++
 drivers/gpu/drm/i915/display/skl_watermark.c  |   2 +-
 drivers/gpu/drm/i915/i915_drv.h               |  11 +-
 drivers/gpu/drm/i915/i915_reg.h               |   1 +
 drivers/gpu/drm/i915/soc/intel_dram.c         |   4 +
 drivers/gpu/drm/i915/soc/intel_pch.c          |   4 +-
 drivers/gpu/drm/xe/Makefile                   |   3 +-
 drivers/gpu/drm/xe/display/xe_tdf.c           |  13 +
 drivers/gpu/drm/xe/regs/xe_gt_regs.h          |   3 +
 drivers/gpu/drm/xe/xe_device.c                |  49 +++
 drivers/gpu/drm/xe/xe_device.h                |   1 +
 drivers/gpu/drm/xe/xe_device_types.h          |   1 +
 drivers/gpu/drm/xe/xe_gt_printk.h             |   3 +
 drivers/gpu/drm/xe/xe_pci.c                   |   1 +
 24 files changed, 504 insertions(+), 57 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/display/intel_tdf.h
 create mode 100644 drivers/gpu/drm/xe/display/xe_tdf.c

-- 
2.34.1


^ permalink raw reply	[flat|nested] 32+ messages in thread

end of thread, other threads:[~2024-05-03 18:41 UTC | newest]

Thread overview: 32+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-04-30 17:28 [PATCH v3 00/19] Enable display support for Battlemage Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 01/19] drm/i915/bmg: Lane reversal requires writes to both context lanes Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 02/19] drm/i915/bmg: Define IS_BATTLEMAGE macro Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 03/19] drm/i915/xe2hpd: Initial cdclk table Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 04/19] drm/i915/bmg: Extend DG2 tc check to future Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 05/19] drm/i915/xe2hpd: Properly disable power in port A Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 06/19] drm/i915/xe2hpd: Add new C20 PHY SRAM address Radhakrishna Sripada
2024-05-03  3:24   ` Sripada, Radhakrishna
2024-04-30 17:28 ` [PATCH v3 07/19] drm/i915/xe2hpd: Add support for eDP PLL configuration Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 08/19] drm/i915/xe2hpd: update pll values in sync with Bspec Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 09/19] drm/i915/xe2hpd: Add display info Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 10/19] drm/i915/xe2hpd: Configure CHICKEN_MISC_2 before enabling planes Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 11/19] drm/i915/xe2hpd: Add max memory bandwidth algorithm Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 12/19] drm/i915/xe2hpd: Do not program MBUS_DBOX BW credits Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 13/19] drm/i915/bmg: BMG should re-use MTL's south display logic Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 14/19] Revert "drm/i915/dgfx: DGFX uses direct VBT pin mapping" Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 15/19] drm/i915/xe2hpd: Set maximum DP rate to UHBR13.5 Radhakrishna Sripada
2024-04-30 17:28 ` [PATCH v3 16/19] drm/xe/gt_print: add xe_gt_err_once() Radhakrishna Sripada
2024-05-03 18:34   ` Lucas De Marchi
2024-04-30 17:28 ` [PATCH v3 17/19] drm/xe/device: implement transient flush Radhakrishna Sripada
2024-05-03 18:40   ` Lucas De Marchi
2024-04-30 17:28 ` [PATCH v3 18/19] drm/i915/display: perform " Radhakrishna Sripada
2024-04-30 17:57   ` Lucas De Marchi
2024-04-30 17:28 ` [PATCH v3 19/19] drm/xe/bmg: Enable the display support Radhakrishna Sripada
2024-04-30 17:49   ` Lucas De Marchi
2024-04-30 20:40 ` ✓ CI.Patch_applied: success for Enable display support for Battlemage (rev3) Patchwork
2024-04-30 20:40 ` ✗ CI.checkpatch: warning " Patchwork
2024-04-30 20:41 ` ✓ CI.KUnit: success " Patchwork
2024-04-30 20:53 ` ✓ CI.Build: " Patchwork
2024-04-30 20:55 ` ✓ CI.Hooks: " Patchwork
2024-04-30 20:57 ` ✗ CI.checksparse: warning " Patchwork
2024-05-01  3:04 ` ✗ CI.FULL: failure " Patchwork

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