From: Matthew Brost <matthew.brost@intel.com>
To: intel-xe@lists.freedesktop.org
Subject: [PATCH v3 2/6] drm/xe: Add MI_COPY_MEM_MEM GPU instruction definitions
Date: Fri, 7 Jun 2024 17:20:59 -0700 [thread overview]
Message-ID: <20240608002103.2371696-3-matthew.brost@intel.com> (raw)
In-Reply-To: <20240608002103.2371696-1-matthew.brost@intel.com>
MI_COPY_MEM_MEM GPU instructions are used to copy ctx timestamp from a
LRC registers to another location at the beginning of every jobs
execution. Add MI_COPY_MEM_MEM GPU instruction definitions.
v2:
- Include MI_COPY_MEM_MEM based on instruction order (Michal)
- Fix tabs/spaces issue (Michal)
- Use macro for DW definition (Michal)
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/instructions/xe_mi_commands.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
index c74ceb550dce..b7bf99dd4848 100644
--- a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
@@ -59,6 +59,10 @@
#define MI_LOAD_REGISTER_MEM (__MI_INSTR(0x29) | XE_INSTR_NUM_DW(4))
#define MI_LRM_USE_GGTT REG_BIT(22)
+#define MI_COPY_MEM_MEM (__MI_INSTR(0x2e) | XE_INSTR_NUM_DW(5))
+#define MI_COPY_MEM_MEM_SRC_GGTT REG_BIT(22)
+#define MI_COPY_MEM_MEM_DST_GGTT REG_BIT(21)
+
#define MI_BATCH_BUFFER_START __MI_INSTR(0x31)
#endif
--
2.34.1
next prev parent reply other threads:[~2024-06-08 0:20 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-08 0:20 [PATCH v3 0/6] Only timeout jobs if they run longer than timeout period Matthew Brost
2024-06-08 0:20 ` [PATCH v3 1/6] drm/xe: Add LRC ctx timestamp support functions Matthew Brost
2024-06-10 13:49 ` Lucas De Marchi
2024-06-10 14:10 ` Matthew Brost
2024-06-10 17:42 ` Lucas De Marchi
2024-06-08 0:20 ` Matthew Brost [this message]
2024-06-08 0:21 ` [PATCH v3 3/6] drm/xe: Emit ctx timestamp copy in ring ops Matthew Brost
2024-06-08 0:21 ` [PATCH v3 4/6] drm/xe: Add ctx timestamp to LRC snapshot Matthew Brost
2024-06-08 0:21 ` [PATCH v3 5/6] drm/xe: Add xe_gt_clock_interval_to_ms helper Matthew Brost
2024-06-08 0:21 ` [PATCH v3 6/6] drm/xe: Sample ctx timestamp to determine if jobs have timed out Matthew Brost
2024-06-08 2:13 ` John Harrison
2024-06-08 2:29 ` Matthew Brost
2024-06-08 0:25 ` ✓ CI.Patch_applied: success for Only timeout jobs if they run longer than timeout period Patchwork
2024-06-08 0:25 ` ✗ CI.checkpatch: warning " Patchwork
2024-06-08 0:26 ` ✓ CI.KUnit: success " Patchwork
2024-06-08 0:37 ` ✓ CI.Build: " Patchwork
2024-06-08 0:39 ` ✗ CI.Hooks: failure " Patchwork
2024-06-08 0:41 ` ✓ CI.checksparse: success " Patchwork
2024-06-08 1:27 ` ✓ CI.BAT: " Patchwork
2024-06-08 16:55 ` ✗ CI.FULL: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240608002103.2371696-3-matthew.brost@intel.com \
--to=matthew.brost@intel.com \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox