* [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture
@ 2024-08-27 21:47 Zhanjun Dong
2024-08-27 21:47 ` [PATCH v17 1/7] drm/xe/guc: Prepare GuC register list and update ADS size " Zhanjun Dong
` (14 more replies)
0 siblings, 15 replies; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong, Alan Previn
Port GuC based register capture for error capture from i915 to Xe.
There are 3 parts inside:
. Prepare for capture registers
There is a bo create at guc ads init time, that is very early
and engi ne map is not ready, make it hard to calculate the
capture buffer size, new function created for worst case size
caluation. Other than that, this part basically follows the i915
design.
. Process capture notification message
Basically follows i915 design
. Sysfs command process.
Xe switched to devcoredump, adopted command line process with
captured node list.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Cc: Alan Previn <alan.previn.teres.alexis@intel.com>
Changes from prior revs:
v17:- Update steering register condition check to check if current gt has
rcs/ccs engine.
Add additional null check
Rollback patch #3, take back RB
v16:- Switch to single list of capture register define, remove MMIO registers
from snapshot structure.
Seperate register capture list for legacy GPUs
Rewrite 64bit register support method, add field to indicate hi/low
dword of 64 bit or a single 32 bit register
Update the wrost size calculation method
v15:- Optimized guc log size code, remove the unnecessary init structure.
Fix a rebase line number alignment error
v14:- Fixed ring buffer wrap around offset issue
v13:- Move guc_mmio_reg structure define to guc_capture_abi.h
Remove duplicated crash/debug/capture unit check
Remove unnecessary guc_capture_data_extracted
Update u32 align check in guc_capture_log_remove_bytes
v12:- Rewrite guc log size init from runtime to compile time implementation.
Change log buffer flush to file from structure bitfield to genmask.
Change the capture log data copy from u32 copy to size copy
There are 3 types of engine class refrenced in this series, hw engine
class, GuC class and GuC capture class, update function parameter type
to enum for easy to read.
Update macro names to follow GuC interface specification.
v11:- Fixed a bug of missing captured check on register snapshot pre-capture
Fixed kernel-doc warnings
v10:- Resync with updated job timed out follow
Add pre-capture by read from hw engine if GuC capture data is not
ready, the pre-captured data will be refereshed if GuC capture is
ready at later time.
Add xe_guc_capture_is_ready_for to check if GuC capture is ready
for a job.
Re-orgnize some header files to xe abi folder
Reduce some meesage level from warn/info to debug
Remove duplicated enum of GuC log type.
v9:- Merged snapshot register list into capture register lists
Optimized devcoredump timing to take snapshot after guc reset
Add global and engine class registers into capture list
Fixed bug of incorrect matching guc class id with guc capture class id
v8:- Reorgnize the order of patches
Change the capture size check from worst min size to worst size
Replace the kernel alloc with drm managed alloc
Replace the memcpy with xe_map_memcpy_from
Free GuC capture outlist as part of xe_devcoredump_free
v7:- Kconfig CONFIG_DRM_XE_CAPTURE_ERROR removed
v6:- Change hardcoded register snapshot fill to follow mapping tables
When capture is empty, take snapshot from engine
v5:- Split dss helper code out as an standalone patch
Remove old platform registers definition.
Split register map table to 32 and 64bit each
v4:- Move register map table to xe_hw_engine.c
v3:- Remove condition compilation in code
v2:- Split into multiple chunks
Zhanjun Dong (7):
drm/xe/guc: Prepare GuC register list and update ADS size for error
capture
drm/xe/guc: Add XE_LP steered register lists
drm/xe/guc: Add capture size check in GuC log buffer
drm/xe/guc: Extract GuC error capture lists
drm/xe/guc: Move xe_lrc_snapshot to header file
drm/xe/guc: Add dss conversion from group/instance ID
drm/xe/guc: Plumb GuC-capture into dev coredump
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 8 +
drivers/gpu/drm/xe/abi/guc_capture_abi.h | 186 +++
drivers/gpu/drm/xe/abi/guc_log_abi.h | 75 +
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
drivers/gpu/drm/xe/xe_devcoredump.c | 16 +-
drivers/gpu/drm/xe/xe_devcoredump_types.h | 2 +
drivers/gpu/drm/xe/xe_gt_mcr.c | 13 +
drivers/gpu/drm/xe/xe_gt_mcr.h | 1 +
drivers/gpu/drm/xe/xe_guc.c | 5 +
drivers/gpu/drm/xe/xe_guc.h | 5 +
drivers/gpu/drm/xe/xe_guc_ads.c | 153 +-
drivers/gpu/drm/xe/xe_guc_ads_types.h | 2 +
drivers/gpu/drm/xe/xe_guc_capture.c | 1846 +++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_capture.h | 76 +
drivers/gpu/drm/xe/xe_guc_capture_types.h | 70 +
drivers/gpu/drm/xe/xe_guc_ct.c | 2 +
drivers/gpu/drm/xe/xe_guc_fwif.h | 26 +-
drivers/gpu/drm/xe/xe_guc_log.c | 101 ++
drivers/gpu/drm/xe/xe_guc_log.h | 10 +-
drivers/gpu/drm/xe/xe_guc_log_types.h | 7 +
drivers/gpu/drm/xe/xe_guc_submit.c | 82 +-
drivers/gpu/drm/xe/xe_guc_submit.h | 2 +
drivers/gpu/drm/xe/xe_guc_types.h | 2 +
drivers/gpu/drm/xe/xe_hw_engine.c | 273 +--
drivers/gpu/drm/xe/xe_hw_engine.h | 2 +
drivers/gpu/drm/xe/xe_hw_engine_types.h | 66 +-
drivers/gpu/drm/xe/xe_lrc.c | 18 -
drivers/gpu/drm/xe/xe_lrc.h | 1 +
drivers/gpu/drm/xe/xe_lrc_types.h | 18 +-
30 files changed, 2719 insertions(+), 352 deletions(-)
create mode 100644 drivers/gpu/drm/xe/abi/guc_capture_abi.h
create mode 100644 drivers/gpu/drm/xe/abi/guc_log_abi.h
create mode 100644 drivers/gpu/drm/xe/xe_guc_capture.c
create mode 100644 drivers/gpu/drm/xe/xe_guc_capture.h
create mode 100644 drivers/gpu/drm/xe/xe_guc_capture_types.h
--
2.34.1
^ permalink raw reply [flat|nested] 23+ messages in thread
* [PATCH v17 1/7] drm/xe/guc: Prepare GuC register list and update ADS size for error capture
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
@ 2024-08-27 21:47 ` Zhanjun Dong
2024-08-27 23:05 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 2/7] drm/xe/guc: Add XE_LP steered register lists Zhanjun Dong
` (13 subsequent siblings)
14 siblings, 1 reply; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong
Add referenced registers defines and list of registers.
Update GuC ADS size allocation to include space for
the lists of error state capture register descriptors.
Then, populate GuC ADS with the lists of registers we want
GuC to report back to host on engine reset events. This list
should include global, engine-class and engine-instance
registers for every engine-class type on the current hardware.
Ensure we allocate a persistent storage for the register lists
that are populated into ADS so that we don't need to allocate
memory during GT resets when GuC is reloaded and ADS population
happens again.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
drivers/gpu/drm/xe/Makefile | 1 +
drivers/gpu/drm/xe/abi/guc_capture_abi.h | 186 ++++++++
drivers/gpu/drm/xe/xe_guc.c | 5 +
drivers/gpu/drm/xe/xe_guc.h | 5 +
drivers/gpu/drm/xe/xe_guc_ads.c | 151 ++++++-
drivers/gpu/drm/xe/xe_guc_ads_types.h | 2 +
drivers/gpu/drm/xe/xe_guc_capture.c | 509 ++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_capture.h | 48 ++
drivers/gpu/drm/xe/xe_guc_capture_types.h | 68 +++
drivers/gpu/drm/xe/xe_guc_fwif.h | 26 +-
drivers/gpu/drm/xe/xe_guc_types.h | 2 +
11 files changed, 966 insertions(+), 37 deletions(-)
create mode 100644 drivers/gpu/drm/xe/abi/guc_capture_abi.h
create mode 100644 drivers/gpu/drm/xe/xe_guc_capture.c
create mode 100644 drivers/gpu/drm/xe/xe_guc_capture.h
create mode 100644 drivers/gpu/drm/xe/xe_guc_capture_types.h
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index b9670ae09a9e..827954f32a6c 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -55,6 +55,7 @@ xe-y += xe_bb.o \
xe_gt_topology.o \
xe_guc.o \
xe_guc_ads.o \
+ xe_guc_capture.o \
xe_guc_ct.o \
xe_guc_db_mgr.o \
xe_guc_hwconfig.o \
diff --git a/drivers/gpu/drm/xe/abi/guc_capture_abi.h b/drivers/gpu/drm/xe/abi/guc_capture_abi.h
new file mode 100644
index 000000000000..e7898edc6236
--- /dev/null
+++ b/drivers/gpu/drm/xe/abi/guc_capture_abi.h
@@ -0,0 +1,186 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef _ABI_GUC_CAPTURE_ABI_H
+#define _ABI_GUC_CAPTURE_ABI_H
+
+#include <linux/types.h>
+
+/* Capture List Index */
+enum guc_capture_list_index_type {
+ GUC_CAPTURE_LIST_INDEX_PF = 0,
+ GUC_CAPTURE_LIST_INDEX_VF = 1,
+};
+
+#define GUC_CAPTURE_LIST_INDEX_MAX (GUC_CAPTURE_LIST_INDEX_VF + 1)
+
+/* Register-types of GuC capture register lists */
+enum guc_state_capture_type {
+ GUC_STATE_CAPTURE_TYPE_GLOBAL = 0,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE
+};
+
+#define GUC_STATE_CAPTURE_TYPE_MAX (GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE + 1)
+
+/* Class indecies for capture_class and capture_instance arrays */
+enum guc_capture_list_class_type {
+ GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE = 0,
+ GUC_CAPTURE_LIST_CLASS_VIDEO = 1,
+ GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE = 2,
+ GUC_CAPTURE_LIST_CLASS_BLITTER = 3,
+ GUC_CAPTURE_LIST_CLASS_GSC_OTHER = 4,
+};
+
+#define GUC_CAPTURE_LIST_CLASS_MAX (GUC_CAPTURE_LIST_CLASS_GSC_OTHER + 1)
+
+/**
+ * struct guc_mmio_reg - GuC MMIO reg state struct
+ *
+ * GuC MMIO reg state struct
+ */
+struct guc_mmio_reg {
+ /** @offset: MMIO Offset - filled in by Host */
+ u32 offset;
+ /** @value: MMIO Value - Used by Firmware to store value */
+ u32 value;
+ /** @flags: Flags for accessing the MMIO */
+ u32 flags;
+ /** @mask: Value of a mask to apply if mask with value is set */
+ u32 mask;
+#define GUC_REGSET_MASKED BIT(0)
+#define GUC_REGSET_STEERING_NEEDED BIT(1)
+#define GUC_REGSET_MASKED_WITH_VALUE BIT(2)
+#define GUC_REGSET_RESTORE_ONLY BIT(3)
+#define GUC_REGSET_STEERING_GROUP GENMASK(16, 12)
+#define GUC_REGSET_STEERING_INSTANCE GENMASK(23, 20)
+} __packed;
+
+/**
+ * struct guc_mmio_reg_set - GuC register sets
+ *
+ * GuC register sets
+ */
+struct guc_mmio_reg_set {
+ /** @address: register address */
+ u32 address;
+ /** @count: register count */
+ u16 count;
+ /** @reserved: reserved */
+ u16 reserved;
+} __packed;
+
+/**
+ * struct guc_debug_capture_list_header - Debug capture list header.
+ *
+ * Debug capture list header.
+ */
+struct guc_debug_capture_list_header {
+ /** @info: contains number of MMIO descriptors in the capture list. */
+ u32 info;
+#define GUC_CAPTURELISTHDR_NUMDESCR GENMASK(15, 0)
+} __packed;
+
+/**
+ * struct guc_debug_capture_list - Debug capture list
+ *
+ * As part of ADS registration, these header structures (followed by
+ * an array of 'struct guc_mmio_reg' entries) are used to register with
+ * GuC microkernel the list of registers we want it to dump out prior
+ * to a engine reset.
+ */
+struct guc_debug_capture_list {
+ /** @header: Debug capture list header. */
+ struct guc_debug_capture_list_header header;
+ /** @regs: MMIO descriptors in the capture list. */
+ struct guc_mmio_reg regs[];
+} __packed;
+
+/**
+ * struct guc_state_capture_header_t - State capture header.
+ *
+ * Prior to resetting engines that have hung or faulted, GuC microkernel
+ * reports the engine error-state (register values that was read) by
+ * logging them into the shared GuC log buffer using these hierarchy
+ * of structures.
+ */
+struct guc_state_capture_header_t {
+ /**
+ * @owner: VFID
+ * BR[ 7: 0] MBZ when SRIOV is disabled. When SRIOV is enabled
+ * VFID is an integer in range [0, 63] where 0 means the state capture
+ * is corresponding to the PF and an integer N in range [1, 63] means
+ * the state capture is for VF N.
+ */
+ u32 owner;
+#define GUC_STATE_CAPTURE_HEADER_VFID GENMASK(7, 0)
+ /** @info: Engine class/instance and capture type info */
+ u32 info;
+#define GUC_STATE_CAPTURE_HEADER_CAPTURE_TYPE GENMASK(3, 0) /* see guc_state_capture_type */
+#define GUC_STATE_CAPTURE_HEADER_ENGINE_CLASS GENMASK(7, 4) /* see guc_capture_list_class_type */
+#define GUC_STATE_CAPTURE_HEADER_ENGINE_INSTANCE GENMASK(11, 8)
+ /**
+ * @lrca: logical ring context address.
+ * if type-instance, LRCA (address) that hung, else set to ~0
+ */
+ u32 lrca;
+ /**
+ * @guc_id: context_index.
+ * if type-instance, context index of hung context, else set to ~0
+ */
+ u32 guc_id;
+ /** @num_mmio_entries: Number of captured MMIO entries. */
+ u32 num_mmio_entries;
+#define GUC_STATE_CAPTURE_HEADER_NUM_MMIO_ENTRIES GENMASK(9, 0)
+} __packed;
+
+/**
+ * struct guc_state_capture_t - State capture.
+ *
+ * State capture
+ */
+struct guc_state_capture_t {
+ /** @header: State capture header. */
+ struct guc_state_capture_header_t header;
+ /** @mmio_entries: Array of captured guc_mmio_reg entries. */
+ struct guc_mmio_reg mmio_entries[];
+} __packed;
+
+/* State Capture Group Type */
+enum guc_state_capture_group_type {
+ GUC_STATE_CAPTURE_GROUP_TYPE_FULL = 0,
+ GUC_STATE_CAPTURE_GROUP_TYPE_PARTIAL
+};
+
+#define GUC_STATE_CAPTURE_GROUP_TYPE_MAX (GUC_STATE_CAPTURE_GROUP_TYPE_PARTIAL + 1)
+
+/**
+ * struct guc_state_capture_group_header_t - State capture group header
+ *
+ * State capture group header.
+ */
+struct guc_state_capture_group_header_t {
+ /** @owner: VFID */
+ u32 owner;
+#define GUC_STATE_CAPTURE_GROUP_HEADER_VFID GENMASK(7, 0)
+ /** @info: Engine class/instance and capture type info */
+ u32 info;
+#define GUC_STATE_CAPTURE_GROUP_HEADER_NUM_CAPTURES GENMASK(7, 0)
+#define GUC_STATE_CAPTURE_GROUP_HEADER_CAPTURE_GROUP_TYPE GENMASK(15, 8)
+} __packed;
+
+/**
+ * struct guc_state_capture_group_t - State capture group.
+ *
+ * this is the top level structure where an error-capture dump starts
+ */
+struct guc_state_capture_group_t {
+ /** @grp_header: State capture group header. */
+ struct guc_state_capture_group_header_t grp_header;
+ /** @capture_entries: Array of state captures */
+ struct guc_state_capture_t capture_entries[];
+} __packed;
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c
index 52df28032a6f..6d4702197ddd 100644
--- a/drivers/gpu/drm/xe/xe_guc.c
+++ b/drivers/gpu/drm/xe/xe_guc.c
@@ -22,6 +22,7 @@
#include "xe_gt_sriov_vf.h"
#include "xe_gt_throttle.h"
#include "xe_guc_ads.h"
+#include "xe_guc_capture.h"
#include "xe_guc_ct.h"
#include "xe_guc_db_mgr.h"
#include "xe_guc_hwconfig.h"
@@ -338,6 +339,10 @@ int xe_guc_init(struct xe_guc *guc)
if (ret)
goto out;
+ ret = xe_guc_capture_init(guc);
+ if (ret)
+ goto out;
+
ret = xe_guc_ads_init(&guc->ads);
if (ret)
goto out;
diff --git a/drivers/gpu/drm/xe/xe_guc.h b/drivers/gpu/drm/xe/xe_guc.h
index c3e6b51f7a09..5b9e1914519a 100644
--- a/drivers/gpu/drm/xe/xe_guc.h
+++ b/drivers/gpu/drm/xe/xe_guc.h
@@ -80,4 +80,9 @@ static inline struct xe_device *guc_to_xe(struct xe_guc *guc)
return gt_to_xe(guc_to_gt(guc));
}
+static inline struct drm_device *guc_to_drm(struct xe_guc *guc)
+{
+ return &guc_to_xe(guc)->drm;
+}
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index d1902a8581ca..d7dc47061535 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -18,6 +18,7 @@
#include "xe_gt_ccs_mode.h"
#include "xe_gt_printk.h"
#include "xe_guc.h"
+#include "xe_guc_capture.h"
#include "xe_guc_ct.h"
#include "xe_hw_engine.h"
#include "xe_lrc.h"
@@ -149,8 +150,7 @@ static u32 guc_ads_waklv_size(struct xe_guc_ads *ads)
static size_t guc_ads_capture_size(struct xe_guc_ads *ads)
{
- /* FIXME: Allocate a proper capture list */
- return PAGE_ALIGN(PAGE_SIZE);
+ return PAGE_ALIGN(ads->capture_size);
}
static size_t guc_ads_um_queues_size(struct xe_guc_ads *ads)
@@ -404,6 +404,7 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
struct xe_bo *bo;
ads->golden_lrc_size = calculate_golden_lrc_size(ads);
+ ads->capture_size = xe_guc_capture_ads_input_worst_size(ads_to_guc(ads));
ads->regset_size = calculate_regset_size(gt);
ads->ads_waklv_size = calculate_waklv_size(ads);
@@ -423,9 +424,9 @@ int xe_guc_ads_init(struct xe_guc_ads *ads)
* xe_guc_ads_init_post_hwconfig - initialize ADS post hwconfig load
* @ads: Additional data structures object
*
- * Recalcuate golden_lrc_size & regset_size as the number hardware engines may
- * have changed after the hwconfig was loaded. Also verify the new sizes fit in
- * the already allocated ADS buffer object.
+ * Recalculate golden_lrc_size, capture_size and regset_size as the number
+ * hardware engines may have changed after the hwconfig was loaded. Also verify
+ * the new sizes fit in the already allocated ADS buffer object.
*
* Return: 0 on success, negative error code on error.
*/
@@ -437,6 +438,8 @@ int xe_guc_ads_init_post_hwconfig(struct xe_guc_ads *ads)
xe_gt_assert(gt, ads->bo);
ads->golden_lrc_size = calculate_golden_lrc_size(ads);
+ /* Calculate Capture size with worst size */
+ ads->capture_size = xe_guc_capture_ads_input_worst_size(ads_to_guc(ads));
ads->regset_size = calculate_regset_size(gt);
xe_gt_assert(gt, ads->golden_lrc_size +
@@ -536,20 +539,142 @@ static void guc_mapping_table_init(struct xe_gt *gt,
}
}
-static void guc_capture_list_init(struct xe_guc_ads *ads)
+static u32 guc_get_capture_engine_mask(struct xe_gt *gt, struct iosys_map *info_map,
+ enum guc_capture_list_class_type capture_class)
{
+ struct xe_device *xe = gt_to_xe(gt);
+ u32 mask;
+
+ switch (capture_class) {
+ case GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE:
+ mask = info_map_read(xe, info_map, engine_enabled_masks[GUC_RENDER_CLASS]);
+ mask |= info_map_read(xe, info_map, engine_enabled_masks[GUC_COMPUTE_CLASS]);
+ break;
+ case GUC_CAPTURE_LIST_CLASS_VIDEO:
+ mask = info_map_read(xe, info_map, engine_enabled_masks[GUC_VIDEO_CLASS]);
+ break;
+ case GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE:
+ mask = info_map_read(xe, info_map, engine_enabled_masks[GUC_VIDEOENHANCE_CLASS]);
+ break;
+ case GUC_CAPTURE_LIST_CLASS_BLITTER:
+ mask = info_map_read(xe, info_map, engine_enabled_masks[GUC_BLITTER_CLASS]);
+ break;
+ case GUC_CAPTURE_LIST_CLASS_GSC_OTHER:
+ mask = info_map_read(xe, info_map, engine_enabled_masks[GUC_GSC_OTHER_CLASS]);
+ break;
+ default:
+ mask = 0;
+ }
+
+ return mask;
+}
+
+static inline bool get_capture_list(struct xe_guc_ads *ads, struct xe_guc *guc, struct xe_gt *gt,
+ int owner, int type, int class, u32 *total_size, size_t *size,
+ void **pptr)
+{
+ *size = 0;
+
+ if (!xe_guc_capture_getlistsize(guc, owner, type, class, size)) {
+ if (*total_size + *size > ads->capture_size)
+ xe_gt_dbg(gt, "Capture size overflow :%zu vs %d\n",
+ *total_size + *size, ads->capture_size);
+ else if (!xe_guc_capture_getlist(guc, owner, type, class, pptr))
+ return false;
+ }
+
+ return true;
+}
+
+static int guc_capture_prep_lists(struct xe_guc_ads *ads)
+{
+ struct xe_guc *guc = ads_to_guc(ads);
+ struct xe_gt *gt = ads_to_gt(ads);
+ u32 ads_ggtt, capture_offset, null_ggtt, total_size = 0;
+ struct iosys_map info_map;
+ size_t size = 0;
+ void *ptr;
int i, j;
- u32 addr = xe_bo_ggtt_addr(ads->bo) + guc_ads_capture_offset(ads);
- /* FIXME: Populate a proper capture list */
+ capture_offset = guc_ads_capture_offset(ads);
+ ads_ggtt = xe_bo_ggtt_addr(ads->bo);
+ info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),
+ offsetof(struct __guc_ads_blob, system_info));
+
+ /* first, set aside the first page for a capture_list with zero descriptors */
+ total_size = PAGE_SIZE;
+ if (!xe_guc_capture_getnullheader(guc, &ptr, &size))
+ xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset, ptr, size);
+
+ null_ggtt = ads_ggtt + capture_offset;
+ capture_offset += PAGE_SIZE;
+
+ /*
+ * Populate capture list : at this point adps is already allocated and
+ * mapped to worst case size
+ */
for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; i++) {
- for (j = 0; j < GUC_MAX_ENGINE_CLASSES; j++) {
- ads_blob_write(ads, ads.capture_instance[i][j], addr);
- ads_blob_write(ads, ads.capture_class[i][j], addr);
+ bool write_empty_list;
+
+ for (j = 0; j < GUC_CAPTURE_LIST_CLASS_MAX; j++) {
+ u32 engine_mask = guc_get_capture_engine_mask(gt, &info_map, j);
+ /* null list if we dont have said engine or list */
+ if (!engine_mask) {
+ ads_blob_write(ads, ads.capture_class[i][j], null_ggtt);
+ ads_blob_write(ads, ads.capture_instance[i][j], null_ggtt);
+ continue;
+ }
+
+ /* engine exists: start with engine-class registers */
+ write_empty_list = get_capture_list(ads, guc, gt, i,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
+ j, &total_size, &size, &ptr);
+ if (!write_empty_list) {
+ ads_blob_write(ads, ads.capture_class[i][j],
+ ads_ggtt + capture_offset);
+ xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset,
+ ptr, size);
+ total_size += size;
+ capture_offset += size;
+ } else {
+ ads_blob_write(ads, ads.capture_class[i][j], null_ggtt);
+ }
+
+ /* engine exists: next, engine-instance registers */
+ write_empty_list = get_capture_list(ads, guc, gt, i,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE,
+ j, &total_size, &size, &ptr);
+ if (!write_empty_list) {
+ ads_blob_write(ads, ads.capture_instance[i][j],
+ ads_ggtt + capture_offset);
+ xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset,
+ ptr, size);
+ total_size += size;
+ capture_offset += size;
+ } else {
+ ads_blob_write(ads, ads.capture_instance[i][j], null_ggtt);
+ }
}
- ads_blob_write(ads, ads.capture_global[i], addr);
+ /* global registers is last in our PF/VF loops */
+ write_empty_list = get_capture_list(ads, guc, gt, i,
+ GUC_STATE_CAPTURE_TYPE_GLOBAL,
+ 0, &total_size, &size, &ptr);
+ if (!write_empty_list) {
+ ads_blob_write(ads, ads.capture_global[i], ads_ggtt + capture_offset);
+ xe_map_memcpy_to(ads_to_xe(ads), ads_to_map(ads), capture_offset, ptr,
+ size);
+ total_size += size;
+ capture_offset += size;
+ } else {
+ ads_blob_write(ads, ads.capture_global[i], null_ggtt);
+ }
}
+
+ if (ads->capture_size != PAGE_ALIGN(total_size))
+ xe_gt_dbg(gt, "ADS capture alloc size changed from %d to %d\n",
+ ads->capture_size, PAGE_ALIGN(total_size));
+ return PAGE_ALIGN(total_size);
}
static void guc_mmio_regset_write_one(struct xe_guc_ads *ads,
@@ -738,7 +863,7 @@ void xe_guc_ads_populate(struct xe_guc_ads *ads)
guc_mmio_reg_state_init(ads);
guc_prep_golden_lrc_null(ads);
guc_mapping_table_init(gt, &info_map);
- guc_capture_list_init(ads);
+ guc_capture_prep_lists(ads);
guc_doorbell_init(ads);
guc_waklv_init(ads);
diff --git a/drivers/gpu/drm/xe/xe_guc_ads_types.h b/drivers/gpu/drm/xe/xe_guc_ads_types.h
index 2de5decfe0fd..70c132458ac3 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_ads_types.h
@@ -22,6 +22,8 @@ struct xe_guc_ads {
u32 regset_size;
/** @ads_waklv_size: total waklv size supported by platform */
u32 ads_waklv_size;
+ /** @capture_size: size of register set passed to GuC for capture */
+ u32 capture_size;
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
new file mode 100644
index 000000000000..9138c85141a9
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -0,0 +1,509 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2021-2024 Intel Corporation
+ */
+
+#include <linux/types.h>
+
+#include <drm/drm_managed.h>
+#include <drm/drm_print.h>
+
+#include "abi/guc_actions_abi.h"
+#include "abi/guc_capture_abi.h"
+#include "regs/xe_engine_regs.h"
+#include "regs/xe_gt_regs.h"
+#include "regs/xe_guc_regs.h"
+#include "regs/xe_regs.h"
+
+#include "xe_bo.h"
+#include "xe_device.h"
+#include "xe_exec_queue_types.h"
+#include "xe_gt.h"
+#include "xe_gt_mcr.h"
+#include "xe_gt_printk.h"
+#include "xe_guc.h"
+#include "xe_guc_capture.h"
+#include "xe_guc_capture_types.h"
+#include "xe_guc_ct.h"
+#include "xe_guc_log.h"
+#include "xe_guc_submit.h"
+#include "xe_hw_engine_types.h"
+#include "xe_macros.h"
+#include "xe_map.h"
+
+/*
+ * Define all device tables of GuC error capture register lists
+ * NOTE:
+ * For engine-registers, GuC only needs the register offsets
+ * from the engine-mmio-base
+ *
+ * 64 bit registers need 2 entries for low 32 bit register and high 32 bit
+ * register, for example:
+ * Register data_type flags mask Register name
+ * { XXX_REG_LO(0), REG_64BIT_LOW_DW, 0, 0, NULL},
+ * { XXX_REG_HI(0), REG_64BIT_HI_DW,, 0, 0, "XXX_REG"},
+ * 1. data_type: Indicate is hi/low 32 bit for a 64 bit register
+ * A 64 bit register define requires 2 consecutive entries,
+ * with low dword first and hi dword the second.
+ * 2. Register name: null for incompleted define
+ */
+#define COMMON_XELP_BASE_GLOBAL \
+ { FORCEWAKE_GT, REG_32BIT, 0, 0, "FORCEWAKE_GT"}
+
+#define COMMON_BASE_ENGINE_INSTANCE \
+ { RING_HWSTAM(0), REG_32BIT, 0, 0, "HWSTAM"}, \
+ { RING_HWS_PGA(0), REG_32BIT, 0, 0, "RING_HWS_PGA"}, \
+ { RING_HEAD(0), REG_32BIT, 0, 0, "RING_HEAD"}, \
+ { RING_TAIL(0), REG_32BIT, 0, 0, "RING_TAIL"}, \
+ { RING_CTL(0), REG_32BIT, 0, 0, "RING_CTL"}, \
+ { RING_MI_MODE(0), REG_32BIT, 0, 0, "RING_MI_MODE"}, \
+ { RING_MODE(0), REG_32BIT, 0, 0, "RING_MODE"}, \
+ { RING_ESR(0), REG_32BIT, 0, 0, "RING_ESR"}, \
+ { RING_EMR(0), REG_32BIT, 0, 0, "RING_EMR"}, \
+ { RING_EIR(0), REG_32BIT, 0, 0, "RING_EIR"}, \
+ { RING_IMR(0), REG_32BIT, 0, 0, "RING_IMR"}, \
+ { RING_IPEHR(0), REG_32BIT, 0, 0, "IPEHR"}, \
+ { RING_INSTDONE(0), REG_32BIT, 0, 0, "RING_INSTDONE"}, \
+ { INDIRECT_RING_STATE(0), REG_32BIT, 0, 0, "INDIRECT_RING_STATE"}, \
+ { RING_ACTHD(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_ACTHD_UDW(0), REG_64BIT_HI_DW, 0, 0, "ACTHD"}, \
+ { RING_BBADDR(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_BBADDR_UDW(0), REG_64BIT_HI_DW, 0, 0, "RING_BBADDR"}, \
+ { RING_START(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_START_UDW(0), REG_64BIT_HI_DW, 0, 0, "RING_START"}, \
+ { RING_DMA_FADD(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_DMA_FADD_UDW(0), REG_64BIT_HI_DW, 0, 0, "RING_DMA_FADD"}, \
+ { RING_EXECLIST_STATUS_LO(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_EXECLIST_STATUS_HI(0), REG_64BIT_HI_DW, 0, 0, "RING_EXECLIST_STATUS"}, \
+ { RING_EXECLIST_SQ_CONTENTS_LO(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0, 0, "RING_EXECLIST_SQ_CONTENTS"}
+
+#define COMMON_XELP_RC_CLASS \
+ { RCU_MODE, REG_32BIT, 0, 0, "RCU_MODE"}
+
+#define COMMON_XELP_RC_CLASS_INSTDONE \
+ { SC_INSTDONE, REG_32BIT, 0, 0, "SC_INSTDONE"}, \
+ { SC_INSTDONE_EXTRA, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA"}, \
+ { SC_INSTDONE_EXTRA2, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA2"}
+
+/* XE_LP Global */
+static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {
+ COMMON_XELP_BASE_GLOBAL,
+};
+
+/* Render / Compute Per-Engine-Instance */
+static const struct __guc_mmio_reg_descr xe_rc_inst_regs[] = {
+ COMMON_BASE_ENGINE_INSTANCE,
+};
+
+/* Render / Compute Engine-Class */
+static const struct __guc_mmio_reg_descr xe_rc_class_regs[] = {
+ COMMON_XELP_RC_CLASS,
+ COMMON_XELP_RC_CLASS_INSTDONE,
+};
+
+/* Render / Compute Engine-Class for xehpg */
+static const struct __guc_mmio_reg_descr xe_hpg_rc_class_regs[] = {
+ COMMON_XELP_RC_CLASS,
+};
+
+/* Media Decode/Encode Per-Engine-Instance */
+static const struct __guc_mmio_reg_descr xe_vd_inst_regs[] = {
+ COMMON_BASE_ENGINE_INSTANCE,
+};
+
+/* Video Enhancement Per-Engine-Instance */
+static const struct __guc_mmio_reg_descr xe_vec_inst_regs[] = {
+ COMMON_BASE_ENGINE_INSTANCE,
+};
+
+/* Blitter Per-Engine-Instance */
+static const struct __guc_mmio_reg_descr xe_blt_inst_regs[] = {
+ COMMON_BASE_ENGINE_INSTANCE,
+};
+
+/* XE_LP - GSC Per-Engine-Instance */
+static const struct __guc_mmio_reg_descr xe_lp_gsc_inst_regs[] = {
+ COMMON_BASE_ENGINE_INSTANCE,
+};
+
+/*
+ * Empty list to prevent warnings about unknown class/instance types
+ * as not all class/instance types have entries on all platforms.
+ */
+static const struct __guc_mmio_reg_descr empty_regs_list[] = {
+};
+
+#define TO_GCAP_DEF_OWNER(x) (GUC_CAPTURE_LIST_INDEX_##x)
+#define TO_GCAP_DEF_TYPE(x) (GUC_STATE_CAPTURE_TYPE_##x)
+#define MAKE_REGLIST(regslist, regsowner, regstype, class) \
+ { \
+ regslist, \
+ ARRAY_SIZE(regslist), \
+ TO_GCAP_DEF_OWNER(regsowner), \
+ TO_GCAP_DEF_TYPE(regstype), \
+ class \
+ }
+
+/* List of lists for legacy graphic product version < 1255 */
+static const struct __guc_mmio_reg_descr_group xe_lp_lists[] = {
+ MAKE_REGLIST(xe_lp_global_regs, PF, GLOBAL, 0),
+ MAKE_REGLIST(xe_rc_class_regs, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE),
+ MAKE_REGLIST(xe_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEO),
+ MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
+ MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
+ MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
+ MAKE_REGLIST(xe_lp_gsc_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
+ {}
+};
+
+ /* List of lists for graphic product version >= 1255 */
+static const struct __guc_mmio_reg_descr_group xe_hpg_lists[] = {
+ MAKE_REGLIST(xe_lp_global_regs, PF, GLOBAL, 0),
+ MAKE_REGLIST(xe_hpg_rc_class_regs, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE),
+ MAKE_REGLIST(xe_rc_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEO),
+ MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
+ MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
+ MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
+ MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
+ MAKE_REGLIST(xe_lp_gsc_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
+ {}
+};
+
+static const char * const capture_list_type_names[] = {
+ "Global",
+ "Class",
+ "Instance",
+};
+
+static const char * const capture_engine_class_names[] = {
+ "Render/Compute",
+ "Video",
+ "VideoEnhance",
+ "Blitter",
+ "GSC-Other",
+};
+
+struct __guc_capture_ads_cache {
+ bool is_valid;
+ void *ptr;
+ size_t size;
+ int status;
+};
+
+struct xe_guc_state_capture {
+ const struct __guc_mmio_reg_descr_group *reglists;
+ struct __guc_capture_ads_cache ads_cache[GUC_CAPTURE_LIST_INDEX_MAX]
+ [GUC_STATE_CAPTURE_TYPE_MAX]
+ [GUC_CAPTURE_LIST_CLASS_MAX];
+ void *ads_null_cache;
+};
+
+static const struct __guc_mmio_reg_descr_group *
+guc_capture_get_device_reglist(struct xe_device *xe)
+{
+ if (GRAPHICS_VERx100(xe) >= 1255)
+ return xe_hpg_lists;
+ else
+ return xe_lp_lists;
+}
+
+static const struct __guc_mmio_reg_descr_group *
+guc_capture_get_one_list(const struct __guc_mmio_reg_descr_group *reglists,
+ u32 owner, u32 type, enum guc_capture_list_class_type capture_class)
+{
+ int i;
+
+ if (!reglists)
+ return NULL;
+
+ for (i = 0; reglists[i].list; ++i) {
+ if (reglists[i].owner == owner && reglists[i].type == type &&
+ (reglists[i].engine == capture_class ||
+ reglists[i].type == GUC_STATE_CAPTURE_TYPE_GLOBAL))
+ return ®lists[i];
+ }
+
+ return NULL;
+}
+
+static int
+guc_capture_list_init(struct xe_guc *guc, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class, struct guc_mmio_reg *ptr,
+ u16 num_entries)
+{
+ u32 i = 0;
+ const struct __guc_mmio_reg_descr_group *reglists = guc->capture->reglists;
+ const struct __guc_mmio_reg_descr_group *match;
+
+ if (!reglists)
+ return -ENODEV;
+
+ match = guc_capture_get_one_list(reglists, owner, type, capture_class);
+ if (!match)
+ return -ENODATA;
+
+ for (i = 0; i < num_entries && i < match->num_regs; ++i) {
+ ptr[i].offset = match->list[i].reg.addr;
+ ptr[i].value = 0xDEADF00D;
+ ptr[i].flags = match->list[i].flags;
+ ptr[i].mask = match->list[i].mask;
+ }
+
+ if (i < num_entries)
+ xe_gt_dbg(guc_to_gt(guc), "Got short capture reglist init: %d out %d.\n", i,
+ num_entries);
+
+ return 0;
+}
+
+static int
+guc_cap_list_num_regs(struct xe_guc *guc, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class)
+{
+ const struct __guc_mmio_reg_descr_group *match;
+
+ match = guc_capture_get_one_list(guc->capture->reglists, owner, type, capture_class);
+ if (!match)
+ return 0;
+
+ return match->num_regs;
+}
+
+static int
+guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class,
+ size_t *size, bool is_purpose_est)
+{
+ struct xe_guc_state_capture *gc = guc->capture;
+ struct xe_gt *gt = guc_to_gt(guc);
+ struct __guc_capture_ads_cache *cache;
+ int num_regs;
+
+ xe_gt_assert(gt, type < GUC_STATE_CAPTURE_TYPE_MAX);
+ xe_gt_assert(gt, capture_class < GUC_CAPTURE_LIST_CLASS_MAX);
+
+ cache = &gc->ads_cache[owner][type][capture_class];
+ if (!gc->reglists) {
+ xe_gt_warn(gt, "No capture reglist for this device\n");
+ return -ENODEV;
+ }
+
+ if (cache->is_valid) {
+ *size = cache->size;
+ return cache->status;
+ }
+
+ if (!is_purpose_est && owner == GUC_CAPTURE_LIST_INDEX_PF &&
+ !guc_capture_get_one_list(gc->reglists, owner, type, capture_class)) {
+ if (type == GUC_STATE_CAPTURE_TYPE_GLOBAL)
+ xe_gt_warn(gt, "Missing capture reglist: global!\n");
+ else
+ xe_gt_warn(gt, "Missing capture reglist: %s(%u):%s(%u)!\n",
+ capture_list_type_names[type], type,
+ capture_engine_class_names[capture_class], capture_class);
+ return -ENODEV;
+ }
+
+ num_regs = guc_cap_list_num_regs(guc, owner, type, capture_class);
+ /* intentional empty lists can exist depending on hw config */
+ if (!num_regs)
+ return -ENODATA;
+
+ if (size)
+ *size = PAGE_ALIGN((sizeof(struct guc_debug_capture_list)) +
+ (num_regs * sizeof(struct guc_mmio_reg)));
+
+ return 0;
+}
+
+/**
+ * xe_guc_capture_getlistsize - Get list size for owner/type/class combination
+ * @guc: The GuC object
+ * @owner: PF/VF owner
+ * @type: GuC capture register type
+ * @capture_class: GuC capture engine class id
+ * @size: Point to the size
+ *
+ * This function will get the list for the owner/type/class combination, and
+ * return the page aligned list size.
+ *
+ * Returns: 0 on success or a negative error code on failure.
+ */
+int
+xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class, size_t *size)
+{
+ return guc_capture_getlistsize(guc, owner, type, capture_class, size, false);
+}
+
+/**
+ * xe_guc_capture_getlist - Get register capture list for owner/type/class
+ * combination
+ * @guc: The GuC object
+ * @owner: PF/VF owner
+ * @type: GuC capture register type
+ * @capture_class: GuC capture engine class id
+ * @outptr: Point to cached register capture list
+ *
+ * This function will get the register capture list for the owner/type/class
+ * combination.
+ *
+ * Returns: 0 on success or a negative error code on failure.
+ */
+int
+xe_guc_capture_getlist(struct xe_guc *guc, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class, void **outptr)
+{
+ struct xe_guc_state_capture *gc = guc->capture;
+ struct __guc_capture_ads_cache *cache = &gc->ads_cache[owner][type][capture_class];
+ struct guc_debug_capture_list *listnode;
+ int ret, num_regs;
+ u8 *caplist, *tmp;
+ size_t size = 0;
+
+ if (!gc->reglists)
+ return -ENODEV;
+
+ if (cache->is_valid) {
+ *outptr = cache->ptr;
+ return cache->status;
+ }
+
+ ret = xe_guc_capture_getlistsize(guc, owner, type, capture_class, &size);
+ if (ret) {
+ cache->is_valid = true;
+ cache->ptr = NULL;
+ cache->size = 0;
+ cache->status = ret;
+ return ret;
+ }
+
+ caplist = drmm_kzalloc(guc_to_drm(guc), size, GFP_KERNEL);
+ if (!caplist)
+ return -ENOMEM;
+
+ /* populate capture list header */
+ tmp = caplist;
+ num_regs = guc_cap_list_num_regs(guc, owner, type, capture_class);
+ listnode = (struct guc_debug_capture_list *)tmp;
+ listnode->header.info = FIELD_PREP(GUC_CAPTURELISTHDR_NUMDESCR, (u32)num_regs);
+
+ /* populate list of register descriptor */
+ tmp += sizeof(struct guc_debug_capture_list);
+ guc_capture_list_init(guc, owner, type, capture_class,
+ (struct guc_mmio_reg *)tmp, num_regs);
+
+ /* cache this list */
+ cache->is_valid = true;
+ cache->ptr = caplist;
+ cache->size = size;
+ cache->status = 0;
+
+ *outptr = caplist;
+
+ return 0;
+}
+
+/**
+ * xe_guc_capture_getnullheader - Get a null list for register capture
+ * @guc: The GuC object
+ * @outptr: Point to cached register capture list
+ * @size: Point to the size
+ *
+ * This function will alloc for a null list for register capture.
+ *
+ * Returns: 0 on success or a negative error code on failure.
+ */
+int
+xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size)
+{
+ struct xe_guc_state_capture *gc = guc->capture;
+ int tmp = sizeof(u32) * 4;
+ void *null_header;
+
+ if (gc->ads_null_cache) {
+ *outptr = gc->ads_null_cache;
+ *size = tmp;
+ return 0;
+ }
+
+ null_header = drmm_kzalloc(guc_to_drm(guc), tmp, GFP_KERNEL);
+ if (!null_header)
+ return -ENOMEM;
+
+ gc->ads_null_cache = null_header;
+ *outptr = null_header;
+ *size = tmp;
+
+ return 0;
+}
+
+/**
+ * xe_guc_capture_ads_input_worst_size - Calculate the worst size for GuC register capture
+ * @guc: point to xe_guc structure
+ *
+ * Calculate the worst size for GuC register capture by including all possible engines classes.
+ *
+ * Returns: Calculated size
+ */
+size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
+{
+ size_t total_size, class_size, instance_size, global_size;
+ int i, j;
+
+ /*
+ * This function calculates the worst case register lists size by
+ * including all possible engines classes. It is called during the
+ * first of a two-phase GuC (and ADS-population) initialization
+ * sequence, that is, during the pre-hwconfig phase before we have
+ * the exact engine fusing info.
+ */
+ total_size = PAGE_SIZE; /* Pad a page in front for empty lists */
+ for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; i++) {
+ for (j = 0; j < GUC_CAPTURE_LIST_CLASS_MAX; j++) {
+ if (xe_guc_capture_getlistsize(guc, i,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
+ j, &class_size) < 0)
+ class_size = 0;
+ if (xe_guc_capture_getlistsize(guc, i,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE,
+ j, &instance_size) < 0)
+ instance_size = 0;
+ total_size += class_size + instance_size;
+ }
+ if (xe_guc_capture_getlistsize(guc, i,
+ GUC_STATE_CAPTURE_TYPE_GLOBAL,
+ 0, &global_size) < 0)
+ global_size = 0;
+ total_size += global_size;
+ }
+
+ return PAGE_ALIGN(total_size);
+}
+
+/**
+ * xe_guc_capture_init - Init for GuC register capture
+ * @guc: The GuC object
+ *
+ * Init for GuC register capture, alloc memory for capture data structure.
+ *
+ * Returns: 0 if success.
+ -ENOMEM if out of memory
+ */
+int xe_guc_capture_init(struct xe_guc *guc)
+{
+ guc->capture = drmm_kzalloc(guc_to_drm(guc), sizeof(*guc->capture), GFP_KERNEL);
+ if (!guc->capture)
+ return -ENOMEM;
+
+ guc->capture->reglists = guc_capture_get_device_reglist(guc_to_xe(guc));
+ return 0;
+}
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
new file mode 100644
index 000000000000..55c1cedcb923
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_capture.h
@@ -0,0 +1,48 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021-2024 Intel Corporation
+ */
+
+#ifndef _XE_GUC_CAPTURE_H
+#define _XE_GUC_CAPTURE_H
+
+#include <linux/types.h>
+#include "abi/guc_capture_abi.h"
+#include "xe_guc.h"
+#include "xe_guc_fwif.h"
+
+struct xe_guc;
+
+static inline enum guc_capture_list_class_type xe_guc_class_to_capture_class(u16 class)
+{
+ switch (class) {
+ case GUC_RENDER_CLASS:
+ case GUC_COMPUTE_CLASS:
+ return GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE;
+ case GUC_GSC_OTHER_CLASS:
+ return GUC_CAPTURE_LIST_CLASS_GSC_OTHER;
+ case GUC_VIDEO_CLASS:
+ case GUC_VIDEOENHANCE_CLASS:
+ case GUC_BLITTER_CLASS:
+ return class;
+ default:
+ XE_WARN_ON(class);
+ return GUC_CAPTURE_LIST_CLASS_MAX;
+ }
+}
+
+static inline enum guc_capture_list_class_type
+xe_engine_class_to_guc_capture_class(enum xe_engine_class class)
+{
+ return xe_guc_class_to_capture_class(xe_engine_class_to_guc_class(class));
+}
+
+int xe_guc_capture_getlist(struct xe_guc *guc, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class, void **outptr);
+int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class, size_t *size);
+int xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size);
+size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc);
+int xe_guc_capture_init(struct xe_guc *guc);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_capture_types.h b/drivers/gpu/drm/xe/xe_guc_capture_types.h
new file mode 100644
index 000000000000..2057125b1bfa
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_guc_capture_types.h
@@ -0,0 +1,68 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2021-2024 Intel Corporation
+ */
+
+#ifndef _XE_GUC_CAPTURE_TYPES_H
+#define _XE_GUC_CAPTURE_TYPES_H
+
+#include <linux/types.h>
+#include "regs/xe_reg_defs.h"
+
+struct xe_guc;
+
+/* data type of the register in register list */
+enum capture_register_data_type {
+ REG_32BIT = 0,
+ REG_64BIT_LOW_DW,
+ REG_64BIT_HI_DW,
+};
+
+/**
+ * struct __guc_mmio_reg_descr - GuC mmio register descriptor
+ *
+ * xe_guc_capture module uses these structures to define a register
+ * (offsets, names, flags,...) that are used at the ADS regisration
+ * time as well as during runtime processing and reporting of error-
+ * capture states generated by GuC just prior to engine reset events.
+ */
+struct __guc_mmio_reg_descr {
+ /** @reg: the register */
+ struct xe_reg reg;
+ /**
+ * @data_type: data type of the register
+ * Could be 32 bit, low or hi dword of a 64 bit, see enum
+ * register_data_type
+ */
+ enum capture_register_data_type data_type;
+ /** @flags: Flags for the register */
+ u32 flags;
+ /** @mask: The mask to apply */
+ u32 mask;
+ /** @regname: Name of the register */
+ const char *regname;
+};
+
+/**
+ * struct __guc_mmio_reg_descr_group - The group of register descriptor
+ *
+ * xe_guc_capture module uses these structures to maintain static
+ * tables (per unique platform) that consists of lists of registers
+ * (offsets, names, flags,...) that are used at the ADS regisration
+ * time as well as during runtime processing and reporting of error-
+ * capture states generated by GuC just prior to engine reset events.
+ */
+struct __guc_mmio_reg_descr_group {
+ /** @list: The register list */
+ const struct __guc_mmio_reg_descr *list;
+ /** @num_regs: Count of registers in the list */
+ u32 num_regs;
+ /** @owner: PF/VF owner, see enum guc_capture_list_index_type */
+ u32 owner;
+ /** @type: Capture register type, see enum guc_state_capture_type */
+ u32 type;
+ /** @engine: The engine class, see enum guc_capture_list_class_type */
+ u32 engine;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_fwif.h b/drivers/gpu/drm/xe/xe_guc_fwif.h
index 19ee71aeaf17..01e3ab590c3a 100644
--- a/drivers/gpu/drm/xe/xe_guc_fwif.h
+++ b/drivers/gpu/drm/xe/xe_guc_fwif.h
@@ -8,7 +8,9 @@
#include <linux/bits.h>
+#include "abi/guc_capture_abi.h"
#include "abi/guc_klvs_abi.h"
+#include "xe_hw_engine_types.h"
#define G2H_LEN_DW_SCHED_CONTEXT_MODE_SET 4
#define G2H_LEN_DW_DEREGISTER_CONTEXT 3
@@ -157,24 +159,6 @@ struct guc_policies {
u32 reserved[4];
} __packed;
-/* GuC MMIO reg state struct */
-struct guc_mmio_reg {
- u32 offset;
- u32 value;
- u32 flags;
- u32 mask;
-#define GUC_REGSET_MASKED BIT(0)
-#define GUC_REGSET_MASKED_WITH_VALUE BIT(2)
-#define GUC_REGSET_RESTORE_ONLY BIT(3)
-} __packed;
-
-/* GuC register sets */
-struct guc_mmio_reg_set {
- u32 address;
- u16 count;
- u16 reserved;
-} __packed;
-
/* Generic GT SysInfo data types */
#define GUC_GENERIC_GT_SYSINFO_SLICE_ENABLED 0
#define GUC_GENERIC_GT_SYSINFO_VDBOX_SFC_SUPPORT_MASK 1
@@ -188,12 +172,6 @@ struct guc_gt_system_info {
u32 generic_gt_sysinfo[GUC_GENERIC_GT_SYSINFO_MAX];
} __packed;
-enum {
- GUC_CAPTURE_LIST_INDEX_PF = 0,
- GUC_CAPTURE_LIST_INDEX_VF = 1,
- GUC_CAPTURE_LIST_INDEX_MAX = 2,
-};
-
/* GuC Additional Data Struct */
struct guc_ads {
struct guc_mmio_reg_set reg_state_list[GUC_MAX_ENGINE_CLASSES][GUC_MAX_INSTANCES_PER_CLASS];
diff --git a/drivers/gpu/drm/xe/xe_guc_types.h b/drivers/gpu/drm/xe/xe_guc_types.h
index 546ac6350a31..6d7d0976b7af 100644
--- a/drivers/gpu/drm/xe/xe_guc_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_types.h
@@ -58,6 +58,8 @@ struct xe_guc {
struct xe_guc_ads ads;
/** @ct: GuC ct */
struct xe_guc_ct ct;
+ /** @capture: the error-state-capture module's data and objects */
+ struct xe_guc_state_capture *capture;
/** @pc: GuC Power Conservation */
struct xe_guc_pc pc;
/** @dbm: GuC Doorbell Manager */
--
2.34.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v17 2/7] drm/xe/guc: Add XE_LP steered register lists
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
2024-08-27 21:47 ` [PATCH v17 1/7] drm/xe/guc: Prepare GuC register list and update ADS size " Zhanjun Dong
@ 2024-08-27 21:47 ` Zhanjun Dong
2024-08-28 22:12 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 3/7] drm/xe/guc: Add capture size check in GuC log buffer Zhanjun Dong
` (12 subsequent siblings)
14 siblings, 1 reply; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong
Add the ability for runtime allocation and freeing of
steered register list extentions that depend on the
detected HW config fuses.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
drivers/gpu/drm/xe/xe_guc_ads.c | 2 +
drivers/gpu/drm/xe/xe_guc_capture.c | 210 ++++++++++++++++++++++++++--
drivers/gpu/drm/xe/xe_guc_capture.h | 1 +
3 files changed, 202 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
index d7dc47061535..5e15a0702d6a 100644
--- a/drivers/gpu/drm/xe/xe_guc_ads.c
+++ b/drivers/gpu/drm/xe/xe_guc_ads.c
@@ -596,6 +596,8 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
void *ptr;
int i, j;
+ xe_guc_capture_steered_list_init(ads_to_guc(ads));
+
capture_offset = guc_ads_capture_offset(ads);
ads_ggtt = xe_bo_ggtt_addr(ads->bo);
info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 9138c85141a9..9ff19ac62a27 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -200,6 +200,11 @@ struct __guc_capture_ads_cache {
struct xe_guc_state_capture {
const struct __guc_mmio_reg_descr_group *reglists;
+ /**
+ * NOTE: steered registers have multiple instances depending on the HW configuration
+ * (slices or dual-sub-slices) and thus depends on HW fuses discovered
+ */
+ struct __guc_mmio_reg_descr_group *extlists;
struct __guc_capture_ads_cache ads_cache[GUC_CAPTURE_LIST_INDEX_MAX]
[GUC_STATE_CAPTURE_TYPE_MAX]
[GUC_CAPTURE_LIST_CLASS_MAX];
@@ -234,14 +239,152 @@ guc_capture_get_one_list(const struct __guc_mmio_reg_descr_group *reglists,
return NULL;
}
+struct __ext_steer_reg {
+ const char *name;
+ struct xe_reg_mcr reg;
+};
+
+static const struct __ext_steer_reg xe_extregs[] = {
+ {"SAMPLER_INSTDONE", SAMPLER_INSTDONE},
+ {"ROW_INSTDONE", ROW_INSTDONE}
+};
+
+static const struct __ext_steer_reg xehpg_extregs[] = {
+ {"SC_INSTDONE", XEHPG_SC_INSTDONE},
+ {"SC_INSTDONE_EXTRA", XEHPG_SC_INSTDONE_EXTRA},
+ {"SC_INSTDONE_EXTRA2", XEHPG_SC_INSTDONE_EXTRA2},
+ {"INSTDONE_GEOM_SVGUNIT", XEHPG_INSTDONE_GEOM_SVGUNIT}
+};
+
+static void __fill_ext_reg(struct __guc_mmio_reg_descr *ext,
+ const struct __ext_steer_reg *extlist,
+ int slice_id, int subslice_id)
+{
+ if (!ext || !extlist)
+ return;
+
+ ext->reg = XE_REG(extlist->reg.__reg.addr);
+ ext->flags = FIELD_PREP(GUC_REGSET_STEERING_GROUP, slice_id);
+ ext->flags |= FIELD_PREP(GUC_REGSET_STEERING_INSTANCE, subslice_id);
+ ext->regname = extlist->name;
+}
+
+static int
+__alloc_ext_regs(struct drm_device *drm, struct __guc_mmio_reg_descr_group *newlist,
+ const struct __guc_mmio_reg_descr_group *rootlist, int num_regs)
+{
+ struct __guc_mmio_reg_descr *list;
+
+ list = drmm_kzalloc(drm, num_regs * sizeof(struct __guc_mmio_reg_descr), GFP_KERNEL);
+ if (!list)
+ return -ENOMEM;
+
+ newlist->list = list;
+ newlist->num_regs = num_regs;
+ newlist->owner = rootlist->owner;
+ newlist->engine = rootlist->engine;
+ newlist->type = rootlist->type;
+
+ return 0;
+}
+
+static int guc_capture_get_steer_reg_num(struct xe_device *xe)
+{
+ int num = ARRAY_SIZE(xe_extregs);
+
+ if (GRAPHICS_VERx100(xe) >= 1255)
+ num += ARRAY_SIZE(xehpg_extregs);
+
+ return num;
+}
+
+static void guc_capture_alloc_steered_lists(struct xe_guc *guc)
+{
+ struct xe_gt *gt = guc_to_gt(guc);
+ u16 slice, subslice;
+ int iter, i, total = 0;
+ const struct __guc_mmio_reg_descr_group *lists = guc->capture->reglists;
+ const struct __guc_mmio_reg_descr_group *list;
+ struct __guc_mmio_reg_descr_group *extlists;
+ struct __guc_mmio_reg_descr *extarray;
+ bool has_xehpg_extregs = GRAPHICS_VERx100(gt_to_xe(gt)) >= 1255;
+ struct drm_device *drm = >_to_xe(gt)->drm;
+ bool has_rcs_ccs = false;
+ struct xe_hw_engine *hwe;
+ enum xe_hw_engine_id id;
+
+ /*
+ * If GT has no rcs/ccs, no need to alloc steered list.
+ * Currently, only rcs/ccs has steerign register, if in the future,
+ * other engine types has steering register, this condition check need
+ * to be extended
+ */
+ for_each_hw_engine(hwe, gt, id) {
+ if (xe_engine_class_to_guc_capture_class(hwe->class) ==
+ GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
+ has_rcs_ccs = true;
+ break;
+ }
+ }
+
+ if (!has_rcs_ccs)
+ return;
+
+ /* steered registers currently only exist for the render-class */
+ list = guc_capture_get_one_list(lists, GUC_CAPTURE_LIST_INDEX_PF,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
+ GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE);
+ /* skip if extlists was previously allocated */
+ if (!list || guc->capture->extlists)
+ return;
+
+ total = bitmap_weight(gt->fuse_topo.g_dss_mask, sizeof(gt->fuse_topo.g_dss_mask) * 8) *
+ guc_capture_get_steer_reg_num(guc_to_xe(guc));
+
+ if (!total)
+ return;
+
+ /* allocate an extra for an end marker */
+ extlists = drmm_kzalloc(drm, 2 * sizeof(struct __guc_mmio_reg_descr_group), GFP_KERNEL);
+ if (!extlists)
+ return;
+
+ if (__alloc_ext_regs(drm, &extlists[0], list, total)) {
+ drmm_kfree(drm, extlists);
+ return;
+ }
+
+ /* For steering registers, the list is generated at run-time */
+ extarray = (struct __guc_mmio_reg_descr *)extlists[0].list;
+ for_each_dss_steering(iter, gt, slice, subslice) {
+ for (i = 0; i < ARRAY_SIZE(xe_extregs); ++i) {
+ __fill_ext_reg(extarray, &xe_extregs[i], slice, subslice);
+ ++extarray;
+ }
+
+ if (has_xehpg_extregs)
+ for (i = 0; i < ARRAY_SIZE(xehpg_extregs); ++i) {
+ __fill_ext_reg(extarray, &xehpg_extregs[i], slice, subslice);
+ ++extarray;
+ }
+ }
+
+ extlists[0].num_regs = total;
+
+ xe_gt_dbg(guc_to_gt(guc), "capture found %d ext-regs.\n", total);
+ guc->capture->extlists = extlists;
+}
+
static int
guc_capture_list_init(struct xe_guc *guc, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class, struct guc_mmio_reg *ptr,
u16 num_entries)
{
- u32 i = 0;
+ u32 ptr_idx = 0, list_idx = 0;
const struct __guc_mmio_reg_descr_group *reglists = guc->capture->reglists;
+ struct __guc_mmio_reg_descr_group *extlists = guc->capture->extlists;
const struct __guc_mmio_reg_descr_group *match;
+ u32 list_num;
if (!reglists)
return -ENODEV;
@@ -250,15 +393,27 @@ guc_capture_list_init(struct xe_guc *guc, u32 owner, u32 type,
if (!match)
return -ENODATA;
- for (i = 0; i < num_entries && i < match->num_regs; ++i) {
- ptr[i].offset = match->list[i].reg.addr;
- ptr[i].value = 0xDEADF00D;
- ptr[i].flags = match->list[i].flags;
- ptr[i].mask = match->list[i].mask;
+ list_num = match->num_regs;
+ for (list_idx = 0; ptr_idx < num_entries && list_idx < list_num; ++list_idx, ++ptr_idx) {
+ ptr[ptr_idx].offset = match->list[list_idx].reg.addr;
+ ptr[ptr_idx].value = 0xDEADF00D;
+ ptr[ptr_idx].flags = match->list[list_idx].flags;
+ ptr[ptr_idx].mask = match->list[list_idx].mask;
}
- if (i < num_entries)
- xe_gt_dbg(guc_to_gt(guc), "Got short capture reglist init: %d out %d.\n", i,
+ match = guc_capture_get_one_list(extlists, owner, type, capture_class);
+ if (match)
+ for (ptr_idx = list_num, list_idx = 0; ptr_idx < num_entries &&
+ ptr_idx < (list_num + match->num_regs) && list_idx < match->num_regs;
+ ++ptr_idx, ++list_idx) {
+ ptr[ptr_idx].offset = match->list[list_idx].reg.addr;
+ ptr[ptr_idx].value = 0xDEADF00D;
+ ptr[ptr_idx].flags = match->list[list_idx].flags;
+ ptr[ptr_idx].mask = match->list[list_idx].mask;
+ }
+
+ if (ptr_idx < num_entries)
+ xe_gt_dbg(guc_to_gt(guc), "Got short capture reglist init: %d out %d.\n", ptr_idx,
num_entries);
return 0;
@@ -269,12 +424,22 @@ guc_cap_list_num_regs(struct xe_guc *guc, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class)
{
const struct __guc_mmio_reg_descr_group *match;
+ int num_regs = 0;
match = guc_capture_get_one_list(guc->capture->reglists, owner, type, capture_class);
- if (!match)
- return 0;
+ if (match)
+ num_regs = match->num_regs;
+
+ match = guc_capture_get_one_list(guc->capture->extlists, owner, type, capture_class);
+ if (match)
+ num_regs += match->num_regs;
+ else
+ /* Estimate steering register size for rcs/ccs */
+ if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE)
+ num_regs += guc_capture_get_steer_reg_num(guc_to_xe(guc)) *
+ XE_MAX_DSS_FUSE_BITS;
- return match->num_regs;
+ return num_regs;
}
static int
@@ -489,6 +654,29 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
return PAGE_ALIGN(total_size);
}
+/*
+ * xe_guc_capture_steered_list_init - Init steering register list
+ * @guc: The GuC object
+ *
+ * Init steering register list for GuC register capture, alloc memory for
+ * capture data structure. Create pre-alloc node
+ *
+ * Returns: 0 if success.
+ -ENOMEM if out of memory
+ */
+int xe_guc_capture_steered_list_init(struct xe_guc *guc)
+{
+ /*
+ * For certain engine classes, there are slice and subslice
+ * level registers requiring steering. We allocate and populate
+ * these based on hw config and add it as an extension list at
+ * the end of the pre-populated render list.
+ */
+ guc_capture_alloc_steered_lists(guc);
+
+ return 0;
+}
+
/**
* xe_guc_capture_init - Init for GuC register capture
* @guc: The GuC object
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
index 55c1cedcb923..c2091c6ddb68 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.h
+++ b/drivers/gpu/drm/xe/xe_guc_capture.h
@@ -43,6 +43,7 @@ int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class, size_t *size);
int xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size);
size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc);
+int xe_guc_capture_steered_list_init(struct xe_guc *guc);
int xe_guc_capture_init(struct xe_guc *guc);
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v17 3/7] drm/xe/guc: Add capture size check in GuC log buffer
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
2024-08-27 21:47 ` [PATCH v17 1/7] drm/xe/guc: Prepare GuC register list and update ADS size " Zhanjun Dong
2024-08-27 21:47 ` [PATCH v17 2/7] drm/xe/guc: Add XE_LP steered register lists Zhanjun Dong
@ 2024-08-27 21:47 ` Zhanjun Dong
2024-08-27 21:47 ` [PATCH v17 4/7] drm/xe/guc: Extract GuC error capture lists Zhanjun Dong
` (11 subsequent siblings)
14 siblings, 0 replies; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong, Alan Previn
Capture-nodes generated by GuC are placed in the GuC capture ring
buffer which is a sub-region of the larger Guc-Log-buffer.
Add capture output size check before allocating the shared buffer.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
drivers/gpu/drm/xe/abi/guc_log_abi.h | 20 +++++++
drivers/gpu/drm/xe/xe_guc_capture.c | 83 +++++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_guc_log.c | 65 ++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_log.h | 7 ++-
4 files changed, 173 insertions(+), 2 deletions(-)
create mode 100644 drivers/gpu/drm/xe/abi/guc_log_abi.h
diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h
new file mode 100644
index 000000000000..10db4ffaa17f
--- /dev/null
+++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h
@@ -0,0 +1,20 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef _ABI_GUC_LOG_ABI_H
+#define _ABI_GUC_LOG_ABI_H
+
+#include <linux/types.h>
+
+/* GuC logging buffer types */
+enum guc_log_buffer_type {
+ GUC_LOG_BUFFER_CRASH_DUMP,
+ GUC_LOG_BUFFER_DEBUG,
+ GUC_LOG_BUFFER_CAPTURE,
+};
+
+#define GUC_LOG_BUFFER_TYPE_MAX 3
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 9ff19ac62a27..492647d6dc02 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -22,6 +22,7 @@
#include "xe_gt_mcr.h"
#include "xe_gt_printk.h"
#include "xe_guc.h"
+#include "xe_guc_ads.h"
#include "xe_guc_capture.h"
#include "xe_guc_capture_types.h"
#include "xe_guc_ct.h"
@@ -654,6 +655,85 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
return PAGE_ALIGN(total_size);
}
+static int guc_capture_output_size_est(struct xe_guc *guc)
+{
+ struct xe_gt *gt = guc_to_gt(guc);
+ struct xe_hw_engine *hwe;
+ enum xe_hw_engine_id id;
+
+ int capture_size = 0;
+ size_t tmp = 0;
+
+ if (!guc->capture)
+ return -ENODEV;
+
+ /*
+ * If every single engine-instance suffered a failure in quick succession but
+ * were all unrelated, then a burst of multiple error-capture events would dump
+ * registers for every one engine instance, one at a time. In this case, GuC
+ * would even dump the global-registers repeatedly.
+ *
+ * For each engine instance, there would be 1 x guc_state_capture_group_t output
+ * followed by 3 x guc_state_capture_t lists. The latter is how the register
+ * dumps are split across different register types (where the '3' are global vs class
+ * vs instance).
+ */
+ for_each_hw_engine(hwe, gt, id) {
+ enum guc_capture_list_class_type capture_class;
+
+ capture_class = xe_engine_class_to_guc_capture_class(hwe->class);
+ capture_size += sizeof(struct guc_state_capture_group_header_t) +
+ (3 * sizeof(struct guc_state_capture_header_t));
+
+ if (!guc_capture_getlistsize(guc, 0, GUC_STATE_CAPTURE_TYPE_GLOBAL,
+ 0, &tmp, true))
+ capture_size += tmp;
+ if (!guc_capture_getlistsize(guc, 0, GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
+ capture_class, &tmp, true))
+ capture_size += tmp;
+ if (!guc_capture_getlistsize(guc, 0, GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE,
+ capture_class, &tmp, true))
+ capture_size += tmp;
+ }
+
+ return capture_size;
+}
+
+/*
+ * Add on a 3x multiplier to allow for multiple back-to-back captures occurring
+ * before the Xe can read the data out and process it
+ */
+#define GUC_CAPTURE_OVERBUFFER_MULTIPLIER 3
+
+static void check_guc_capture_size(struct xe_guc *guc)
+{
+ int capture_size = guc_capture_output_size_est(guc);
+ int spare_size = capture_size * GUC_CAPTURE_OVERBUFFER_MULTIPLIER;
+ u32 buffer_size = xe_guc_log_section_size_capture(&guc->log);
+
+ /*
+ * NOTE: capture_size is much smaller than the capture region
+ * allocation (DG2: <80K vs 1MB).
+ * Additionally, its based on space needed to fit all engines getting
+ * reset at once within the same G2H handler task slot. This is very
+ * unlikely. However, if GuC really does run out of space for whatever
+ * reason, we will see an separate warning message when processing the
+ * G2H event capture-notification, search for:
+ * xe_guc_STATE_CAPTURE_EVENT_STATUS_NOSPACE.
+ */
+ if (capture_size < 0)
+ xe_gt_dbg(guc_to_gt(guc),
+ "Failed to calculate error state capture buffer minimum size: %d!\n",
+ capture_size);
+ if (capture_size > buffer_size)
+ xe_gt_dbg(guc_to_gt(guc), "Error state capture buffer maybe small: %d < %d\n",
+ buffer_size, capture_size);
+ else if (spare_size > buffer_size)
+ xe_gt_dbg(guc_to_gt(guc),
+ "Error state capture buffer lacks spare size: %d < %d (min = %d)\n",
+ buffer_size, spare_size, capture_size);
+}
+
/*
* xe_guc_capture_steered_list_init - Init steering register list
* @guc: The GuC object
@@ -673,11 +753,12 @@ int xe_guc_capture_steered_list_init(struct xe_guc *guc)
* the end of the pre-populated render list.
*/
guc_capture_alloc_steered_lists(guc);
+ check_guc_capture_size(guc);
return 0;
}
-/**
+/*
* xe_guc_capture_init - Init for GuC register capture
* @guc: The GuC object
*
diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
index a37ee3419428..d6b5ac522b6c 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.c
+++ b/drivers/gpu/drm/xe/xe_guc_log.c
@@ -96,3 +96,68 @@ int xe_guc_log_init(struct xe_guc_log *log)
return 0;
}
+
+static u32 xe_guc_log_section_size_crash(struct xe_guc_log *log)
+{
+ return CRASH_BUFFER_SIZE;
+}
+
+static u32 xe_guc_log_section_size_debug(struct xe_guc_log *log)
+{
+ return DEBUG_BUFFER_SIZE;
+}
+
+/**
+ * xe_guc_log_section_size_capture - Get capture buffer size within log sections.
+ * @log: The log object.
+ *
+ * This function will return the capture buffer size within log sections.
+ *
+ * Return: capture buffer size.
+ */
+u32 xe_guc_log_section_size_capture(struct xe_guc_log *log)
+{
+ return CAPTURE_BUFFER_SIZE;
+}
+
+/**
+ * xe_guc_get_log_buffer_size - Get log buffer size for a type.
+ * @log: The log object.
+ * @type: The log buffer type
+ *
+ * Return: buffer size.
+ */
+u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type)
+{
+ switch (type) {
+ case GUC_LOG_BUFFER_CRASH_DUMP:
+ return xe_guc_log_section_size_crash(log);
+ case GUC_LOG_BUFFER_DEBUG:
+ return xe_guc_log_section_size_debug(log);
+ case GUC_LOG_BUFFER_CAPTURE:
+ return xe_guc_log_section_size_capture(log);
+ }
+ return 0;
+}
+
+/**
+ * xe_guc_get_log_buffer_offset - Get offset in log buffer for a type.
+ * @log: The log object.
+ * @type: The log buffer type
+ *
+ * This function will return the offset in the log buffer for a type.
+ * Return: buffer offset.
+ */
+u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type)
+{
+ enum guc_log_buffer_type i;
+ u32 offset = PAGE_SIZE;/* for the log_buffer_states */
+
+ for (i = GUC_LOG_BUFFER_CRASH_DUMP; i < GUC_LOG_BUFFER_TYPE_MAX; ++i) {
+ if (i == type)
+ break;
+ offset += xe_guc_get_log_buffer_size(log, i);
+ }
+
+ return offset;
+}
diff --git a/drivers/gpu/drm/xe/xe_guc_log.h b/drivers/gpu/drm/xe/xe_guc_log.h
index 2d25ab28b4b3..87ecd1814854 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.h
+++ b/drivers/gpu/drm/xe/xe_guc_log.h
@@ -7,6 +7,7 @@
#define _XE_GUC_LOG_H_
#include "xe_guc_log_types.h"
+#include "abi/guc_log_abi.h"
struct drm_printer;
@@ -17,7 +18,7 @@ struct drm_printer;
#else
#define CRASH_BUFFER_SIZE SZ_8K
#define DEBUG_BUFFER_SIZE SZ_64K
-#define CAPTURE_BUFFER_SIZE SZ_16K
+#define CAPTURE_BUFFER_SIZE SZ_1M
#endif
/*
* While we're using plain log level in i915, GuC controls are much more...
@@ -45,4 +46,8 @@ xe_guc_log_get_level(struct xe_guc_log *log)
return log->level;
}
+u32 xe_guc_log_section_size_capture(struct xe_guc_log *log);
+u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type);
+u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type);
+
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v17 4/7] drm/xe/guc: Extract GuC error capture lists
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (2 preceding siblings ...)
2024-08-27 21:47 ` [PATCH v17 3/7] drm/xe/guc: Add capture size check in GuC log buffer Zhanjun Dong
@ 2024-08-27 21:47 ` Zhanjun Dong
2024-08-28 0:22 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 5/7] drm/xe/guc: Move xe_lrc_snapshot to header file Zhanjun Dong
` (10 subsequent siblings)
14 siblings, 1 reply; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong
Upon the G2H Notify-Err-Capture event, parse through the
GuC Log Buffer (error-capture-subregion) and generate one or
more capture-nodes. A single node represents a single "engine-
instance-capture-dump" and contains at least 3 register lists:
global, engine-class and engine-instance. An internal link
list is maintained to store one or more nodes.
Because the link-list node generation happen before the call
to devcoredump, duplicate global and engine-class register
lists for each engine-instance register dump if we find
dependent-engine resets in a engine-capture-group.
To avoid dynamically allocate the output nodes during gt reset,
pre-allocate a fixed number of empty nodes up front (at the
time of ADS registration) that we can consume from or return to
an internal cached list of nodes.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
drivers/gpu/drm/xe/abi/guc_actions_abi.h | 8 +
drivers/gpu/drm/xe/abi/guc_log_abi.h | 55 ++
drivers/gpu/drm/xe/xe_guc_capture.c | 700 +++++++++++++++++++++++
drivers/gpu/drm/xe/xe_guc_capture.h | 1 +
drivers/gpu/drm/xe/xe_guc_ct.c | 2 +
drivers/gpu/drm/xe/xe_guc_log.c | 36 ++
drivers/gpu/drm/xe/xe_guc_log.h | 3 +
drivers/gpu/drm/xe/xe_guc_log_types.h | 7 +
drivers/gpu/drm/xe/xe_guc_submit.c | 65 ++-
drivers/gpu/drm/xe/xe_guc_submit.h | 2 +
10 files changed, 862 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/xe/abi/guc_actions_abi.h b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
index 43ad4652c2b2..b54fe40fc5a9 100644
--- a/drivers/gpu/drm/xe/abi/guc_actions_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_actions_abi.h
@@ -176,6 +176,14 @@ enum xe_guc_sleep_state_status {
#define GUC_LOG_CONTROL_VERBOSITY_MASK (0xF << GUC_LOG_CONTROL_VERBOSITY_SHIFT)
#define GUC_LOG_CONTROL_DEFAULT_LOGGING (1 << 8)
+enum xe_guc_state_capture_event_status {
+ XE_GUC_STATE_CAPTURE_EVENT_STATUS_SUCCESS = 0x0,
+ XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE = 0x1,
+};
+
+#define XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK 0x000000FF
+#define XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN 1
+
#define XE_GUC_TLB_INVAL_TYPE_SHIFT 0
#define XE_GUC_TLB_INVAL_MODE_SHIFT 8
/* Flush PPC or SMRO caches along with TLB invalidation request */
diff --git a/drivers/gpu/drm/xe/abi/guc_log_abi.h b/drivers/gpu/drm/xe/abi/guc_log_abi.h
index 10db4ffaa17f..554630b7ccd9 100644
--- a/drivers/gpu/drm/xe/abi/guc_log_abi.h
+++ b/drivers/gpu/drm/xe/abi/guc_log_abi.h
@@ -17,4 +17,59 @@ enum guc_log_buffer_type {
#define GUC_LOG_BUFFER_TYPE_MAX 3
+/**
+ * struct guc_log_buffer_state - GuC log buffer state
+ *
+ * Below state structure is used for coordination of retrieval of GuC firmware
+ * logs. Separate state is maintained for each log buffer type.
+ * read_ptr points to the location where Xe read last in log buffer and
+ * is read only for GuC firmware. write_ptr is incremented by GuC with number
+ * of bytes written for each log entry and is read only for Xe.
+ * When any type of log buffer becomes half full, GuC sends a flush interrupt.
+ * GuC firmware expects that while it is writing to 2nd half of the buffer,
+ * first half would get consumed by Host and then get a flush completed
+ * acknowledgment from Host, so that it does not end up doing any overwrite
+ * causing loss of logs. So when buffer gets half filled & Xe has requested
+ * for interrupt, GuC will set flush_to_file field, set the sampled_write_ptr
+ * to the value of write_ptr and raise the interrupt.
+ * On receiving the interrupt Xe should read the buffer, clear flush_to_file
+ * field and also update read_ptr with the value of sample_write_ptr, before
+ * sending an acknowledgment to GuC. marker & version fields are for internal
+ * usage of GuC and opaque to Xe. buffer_full_cnt field is incremented every
+ * time GuC detects the log buffer overflow.
+ */
+struct guc_log_buffer_state {
+ /** @marker: buffer state start marker */
+ u32 marker[2];
+ /** @read_ptr: the last byte offset that was read by KMD previously */
+ u32 read_ptr;
+ /**
+ * @write_ptr: the next byte offset location that will be written by
+ * GuC
+ */
+ u32 write_ptr;
+ /** @size: Log buffer size */
+ u32 size;
+ /**
+ * @sampled_write_ptr: Log buffer write pointer
+ * This is written by GuC to the byte offset of the next free entry in
+ * the buffer on log buffer half full or state capture notification
+ */
+ u32 sampled_write_ptr;
+ /**
+ * @wrap_offset: wraparound offset
+ * This is the byte offset of location 1 byte after last valid guc log
+ * event entry written by Guc firmware before there was a wraparound.
+ * This field is updated by guc firmware and should be used by Host
+ * when copying buffer contents to file.
+ */
+ u32 wrap_offset;
+ /** @flags: Flush to file flag and buffer full count */
+ u32 flags;
+#define GUC_LOG_BUFFER_STATE_FLUSH_TO_FILE GENMASK(0, 0)
+#define GUC_LOG_BUFFER_STATE_BUFFER_FULL_CNT GENMASK(4, 1)
+ /** @version: The Guc-Log-Entry format version */
+ u32 version;
+} __packed;
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 492647d6dc02..20b38d60dca7 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -10,6 +10,7 @@
#include "abi/guc_actions_abi.h"
#include "abi/guc_capture_abi.h"
+#include "abi/guc_log_abi.h"
#include "regs/xe_engine_regs.h"
#include "regs/xe_gt_regs.h"
#include "regs/xe_guc_regs.h"
@@ -32,6 +33,51 @@
#include "xe_macros.h"
#include "xe_map.h"
+/*
+ * struct __guc_capture_bufstate
+ *
+ * Book-keeping structure used to track read and write pointers
+ * as we extract error capture data from the GuC-log-buffer's
+ * error-capture region as a stream of dwords.
+ */
+struct __guc_capture_bufstate {
+ u32 size;
+ u32 data_offset;
+ u32 rd;
+ u32 wr;
+};
+
+/*
+ * struct __guc_capture_parsed_output - extracted error capture node
+ *
+ * A single unit of extracted error-capture output data grouped together
+ * at an engine-instance level. We keep these nodes in a linked list.
+ * See cachelist and outlist below.
+ */
+struct __guc_capture_parsed_output {
+ /*
+ * A single set of 3 capture lists: a global-list
+ * an engine-class-list and an engine-instance list.
+ * outlist in __guc_capture_parsed_output will keep
+ * a linked list of these nodes that will eventually
+ * be detached from outlist and attached into to
+ * xe_codedump in response to a context reset
+ */
+ struct list_head link;
+ bool is_partial;
+ u32 eng_class;
+ u32 eng_inst;
+ u32 guc_id;
+ u32 lrca;
+ struct gcap_reg_list_info {
+ u32 vfid;
+ u32 num_regs;
+ struct guc_mmio_reg *regs;
+ } reginfo[GUC_STATE_CAPTURE_TYPE_MAX];
+#define GCAP_PARSED_REGLIST_INDEX_GLOBAL BIT(GUC_STATE_CAPTURE_TYPE_GLOBAL)
+#define GCAP_PARSED_REGLIST_INDEX_ENGCLASS BIT(GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS)
+};
+
/*
* Define all device tables of GuC error capture register lists
* NOTE:
@@ -210,6 +256,12 @@ struct xe_guc_state_capture {
[GUC_STATE_CAPTURE_TYPE_MAX]
[GUC_CAPTURE_LIST_CLASS_MAX];
void *ads_null_cache;
+ struct list_head cachelist;
+#define PREALLOC_NODES_MAX_COUNT (3 * GUC_MAX_ENGINE_CLASSES * GUC_MAX_INSTANCES_PER_CLASS)
+#define PREALLOC_NODES_DEFAULT_NUMREGS 64
+
+ int max_mmio_per_node;
+ struct list_head outlist;
};
static const struct __guc_mmio_reg_descr_group *
@@ -734,6 +786,649 @@ static void check_guc_capture_size(struct xe_guc *guc)
buffer_size, spare_size, capture_size);
}
+static void
+guc_capture_add_node_to_list(struct __guc_capture_parsed_output *node,
+ struct list_head *list)
+{
+ list_add_tail(&node->link, list);
+}
+
+static void
+guc_capture_add_node_to_outlist(struct xe_guc_state_capture *gc,
+ struct __guc_capture_parsed_output *node)
+{
+ guc_capture_add_node_to_list(node, &gc->outlist);
+}
+
+static void
+guc_capture_add_node_to_cachelist(struct xe_guc_state_capture *gc,
+ struct __guc_capture_parsed_output *node)
+{
+ guc_capture_add_node_to_list(node, &gc->cachelist);
+}
+
+static void
+guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *node)
+{
+ struct guc_mmio_reg *tmp[GUC_STATE_CAPTURE_TYPE_MAX];
+ int i;
+
+ for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
+ tmp[i] = node->reginfo[i].regs;
+ memset(tmp[i], 0, sizeof(struct guc_mmio_reg) *
+ guc->capture->max_mmio_per_node);
+ }
+ memset(node, 0, sizeof(*node));
+ for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i)
+ node->reginfo[i].regs = tmp[i];
+
+ INIT_LIST_HEAD(&node->link);
+}
+
+/**
+ * DOC: Init, G2H-event and reporting flows for GuC-error-capture
+ *
+ * KMD Init time flows:
+ * --------------------
+ * --> alloc A: GuC input capture regs lists (registered to GuC via ADS).
+ * xe_guc_ads acquires the register lists by calling
+ * xe_guc_capture_list_size and xe_guc_capture_list_get 'n' times,
+ * where n = 1 for global-reg-list +
+ * num_engine_classes for class-reg-list +
+ * num_engine_classes for instance-reg-list
+ * (since all instances of the same engine-class type
+ * have an identical engine-instance register-list).
+ * ADS module also calls separately for PF vs VF.
+ *
+ * --> alloc B: GuC output capture buf (registered via guc_init_params(log_param))
+ * Size = #define CAPTURE_BUFFER_SIZE (warns if on too-small)
+ * Note2: 'x 3' to hold multiple capture groups
+ *
+ * GUC Runtime notify capture:
+ * --------------------------
+ * --> G2H STATE_CAPTURE_NOTIFICATION
+ * L--> xe_guc_capture_process
+ * L--> Loop through B (head..tail) and for each engine instance's
+ * err-state-captured register-list we find, we alloc 'C':
+ * --> alloc C: A capture-output-node structure that includes misc capture info along
+ * with 3 register list dumps (global, engine-class and engine-instance)
+ * This node is created from a pre-allocated list of blank nodes in
+ * guc->capture->cachelist and populated with the error-capture
+ * data from GuC and then it's added into guc->capture->outlist linked
+ * list. This list is used for matchup and printout by xe_devcoredump_read
+ * and xe_hw_engine_snapshot_print, (when user invokes the devcoredump sysfs).
+ *
+ * GUC --> notify context reset:
+ * -----------------------------
+ * --> guc_exec_queue_timedout_job
+ * L--> xe_devcoredump
+ * L--> devcoredump_snapshot(..IS_GUC_CAPTURE)
+ * --> xe_hw_engine_snapshot_capture(..IS_GUC_CAPTURE)
+ *
+ * User Sysfs / Debugfs
+ * --------------------
+ * --> xe_devcoredump_read->
+ * L--> xxx_snapshot_print
+ * L--> xe_hw_engine_snapshot_print
+ * Print register lists values saved at
+ * guc->capture->outlist
+ *
+ */
+
+static int guc_capture_buf_cnt(struct __guc_capture_bufstate *buf)
+{
+ if (buf->wr >= buf->rd)
+ return (buf->wr - buf->rd);
+ return (buf->size - buf->rd) + buf->wr;
+}
+
+static int guc_capture_buf_cnt_to_end(struct __guc_capture_bufstate *buf)
+{
+ if (buf->rd > buf->wr)
+ return (buf->size - buf->rd);
+ return (buf->wr - buf->rd);
+}
+
+/*
+ * GuC's error-capture output is a ring buffer populated in a byte-stream fashion:
+ *
+ * The GuC Log buffer region for error-capture is managed like a ring buffer.
+ * The GuC firmware dumps error capture logs into this ring in a byte-stream flow.
+ * Additionally, as per the current and foreseeable future, all packed error-
+ * capture output structures are dword aligned.
+ *
+ * That said, if the GuC firmware is in the midst of writing a structure that is larger
+ * than one dword but the tail end of the err-capture buffer-region has lesser space left,
+ * we would need to extract that structure one dword at a time straddled across the end,
+ * onto the start of the ring.
+ *
+ * Below function, guc_capture_log_remove_bytes is a helper for that. All callers of this
+ * function would typically do a straight-up memcpy from the ring contents and will only
+ * call this helper if their structure-extraction is straddling across the end of the
+ * ring. GuC firmware does not add any padding. The reason for the no-padding is to ease
+ * scalability for future expansion of output data types without requiring a redesign
+ * of the flow controls.
+ */
+static int
+guc_capture_log_remove_bytes(struct xe_guc *guc, struct __guc_capture_bufstate *buf,
+ void *out, int bytes_needed)
+{
+#define GUC_CAPTURE_LOG_BUF_COPY_RETRY_MAX 3
+
+ int fill_size = 0, tries = GUC_CAPTURE_LOG_BUF_COPY_RETRY_MAX;
+ int copy_size, avail;
+
+ xe_assert(guc_to_xe(guc), bytes_needed % sizeof(u32) == 0);
+
+ if (bytes_needed > guc_capture_buf_cnt(buf))
+ return -1;
+
+ while (bytes_needed > 0 && tries--) {
+ int misaligned;
+
+ avail = guc_capture_buf_cnt_to_end(buf);
+ misaligned = avail % sizeof(u32);
+ /* wrap if at end */
+ if (!avail) {
+ /* output stream clipped */
+ if (!buf->rd)
+ return fill_size;
+ buf->rd = 0;
+ continue;
+ }
+
+ /* Only copy to u32 aligned data */
+ copy_size = avail < bytes_needed ? avail - misaligned : bytes_needed;
+ xe_map_memcpy_from(guc_to_xe(guc), out + fill_size, &guc->log.bo->vmap,
+ buf->data_offset + buf->rd, copy_size);
+ buf->rd += copy_size;
+ fill_size += copy_size;
+ bytes_needed -= copy_size;
+
+ if (misaligned)
+ xe_gt_warn(guc_to_gt(guc),
+ "Bytes extraction not dword aligned, clipping.\n");
+ }
+
+ return fill_size;
+}
+
+static int
+guc_capture_log_get_group_hdr(struct xe_guc *guc, struct __guc_capture_bufstate *buf,
+ struct guc_state_capture_group_header_t *ghdr)
+{
+ int fullsize = sizeof(struct guc_state_capture_group_header_t);
+
+ if (guc_capture_log_remove_bytes(guc, buf, ghdr, fullsize) != fullsize)
+ return -1;
+ return 0;
+}
+
+static int
+guc_capture_log_get_data_hdr(struct xe_guc *guc, struct __guc_capture_bufstate *buf,
+ struct guc_state_capture_header_t *hdr)
+{
+ int fullsize = sizeof(struct guc_state_capture_header_t);
+
+ if (guc_capture_log_remove_bytes(guc, buf, hdr, fullsize) != fullsize)
+ return -1;
+ return 0;
+}
+
+static int
+guc_capture_log_get_register(struct xe_guc *guc, struct __guc_capture_bufstate *buf,
+ struct guc_mmio_reg *reg)
+{
+ int fullsize = sizeof(struct guc_mmio_reg);
+
+ if (guc_capture_log_remove_bytes(guc, buf, reg, fullsize) != fullsize)
+ return -1;
+ return 0;
+}
+
+static struct __guc_capture_parsed_output *
+guc_capture_get_prealloc_node(struct xe_guc *guc)
+{
+ struct __guc_capture_parsed_output *found = NULL;
+
+ if (!list_empty(&guc->capture->cachelist)) {
+ struct __guc_capture_parsed_output *n, *ntmp;
+
+ /* get first avail node from the cache list */
+ list_for_each_entry_safe(n, ntmp, &guc->capture->cachelist, link) {
+ found = n;
+ break;
+ }
+ } else {
+ struct __guc_capture_parsed_output *n, *ntmp;
+
+ /* traverse down and steal back the oldest node already allocated */
+ list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) {
+ found = n;
+ }
+ }
+ if (found) {
+ list_del(&found->link);
+ guc_capture_init_node(guc, found);
+ }
+
+ return found;
+}
+
+static struct __guc_capture_parsed_output *
+guc_capture_clone_node(struct xe_guc *guc, struct __guc_capture_parsed_output *original,
+ u32 keep_reglist_mask)
+{
+ struct __guc_capture_parsed_output *new;
+ int i;
+
+ new = guc_capture_get_prealloc_node(guc);
+ if (!new)
+ return NULL;
+ if (!original)
+ return new;
+
+ new->is_partial = original->is_partial;
+
+ /* copy reg-lists that we want to clone */
+ for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
+ if (keep_reglist_mask & BIT(i)) {
+ XE_WARN_ON(original->reginfo[i].num_regs >
+ guc->capture->max_mmio_per_node);
+
+ memcpy(new->reginfo[i].regs, original->reginfo[i].regs,
+ original->reginfo[i].num_regs * sizeof(struct guc_mmio_reg));
+
+ new->reginfo[i].num_regs = original->reginfo[i].num_regs;
+ new->reginfo[i].vfid = original->reginfo[i].vfid;
+
+ if (i == GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS) {
+ new->eng_class = original->eng_class;
+ } else if (i == GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE) {
+ new->eng_inst = original->eng_inst;
+ new->guc_id = original->guc_id;
+ new->lrca = original->lrca;
+ }
+ }
+ }
+
+ return new;
+}
+
+static int
+guc_capture_extract_reglists(struct xe_guc *guc, struct __guc_capture_bufstate *buf)
+{
+ struct xe_gt *gt = guc_to_gt(guc);
+ struct guc_state_capture_group_header_t ghdr = {0};
+ struct guc_state_capture_header_t hdr = {0};
+ struct __guc_capture_parsed_output *node = NULL;
+ struct guc_mmio_reg *regs = NULL;
+ int i, numlists, numregs, ret = 0;
+ enum guc_state_capture_type datatype;
+ struct guc_mmio_reg tmp;
+ bool is_partial = false;
+
+ i = guc_capture_buf_cnt(buf);
+ if (!i)
+ return -ENODATA;
+
+ if (i % sizeof(u32)) {
+ xe_gt_warn(gt, "Got mis-aligned register capture entries\n");
+ ret = -EIO;
+ goto bailout;
+ }
+
+ /* first get the capture group header */
+ if (guc_capture_log_get_group_hdr(guc, buf, &ghdr)) {
+ ret = -EIO;
+ goto bailout;
+ }
+ /*
+ * we would typically expect a layout as below where n would be expected to be
+ * anywhere between 3 to n where n > 3 if we are seeing multiple dependent engine
+ * instances being reset together.
+ * ____________________________________________
+ * | Capture Group |
+ * | ________________________________________ |
+ * | | Capture Group Header: | |
+ * | | - num_captures = 5 | |
+ * | |______________________________________| |
+ * | ________________________________________ |
+ * | | Capture1: | |
+ * | | Hdr: GLOBAL, numregs=a | |
+ * | | ____________________________________ | |
+ * | | | Reglist | | |
+ * | | | - reg1, reg2, ... rega | | |
+ * | | |__________________________________| | |
+ * | |______________________________________| |
+ * | ________________________________________ |
+ * | | Capture2: | |
+ * | | Hdr: CLASS=RENDER/COMPUTE, numregs=b| |
+ * | | ____________________________________ | |
+ * | | | Reglist | | |
+ * | | | - reg1, reg2, ... regb | | |
+ * | | |__________________________________| | |
+ * | |______________________________________| |
+ * | ________________________________________ |
+ * | | Capture3: | |
+ * | | Hdr: INSTANCE=RCS, numregs=c | |
+ * | | ____________________________________ | |
+ * | | | Reglist | | |
+ * | | | - reg1, reg2, ... regc | | |
+ * | | |__________________________________| | |
+ * | |______________________________________| |
+ * | ________________________________________ |
+ * | | Capture4: | |
+ * | | Hdr: CLASS=RENDER/COMPUTE, numregs=d| |
+ * | | ____________________________________ | |
+ * | | | Reglist | | |
+ * | | | - reg1, reg2, ... regd | | |
+ * | | |__________________________________| | |
+ * | |______________________________________| |
+ * | ________________________________________ |
+ * | | Capture5: | |
+ * | | Hdr: INSTANCE=CCS0, numregs=e | |
+ * | | ____________________________________ | |
+ * | | | Reglist | | |
+ * | | | - reg1, reg2, ... rege | | |
+ * | | |__________________________________| | |
+ * | |______________________________________| |
+ * |__________________________________________|
+ */
+ is_partial = FIELD_GET(GUC_STATE_CAPTURE_GROUP_HEADER_CAPTURE_GROUP_TYPE, ghdr.info);
+ numlists = FIELD_GET(GUC_STATE_CAPTURE_GROUP_HEADER_NUM_CAPTURES, ghdr.info);
+
+ while (numlists--) {
+ if (guc_capture_log_get_data_hdr(guc, buf, &hdr)) {
+ ret = -EIO;
+ break;
+ }
+
+ datatype = FIELD_GET(GUC_STATE_CAPTURE_HEADER_CAPTURE_TYPE, hdr.info);
+ if (datatype > GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE) {
+ /* unknown capture type - skip over to next capture set */
+ numregs = FIELD_GET(GUC_STATE_CAPTURE_HEADER_NUM_MMIO_ENTRIES,
+ hdr.num_mmio_entries);
+ while (numregs--) {
+ if (guc_capture_log_get_register(guc, buf, &tmp)) {
+ ret = -EIO;
+ break;
+ }
+ }
+ continue;
+ } else if (node) {
+ /*
+ * Based on the current capture type and what we have so far,
+ * decide if we should add the current node into the internal
+ * linked list for match-up when xe_devcoredump calls later
+ * (and alloc a blank node for the next set of reglists)
+ * or continue with the same node or clone the current node
+ * but only retain the global or class registers (such as the
+ * case of dependent engine resets).
+ */
+ if (datatype == GUC_STATE_CAPTURE_TYPE_GLOBAL) {
+ guc_capture_add_node_to_outlist(guc->capture, node);
+ node = NULL;
+ } else if (datatype == GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS &&
+ node->reginfo[GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS].num_regs) {
+ /* Add to list, clone node and duplicate global list */
+ guc_capture_add_node_to_outlist(guc->capture, node);
+ node = guc_capture_clone_node(guc, node,
+ GCAP_PARSED_REGLIST_INDEX_GLOBAL);
+ } else if (datatype == GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE &&
+ node->reginfo[GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE].num_regs) {
+ /* Add to list, clone node and duplicate global + class lists */
+ guc_capture_add_node_to_outlist(guc->capture, node);
+ node = guc_capture_clone_node(guc, node,
+ (GCAP_PARSED_REGLIST_INDEX_GLOBAL |
+ GCAP_PARSED_REGLIST_INDEX_ENGCLASS));
+ }
+ }
+
+ if (!node) {
+ node = guc_capture_get_prealloc_node(guc);
+ if (!node) {
+ ret = -ENOMEM;
+ break;
+ }
+ if (datatype != GUC_STATE_CAPTURE_TYPE_GLOBAL)
+ xe_gt_dbg(gt, "Register capture missing global dump: %08x!\n",
+ datatype);
+ }
+ node->is_partial = is_partial;
+ node->reginfo[datatype].vfid = FIELD_GET(GUC_STATE_CAPTURE_HEADER_VFID, hdr.owner);
+
+ switch (datatype) {
+ case GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE:
+ node->eng_class = FIELD_GET(GUC_STATE_CAPTURE_HEADER_ENGINE_CLASS,
+ hdr.info);
+ node->eng_inst = FIELD_GET(GUC_STATE_CAPTURE_HEADER_ENGINE_INSTANCE,
+ hdr.info);
+ node->lrca = hdr.lrca;
+ node->guc_id = hdr.guc_id;
+ break;
+ case GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS:
+ node->eng_class = FIELD_GET(GUC_STATE_CAPTURE_HEADER_ENGINE_CLASS,
+ hdr.info);
+ break;
+ default:
+ break;
+ }
+
+ numregs = FIELD_GET(GUC_STATE_CAPTURE_HEADER_NUM_MMIO_ENTRIES,
+ hdr.num_mmio_entries);
+ if (numregs > guc->capture->max_mmio_per_node) {
+ xe_gt_dbg(gt, "Register capture list extraction clipped by prealloc!\n");
+ numregs = guc->capture->max_mmio_per_node;
+ }
+ node->reginfo[datatype].num_regs = numregs;
+ regs = node->reginfo[datatype].regs;
+ i = 0;
+ while (numregs--) {
+ if (guc_capture_log_get_register(guc, buf, ®s[i++])) {
+ ret = -EIO;
+ break;
+ }
+ }
+ }
+
+bailout:
+ if (node) {
+ /* If we have data, add to linked list for match-up when xe_devcoredump calls */
+ for (i = GUC_STATE_CAPTURE_TYPE_GLOBAL; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
+ if (node->reginfo[i].regs) {
+ guc_capture_add_node_to_outlist(guc->capture, node);
+ node = NULL;
+ break;
+ }
+ }
+ if (node) /* else return it back to cache list */
+ guc_capture_add_node_to_cachelist(guc->capture, node);
+ }
+ return ret;
+}
+
+static int __guc_capture_flushlog_complete(struct xe_guc *guc)
+{
+ u32 action[] = {
+ XE_GUC_ACTION_LOG_BUFFER_FILE_FLUSH_COMPLETE,
+ GUC_LOG_BUFFER_CAPTURE
+ };
+
+ return xe_guc_ct_send_g2h_handler(&guc->ct, action, ARRAY_SIZE(action));
+}
+
+static void __guc_capture_process_output(struct xe_guc *guc)
+{
+ unsigned int buffer_size, read_offset, write_offset, full_count;
+ struct xe_uc *uc = container_of(guc, typeof(*uc), guc);
+ struct guc_log_buffer_state log_buf_state_local;
+ struct __guc_capture_bufstate buf;
+ bool new_overflow;
+ int ret, tmp;
+ u32 log_buf_state_offset;
+ u32 src_data_offset;
+
+ log_buf_state_offset = sizeof(struct guc_log_buffer_state) * GUC_LOG_BUFFER_CAPTURE;
+ src_data_offset = xe_guc_get_log_buffer_offset(&guc->log, GUC_LOG_BUFFER_CAPTURE);
+
+ /*
+ * Make a copy of the state structure, inside GuC log buffer
+ * (which is uncached mapped), on the stack to avoid reading
+ * from it multiple times.
+ */
+ xe_map_memcpy_from(guc_to_xe(guc), &log_buf_state_local, &guc->log.bo->vmap,
+ log_buf_state_offset, sizeof(struct guc_log_buffer_state));
+
+ buffer_size = xe_guc_get_log_buffer_size(&guc->log, GUC_LOG_BUFFER_CAPTURE);
+ read_offset = log_buf_state_local.read_ptr;
+ write_offset = log_buf_state_local.sampled_write_ptr;
+ full_count = FIELD_GET(GUC_LOG_BUFFER_STATE_BUFFER_FULL_CNT, log_buf_state_local.flags);
+
+ /* Bookkeeping stuff */
+ tmp = FIELD_GET(GUC_LOG_BUFFER_STATE_FLUSH_TO_FILE, log_buf_state_local.flags);
+ guc->log.stats[GUC_LOG_BUFFER_CAPTURE].flush += tmp;
+ new_overflow = xe_guc_check_log_buf_overflow(&guc->log, GUC_LOG_BUFFER_CAPTURE,
+ full_count);
+
+ /* Now copy the actual logs. */
+ if (unlikely(new_overflow)) {
+ /* copy the whole buffer in case of overflow */
+ read_offset = 0;
+ write_offset = buffer_size;
+ } else if (unlikely((read_offset > buffer_size) ||
+ (write_offset > buffer_size))) {
+ xe_gt_err(guc_to_gt(guc),
+ "Register capture buffer in invalid state: read = 0x%X, size = 0x%X!\n",
+ read_offset, buffer_size);
+ /* copy whole buffer as offsets are unreliable */
+ read_offset = 0;
+ write_offset = buffer_size;
+ }
+
+ buf.size = buffer_size;
+ buf.rd = read_offset;
+ buf.wr = write_offset;
+ buf.data_offset = src_data_offset;
+
+ if (!xe_guc_read_stopped(guc)) {
+ do {
+ ret = guc_capture_extract_reglists(guc, &buf);
+ if (ret && ret != -ENODATA)
+ xe_gt_dbg(guc_to_gt(guc), "Capture extraction failed:%d\n", ret);
+ } while (ret >= 0);
+ }
+
+ /* Update the state of log buffer err-cap state */
+ xe_map_wr(guc_to_xe(guc), &guc->log.bo->vmap,
+ log_buf_state_offset + offsetof(struct guc_log_buffer_state, read_ptr), u32,
+ write_offset);
+
+ /*
+ * Clear the flush_to_file from local first, the local was loaded by above
+ * xe_map_memcpy_from, then write out the "updated local" through
+ * xe_map_wr()
+ */
+ log_buf_state_local.flags &= ~GUC_LOG_BUFFER_STATE_FLUSH_TO_FILE;
+ xe_map_wr(guc_to_xe(guc), &guc->log.bo->vmap,
+ log_buf_state_offset + offsetof(struct guc_log_buffer_state, flags), u32,
+ log_buf_state_local.flags);
+ __guc_capture_flushlog_complete(guc);
+}
+
+/*
+ * xe_guc_capture_process - Process GuC register captured data
+ * @guc: The GuC object
+ *
+ * When GuC captured data is ready, GuC will send message
+ * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
+ * called to process the data comes with the message.
+ *
+ * Returns: None
+ */
+void xe_guc_capture_process(struct xe_guc *guc)
+{
+ if (guc->capture)
+ __guc_capture_process_output(guc);
+}
+
+static struct __guc_capture_parsed_output *
+guc_capture_alloc_one_node(struct xe_guc *guc)
+{
+ struct drm_device *drm = guc_to_drm(guc);
+ struct __guc_capture_parsed_output *new;
+ int i;
+
+ new = drmm_kzalloc(drm, sizeof(*new), GFP_KERNEL);
+ if (!new)
+ return NULL;
+
+ for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
+ new->reginfo[i].regs = drmm_kzalloc(drm, guc->capture->max_mmio_per_node *
+ sizeof(struct guc_mmio_reg), GFP_KERNEL);
+ if (!new->reginfo[i].regs) {
+ while (i)
+ drmm_kfree(drm, new->reginfo[--i].regs);
+ drmm_kfree(drm, new);
+ return NULL;
+ }
+ }
+ guc_capture_init_node(guc, new);
+
+ return new;
+}
+
+static void
+__guc_capture_create_prealloc_nodes(struct xe_guc *guc)
+{
+ struct __guc_capture_parsed_output *node = NULL;
+ int i;
+
+ for (i = 0; i < PREALLOC_NODES_MAX_COUNT; ++i) {
+ node = guc_capture_alloc_one_node(guc);
+ if (!node) {
+ xe_gt_warn(guc_to_gt(guc), "Register capture pre-alloc-cache failure\n");
+ /* dont free the priors, use what we got and cleanup at shutdown */
+ return;
+ }
+ guc_capture_add_node_to_cachelist(guc->capture, node);
+ }
+}
+
+static int
+guc_get_max_reglist_count(struct xe_guc *guc)
+{
+ int i, j, k, tmp, maxregcount = 0;
+
+ for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; ++i) {
+ for (j = 0; j < GUC_STATE_CAPTURE_TYPE_MAX; ++j) {
+ for (k = 0; k < GUC_MAX_ENGINE_CLASSES; ++k) {
+ if (j == GUC_STATE_CAPTURE_TYPE_GLOBAL && k > 0)
+ continue;
+
+ tmp = guc_cap_list_num_regs(guc, i, j, k);
+ if (tmp > maxregcount)
+ maxregcount = tmp;
+ }
+ }
+ }
+ if (!maxregcount)
+ maxregcount = PREALLOC_NODES_DEFAULT_NUMREGS;
+
+ return maxregcount;
+}
+
+static void
+guc_capture_create_prealloc_nodes(struct xe_guc *guc)
+{
+ /* skip if we've already done the pre-alloc */
+ if (guc->capture->max_mmio_per_node)
+ return;
+
+ guc->capture->max_mmio_per_node = guc_get_max_reglist_count(guc);
+ __guc_capture_create_prealloc_nodes(guc);
+}
+
/*
* xe_guc_capture_steered_list_init - Init steering register list
* @guc: The GuC object
@@ -754,6 +1449,7 @@ int xe_guc_capture_steered_list_init(struct xe_guc *guc)
*/
guc_capture_alloc_steered_lists(guc);
check_guc_capture_size(guc);
+ guc_capture_create_prealloc_nodes(guc);
return 0;
}
@@ -774,5 +1470,9 @@ int xe_guc_capture_init(struct xe_guc *guc)
return -ENOMEM;
guc->capture->reglists = guc_capture_get_device_reglist(guc_to_xe(guc));
+
+ INIT_LIST_HEAD(&guc->capture->outlist);
+ INIT_LIST_HEAD(&guc->capture->cachelist);
+
return 0;
}
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
index c2091c6ddb68..3a690e8b714a 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.h
+++ b/drivers/gpu/drm/xe/xe_guc_capture.h
@@ -37,6 +37,7 @@ xe_engine_class_to_guc_capture_class(enum xe_engine_class class)
return xe_guc_class_to_capture_class(xe_engine_class_to_guc_class(class));
}
+void xe_guc_capture_process(struct xe_guc *guc);
int xe_guc_capture_getlist(struct xe_guc *guc, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class, void **outptr);
int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c
index f24dd5223926..a58400c6af39 100644
--- a/drivers/gpu/drm/xe/xe_guc_ct.c
+++ b/drivers/gpu/drm/xe/xe_guc_ct.c
@@ -1123,6 +1123,8 @@ static int process_g2h_msg(struct xe_guc_ct *ct, u32 *msg, u32 len)
/* Selftest only at the moment */
break;
case XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION:
+ ret = xe_guc_error_capture_handler(guc, payload, adj_len);
+ break;
case XE_GUC_ACTION_NOTIFY_FLUSH_LOG_BUFFER_TO_FILE:
/* FIXME: Handle this */
break;
diff --git a/drivers/gpu/drm/xe/xe_guc_log.c b/drivers/gpu/drm/xe/xe_guc_log.c
index d6b5ac522b6c..91b6c1e750e8 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.c
+++ b/drivers/gpu/drm/xe/xe_guc_log.c
@@ -9,6 +9,7 @@
#include "xe_bo.h"
#include "xe_gt.h"
+#include "xe_gt_printk.h"
#include "xe_map.h"
#include "xe_module.h"
@@ -161,3 +162,38 @@ u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_typ
return offset;
}
+
+/**
+ * xe_guc_check_log_buf_overflow - Check if log buffer overflowed
+ * @log: The log object.
+ * @type: The log buffer type
+ * @full_cnt: The count of buffer full
+ *
+ * This function will check count of buffer full against previous, mismatch
+ * indicate overflowed.
+ * Update the sampled_overflow counter, if the 4 bit counter overflowed, add
+ * up 16 to correct the value.
+ *
+ * Return: True if overflowed.
+ */
+bool xe_guc_check_log_buf_overflow(struct xe_guc_log *log, enum guc_log_buffer_type type,
+ unsigned int full_cnt)
+{
+ unsigned int prev_full_cnt = log->stats[type].sampled_overflow;
+ bool overflow = false;
+
+ if (full_cnt != prev_full_cnt) {
+ overflow = true;
+
+ log->stats[type].overflow = full_cnt;
+ log->stats[type].sampled_overflow += full_cnt - prev_full_cnt;
+
+ if (full_cnt < prev_full_cnt) {
+ /* buffer_full_cnt is a 4 bit counter */
+ log->stats[type].sampled_overflow += 16;
+ }
+ xe_gt_notice(log_to_gt(log), "log buffer overflow\n");
+ }
+
+ return overflow;
+}
diff --git a/drivers/gpu/drm/xe/xe_guc_log.h b/drivers/gpu/drm/xe/xe_guc_log.h
index 87ecd1814854..8eb2102aebbd 100644
--- a/drivers/gpu/drm/xe/xe_guc_log.h
+++ b/drivers/gpu/drm/xe/xe_guc_log.h
@@ -49,5 +49,8 @@ xe_guc_log_get_level(struct xe_guc_log *log)
u32 xe_guc_log_section_size_capture(struct xe_guc_log *log);
u32 xe_guc_get_log_buffer_size(struct xe_guc_log *log, enum guc_log_buffer_type type);
u32 xe_guc_get_log_buffer_offset(struct xe_guc_log *log, enum guc_log_buffer_type type);
+bool xe_guc_check_log_buf_overflow(struct xe_guc_log *log,
+ enum guc_log_buffer_type type,
+ unsigned int full_cnt);
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_log_types.h b/drivers/gpu/drm/xe/xe_guc_log_types.h
index 125080d138a7..dd924a5e2366 100644
--- a/drivers/gpu/drm/xe/xe_guc_log_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_log_types.h
@@ -7,6 +7,7 @@
#define _XE_GUC_LOG_TYPES_H_
#include <linux/types.h>
+#include "abi/guc_log_abi.h"
struct xe_bo;
@@ -18,6 +19,12 @@ struct xe_guc_log {
u32 level;
/** @bo: XE BO for GuC log */
struct xe_bo *bo;
+ /** @stats: logging related stats */
+ struct {
+ u32 sampled_overflow;
+ u32 overflow;
+ u32 flush;
+ } stats[GUC_LOG_BUFFER_TYPE_MAX];
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index fbbe6a487bbb..381be84740cf 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -27,6 +27,7 @@
#include "xe_gt_clock.h"
#include "xe_gt_printk.h"
#include "xe_guc.h"
+#include "xe_guc_capture.h"
#include "xe_guc_ct.h"
#include "xe_guc_exec_queue_types.h"
#include "xe_guc_id_mgr.h"
@@ -800,7 +801,7 @@ static void guc_exec_queue_free_job(struct drm_sched_job *drm_job)
xe_sched_job_put(job);
}
-static int guc_read_stopped(struct xe_guc *guc)
+int xe_guc_read_stopped(struct xe_guc *guc)
{
return atomic_read(&guc->submission_state.stopped);
}
@@ -822,7 +823,7 @@ static void disable_scheduling_deregister(struct xe_guc *guc,
set_min_preemption_timeout(guc, q);
smp_rmb();
ret = wait_event_timeout(guc->ct.wq, !exec_queue_pending_enable(q) ||
- guc_read_stopped(guc), HZ * 5);
+ xe_guc_read_stopped(guc), HZ * 5);
if (!ret) {
struct xe_gpu_scheduler *sched = &q->guc->sched;
@@ -948,7 +949,7 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
*/
ret = wait_event_timeout(guc->ct.wq,
!exec_queue_pending_disable(q) ||
- guc_read_stopped(guc), HZ * 5);
+ xe_guc_read_stopped(guc), HZ * 5);
if (!ret) {
drm_warn(&xe->drm, "Schedule disable failed to respond");
xe_sched_submission_start(sched);
@@ -1016,8 +1017,8 @@ static void enable_scheduling(struct xe_exec_queue *q)
ret = wait_event_timeout(guc->ct.wq,
!exec_queue_pending_enable(q) ||
- guc_read_stopped(guc), HZ * 5);
- if (!ret || guc_read_stopped(guc)) {
+ xe_guc_read_stopped(guc), HZ * 5);
+ if (!ret || xe_guc_read_stopped(guc)) {
xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
set_exec_queue_banned(q);
xe_gt_reset_async(q->gt);
@@ -1122,8 +1123,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
*/
ret = wait_event_timeout(guc->ct.wq,
!exec_queue_pending_enable(q) ||
- guc_read_stopped(guc), HZ * 5);
- if (!ret || guc_read_stopped(guc))
+ xe_guc_read_stopped(guc), HZ * 5);
+ if (!ret || xe_guc_read_stopped(guc))
goto trigger_reset;
/*
@@ -1147,8 +1148,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
smp_rmb();
ret = wait_event_timeout(guc->ct.wq,
!exec_queue_pending_disable(q) ||
- guc_read_stopped(guc), HZ * 5);
- if (!ret || guc_read_stopped(guc)) {
+ xe_guc_read_stopped(guc), HZ * 5);
+ if (!ret || xe_guc_read_stopped(guc)) {
trigger_reset:
if (!ret)
xe_gt_warn(guc_to_gt(guc), "Schedule disable failed to respond");
@@ -1334,7 +1335,7 @@ static void suspend_fence_signal(struct xe_exec_queue *q)
struct xe_device *xe = guc_to_xe(guc);
xe_assert(xe, exec_queue_suspended(q) || exec_queue_killed(q) ||
- guc_read_stopped(guc));
+ xe_guc_read_stopped(guc));
xe_assert(xe, q->guc->suspend_pending);
__suspend_fence_signal(q);
@@ -1348,9 +1349,9 @@ static void __guc_exec_queue_process_msg_suspend(struct xe_sched_msg *msg)
if (guc_exec_queue_allowed_to_change_state(q) && !exec_queue_suspended(q) &&
exec_queue_enabled(q)) {
wait_event(guc->ct.wq, q->guc->resume_time != RESUME_PENDING ||
- guc_read_stopped(guc));
+ xe_guc_read_stopped(guc));
- if (!guc_read_stopped(guc)) {
+ if (!xe_guc_read_stopped(guc)) {
s64 since_resume_ms =
ktime_ms_delta(ktime_get(),
q->guc->resume_time);
@@ -1475,7 +1476,7 @@ static int guc_exec_queue_init(struct xe_exec_queue *q)
q->entity = &ge->entity;
- if (guc_read_stopped(guc))
+ if (xe_guc_read_stopped(guc))
xe_sched_stop(sched);
mutex_unlock(&guc->submission_state.lock);
@@ -1631,7 +1632,7 @@ static int guc_exec_queue_suspend_wait(struct xe_exec_queue *q)
ret = wait_event_interruptible_timeout(q->guc->suspend_wait,
!READ_ONCE(q->guc->suspend_pending) ||
exec_queue_killed(q) ||
- guc_read_stopped(guc),
+ xe_guc_read_stopped(guc),
HZ * 5);
if (!ret) {
@@ -1757,7 +1758,7 @@ int xe_guc_submit_reset_prepare(struct xe_guc *guc)
void xe_guc_submit_reset_wait(struct xe_guc *guc)
{
wait_event(guc->ct.wq, xe_device_wedged(guc_to_xe(guc)) ||
- !guc_read_stopped(guc));
+ !xe_guc_read_stopped(guc));
}
void xe_guc_submit_stop(struct xe_guc *guc)
@@ -1766,7 +1767,7 @@ void xe_guc_submit_stop(struct xe_guc *guc)
unsigned long index;
struct xe_device *xe = guc_to_xe(guc);
- xe_assert(xe, guc_read_stopped(guc) == 1);
+ xe_assert(xe, xe_guc_read_stopped(guc) == 1);
mutex_lock(&guc->submission_state.lock);
@@ -1804,7 +1805,7 @@ int xe_guc_submit_start(struct xe_guc *guc)
unsigned long index;
struct xe_device *xe = guc_to_xe(guc);
- xe_assert(xe, guc_read_stopped(guc) == 1);
+ xe_assert(xe, xe_guc_read_stopped(guc) == 1);
mutex_lock(&guc->submission_state.lock);
atomic_dec(&guc->submission_state.stopped);
@@ -1995,6 +1996,36 @@ int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
return 0;
}
+/*
+ * xe_guc_error_capture_handler - Handler of GuC captured message
+ * @guc: The GuC object
+ * @msg: Point to the message
+ * @len: The message length
+ *
+ * When GuC captured data is ready, GuC will send message
+ * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
+ * called 1st to check status before process the data comes with the message.
+ *
+ * Returns: None
+ */
+int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
+{
+ u32 status;
+
+ if (unlikely(len != XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION_DATA_LEN)) {
+ xe_gt_dbg(guc_to_gt(guc), "Invalid length %u", len);
+ return -EPROTO;
+ }
+
+ status = msg[0] & XE_GUC_STATE_CAPTURE_EVENT_STATUS_MASK;
+ if (status == XE_GUC_STATE_CAPTURE_EVENT_STATUS_NOSPACE)
+ xe_gt_warn(guc_to_gt(guc), "G2H-Error capture no space");
+
+ xe_guc_capture_process(guc);
+
+ return 0;
+}
+
int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
u32 len)
{
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.h b/drivers/gpu/drm/xe/xe_guc_submit.h
index bdf8c9f3d24a..9b71a986c6ca 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.h
+++ b/drivers/gpu/drm/xe/xe_guc_submit.h
@@ -20,12 +20,14 @@ void xe_guc_submit_stop(struct xe_guc *guc);
int xe_guc_submit_start(struct xe_guc *guc);
void xe_guc_submit_wedge(struct xe_guc *guc);
+int xe_guc_read_stopped(struct xe_guc *guc);
int xe_guc_sched_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
int xe_guc_deregister_done_handler(struct xe_guc *guc, u32 *msg, u32 len);
int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len);
int xe_guc_exec_queue_memory_cat_error_handler(struct xe_guc *guc, u32 *msg,
u32 len);
int xe_guc_exec_queue_reset_failure_handler(struct xe_guc *guc, u32 *msg, u32 len);
+int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len);
struct xe_guc_submit_exec_queue_snapshot *
xe_guc_exec_queue_snapshot_capture(struct xe_exec_queue *q);
--
2.34.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v17 5/7] drm/xe/guc: Move xe_lrc_snapshot to header file
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (3 preceding siblings ...)
2024-08-27 21:47 ` [PATCH v17 4/7] drm/xe/guc: Extract GuC error capture lists Zhanjun Dong
@ 2024-08-27 21:47 ` Zhanjun Dong
2024-08-27 22:32 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 6/7] drm/xe/guc: Add dss conversion from group/instance ID Zhanjun Dong
` (9 subsequent siblings)
14 siblings, 1 reply; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong
Move xe_lrc_snapshot structure define to header file, GuC capture feature
need to access structure fields.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
drivers/gpu/drm/xe/xe_lrc.c | 18 ------------------
drivers/gpu/drm/xe/xe_lrc_types.h | 18 +++++++++++++++++-
2 files changed, 17 insertions(+), 19 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index aec7db39c061..52f8d202e262 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -38,24 +38,6 @@
#define LRC_INDIRECT_RING_STATE_SIZE SZ_4K
-struct xe_lrc_snapshot {
- struct xe_bo *lrc_bo;
- void *lrc_snapshot;
- unsigned long lrc_size, lrc_offset;
-
- u32 context_desc;
- u32 indirect_context_desc;
- u32 head;
- struct {
- u32 internal;
- u32 memory;
- } tail;
- u32 start_seqno;
- u32 seqno;
- u32 ctx_timestamp;
- u32 ctx_job_timestamp;
-};
-
static struct xe_device *
lrc_to_xe(struct xe_lrc *lrc)
{
diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h b/drivers/gpu/drm/xe/xe_lrc_types.h
index 71ecb453f811..011d4607e585 100644
--- a/drivers/gpu/drm/xe/xe_lrc_types.h
+++ b/drivers/gpu/drm/xe/xe_lrc_types.h
@@ -55,6 +55,22 @@ struct xe_lrc {
u32 ctx_timestamp;
};
-struct xe_lrc_snapshot;
+struct xe_lrc_snapshot {
+ struct xe_bo *lrc_bo;
+ void *lrc_snapshot;
+ unsigned long lrc_size, lrc_offset;
+
+ u32 context_desc;
+ u32 indirect_context_desc;
+ u32 head;
+ struct {
+ u32 internal;
+ u32 memory;
+ } tail;
+ u32 start_seqno;
+ u32 seqno;
+ u32 ctx_timestamp;
+ u32 ctx_job_timestamp;
+};
#endif
--
2.34.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v17 6/7] drm/xe/guc: Add dss conversion from group/instance ID
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (4 preceding siblings ...)
2024-08-27 21:47 ` [PATCH v17 5/7] drm/xe/guc: Move xe_lrc_snapshot to header file Zhanjun Dong
@ 2024-08-27 21:47 ` Zhanjun Dong
2024-08-27 23:15 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 7/7] drm/xe/guc: Plumb GuC-capture into dev coredump Zhanjun Dong
` (8 subsequent siblings)
14 siblings, 1 reply; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong, Alan Previn
Add dss conversion from group/instance ID.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
---
drivers/gpu/drm/xe/xe_gt_mcr.c | 13 +++++++++++++
drivers/gpu/drm/xe/xe_gt_mcr.h | 1 +
2 files changed, 14 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c b/drivers/gpu/drm/xe/xe_gt_mcr.c
index 7d7bd0be6233..5deef7ee7925 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.c
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
@@ -352,6 +352,19 @@ void xe_gt_mcr_get_dss_steering(struct xe_gt *gt, unsigned int dss, u16 *group,
*instance = dss % gt->steering_dss_per_grp;
}
+/**
+ * xe_gt_mcr_steering_info_to_dss_id - Get DSS ID from group/instance steering
+ * @gt: GT structure
+ * @group: steering group ID
+ * @instance: steering instance ID
+ *
+ * Return: the coverted DSS id.
+ */
+u32 xe_gt_mcr_steering_info_to_dss_id(struct xe_gt *gt, u16 group, u16 instance)
+{
+ return group * dss_per_group(gt) + instance;
+}
+
static void init_steering_dss(struct xe_gt *gt)
{
gt->steering_dss_per_grp = dss_per_group(gt);
diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.h b/drivers/gpu/drm/xe/xe_gt_mcr.h
index 8d119a0d5493..c0cd36021c24 100644
--- a/drivers/gpu/drm/xe/xe_gt_mcr.h
+++ b/drivers/gpu/drm/xe/xe_gt_mcr.h
@@ -28,6 +28,7 @@ void xe_gt_mcr_multicast_write(struct xe_gt *gt, struct xe_reg_mcr mcr_reg,
void xe_gt_mcr_steering_dump(struct xe_gt *gt, struct drm_printer *p);
void xe_gt_mcr_get_dss_steering(struct xe_gt *gt, unsigned int dss, u16 *group, u16 *instance);
+u32 xe_gt_mcr_steering_info_to_dss_id(struct xe_gt *gt, u16 group, u16 instance);
/*
* Loop over each DSS and determine the group and instance IDs that
--
2.34.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* [PATCH v17 7/7] drm/xe/guc: Plumb GuC-capture into dev coredump
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (5 preceding siblings ...)
2024-08-27 21:47 ` [PATCH v17 6/7] drm/xe/guc: Add dss conversion from group/instance ID Zhanjun Dong
@ 2024-08-27 21:47 ` Zhanjun Dong
2024-08-29 4:26 ` Teres Alexis, Alan Previn
2024-08-27 21:53 ` ✓ CI.Patch_applied: success for drm/xe/guc: Add GuC based register capture for error capture (rev17) Patchwork
` (7 subsequent siblings)
14 siblings, 1 reply; 23+ messages in thread
From: Zhanjun Dong @ 2024-08-27 21:47 UTC (permalink / raw)
To: intel-xe; +Cc: Zhanjun Dong
Add pre-capture by read from hw engine if GuC capture data is not ready,
the pre-captured data will be refereshed if GuC capture is ready at later
time.
Provide xe_guc_capture_get_reg_desc_list to get the register dscriptor
list.
GuC support limited register ranges to be captured, add type of direct
read to read these registers by host.
Add function to check if capture is ready for a job.
Print out snapshot registers by types of global, class, instance and
direct read.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
---
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
drivers/gpu/drm/xe/xe_devcoredump.c | 16 +-
drivers/gpu/drm/xe/xe_devcoredump_types.h | 2 +
drivers/gpu/drm/xe/xe_guc_capture.c | 380 +++++++++++++++++++++-
drivers/gpu/drm/xe/xe_guc_capture.h | 26 ++
drivers/gpu/drm/xe/xe_guc_capture_types.h | 2 +
drivers/gpu/drm/xe/xe_guc_submit.c | 19 +-
drivers/gpu/drm/xe/xe_hw_engine.c | 273 ++++------------
drivers/gpu/drm/xe/xe_hw_engine.h | 2 +
drivers/gpu/drm/xe/xe_hw_engine_types.h | 66 +---
drivers/gpu/drm/xe/xe_lrc.h | 1 +
11 files changed, 504 insertions(+), 285 deletions(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 0d1a4a9f4e11..6a8dee069974 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -605,4 +605,6 @@
#define GT_CS_MASTER_ERROR_INTERRUPT REG_BIT(3)
#define GT_RENDER_USER_INTERRUPT REG_BIT(0)
+#define SFC_DONE(n) XE_REG(0x1cc000 + (n) * 0x1000)
+
#endif
diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
index bdb76e834e4c..783958829750 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump.c
+++ b/drivers/gpu/drm/xe/xe_devcoredump.c
@@ -16,6 +16,7 @@
#include "xe_force_wake.h"
#include "xe_gt.h"
#include "xe_gt_printk.h"
+#include "xe_guc_capture.h"
#include "xe_guc_ct.h"
#include "xe_guc_submit.h"
#include "xe_hw_engine.h"
@@ -135,6 +136,8 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss)
xe_vm_snapshot_free(ss->vm);
ss->vm = NULL;
+
+ xe_guc_capture_free(&ss->gt->uc.guc);
}
static void xe_devcoredump_deferred_snap_work(struct work_struct *work)
@@ -204,6 +207,7 @@ static void xe_devcoredump_free(void *data)
/* To prevent stale data on next snapshot, clear everything */
memset(&coredump->snapshot, 0, sizeof(coredump->snapshot));
coredump->captured = false;
+ coredump->job = NULL;
drm_info(&coredump_to_xe(coredump)->drm,
"Xe device coredump has been deleted.\n");
}
@@ -214,8 +218,6 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
struct xe_devcoredump_snapshot *ss = &coredump->snapshot;
struct xe_exec_queue *q = job->q;
struct xe_guc *guc = exec_queue_to_guc(q);
- struct xe_hw_engine *hwe;
- enum xe_hw_engine_id id;
u32 adj_logical_mask = q->logical_mask;
u32 width_mask = (0x1 << q->width) - 1;
const char *process_name = "no process";
@@ -231,6 +233,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
strscpy(ss->process_name, process_name);
ss->gt = q->gt;
+ coredump->job = job;
INIT_WORK(&ss->work, xe_devcoredump_deferred_snap_work);
cookie = dma_fence_begin_signalling();
@@ -252,14 +255,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
coredump->snapshot.job = xe_sched_job_snapshot_capture(job);
coredump->snapshot.vm = xe_vm_snapshot_capture(q->vm);
- for_each_hw_engine(hwe, q->gt, id) {
- if (hwe->class != q->hwe->class ||
- !(BIT(hwe->logical_instance) & adj_logical_mask)) {
- coredump->snapshot.hwe[id] = NULL;
- continue;
- }
- coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe);
- }
+ xe_hw_engine_snapshot_capture_for_job(job);
queue_work(system_unbound_wq, &ss->work);
diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h
index 440d05d77a5a..50165a10abdd 100644
--- a/drivers/gpu/drm/xe/xe_devcoredump_types.h
+++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h
@@ -69,6 +69,8 @@ struct xe_devcoredump {
bool captured;
/** @snapshot: Snapshot is captured at time of the first crash */
struct xe_devcoredump_snapshot snapshot;
+ /** @job: Point to the issue job */
+ struct xe_sched_job *job;
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
index 20b38d60dca7..16f660db3231 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.c
+++ b/drivers/gpu/drm/xe/xe_guc_capture.c
@@ -27,11 +27,16 @@
#include "xe_guc_capture.h"
#include "xe_guc_capture_types.h"
#include "xe_guc_ct.h"
+#include "xe_guc_exec_queue_types.h"
#include "xe_guc_log.h"
+#include "xe_guc_submit_types.h"
#include "xe_guc_submit.h"
#include "xe_hw_engine_types.h"
+#include "xe_lrc.h"
#include "xe_macros.h"
#include "xe_map.h"
+#include "xe_mmio.h"
+#include "xe_sched_job.h"
/*
* struct __guc_capture_bufstate
@@ -69,11 +74,13 @@ struct __guc_capture_parsed_output {
u32 eng_inst;
u32 guc_id;
u32 lrca;
+ u32 type;
+ enum xe_hw_engine_snapshot_source_id source;
struct gcap_reg_list_info {
u32 vfid;
u32 num_regs;
struct guc_mmio_reg *regs;
- } reginfo[GUC_STATE_CAPTURE_TYPE_MAX];
+ } reginfo[GUC_HOST_CAPTURE_TYPE_MAX];
#define GCAP_PARSED_REGLIST_INDEX_GLOBAL BIT(GUC_STATE_CAPTURE_TYPE_GLOBAL)
#define GCAP_PARSED_REGLIST_INDEX_ENGCLASS BIT(GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS)
};
@@ -133,6 +140,17 @@ struct __guc_capture_parsed_output {
{ SC_INSTDONE_EXTRA, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA"}, \
{ SC_INSTDONE_EXTRA2, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA2"}
+/*
+ * GuC support limited registers ranges to be captured for debug
+ * purpose, for registers out of these ranges, direct read is the only
+ * way to access.
+ */
+#define XELP_VEC_DIRECT_READ \
+ { SFC_DONE(0), 0, 0, 0, "SFC_DONE[0]"}, \
+ { SFC_DONE(1), 0, 0, 0, "SFC_DONE[1]"}, \
+ { SFC_DONE(2), 0, 0, 0, "SFC_DONE[2]"}, \
+ { SFC_DONE(3), 0, 0, 0, "SFC_DONE[3]"}
+
/* XE_LP Global */
static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {
COMMON_XELP_BASE_GLOBAL,
@@ -164,6 +182,11 @@ static const struct __guc_mmio_reg_descr xe_vec_inst_regs[] = {
COMMON_BASE_ENGINE_INSTANCE,
};
+/* Video Enhancement direct read registers */
+static const struct __guc_mmio_reg_descr xe_vec_direct_read_regs[] = {
+ XELP_VEC_DIRECT_READ,
+};
+
/* Blitter Per-Engine-Instance */
static const struct __guc_mmio_reg_descr xe_blt_inst_regs[] = {
COMMON_BASE_ENGINE_INSTANCE,
@@ -201,6 +224,8 @@ static const struct __guc_mmio_reg_descr_group xe_lp_lists[] = {
MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
+ MAKE_REGLIST(xe_vec_direct_read_regs, PF, HOST_DIRECT_READ,
+ GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
@@ -217,6 +242,8 @@ static const struct __guc_mmio_reg_descr_group xe_hpg_lists[] = {
MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
+ MAKE_REGLIST(xe_vec_direct_read_regs, PF, HOST_DIRECT_READ,
+ GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
@@ -292,6 +319,23 @@ guc_capture_get_one_list(const struct __guc_mmio_reg_descr_group *reglists,
return NULL;
}
+const struct __guc_mmio_reg_descr_group *
+xe_guc_capture_get_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class)
+{
+ return guc_capture_get_one_list(guc_capture_get_device_reglist(gt_to_xe(gt)), owner, type,
+ capture_class);
+}
+
+const struct __guc_mmio_reg_descr_group *
+xe_guc_capture_get_ext_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class)
+{
+ struct xe_guc *guc = >->uc.guc;
+
+ return guc_capture_get_one_list(guc->capture->extlists, owner, type, capture_class);
+}
+
struct __ext_steer_reg {
const char *name;
struct xe_reg_mcr reg;
@@ -810,16 +854,16 @@ guc_capture_add_node_to_cachelist(struct xe_guc_state_capture *gc,
static void
guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *node)
{
- struct guc_mmio_reg *tmp[GUC_STATE_CAPTURE_TYPE_MAX];
+ struct guc_mmio_reg *tmp[GUC_HOST_CAPTURE_TYPE_MAX];
int i;
- for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
+ for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i) {
tmp[i] = node->reginfo[i].regs;
memset(tmp[i], 0, sizeof(struct guc_mmio_reg) *
guc->capture->max_mmio_per_node);
}
memset(node, 0, sizeof(*node));
- for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i)
+ for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i)
node->reginfo[i].regs = tmp[i];
INIT_LIST_HEAD(&node->link);
@@ -864,6 +908,7 @@ guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *no
* L--> xe_devcoredump
* L--> devcoredump_snapshot(..IS_GUC_CAPTURE)
* --> xe_hw_engine_snapshot_capture(..IS_GUC_CAPTURE)
+ * --> xe_guc_capture_node_from_hw(..If no GUC CAPTURE)
*
* User Sysfs / Debugfs
* --------------------
@@ -1197,6 +1242,8 @@ guc_capture_extract_reglists(struct xe_guc *guc, struct __guc_capture_bufstate *
}
node->is_partial = is_partial;
node->reginfo[datatype].vfid = FIELD_GET(GUC_STATE_CAPTURE_HEADER_VFID, hdr.owner);
+ node->source = XE_HW_ENGINE_SOURCE_GUC_CAPTURE;
+ node->type = datatype;
switch (datatype) {
case GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE:
@@ -1363,7 +1410,7 @@ guc_capture_alloc_one_node(struct xe_guc *guc)
if (!new)
return NULL;
- for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
+ for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i) {
new->reginfo[i].regs = drmm_kzalloc(drm, guc->capture->max_mmio_per_node *
sizeof(struct guc_mmio_reg), GFP_KERNEL);
if (!new->reginfo[i].regs) {
@@ -1401,7 +1448,7 @@ guc_get_max_reglist_count(struct xe_guc *guc)
int i, j, k, tmp, maxregcount = 0;
for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; ++i) {
- for (j = 0; j < GUC_STATE_CAPTURE_TYPE_MAX; ++j) {
+ for (j = 0; j < GUC_HOST_CAPTURE_TYPE_MAX; ++j) {
for (k = 0; k < GUC_MAX_ENGINE_CLASSES; ++k) {
if (j == GUC_STATE_CAPTURE_TYPE_GLOBAL && k > 0)
continue;
@@ -1429,6 +1476,327 @@ guc_capture_create_prealloc_nodes(struct xe_guc *guc)
__guc_capture_create_prealloc_nodes(guc);
}
+static void
+read_reg_to_node(struct xe_hw_engine *hwe, const struct __guc_mmio_reg_descr_group *list,
+ struct __guc_capture_parsed_output *node)
+{
+ struct gcap_reg_list_info *reginfo = &node->reginfo[list->type];
+ struct guc_mmio_reg *regs = reginfo->regs;
+ int i;
+
+ if (!regs)
+ return;
+
+ for (i = 0; i < list->num_regs; i++) {
+ struct __guc_mmio_reg_descr desc = list->list[i];
+ u32 value;
+
+ if (!list->list)
+ return;
+
+ value = (list->type == GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE) ?
+ xe_hw_engine_mmio_read32(hwe, desc.reg) :
+ xe_mmio_read32(hwe->gt, desc.reg);
+
+ regs[i].value = value;
+ regs[i].offset = desc.reg.addr;
+ regs[i].flags = desc.flags;
+ regs[i].mask = desc.mask;
+ }
+}
+
+/**
+ * xe_guc_capture_node_from_hw - Take a engine snapshot from GuC capture.
+ * @hwe: Xe HW Engine.
+ * @type: GuC capture register type
+ * @list: The register list
+ *
+ * This can be printed out in a later stage like during dev_coredump
+ * analysis.
+ *
+ * Returns: None
+ */
+void xe_guc_capture_node_from_hw(struct xe_hw_engine *hwe, u32 type,
+ const struct __guc_mmio_reg_descr_group *list)
+{
+ struct xe_gt *gt = hwe->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+ struct xe_guc *guc = >->uc.guc;
+ struct xe_devcoredump *devcoredump = &xe->devcoredump;
+ struct __guc_capture_parsed_output *new = NULL;
+ struct gcap_reg_list_info *reginfo;
+ u16 guc_id = 0;
+ u32 lrca = 0;
+
+ if (!list || list->num_regs == 0)
+ return;
+ XE_WARN_ON(list->num_regs > guc->capture->max_mmio_per_node);
+
+ new = guc_capture_get_prealloc_node(guc);
+ if (!new)
+ return;
+
+ new->is_partial = false;
+ reginfo = &new->reginfo[type];
+
+ read_reg_to_node(hwe, list, new);
+
+ reginfo->num_regs = list->num_regs;
+
+ if (devcoredump->captured) {
+ struct xe_guc_submit_exec_queue_snapshot *ge = devcoredump->snapshot.ge;
+
+ guc_id = ge->guc.id;
+ lrca = ge->lrc[0]->context_desc & LRC_GTT_ADDRESS_MASK;
+ }
+
+ new->eng_class = hwe->class;
+ new->eng_inst = hwe->instance;
+ new->guc_id = guc_id;
+ new->lrca = lrca;
+ new->source = XE_HW_ENGINE_SOURCE_HW_ENGINE;
+ new->type = type;
+ guc_capture_add_node_to_outlist(guc->capture, new);
+}
+
+static struct guc_mmio_reg *
+guc_capture_find_reg(struct gcap_reg_list_info *reginfo, u32 addr, u32 flags)
+{
+ int i;
+
+ if (reginfo && reginfo->num_regs > 0) {
+ struct guc_mmio_reg *regs = reginfo->regs;
+
+ if (regs)
+ for (i = 0; i < reginfo->num_regs; i++)
+ if (regs[i].offset == addr && regs[i].flags == flags)
+ return ®s[i];
+ }
+
+ return NULL;
+}
+
+static void
+snapshot_print_by_list(struct xe_hw_engine_snapshot *snapshot, struct drm_printer *p, u32 type,
+ const struct __guc_mmio_reg_descr_group *list)
+{
+ struct xe_gt *gt = snapshot->hwe->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+ struct xe_guc *guc = >->uc.guc;
+ struct xe_devcoredump *devcoredump = &xe->devcoredump;
+ u16 guc_id = 0;
+ u32 last_value, lrca = 0;
+ struct list_head *node;
+ int i, guc_class;
+ bool is_ext;
+
+ if (!list)
+ return;
+
+ is_ext = list == guc->capture->extlists;
+
+ if (devcoredump->captured) {
+ struct xe_guc_submit_exec_queue_snapshot *ge = devcoredump->snapshot.ge;
+
+ guc_id = ge->guc.id;
+ lrca = ge->lrc[0]->context_desc;
+ }
+
+ guc_class = xe_engine_class_to_guc_class(snapshot->hwe->class);
+
+ node = &guc->capture->outlist;
+ for (i = 0; i < list->num_regs; i++) {
+ struct __guc_capture_parsed_output *n, *ntmp;
+ const struct __guc_mmio_reg_descr *sub_list = &list->list[i];
+
+ list_for_each_entry_safe(n, ntmp, node, link) {
+ if (n->eng_class == guc_class && n->eng_inst == snapshot->hwe->instance &&
+ n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca) {
+ struct gcap_reg_list_info *reginfo = &n->reginfo[type];
+ struct guc_mmio_reg *reg;
+ u32 value;
+
+ reg = guc_capture_find_reg(reginfo, sub_list->reg.addr,
+ sub_list->flags);
+ if (!reg)
+ continue;
+
+ value = reg->value;
+ if (sub_list->data_type == REG_64BIT_LOW_DW) {
+ last_value = value;
+ continue;
+ } else if (sub_list->data_type == REG_64BIT_HI_DW) {
+ u64 value_qw = ((u64)value << 32) | last_value;
+
+ if (sub_list->regname)
+ drm_printf(p, "\t%s: 0x%016llx\n",
+ sub_list->regname, value_qw);
+ break;
+ }
+
+ if (!sub_list->regname)
+ break;
+
+ if (is_ext) {
+ int dss, group, instance;
+
+ group = FIELD_GET(GUC_REGSET_STEERING_GROUP,
+ sub_list->flags);
+ instance = FIELD_GET(GUC_REGSET_STEERING_INSTANCE,
+ sub_list->flags);
+ dss = xe_gt_mcr_steering_info_to_dss_id(gt,
+ group, instance);
+
+ drm_printf(p, "\t%s[%u]: 0x%08x\n", sub_list->regname, dss,
+ value);
+ } else {
+ drm_printf(p, "\t%s: 0x%08x\n", sub_list->regname,
+ value);
+ }
+ break;
+ }
+ }
+ }
+}
+
+/**
+ * xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot.
+ * @snapshot: Xe HW Engine snapshot object.
+ * @p: drm_printer where it will be printed out.
+ *
+ * This function prints out a given Xe HW Engine snapshot object.
+ */
+void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
+ struct drm_printer *p)
+{
+ int type;
+ const struct __guc_mmio_reg_descr_group *list;
+ enum guc_capture_list_class_type capture_class;
+
+ if (!snapshot)
+ return;
+
+ xe_gt_assert(snapshot->hwe->gt, snapshot->source <= XE_HW_ENGINE_SOURCE_GUC_CAPTURE);
+ xe_gt_assert(snapshot->hwe->gt, snapshot->hwe);
+
+ capture_class = xe_engine_class_to_guc_capture_class(snapshot->hwe->class);
+
+ drm_printf(p, "%s (physical), logical instance=%d\n",
+ snapshot->name ? snapshot->name : "",
+ snapshot->logical_instance);
+ drm_printf(p, "\tCapture source: %s\n",
+ snapshot->source == XE_HW_ENGINE_SOURCE_GUC_CAPTURE ? "GuC" : "Engine");
+ drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n",
+ snapshot->forcewake.domain, snapshot->forcewake.ref);
+
+ for (type = GUC_STATE_CAPTURE_TYPE_GLOBAL; type < GUC_HOST_CAPTURE_TYPE_MAX; type++) {
+ list = xe_guc_capture_get_reg_desc_list(snapshot->hwe->gt,
+ GUC_CAPTURE_LIST_INDEX_PF, type,
+ capture_class);
+ snapshot_print_by_list(snapshot, p, type, list);
+ }
+
+ if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
+ list = xe_guc_capture_get_ext_reg_desc_list(snapshot->hwe->gt,
+ GUC_CAPTURE_LIST_INDEX_PF,
+ GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
+ capture_class);
+ snapshot_print_by_list(snapshot, p, GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS, list);
+ }
+
+ drm_puts(p, "\n");
+}
+
+/**
+ * xe_guc_capture_is_ready_for - Check if capture is ready for the job.
+ * @job: The job object.
+ *
+ * Search within the capture outlist for the job.
+ *
+ * Returns: True if found a node for the job
+ */
+bool xe_guc_capture_is_ready_for(struct xe_sched_job *job)
+{
+ struct xe_hw_engine *hwe;
+ enum xe_hw_engine_id id;
+ struct xe_exec_queue *q = job->q;
+ u16 guc_class = GUC_LAST_ENGINE_CLASS + 1;
+
+ if (!q || !q->gt)
+ return false;
+
+ /* Find hwe for the job */
+ for_each_hw_engine(hwe, q->gt, id) {
+ if (hwe != q->hwe)
+ continue;
+ guc_class = xe_engine_class_to_guc_class(hwe->class);
+ break;
+ }
+
+ if (guc_class <= GUC_LAST_ENGINE_CLASS) {
+ struct __guc_capture_parsed_output *n, *ntmp;
+ struct xe_guc *guc = &q->gt->uc.guc;
+ struct list_head *list = &guc->capture->outlist;
+ u16 guc_id = q->guc->id;
+ u32 lrca = xe_lrc_ggtt_addr(job->q->lrc[0]) & LRC_GTT_ADDRESS_MASK;
+
+ /*
+ * Look for a matching GuC reported error capture node from
+ * the internal output link-list based on engine, guc id and
+ * lrca info.
+ */
+ list_for_each_entry_safe(n, ntmp, list, link) {
+ if (n->eng_class == guc_class && n->eng_inst == hwe->instance &&
+ n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca &&
+ n->source == XE_HW_ENGINE_SOURCE_GUC_CAPTURE)
+ return true;
+ }
+ }
+ return false;
+}
+
+/*
+ * xe_guc_capture_free_pre_capture - Free the pre captured register list
+ * @guc: The GuC object
+ *
+ * Free the pre captured register list
+ */
+void xe_guc_capture_free_pre_capture(struct xe_guc *guc)
+{
+ if (guc->capture && !list_empty(&guc->capture->outlist)) {
+ struct __guc_capture_parsed_output *n, *ntmp;
+
+ list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) {
+ if (n->source == XE_HW_ENGINE_SOURCE_HW_ENGINE &&
+ /* Direct read is for host only, no need to refresh */
+ n->type != GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ) {
+ list_del(&n->link);
+ /* put node back to cache list */
+ guc_capture_add_node_to_cachelist(guc->capture, n);
+ }
+ }
+ }
+}
+
+/*
+ * xe_guc_capture_free - Free the GuC captured register list
+ * @guc: The GuC object
+ *
+ * Free the GuC captured register list
+ */
+void xe_guc_capture_free(struct xe_guc *guc)
+{
+ if (guc->capture && !list_empty(&guc->capture->outlist)) {
+ struct __guc_capture_parsed_output *n, *ntmp;
+
+ list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) {
+ list_del(&n->link);
+ /* put node back to cache list */
+ guc_capture_add_node_to_cachelist(guc->capture, n);
+ }
+ }
+}
+
/*
* xe_guc_capture_steered_list_init - Init steering register list
* @guc: The GuC object
diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
index 3a690e8b714a..bcda17ef9eb9 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture.h
+++ b/drivers/gpu/drm/xe/xe_guc_capture.h
@@ -12,6 +12,21 @@
#include "xe_guc_fwif.h"
struct xe_guc;
+struct xe_hw_engine;
+struct xe_hw_engine_snapshot;
+struct xe_sched_job;
+
+/* Register-types of GuC capture register lists for host side process */
+enum guc_capture_host_type {
+ /*
+ * GuC support limited registers ranges to be captured for debug
+ * purpose, for registers out of these ranges, direct read is the only
+ * way to access.
+ */
+ GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ = GUC_STATE_CAPTURE_TYPE_MAX,
+};
+
+#define GUC_HOST_CAPTURE_TYPE_MAX (GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ + 1)
static inline enum guc_capture_list_class_type xe_guc_class_to_capture_class(u16 class)
{
@@ -44,6 +59,17 @@ int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
enum guc_capture_list_class_type capture_class, size_t *size);
int xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size);
size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc);
+const struct __guc_mmio_reg_descr_group *
+xe_guc_capture_get_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class);
+const struct __guc_mmio_reg_descr_group *
+xe_guc_capture_get_ext_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
+ enum guc_capture_list_class_type capture_class);
+bool xe_guc_capture_is_ready_for(struct xe_sched_job *job);
+void xe_guc_capture_node_from_hw(struct xe_hw_engine *hwe, u32 type,
+ const struct __guc_mmio_reg_descr_group *list);
+void xe_guc_capture_free_pre_capture(struct xe_guc *guc);
+void xe_guc_capture_free(struct xe_guc *guc);
int xe_guc_capture_steered_list_init(struct xe_guc *guc);
int xe_guc_capture_init(struct xe_guc *guc);
diff --git a/drivers/gpu/drm/xe/xe_guc_capture_types.h b/drivers/gpu/drm/xe/xe_guc_capture_types.h
index 2057125b1bfa..857ad10bb8f3 100644
--- a/drivers/gpu/drm/xe/xe_guc_capture_types.h
+++ b/drivers/gpu/drm/xe/xe_guc_capture_types.h
@@ -41,6 +41,8 @@ struct __guc_mmio_reg_descr {
u32 mask;
/** @regname: Name of the register */
const char *regname;
+ /** @position_in_snapshot: The offset position in snapshot structure */
+ u32 position_in_snapshot;
};
/**
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 381be84740cf..44353e323f24 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -1073,6 +1073,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
struct xe_gpu_scheduler *sched = &q->guc->sched;
struct xe_guc *guc = exec_queue_to_guc(q);
const char *process_name = "no process";
+ struct xe_device *xe = guc_to_xe(guc);
int err = -ETIME;
pid_t pid = -1;
int i = 0;
@@ -1100,6 +1101,18 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
if (!skip_timeout_check && !xe_sched_job_started(job))
goto rearm;
+ /* Pre-capture register snapshot, if devcoredump not captured and GuC capture not ready */
+ if (!exec_queue_killed(q) && !xe->devcoredump.captured && xe_device_uc_enabled(xe) &&
+ xe->wedged.mode >= 1 && !xe_guc_capture_is_ready_for(job)) {
+ /* take force wake before engine register pre-capture */
+ if (xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL))
+ xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
+
+ xe_hw_engine_snapshot_capture_for_job(job);
+
+ xe_force_wake_put(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
+ }
+
/*
* XXX: Sampling timeout doesn't work in wedged mode as we have to
* modify scheduling state to read timestamp. We could read the
@@ -1182,7 +1195,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
trace_xe_sched_job_timedout(job);
if (!exec_queue_killed(q))
- xe_devcoredump(job);
+ xe_devcoredump(job); /* pre-captured data will be refreshed by GuC capture */
/*
* Kernel jobs should never fail, nor should VM jobs if they do
@@ -1979,8 +1992,6 @@ int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
- /* FIXME: Do error capture, most likely async */
-
trace_xe_exec_queue_reset(q);
/*
@@ -2006,7 +2017,7 @@ int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
* XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
* called 1st to check status before process the data comes with the message.
*
- * Returns: None
+ * Returns: error code. 0 if success
*/
int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
{
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
index 18980238a2ea..ad3a108a2491 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.c
+++ b/drivers/gpu/drm/xe/xe_hw_engine.c
@@ -23,6 +23,8 @@
#include "xe_gt_printk.h"
#include "xe_gt_mcr.h"
#include "xe_gt_topology.h"
+#include "xe_guc_capture.h"
+#include "xe_guc_capture_types.h"
#include "xe_hw_engine_group.h"
#include "xe_hw_fence.h"
#include "xe_irq.h"
@@ -312,6 +314,7 @@ void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe,
u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg)
{
xe_gt_assert(hwe->gt, !(reg.addr & hwe->mmio_base));
+
xe_force_wake_assert_held(gt_to_fw(hwe->gt), hwe->domain);
reg.addr += hwe->mmio_base;
@@ -809,54 +812,26 @@ void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec)
xe_hw_fence_irq_run(hwe->fence_irq);
}
-static bool
-is_slice_common_per_gslice(struct xe_device *xe)
-{
- return GRAPHICS_VERx100(xe) >= 1255;
-}
-
static void
-xe_hw_engine_snapshot_instdone_capture(struct xe_hw_engine *hwe,
- struct xe_hw_engine_snapshot *snapshot)
+xe_hw_engine_snapshot_from_hw(struct xe_hw_engine *hwe, struct xe_hw_engine_snapshot *snapshot,
+ u32 type)
{
struct xe_gt *gt = hwe->gt;
- struct xe_device *xe = gt_to_xe(gt);
- unsigned int dss;
- u16 group, instance;
-
- snapshot->reg.instdone.ring = xe_hw_engine_mmio_read32(hwe, RING_INSTDONE(0));
+ enum guc_capture_list_class_type capture_class;
+ const struct __guc_mmio_reg_descr_group *list;
- if (snapshot->hwe->class != XE_ENGINE_CLASS_RENDER)
- return;
+ capture_class = xe_engine_class_to_guc_capture_class(hwe->class);
- if (is_slice_common_per_gslice(xe) == false) {
- snapshot->reg.instdone.slice_common[0] =
- xe_mmio_read32(gt, SC_INSTDONE);
- snapshot->reg.instdone.slice_common_extra[0] =
- xe_mmio_read32(gt, SC_INSTDONE_EXTRA);
- snapshot->reg.instdone.slice_common_extra2[0] =
- xe_mmio_read32(gt, SC_INSTDONE_EXTRA2);
- } else {
- for_each_geometry_dss(dss, gt, group, instance) {
- snapshot->reg.instdone.slice_common[dss] =
- xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE, group, instance);
- snapshot->reg.instdone.slice_common_extra[dss] =
- xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE_EXTRA, group, instance);
- snapshot->reg.instdone.slice_common_extra2[dss] =
- xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE_EXTRA2, group, instance);
- }
- }
+ /* Get register list for the type/class */
+ list = xe_guc_capture_get_reg_desc_list(gt, GUC_CAPTURE_LIST_INDEX_PF, type, capture_class);
- for_each_geometry_dss(dss, gt, group, instance) {
- snapshot->reg.instdone.sampler[dss] =
- xe_gt_mcr_unicast_read(gt, SAMPLER_INSTDONE, group, instance);
- snapshot->reg.instdone.row[dss] =
- xe_gt_mcr_unicast_read(gt, ROW_INSTDONE, group, instance);
+ xe_guc_capture_node_from_hw(hwe, type, list);
- if (GRAPHICS_VERx100(xe) >= 1255)
- snapshot->reg.instdone.geom_svg[dss] =
- xe_gt_mcr_unicast_read(gt, XEHPG_INSTDONE_GEOM_SVGUNIT,
- group, instance);
+ /* Capture steering registers for rcs/ccs */
+ if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
+ list = xe_guc_capture_get_ext_reg_desc_list(gt, GUC_CAPTURE_LIST_INDEX_PF, type,
+ capture_class);
+ xe_guc_capture_node_from_hw(hwe, type, list);
}
}
@@ -874,8 +849,9 @@ struct xe_hw_engine_snapshot *
xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
{
struct xe_hw_engine_snapshot *snapshot;
- size_t len;
- u64 val;
+ struct xe_gt *gt = hwe->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+ u32 type;
if (!xe_hw_engine_is_valid(hwe))
return NULL;
@@ -885,28 +861,6 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
if (!snapshot)
return NULL;
- /* Because XE_MAX_DSS_FUSE_BITS is defined in xe_gt_types.h and it
- * includes xe_hw_engine_types.h the length of this 3 registers can't be
- * set in struct xe_hw_engine_snapshot, so here doing additional
- * allocations.
- */
- len = (XE_MAX_DSS_FUSE_BITS * sizeof(u32));
- snapshot->reg.instdone.slice_common = kzalloc(len, GFP_ATOMIC);
- snapshot->reg.instdone.slice_common_extra = kzalloc(len, GFP_ATOMIC);
- snapshot->reg.instdone.slice_common_extra2 = kzalloc(len, GFP_ATOMIC);
- snapshot->reg.instdone.sampler = kzalloc(len, GFP_ATOMIC);
- snapshot->reg.instdone.row = kzalloc(len, GFP_ATOMIC);
- snapshot->reg.instdone.geom_svg = kzalloc(len, GFP_ATOMIC);
- if (!snapshot->reg.instdone.slice_common ||
- !snapshot->reg.instdone.slice_common_extra ||
- !snapshot->reg.instdone.slice_common_extra2 ||
- !snapshot->reg.instdone.sampler ||
- !snapshot->reg.instdone.row ||
- !snapshot->reg.instdone.geom_svg) {
- xe_hw_engine_snapshot_free(snapshot);
- return NULL;
- }
-
snapshot->name = kstrdup(hwe->name, GFP_ATOMIC);
snapshot->hwe = hwe;
snapshot->logical_instance = hwe->logical_instance;
@@ -916,156 +870,69 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
snapshot->mmio_base = hwe->mmio_base;
/* no more VF accessible data below this point */
- if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
+ if (IS_SRIOV_VF(xe))
return snapshot;
- snapshot->reg.ring_execlist_status =
- xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_LO(0));
- val = xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0));
- snapshot->reg.ring_execlist_status |= val << 32;
-
- snapshot->reg.ring_execlist_sq_contents =
- xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_SQ_CONTENTS_LO(0));
- val = xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_SQ_CONTENTS_HI(0));
- snapshot->reg.ring_execlist_sq_contents |= val << 32;
-
- snapshot->reg.ring_acthd = xe_hw_engine_mmio_read32(hwe, RING_ACTHD(0));
- val = xe_hw_engine_mmio_read32(hwe, RING_ACTHD_UDW(0));
- snapshot->reg.ring_acthd |= val << 32;
-
- snapshot->reg.ring_bbaddr = xe_hw_engine_mmio_read32(hwe, RING_BBADDR(0));
- val = xe_hw_engine_mmio_read32(hwe, RING_BBADDR_UDW(0));
- snapshot->reg.ring_bbaddr |= val << 32;
-
- snapshot->reg.ring_dma_fadd =
- xe_hw_engine_mmio_read32(hwe, RING_DMA_FADD(0));
- val = xe_hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0));
- snapshot->reg.ring_dma_fadd |= val << 32;
-
- snapshot->reg.ring_hwstam = xe_hw_engine_mmio_read32(hwe, RING_HWSTAM(0));
- snapshot->reg.ring_hws_pga = xe_hw_engine_mmio_read32(hwe, RING_HWS_PGA(0));
- snapshot->reg.ring_start = xe_hw_engine_mmio_read32(hwe, RING_START(0));
- if (GRAPHICS_VERx100(hwe->gt->tile->xe) >= 2000) {
- val = xe_hw_engine_mmio_read32(hwe, RING_START_UDW(0));
- snapshot->reg.ring_start |= val << 32;
- }
- if (xe_gt_has_indirect_ring_state(hwe->gt)) {
- snapshot->reg.indirect_ring_state =
- xe_hw_engine_mmio_read32(hwe, INDIRECT_RING_STATE(0));
+ /* If GuC not enabled, and capture outlist has no job data, take it from engine */
+ if (xe_device_uc_enabled(xe) && xe->wedged.mode >= 1 && xe->devcoredump.job &&
+ xe_guc_capture_is_ready_for(xe->devcoredump.job)) {
+ snapshot->source = XE_HW_ENGINE_SOURCE_GUC_CAPTURE;
+ /* GuC won't report direct read registers, read here */
+ xe_hw_engine_snapshot_from_hw(hwe, snapshot,
+ GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ);
+ } else {
+ snapshot->source = XE_HW_ENGINE_SOURCE_HW_ENGINE;
+ for (type = GUC_STATE_CAPTURE_TYPE_GLOBAL; type < GUC_HOST_CAPTURE_TYPE_MAX;
+ type++)
+ xe_hw_engine_snapshot_from_hw(hwe, snapshot, type);
}
- snapshot->reg.ring_head =
- xe_hw_engine_mmio_read32(hwe, RING_HEAD(0)) & HEAD_ADDR;
- snapshot->reg.ring_tail =
- xe_hw_engine_mmio_read32(hwe, RING_TAIL(0)) & TAIL_ADDR;
- snapshot->reg.ring_ctl = xe_hw_engine_mmio_read32(hwe, RING_CTL(0));
- snapshot->reg.ring_mi_mode =
- xe_hw_engine_mmio_read32(hwe, RING_MI_MODE(0));
- snapshot->reg.ring_mode = xe_hw_engine_mmio_read32(hwe, RING_MODE(0));
- snapshot->reg.ring_imr = xe_hw_engine_mmio_read32(hwe, RING_IMR(0));
- snapshot->reg.ring_esr = xe_hw_engine_mmio_read32(hwe, RING_ESR(0));
- snapshot->reg.ring_emr = xe_hw_engine_mmio_read32(hwe, RING_EMR(0));
- snapshot->reg.ring_eir = xe_hw_engine_mmio_read32(hwe, RING_EIR(0));
- snapshot->reg.ipehr = xe_hw_engine_mmio_read32(hwe, RING_IPEHR(0));
- xe_hw_engine_snapshot_instdone_capture(hwe, snapshot);
-
- if (snapshot->hwe->class == XE_ENGINE_CLASS_COMPUTE)
- snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, RCU_MODE);
-
return snapshot;
}
-static void
-xe_hw_engine_snapshot_instdone_print(struct xe_hw_engine_snapshot *snapshot, struct drm_printer *p)
+/**
+ * xe_hw_engine_snapshot_capture_for_job - Take snapshot of associated engine
+ * @job: The job object
+ *
+ * Take snapshot of associated HW Engine
+ *
+ * Returns: None.
+ */
+void
+xe_hw_engine_snapshot_capture_for_job(struct xe_sched_job *job)
{
- struct xe_gt *gt = snapshot->hwe->gt;
- struct xe_device *xe = gt_to_xe(gt);
- u16 group, instance;
- unsigned int dss;
-
- drm_printf(p, "\tRING_INSTDONE: 0x%08x\n", snapshot->reg.instdone.ring);
+ struct xe_exec_queue *q = job->q;
+ struct xe_device *xe = gt_to_xe(q->gt);
+ struct xe_devcoredump *coredump = &xe->devcoredump;
+ struct xe_hw_engine *hwe;
+ enum xe_hw_engine_id id;
+ u32 adj_logical_mask = q->logical_mask;
- if (snapshot->hwe->class != XE_ENGINE_CLASS_RENDER)
- return;
+ for_each_hw_engine(hwe, q->gt, id) {
+ if (hwe->class != q->hwe->class ||
+ !(BIT(hwe->logical_instance) & adj_logical_mask))
+ continue;
- if (is_slice_common_per_gslice(xe) == false) {
- drm_printf(p, "\tSC_INSTDONE[0]: 0x%08x\n",
- snapshot->reg.instdone.slice_common[0]);
- drm_printf(p, "\tSC_INSTDONE_EXTRA[0]: 0x%08x\n",
- snapshot->reg.instdone.slice_common_extra[0]);
- drm_printf(p, "\tSC_INSTDONE_EXTRA2[0]: 0x%08x\n",
- snapshot->reg.instdone.slice_common_extra2[0]);
- } else {
- for_each_geometry_dss(dss, gt, group, instance) {
- drm_printf(p, "\tSC_INSTDONE[%u]: 0x%08x\n", dss,
- snapshot->reg.instdone.slice_common[dss]);
- drm_printf(p, "\tSC_INSTDONE_EXTRA[%u]: 0x%08x\n", dss,
- snapshot->reg.instdone.slice_common_extra[dss]);
- drm_printf(p, "\tSC_INSTDONE_EXTRA2[%u]: 0x%08x\n", dss,
- snapshot->reg.instdone.slice_common_extra2[dss]);
+ if (!coredump->snapshot.hwe[id]) {
+ coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe);
+ } else {
+ /* If pre-captured and Guc capture ready now */
+ if (xe_device_uc_enabled(xe) && xe->wedged.mode >= 1 &&
+ xe_guc_capture_is_ready_for(job)) {
+ /*
+ * Remove the pre-captured nodes from outlist,
+ * only keep the GuC reported data.
+ * Except direct read registers, which is read
+ * by host only.
+ */
+ xe_guc_capture_free_pre_capture(&q->gt->uc.guc);
+ }
}
- }
-
- for_each_geometry_dss(dss, gt, group, instance) {
- drm_printf(p, "\tSAMPLER_INSTDONE[%u]: 0x%08x\n", dss,
- snapshot->reg.instdone.sampler[dss]);
- drm_printf(p, "\tROW_INSTDONE[%u]: 0x%08x\n", dss,
- snapshot->reg.instdone.row[dss]);
-
- if (GRAPHICS_VERx100(xe) >= 1255)
- drm_printf(p, "\tINSTDONE_GEOM_SVGUNIT[%u]: 0x%08x\n",
- dss, snapshot->reg.instdone.geom_svg[dss]);
+ break;
}
}
-/**
- * xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot.
- * @snapshot: Xe HW Engine snapshot object.
- * @p: drm_printer where it will be printed out.
- *
- * This function prints out a given Xe HW Engine snapshot object.
- */
-void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
- struct drm_printer *p)
-{
- if (!snapshot)
- return;
- drm_printf(p, "%s (physical), logical instance=%d\n",
- snapshot->name ? snapshot->name : "",
- snapshot->logical_instance);
- drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n",
- snapshot->forcewake.domain, snapshot->forcewake.ref);
- drm_printf(p, "\tHWSTAM: 0x%08x\n", snapshot->reg.ring_hwstam);
- drm_printf(p, "\tRING_HWS_PGA: 0x%08x\n", snapshot->reg.ring_hws_pga);
- drm_printf(p, "\tRING_EXECLIST_STATUS: 0x%016llx\n",
- snapshot->reg.ring_execlist_status);
- drm_printf(p, "\tRING_EXECLIST_SQ_CONTENTS: 0x%016llx\n",
- snapshot->reg.ring_execlist_sq_contents);
- drm_printf(p, "\tRING_START: 0x%016llx\n", snapshot->reg.ring_start);
- drm_printf(p, "\tRING_HEAD: 0x%08x\n", snapshot->reg.ring_head);
- drm_printf(p, "\tRING_TAIL: 0x%08x\n", snapshot->reg.ring_tail);
- drm_printf(p, "\tRING_CTL: 0x%08x\n", snapshot->reg.ring_ctl);
- drm_printf(p, "\tRING_MI_MODE: 0x%08x\n", snapshot->reg.ring_mi_mode);
- drm_printf(p, "\tRING_MODE: 0x%08x\n",
- snapshot->reg.ring_mode);
- drm_printf(p, "\tRING_IMR: 0x%08x\n", snapshot->reg.ring_imr);
- drm_printf(p, "\tRING_ESR: 0x%08x\n", snapshot->reg.ring_esr);
- drm_printf(p, "\tRING_EMR: 0x%08x\n", snapshot->reg.ring_emr);
- drm_printf(p, "\tRING_EIR: 0x%08x\n", snapshot->reg.ring_eir);
- drm_printf(p, "\tACTHD: 0x%016llx\n", snapshot->reg.ring_acthd);
- drm_printf(p, "\tBBADDR: 0x%016llx\n", snapshot->reg.ring_bbaddr);
- drm_printf(p, "\tDMA_FADDR: 0x%016llx\n", snapshot->reg.ring_dma_fadd);
- drm_printf(p, "\tINDIRECT_RING_STATE: 0x%08x\n",
- snapshot->reg.indirect_ring_state);
- drm_printf(p, "\tIPEHR: 0x%08x\n", snapshot->reg.ipehr);
- xe_hw_engine_snapshot_instdone_print(snapshot, p);
-
- if (snapshot->hwe->class == XE_ENGINE_CLASS_COMPUTE)
- drm_printf(p, "\tRCU_MODE: 0x%08x\n",
- snapshot->reg.rcu_mode);
- drm_puts(p, "\n");
-}
/**
* xe_hw_engine_snapshot_free - Free all allocated objects for a given snapshot.
@@ -1079,12 +946,6 @@ void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot)
if (!snapshot)
return;
- kfree(snapshot->reg.instdone.slice_common);
- kfree(snapshot->reg.instdone.slice_common_extra);
- kfree(snapshot->reg.instdone.slice_common_extra2);
- kfree(snapshot->reg.instdone.sampler);
- kfree(snapshot->reg.instdone.row);
- kfree(snapshot->reg.instdone.geom_svg);
kfree(snapshot->name);
kfree(snapshot);
}
diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
index 022819a4a8eb..1df6a082487c 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine.h
@@ -11,6 +11,7 @@
struct drm_printer;
struct drm_xe_engine_class_instance;
struct xe_device;
+struct xe_sched_job;
#ifdef CONFIG_DRM_XE_JOB_TIMEOUT_MIN
#define XE_HW_ENGINE_JOB_TIMEOUT_MIN CONFIG_DRM_XE_JOB_TIMEOUT_MIN
@@ -57,6 +58,7 @@ u32 xe_hw_engine_mask_per_class(struct xe_gt *gt,
struct xe_hw_engine_snapshot *
xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe);
+void xe_hw_engine_snapshot_capture_for_job(struct xe_sched_job *job);
void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
struct drm_printer *p);
diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
index 39f24012d0f4..4e3e9ddf5f5a 100644
--- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
+++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
@@ -154,6 +154,11 @@ struct xe_hw_engine {
struct xe_hw_engine_group *hw_engine_group;
};
+enum xe_hw_engine_snapshot_source_id {
+ XE_HW_ENGINE_SOURCE_HW_ENGINE,
+ XE_HW_ENGINE_SOURCE_GUC_CAPTURE
+};
+
/**
* struct xe_hw_engine_snapshot - Hardware engine snapshot
*
@@ -162,6 +167,8 @@ struct xe_hw_engine {
struct xe_hw_engine_snapshot {
/** @name: name of the hw engine */
char *name;
+ /** @source: Data source, either hw_engine or GuC capture */
+ enum xe_hw_engine_snapshot_source_id source;
/** @hwe: hw engine */
struct xe_hw_engine *hwe;
/** @logical_instance: logical instance of this hw engine */
@@ -175,65 +182,6 @@ struct xe_hw_engine_snapshot {
} forcewake;
/** @mmio_base: MMIO base address of this hw engine*/
u32 mmio_base;
- /** @reg: Useful MMIO register snapshot */
- struct {
- /** @reg.ring_execlist_status: RING_EXECLIST_STATUS */
- u64 ring_execlist_status;
- /** @reg.ring_execlist_sq_contents: RING_EXECLIST_SQ_CONTENTS */
- u64 ring_execlist_sq_contents;
- /** @reg.ring_acthd: RING_ACTHD */
- u64 ring_acthd;
- /** @reg.ring_bbaddr: RING_BBADDR */
- u64 ring_bbaddr;
- /** @reg.ring_dma_fadd: RING_DMA_FADD */
- u64 ring_dma_fadd;
- /** @reg.ring_hwstam: RING_HWSTAM */
- u32 ring_hwstam;
- /** @reg.ring_hws_pga: RING_HWS_PGA */
- u32 ring_hws_pga;
- /** @reg.ring_start: RING_START */
- u64 ring_start;
- /** @reg.ring_head: RING_HEAD */
- u32 ring_head;
- /** @reg.ring_tail: RING_TAIL */
- u32 ring_tail;
- /** @reg.ring_ctl: RING_CTL */
- u32 ring_ctl;
- /** @reg.ring_mi_mode: RING_MI_MODE */
- u32 ring_mi_mode;
- /** @reg.ring_mode: RING_MODE */
- u32 ring_mode;
- /** @reg.ring_imr: RING_IMR */
- u32 ring_imr;
- /** @reg.ring_esr: RING_ESR */
- u32 ring_esr;
- /** @reg.ring_emr: RING_EMR */
- u32 ring_emr;
- /** @reg.ring_eir: RING_EIR */
- u32 ring_eir;
- /** @reg.indirect_ring_state: INDIRECT_RING_STATE */
- u32 indirect_ring_state;
- /** @reg.ipehr: IPEHR */
- u32 ipehr;
- /** @reg.rcu_mode: RCU_MODE */
- u32 rcu_mode;
- struct {
- /** @reg.instdone.ring: RING_INSTDONE */
- u32 ring;
- /** @reg.instdone.slice_common: SC_INSTDONE */
- u32 *slice_common;
- /** @reg.instdone.slice_common_extra: SC_INSTDONE_EXTRA */
- u32 *slice_common_extra;
- /** @reg.instdone.slice_common_extra2: SC_INSTDONE_EXTRA2 */
- u32 *slice_common_extra2;
- /** @reg.instdone.sampler: SAMPLER_INSTDONE */
- u32 *sampler;
- /** @reg.instdone.row: ROW_INSTDONE */
- u32 *row;
- /** @reg.instdone.geom_svg: INSTDONE_GEOM_SVGUNIT */
- u32 *geom_svg;
- } instdone;
- } reg;
};
#endif
diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
index c24542e89318..cc00fa878d3c 100644
--- a/drivers/gpu/drm/xe/xe_lrc.h
+++ b/drivers/gpu/drm/xe/xe_lrc.h
@@ -21,6 +21,7 @@ struct xe_lrc_snapshot;
struct xe_vm;
#define LRC_PPHWSP_SCRATCH_ADDR (0x34 * 4)
+#define LRC_GTT_ADDRESS_MASK GENMASK(31, 12)
struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
u32 ring_size);
--
2.34.1
^ permalink raw reply related [flat|nested] 23+ messages in thread
* ✓ CI.Patch_applied: success for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (6 preceding siblings ...)
2024-08-27 21:47 ` [PATCH v17 7/7] drm/xe/guc: Plumb GuC-capture into dev coredump Zhanjun Dong
@ 2024-08-27 21:53 ` Patchwork
2024-08-27 21:53 ` ✗ CI.checkpatch: warning " Patchwork
` (6 subsequent siblings)
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-27 21:53 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: 585f8637f5e5 drm-tip: 2024y-08m-27d-21h-04m-36s UTC integration manifest
=== git am output follows ===
Applying: drm/xe/guc: Prepare GuC register list and update ADS size for error capture
Applying: drm/xe/guc: Add XE_LP steered register lists
Applying: drm/xe/guc: Add capture size check in GuC log buffer
Applying: drm/xe/guc: Extract GuC error capture lists
Applying: drm/xe/guc: Move xe_lrc_snapshot to header file
Applying: drm/xe/guc: Add dss conversion from group/instance ID
Applying: drm/xe/guc: Plumb GuC-capture into dev coredump
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✗ CI.checkpatch: warning for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (7 preceding siblings ...)
2024-08-27 21:53 ` ✓ CI.Patch_applied: success for drm/xe/guc: Add GuC based register capture for error capture (rev17) Patchwork
@ 2024-08-27 21:53 ` Patchwork
2024-08-27 21:54 ` ✓ CI.KUnit: success " Patchwork
` (5 subsequent siblings)
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-27 21:53 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
9fe5037901cabbcdf27a6fe0dfb047ca1474d363
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit b90d672b6f54438142bb9115628dbcbf7c6be571
Author: Zhanjun Dong <zhanjun.dong@intel.com>
Date: Tue Aug 27 14:47:26 2024 -0700
drm/xe/guc: Plumb GuC-capture into dev coredump
Add pre-capture by read from hw engine if GuC capture data is not ready,
the pre-captured data will be refereshed if GuC capture is ready at later
time.
Provide xe_guc_capture_get_reg_desc_list to get the register dscriptor
list.
GuC support limited register ranges to be captured, add type of direct
read to read these registers by host.
Add function to check if capture is ready for a job.
Print out snapshot registers by types of global, class, instance and
direct read.
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
+ /mt/dim checkpatch 585f8637f5e5ec0a20162bad3051d2a9e2b78de5 drm-intel
a0bfc7f0316c drm/xe/guc: Prepare GuC register list and update ADS size for error capture
-:36: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#36:
new file mode 100644
-:546: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#546: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:53:
+#define COMMON_BASE_ENGINE_INSTANCE \
+ { RING_HWSTAM(0), REG_32BIT, 0, 0, "HWSTAM"}, \
+ { RING_HWS_PGA(0), REG_32BIT, 0, 0, "RING_HWS_PGA"}, \
+ { RING_HEAD(0), REG_32BIT, 0, 0, "RING_HEAD"}, \
+ { RING_TAIL(0), REG_32BIT, 0, 0, "RING_TAIL"}, \
+ { RING_CTL(0), REG_32BIT, 0, 0, "RING_CTL"}, \
+ { RING_MI_MODE(0), REG_32BIT, 0, 0, "RING_MI_MODE"}, \
+ { RING_MODE(0), REG_32BIT, 0, 0, "RING_MODE"}, \
+ { RING_ESR(0), REG_32BIT, 0, 0, "RING_ESR"}, \
+ { RING_EMR(0), REG_32BIT, 0, 0, "RING_EMR"}, \
+ { RING_EIR(0), REG_32BIT, 0, 0, "RING_EIR"}, \
+ { RING_IMR(0), REG_32BIT, 0, 0, "RING_IMR"}, \
+ { RING_IPEHR(0), REG_32BIT, 0, 0, "IPEHR"}, \
+ { RING_INSTDONE(0), REG_32BIT, 0, 0, "RING_INSTDONE"}, \
+ { INDIRECT_RING_STATE(0), REG_32BIT, 0, 0, "INDIRECT_RING_STATE"}, \
+ { RING_ACTHD(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_ACTHD_UDW(0), REG_64BIT_HI_DW, 0, 0, "ACTHD"}, \
+ { RING_BBADDR(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_BBADDR_UDW(0), REG_64BIT_HI_DW, 0, 0, "RING_BBADDR"}, \
+ { RING_START(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_START_UDW(0), REG_64BIT_HI_DW, 0, 0, "RING_START"}, \
+ { RING_DMA_FADD(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_DMA_FADD_UDW(0), REG_64BIT_HI_DW, 0, 0, "RING_DMA_FADD"}, \
+ { RING_EXECLIST_STATUS_LO(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_EXECLIST_STATUS_HI(0), REG_64BIT_HI_DW, 0, 0, "RING_EXECLIST_STATUS"}, \
+ { RING_EXECLIST_SQ_CONTENTS_LO(0), REG_64BIT_LOW_DW, 0, 0, NULL}, \
+ { RING_EXECLIST_SQ_CONTENTS_HI(0), REG_64BIT_HI_DW, 0, 0, "RING_EXECLIST_SQ_CONTENTS"}
-:577: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#577: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:84:
+#define COMMON_XELP_RC_CLASS_INSTDONE \
+ { SC_INSTDONE, REG_32BIT, 0, 0, "SC_INSTDONE"}, \
+ { SC_INSTDONE_EXTRA, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA"}, \
+ { SC_INSTDONE_EXTRA2, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA2"}
-:632: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'regslist' - possible side-effects?
#632: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:139:
+#define MAKE_REGLIST(regslist, regsowner, regstype, class) \
+ { \
+ regslist, \
+ ARRAY_SIZE(regslist), \
+ TO_GCAP_DEF_OWNER(regsowner), \
+ TO_GCAP_DEF_TYPE(regstype), \
+ class \
+ }
total: 2 errors, 1 warnings, 1 checks, 1105 lines checked
f044c5446d59 drm/xe/guc: Add XE_LP steered register lists
8881e09e061e drm/xe/guc: Add capture size check in GuC log buffer
-:14: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#14:
new file mode 100644
total: 0 errors, 1 warnings, 0 checks, 216 lines checked
df93190538d9 drm/xe/guc: Extract GuC error capture lists
5a18cf5b51f2 drm/xe/guc: Move xe_lrc_snapshot to header file
4b7da546d243 drm/xe/guc: Add dss conversion from group/instance ID
b90d672b6f54 drm/xe/guc: Plumb GuC-capture into dev coredump
-:150: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#150: FILE: drivers/gpu/drm/xe/xe_guc_capture.c:148:
+#define XELP_VEC_DIRECT_READ \
+ { SFC_DONE(0), 0, 0, 0, "SFC_DONE[0]"}, \
+ { SFC_DONE(1), 0, 0, 0, "SFC_DONE[1]"}, \
+ { SFC_DONE(2), 0, 0, 0, "SFC_DONE[2]"}, \
+ { SFC_DONE(3), 0, 0, 0, "SFC_DONE[3]"}
total: 1 errors, 0 warnings, 0 checks, 1077 lines checked
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.KUnit: success for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (8 preceding siblings ...)
2024-08-27 21:53 ` ✗ CI.checkpatch: warning " Patchwork
@ 2024-08-27 21:54 ` Patchwork
2024-08-27 22:09 ` ✓ CI.Build: " Patchwork
` (4 subsequent siblings)
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-27 21:54 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[21:53:45] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:53:50] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[21:54:15] Starting KUnit Kernel (1/1)...
[21:54:15] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:54:16] =================== guc_dbm (7 subtests) ===================
[21:54:16] [PASSED] test_empty
[21:54:16] [PASSED] test_default
[21:54:16] ======================== test_size ========================
[21:54:16] [PASSED] 4
[21:54:16] [PASSED] 8
[21:54:16] [PASSED] 32
[21:54:16] [PASSED] 256
[21:54:16] ==================== [PASSED] test_size ====================
[21:54:16] ======================= test_reuse ========================
[21:54:16] [PASSED] 4
[21:54:16] [PASSED] 8
[21:54:16] [PASSED] 32
[21:54:16] [PASSED] 256
[21:54:16] =================== [PASSED] test_reuse ====================
[21:54:16] =================== test_range_overlap ====================
[21:54:16] [PASSED] 4
[21:54:16] [PASSED] 8
[21:54:16] [PASSED] 32
[21:54:16] [PASSED] 256
[21:54:16] =============== [PASSED] test_range_overlap ================
[21:54:16] =================== test_range_compact ====================
[21:54:16] [PASSED] 4
[21:54:16] [PASSED] 8
[21:54:16] [PASSED] 32
[21:54:16] [PASSED] 256
[21:54:16] =============== [PASSED] test_range_compact ================
[21:54:16] ==================== test_range_spare =====================
[21:54:16] [PASSED] 4
[21:54:16] [PASSED] 8
[21:54:16] [PASSED] 32
[21:54:16] [PASSED] 256
[21:54:16] ================ [PASSED] test_range_spare =================
[21:54:16] ===================== [PASSED] guc_dbm =====================
[21:54:16] =================== guc_idm (6 subtests) ===================
[21:54:16] [PASSED] bad_init
[21:54:16] [PASSED] no_init
[21:54:16] [PASSED] init_fini
[21:54:16] [PASSED] check_used
[21:54:16] [PASSED] check_quota
[21:54:16] [PASSED] check_all
[21:54:16] ===================== [PASSED] guc_idm =====================
[21:54:16] ================== no_relay (3 subtests) ===================
[21:54:16] [PASSED] xe_drops_guc2pf_if_not_ready
[21:54:16] [PASSED] xe_drops_guc2vf_if_not_ready
[21:54:16] [PASSED] xe_rejects_send_if_not_ready
[21:54:16] ==================== [PASSED] no_relay =====================
[21:54:16] ================== pf_relay (14 subtests) ==================
[21:54:16] [PASSED] pf_rejects_guc2pf_too_short
[21:54:16] [PASSED] pf_rejects_guc2pf_too_long
[21:54:16] [PASSED] pf_rejects_guc2pf_no_payload
[21:54:16] [PASSED] pf_fails_no_payload
[21:54:16] [PASSED] pf_fails_bad_origin
[21:54:16] [PASSED] pf_fails_bad_type
[21:54:16] [PASSED] pf_txn_reports_error
[21:54:16] [PASSED] pf_txn_sends_pf2guc
[21:54:16] [PASSED] pf_sends_pf2guc
[21:54:16] [SKIPPED] pf_loopback_nop
[21:54:16] [SKIPPED] pf_loopback_echo
[21:54:16] [SKIPPED] pf_loopback_fail
[21:54:16] [SKIPPED] pf_loopback_busy
[21:54:16] [SKIPPED] pf_loopback_retry
[21:54:16] ==================== [PASSED] pf_relay =====================
[21:54:16] ================== vf_relay (3 subtests) ===================
[21:54:16] [PASSED] vf_rejects_guc2vf_too_short
[21:54:16] [PASSED] vf_rejects_guc2vf_too_long
[21:54:16] [PASSED] vf_rejects_guc2vf_no_payload
[21:54:16] ==================== [PASSED] vf_relay =====================
[21:54:16] ================= pf_service (11 subtests) =================
[21:54:16] [PASSED] pf_negotiate_any
[21:54:16] [PASSED] pf_negotiate_base_match
[21:54:16] [PASSED] pf_negotiate_base_newer
[21:54:16] [PASSED] pf_negotiate_base_next
[21:54:16] [SKIPPED] pf_negotiate_base_older
[21:54:16] [PASSED] pf_negotiate_base_prev
[21:54:16] [PASSED] pf_negotiate_latest_match
[21:54:16] [PASSED] pf_negotiate_latest_newer
[21:54:16] [PASSED] pf_negotiate_latest_next
[21:54:16] [SKIPPED] pf_negotiate_latest_older
[21:54:16] [SKIPPED] pf_negotiate_latest_prev
[21:54:16] =================== [PASSED] pf_service ====================
[21:54:16] ===================== lmtt (1 subtest) =====================
[21:54:16] ======================== test_ops =========================
[21:54:16] [PASSED] 2-level
[21:54:16] [PASSED] multi-level
[21:54:16] ==================== [PASSED] test_ops =====================
[21:54:16] ====================== [PASSED] lmtt =======================
[21:54:16] =================== xe_mocs (2 subtests) ===================
[21:54:16] ================ xe_live_mocs_kernel_kunit ================
[21:54:16] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[21:54:16] ================ xe_live_mocs_reset_kunit =================
[21:54:16] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[21:54:16] ==================== [SKIPPED] xe_mocs =====================
[21:54:16] ================= xe_migrate (2 subtests) ==================
[21:54:16] ================= xe_migrate_sanity_kunit =================
[21:54:16] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[21:54:16] ================== xe_validate_ccs_kunit ==================
[21:54:16] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[21:54:16] =================== [SKIPPED] xe_migrate ===================
[21:54:16] ================== xe_dma_buf (1 subtest) ==================
[21:54:16] ==================== xe_dma_buf_kunit =====================
[21:54:16] ================ [SKIPPED] xe_dma_buf_kunit ================
[21:54:16] =================== [SKIPPED] xe_dma_buf ===================
[21:54:16] ==================== xe_bo (2 subtests) ====================
[21:54:16] ================== xe_ccs_migrate_kunit ===================
[21:54:16] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[21:54:16] ==================== xe_bo_evict_kunit ====================
[21:54:16] =============== [SKIPPED] xe_bo_evict_kunit ================
[21:54:16] ===================== [SKIPPED] xe_bo ======================
[21:54:16] ==================== args (11 subtests) ====================
[21:54:16] [PASSED] count_args_test
[21:54:16] [PASSED] call_args_example
[21:54:16] [PASSED] call_args_test
[21:54:16] [PASSED] drop_first_arg_example
[21:54:16] [PASSED] drop_first_arg_test
[21:54:16] [PASSED] first_arg_example
[21:54:16] [PASSED] first_arg_test
[21:54:16] [PASSED] last_arg_example
[21:54:16] [PASSED] last_arg_test
[21:54:16] [PASSED] pick_arg_example
[21:54:16] [PASSED] sep_comma_example
[21:54:16] ====================== [PASSED] args =======================
[21:54:16] =================== xe_pci (2 subtests) ====================
stty: 'standard input': Inappropriate ioctl for device
[21:54:16] [PASSED] xe_gmdid_graphics_ip
[21:54:16] [PASSED] xe_gmdid_media_ip
[21:54:16] ===================== [PASSED] xe_pci ======================
[21:54:16] =================== xe_rtp (2 subtests) ====================
[21:54:16] =============== xe_rtp_process_to_sr_tests ================
[21:54:16] [PASSED] coalesce-same-reg
[21:54:16] [PASSED] no-match-no-add
[21:54:16] [PASSED] match-or
[21:54:16] [PASSED] match-or-xfail
[21:54:16] [PASSED] no-match-no-add-multiple-rules
[21:54:16] [PASSED] two-regs-two-entries
[21:54:16] [PASSED] clr-one-set-other
[21:54:16] [PASSED] set-field
[21:54:16] [PASSED] conflict-duplicate
[21:54:16] [PASSED] conflict-not-disjoint
[21:54:16] [PASSED] conflict-reg-type
[21:54:16] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[21:54:16] ================== xe_rtp_process_tests ===================
[21:54:16] [PASSED] active1
[21:54:16] [PASSED] active2
[21:54:16] [PASSED] active-inactive
[21:54:16] [PASSED] inactive-active
[21:54:16] [PASSED] inactive-1st_or_active-inactive
[21:54:16] [PASSED] inactive-2nd_or_active-inactive
[21:54:16] [PASSED] inactive-last_or_active-inactive
[21:54:16] [PASSED] inactive-no_or_active-inactive
[21:54:16] ============== [PASSED] xe_rtp_process_tests ===============
[21:54:16] ===================== [PASSED] xe_rtp ======================
[21:54:16] ==================== xe_wa (1 subtest) =====================
[21:54:16] ======================== xe_wa_gt =========================
[21:54:16] [PASSED] TIGERLAKE (B0)
[21:54:16] [PASSED] DG1 (A0)
[21:54:16] [PASSED] DG1 (B0)
[21:54:16] [PASSED] ALDERLAKE_S (A0)
[21:54:16] [PASSED] ALDERLAKE_S (B0)
[21:54:16] [PASSED] ALDERLAKE_S (C0)
[21:54:16] [PASSED] ALDERLAKE_S (D0)
[21:54:16] [PASSED] ALDERLAKE_P (A0)
[21:54:16] [PASSED] ALDERLAKE_P (B0)
[21:54:16] [PASSED] ALDERLAKE_P (C0)
[21:54:16] [PASSED] ALDERLAKE_S_RPLS (D0)
[21:54:16] [PASSED] ALDERLAKE_P_RPLU (E0)
[21:54:16] [PASSED] DG2_G10 (C0)
[21:54:16] [PASSED] DG2_G11 (B1)
[21:54:16] [PASSED] DG2_G12 (A1)
[21:54:16] [PASSED] METEORLAKE (g:A0, m:A0)
[21:54:16] [PASSED] METEORLAKE (g:A0, m:A0)
[21:54:16] [PASSED] METEORLAKE (g:A0, m:A0)
[21:54:16] [PASSED] LUNARLAKE (g:A0, m:A0)
[21:54:16] [PASSED] LUNARLAKE (g:B0, m:A0)
[21:54:16] [PASSED] BATTLEMAGE (g:A0, m:A1)
[21:54:16] ==================== [PASSED] xe_wa_gt =====================
[21:54:16] ====================== [PASSED] xe_wa ======================
[21:54:16] ============================================================
[21:54:16] Testing complete. Ran 121 tests: passed: 106, skipped: 15
[21:54:16] Elapsed time: 30.257s total, 4.204s configuring, 25.783s building, 0.224s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[21:54:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:54:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[21:54:39] Starting KUnit Kernel (1/1)...
[21:54:39] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:54:39] ============ drm_test_pick_cmdline (2 subtests) ============
[21:54:39] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[21:54:39] =============== drm_test_pick_cmdline_named ===============
[21:54:39] [PASSED] NTSC
[21:54:39] [PASSED] NTSC-J
[21:54:39] [PASSED] PAL
[21:54:39] [PASSED] PAL-M
[21:54:39] =========== [PASSED] drm_test_pick_cmdline_named ===========
[21:54:39] ============== [PASSED] drm_test_pick_cmdline ==============
[21:54:39] ================== drm_buddy (7 subtests) ==================
[21:54:39] [PASSED] drm_test_buddy_alloc_limit
[21:54:39] [PASSED] drm_test_buddy_alloc_optimistic
[21:54:39] [PASSED] drm_test_buddy_alloc_pessimistic
[21:54:39] [PASSED] drm_test_buddy_alloc_pathological
[21:54:39] [PASSED] drm_test_buddy_alloc_contiguous
[21:54:39] [PASSED] drm_test_buddy_alloc_clear
[21:54:39] [PASSED] drm_test_buddy_alloc_range_bias
[21:54:39] ==================== [PASSED] drm_buddy ====================
[21:54:39] ============= drm_cmdline_parser (40 subtests) =============
[21:54:39] [PASSED] drm_test_cmdline_force_d_only
[21:54:39] [PASSED] drm_test_cmdline_force_D_only_dvi
[21:54:39] [PASSED] drm_test_cmdline_force_D_only_hdmi
[21:54:39] [PASSED] drm_test_cmdline_force_D_only_not_digital
[21:54:39] [PASSED] drm_test_cmdline_force_e_only
[21:54:39] [PASSED] drm_test_cmdline_res
[21:54:39] [PASSED] drm_test_cmdline_res_vesa
[21:54:39] [PASSED] drm_test_cmdline_res_vesa_rblank
[21:54:39] [PASSED] drm_test_cmdline_res_rblank
[21:54:39] [PASSED] drm_test_cmdline_res_bpp
[21:54:39] [PASSED] drm_test_cmdline_res_refresh
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[21:54:39] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[21:54:39] [PASSED] drm_test_cmdline_res_margins_force_on
[21:54:39] [PASSED] drm_test_cmdline_res_vesa_margins
[21:54:39] [PASSED] drm_test_cmdline_name
[21:54:39] [PASSED] drm_test_cmdline_name_bpp
[21:54:39] [PASSED] drm_test_cmdline_name_option
[21:54:39] [PASSED] drm_test_cmdline_name_bpp_option
[21:54:39] [PASSED] drm_test_cmdline_rotate_0
[21:54:39] [PASSED] drm_test_cmdline_rotate_90
[21:54:39] [PASSED] drm_test_cmdline_rotate_180
[21:54:39] [PASSED] drm_test_cmdline_rotate_270
[21:54:39] [PASSED] drm_test_cmdline_hmirror
[21:54:39] [PASSED] drm_test_cmdline_vmirror
[21:54:39] [PASSED] drm_test_cmdline_margin_options
[21:54:39] [PASSED] drm_test_cmdline_multiple_options
[21:54:39] [PASSED] drm_test_cmdline_bpp_extra_and_option
[21:54:39] [PASSED] drm_test_cmdline_extra_and_option
[21:54:39] [PASSED] drm_test_cmdline_freestanding_options
[21:54:39] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[21:54:39] [PASSED] drm_test_cmdline_panel_orientation
[21:54:39] ================ drm_test_cmdline_invalid =================
[21:54:39] [PASSED] margin_only
[21:54:39] [PASSED] interlace_only
[21:54:39] [PASSED] res_missing_x
[21:54:39] [PASSED] res_missing_y
[21:54:39] [PASSED] res_bad_y
[21:54:39] [PASSED] res_missing_y_bpp
[21:54:39] [PASSED] res_bad_bpp
[21:54:39] [PASSED] res_bad_refresh
[21:54:39] [PASSED] res_bpp_refresh_force_on_off
[21:54:39] [PASSED] res_invalid_mode
[21:54:39] [PASSED] res_bpp_wrong_place_mode
[21:54:39] [PASSED] name_bpp_refresh
[21:54:39] [PASSED] name_refresh
[21:54:39] [PASSED] name_refresh_wrong_mode
[21:54:39] [PASSED] name_refresh_invalid_mode
[21:54:39] [PASSED] rotate_multiple
[21:54:39] [PASSED] rotate_invalid_val
[21:54:39] [PASSED] rotate_truncated
[21:54:39] [PASSED] invalid_option
[21:54:39] [PASSED] invalid_tv_option
[21:54:39] [PASSED] truncated_tv_option
[21:54:39] ============ [PASSED] drm_test_cmdline_invalid =============
[21:54:39] =============== drm_test_cmdline_tv_options ===============
[21:54:39] [PASSED] NTSC
[21:54:39] [PASSED] NTSC_443
[21:54:39] [PASSED] NTSC_J
[21:54:39] [PASSED] PAL
[21:54:39] [PASSED] PAL_M
[21:54:39] [PASSED] PAL_N
[21:54:39] [PASSED] SECAM
[21:54:39] [PASSED] MONO_525
[21:54:39] [PASSED] MONO_625
[21:54:39] =========== [PASSED] drm_test_cmdline_tv_options ===========
[21:54:39] =============== [PASSED] drm_cmdline_parser ================
[21:54:39] ========== drmm_connector_hdmi_init (19 subtests) ==========
[21:54:39] [PASSED] drm_test_connector_hdmi_init_valid
[21:54:39] [PASSED] drm_test_connector_hdmi_init_bpc_8
[21:54:39] [PASSED] drm_test_connector_hdmi_init_bpc_10
[21:54:39] [PASSED] drm_test_connector_hdmi_init_bpc_12
[21:54:39] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[21:54:39] [PASSED] drm_test_connector_hdmi_init_bpc_null
[21:54:39] [PASSED] drm_test_connector_hdmi_init_formats_empty
[21:54:39] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[21:54:39] [PASSED] drm_test_connector_hdmi_init_null_ddc
[21:54:39] [PASSED] drm_test_connector_hdmi_init_null_product
[21:54:39] [PASSED] drm_test_connector_hdmi_init_null_vendor
[21:54:39] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[21:54:39] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[21:54:39] [PASSED] drm_test_connector_hdmi_init_product_valid
[21:54:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[21:54:39] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[21:54:39] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[21:54:39] ========= drm_test_connector_hdmi_init_type_valid =========
[21:54:39] [PASSED] HDMI-A
[21:54:39] [PASSED] HDMI-B
[21:54:39] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[21:54:39] ======== drm_test_connector_hdmi_init_type_invalid ========
[21:54:39] [PASSED] Unknown
[21:54:39] [PASSED] VGA
[21:54:39] [PASSED] DVI-I
[21:54:39] [PASSED] DVI-D
[21:54:39] [PASSED] DVI-A
[21:54:39] [PASSED] Composite
[21:54:39] [PASSED] SVIDEO
[21:54:39] [PASSED] LVDS
[21:54:39] [PASSED] Component
[21:54:39] [PASSED] DIN
[21:54:39] [PASSED] DP
[21:54:39] [PASSED] TV
[21:54:39] [PASSED] eDP
[21:54:39] [PASSED] Virtual
[21:54:39] [PASSED] DSI
[21:54:39] [PASSED] DPI
[21:54:39] [PASSED] Writeback
[21:54:39] [PASSED] SPI
[21:54:39] [PASSED] USB
[21:54:39] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[21:54:39] ============ [PASSED] drmm_connector_hdmi_init =============
[21:54:39] ============= drmm_connector_init (3 subtests) =============
[21:54:39] [PASSED] drm_test_drmm_connector_init
[21:54:39] [PASSED] drm_test_drmm_connector_init_null_ddc
[21:54:39] ========= drm_test_drmm_connector_init_type_valid =========
[21:54:39] [PASSED] Unknown
[21:54:39] [PASSED] VGA
[21:54:39] [PASSED] DVI-I
[21:54:39] [PASSED] DVI-D
[21:54:39] [PASSED] DVI-A
[21:54:39] [PASSED] Composite
[21:54:39] [PASSED] SVIDEO
[21:54:39] [PASSED] LVDS
[21:54:39] [PASSED] Component
[21:54:39] [PASSED] DIN
[21:54:39] [PASSED] DP
[21:54:39] [PASSED] HDMI-A
[21:54:39] [PASSED] HDMI-B
[21:54:39] [PASSED] TV
[21:54:39] [PASSED] eDP
[21:54:39] [PASSED] Virtual
[21:54:39] [PASSED] DSI
[21:54:39] [PASSED] DPI
[21:54:39] [PASSED] Writeback
[21:54:39] [PASSED] SPI
[21:54:39] [PASSED] USB
[21:54:39] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[21:54:39] =============== [PASSED] drmm_connector_init ===============
[21:54:39] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[21:54:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[21:54:39] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[21:54:39] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[21:54:39] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[21:54:39] ========== drm_test_get_tv_mode_from_name_valid ===========
[21:54:39] [PASSED] NTSC
[21:54:39] [PASSED] NTSC-443
[21:54:39] [PASSED] NTSC-J
[21:54:39] [PASSED] PAL
[21:54:39] [PASSED] PAL-M
[21:54:39] [PASSED] PAL-N
[21:54:39] [PASSED] SECAM
[21:54:39] [PASSED] Mono
[21:54:39] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[21:54:39] [PASSED] drm_test_get_tv_mode_from_name_truncated
[21:54:39] ============ [PASSED] drm_get_tv_mode_from_name ============
[21:54:39] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[21:54:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[21:54:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[21:54:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[21:54:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[21:54:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[21:54:39] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[21:54:39] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[21:54:39] [PASSED] VIC 96
[21:54:39] [PASSED] VIC 97
[21:54:39] [PASSED] VIC 101
[21:54:39] [PASSED] VIC 102
[21:54:39] [PASSED] VIC 106
[21:54:39] [PASSED] VIC 107
[21:54:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[21:54:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[21:54:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[21:54:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[21:54:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[21:54:39] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[21:54:39] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[21:54:39] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[21:54:39] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[21:54:39] [PASSED] Automatic
[21:54:39] [PASSED] Full
[21:54:39] [PASSED] Limited 16:235
[21:54:39] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[21:54:39] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[21:54:39] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[21:54:39] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[21:54:39] === drm_test_drm_hdmi_connector_get_output_format_name ====
[21:54:39] [PASSED] RGB
[21:54:39] [PASSED] YUV 4:2:0
[21:54:39] [PASSED] YUV 4:2:2
[21:54:39] [PASSED] YUV 4:4:4
[21:54:39] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[21:54:39] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[21:54:39] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[21:54:39] ============= drm_damage_helper (21 subtests) ==============
[21:54:39] [PASSED] drm_test_damage_iter_no_damage
[21:54:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[21:54:39] [PASSED] drm_test_damage_iter_no_damage_src_moved
[21:54:39] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[21:54:39] [PASSED] drm_test_damage_iter_no_damage_not_visible
[21:54:39] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[21:54:39] [PASSED] drm_test_damage_iter_no_damage_no_fb
[21:54:39] [PASSED] drm_test_damage_iter_simple_damage
[21:54:39] [PASSED] drm_test_damage_iter_single_damage
[21:54:39] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[21:54:39] [PASSED] drm_test_damage_iter_single_damage_outside_src
[21:54:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[21:54:39] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[21:54:39] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[21:54:39] [PASSED] drm_test_damage_iter_single_damage_src_moved
[21:54:39] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[21:54:39] [PASSED] drm_test_damage_iter_damage
[21:54:39] [PASSED] drm_test_damage_iter_damage_one_intersect
[21:54:39] [PASSED] drm_test_damage_iter_damage_one_outside
[21:54:39] [PASSED] drm_test_damage_iter_damage_src_moved
[21:54:39] [PASSED] drm_test_damage_iter_damage_not_visible
[21:54:39] ================ [PASSED] drm_damage_helper ================
[21:54:39] ============== drm_dp_mst_helper (3 subtests) ==============
[21:54:39] ============== drm_test_dp_mst_calc_pbn_mode ==============
[21:54:39] [PASSED] Clock 154000 BPP 30 DSC disabled
[21:54:39] [PASSED] Clock 234000 BPP 30 DSC disabled
[21:54:39] [PASSED] Clock 297000 BPP 24 DSC disabled
[21:54:39] [PASSED] Clock 332880 BPP 24 DSC enabled
[21:54:39] [PASSED] Clock 324540 BPP 24 DSC enabled
[21:54:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[21:54:39] ============== drm_test_dp_mst_calc_pbn_div ===============
[21:54:39] [PASSED] Link rate 2000000 lane count 4
[21:54:39] [PASSED] Link rate 2000000 lane count 2
[21:54:39] [PASSED] Link rate 2000000 lane count 1
[21:54:39] [PASSED] Link rate 1350000 lane count 4
[21:54:39] [PASSED] Link rate 1350000 lane count 2
[21:54:39] [PASSED] Link rate 1350000 lane count 1
[21:54:39] [PASSED] Link rate 1000000 lane count 4
[21:54:39] [PASSED] Link rate 1000000 lane count 2
[21:54:39] [PASSED] Link rate 1000000 lane count 1
[21:54:39] [PASSED] Link rate 810000 lane count 4
[21:54:39] [PASSED] Link rate 810000 lane count 2
[21:54:39] [PASSED] Link rate 810000 lane count 1
[21:54:39] [PASSED] Link rate 540000 lane count 4
[21:54:39] [PASSED] Link rate 540000 lane count 2
[21:54:39] [PASSED] Link rate 540000 lane count 1
[21:54:39] [PASSED] Link rate 270000 lane count 4
[21:54:39] [PASSED] Link rate 270000 lane count 2
[21:54:39] [PASSED] Link rate 270000 lane count 1
[21:54:39] [PASSED] Link rate 162000 lane count 4
[21:54:39] [PASSED] Link rate 162000 lane count 2
[21:54:39] [PASSED] Link rate 162000 lane count 1
[21:54:39] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[21:54:39] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[21:54:39] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[21:54:39] [PASSED] DP_POWER_UP_PHY with port number
[21:54:39] [PASSED] DP_POWER_DOWN_PHY with port number
[21:54:39] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[21:54:39] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[21:54:39] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[21:54:39] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[21:54:39] [PASSED] DP_QUERY_PAYLOAD with port number
[21:54:39] [PASSED] DP_QUERY_PAYLOAD with VCPI
[21:54:39] [PASSED] DP_REMOTE_DPCD_READ with port number
[21:54:39] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[21:54:39] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[21:54:39] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[21:54:39] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[21:54:39] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[21:54:39] [PASSED] DP_REMOTE_I2C_READ with port number
[21:54:39] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[21:54:39] [PASSED] DP_REMOTE_I2C_READ with transactions array
[21:54:39] [PASSED] DP_REMOTE_I2C_WRITE with port number
[21:54:39] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[21:54:39] [PASSED] DP_REMOTE_I2C_WRITE with data array
[21:54:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[21:54:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[21:54:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[21:54:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[21:54:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[21:54:39] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[21:54:39] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[21:54:39] ================ [PASSED] drm_dp_mst_helper ================
[21:54:39] ================== drm_exec (7 subtests) ===================
[21:54:39] [PASSED] sanitycheck
[21:54:39] [PASSED] test_lock
[21:54:39] [PASSED] test_lock_unlock
[21:54:39] [PASSED] test_duplicates
[21:54:39] [PASSED] test_prepare
[21:54:39] [PASSED] test_prepare_array
[21:54:39] [PASSED] test_multiple_loops
[21:54:39] ==================== [PASSED] drm_exec =====================
[21:54:39] =========== drm_format_helper_test (17 subtests) ===========
[21:54:39] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[21:54:39] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[21:54:39] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[21:54:39] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[21:54:39] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[21:54:39] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[21:54:39] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[21:54:39] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[21:54:39] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[21:54:39] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[21:54:39] ============== drm_test_fb_xrgb8888_to_mono ===============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[21:54:39] ==================== drm_test_fb_swab =====================
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ================ [PASSED] drm_test_fb_swab =================
[21:54:39] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[21:54:39] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[21:54:39] [PASSED] single_pixel_source_buffer
[21:54:39] [PASSED] single_pixel_clip_rectangle
[21:54:39] [PASSED] well_known_colors
[21:54:39] [PASSED] destination_pitch
[21:54:39] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[21:54:39] ================= drm_test_fb_clip_offset =================
[21:54:39] [PASSED] pass through
[21:54:39] [PASSED] horizontal offset
[21:54:39] [PASSED] vertical offset
[21:54:39] [PASSED] horizontal and vertical offset
[21:54:39] [PASSED] horizontal offset (custom pitch)
[21:54:39] [PASSED] vertical offset (custom pitch)
[21:54:39] [PASSED] horizontal and vertical offset (custom pitch)
[21:54:39] ============= [PASSED] drm_test_fb_clip_offset =============
[21:54:39] ============== drm_test_fb_build_fourcc_list ==============
[21:54:39] [PASSED] no native formats
[21:54:39] [PASSED] XRGB8888 as native format
[21:54:39] [PASSED] remove duplicates
[21:54:39] [PASSED] convert alpha formats
[21:54:39] [PASSED] random formats
[21:54:39] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[21:54:39] =================== drm_test_fb_memcpy ====================
[21:54:39] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[21:54:39] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[21:54:39] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[21:54:39] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[21:54:39] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[21:54:39] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[21:54:39] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[21:54:39] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[21:54:39] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[21:54:39] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[21:54:39] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[21:54:39] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[21:54:39] =============== [PASSED] drm_test_fb_memcpy ================
[21:54:39] ============= [PASSED] drm_format_helper_test ==============
[21:54:39] ================= drm_format (18 subtests) =================
[21:54:39] [PASSED] drm_test_format_block_width_invalid
[21:54:39] [PASSED] drm_test_format_block_width_one_plane
[21:54:39] [PASSED] drm_test_format_block_width_two_plane
[21:54:39] [PASSED] drm_test_format_block_width_three_plane
[21:54:39] [PASSED] drm_test_format_block_width_tiled
[21:54:39] [PASSED] drm_test_format_block_height_invalid
[21:54:39] [PASSED] drm_test_format_block_height_one_plane
[21:54:39] [PASSED] drm_test_format_block_height_two_plane
[21:54:39] [PASSED] drm_test_format_block_height_three_plane
[21:54:39] [PASSED] drm_test_format_block_height_tiled
[21:54:39] [PASSED] drm_test_format_min_pitch_invalid
[21:54:39] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[21:54:39] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[21:54:39] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[21:54:39] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[21:54:39] [PASSED] drm_test_format_min_pitch_two_plane
[21:54:39] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[21:54:39] [PASSED] drm_test_format_min_pitch_tiled
[21:54:39] =================== [PASSED] drm_format ====================
[21:54:39] =============== drm_framebuffer (1 subtest) ================
[21:54:39] =============== drm_test_framebuffer_create ===============
[21:54:39] [PASSED] ABGR8888 normal sizes
[21:54:39] [PASSED] ABGR8888 max sizes
[21:54:39] [PASSED] ABGR8888 pitch greater than min required
[21:54:39] [PASSED] ABGR8888 pitch less than min required
[21:54:39] [PASSED] ABGR8888 Invalid width
[21:54:39] [PASSED] ABGR8888 Invalid buffer handle
[21:54:39] [PASSED] No pixel format
[21:54:39] [PASSED] ABGR8888 Width 0
[21:54:39] [PASSED] ABGR8888 Height 0
[21:54:39] [PASSED] ABGR8888 Out of bound height * pitch combination
[21:54:39] [PASSED] ABGR8888 Large buffer offset
[21:54:39] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[21:54:39] [PASSED] ABGR8888 Valid buffer modifier
[21:54:39] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[21:54:39] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[21:54:39] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[21:54:39] [PASSED] NV12 Normal sizes
[21:54:39] [PASSED] NV12 Max sizes
[21:54:39] [PASSED] NV12 Invalid pitch
[21:54:39] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[21:54:39] [PASSED] NV12 different modifier per-plane
[21:54:39] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[21:54:39] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[21:54:39] [PASSED] NV12 Modifier for inexistent plane
[21:54:39] [PASSED] NV12 Handle for inexistent plane
[21:54:39] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[21:54:39] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[21:54:39] [PASSED] YVU420 Normal sizes
[21:54:39] [PASSED] YVU420 Max sizes
[21:54:39] [PASSED] YVU420 Invalid pitch
[21:54:39] [PASSED] YVU420 Different pitches
[21:54:39] [PASSED] YVU420 Different buffer offsets/pitches
[21:54:39] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[21:54:39] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[21:54:39] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[21:54:39] [PASSED] YVU420 Valid modifier
[21:54:39] [PASSED] YVU420 Different modifiers per plane
[21:54:39] [PASSED] YVU420 Modifier for inexistent plane
[21:54:39] [PASSED] X0L2 Normal sizes
[21:54:39] [PASSED] X0L2 Max sizes
[21:54:39] [PASSED] X0L2 Invalid pitch
[21:54:39] [PASSED] X0L2 Pitch greater than minimum required
[21:54:39] [PASSED] X0L2 Handle for inexistent plane
[21:54:39] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[21:54:39] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[21:54:39] [PASSED] X0L2 Valid modifier
[21:54:39] [PASSED] X0L2 Modifier for inexistent plane
[21:54:39] =========== [PASSED] drm_test_framebuffer_create ===========
[21:54:39] ================= [PASSED] drm_framebuffer =================
[21:54:39] ================ drm_gem_shmem (8 subtests) ================
[21:54:39] [PASSED] drm_gem_shmem_test_obj_create
[21:54:39] [PASSED] drm_gem_shmem_test_obj_create_private
[21:54:39] [PASSED] drm_gem_shmem_test_pin_pages
[21:54:39] [PASSED] drm_gem_shmem_test_vmap
[21:54:39] [PASSED] drm_gem_shmem_test_get_pages_sgt
[21:54:39] [PASSED] drm_gem_shmem_test_get_sg_table
[21:54:39] [PASSED] drm_gem_shmem_test_madvise
[21:54:39] [PASSED] drm_gem_shmem_test_purge
[21:54:39] ================== [PASSED] drm_gem_shmem ==================
[21:54:39] === drm_atomic_helper_connector_hdmi_check (22 subtests) ===
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[21:54:39] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[21:54:39] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[21:54:39] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[21:54:39] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[21:54:39] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[21:54:39] [PASSED] drm_test_check_output_bpc_dvi
[21:54:39] [PASSED] drm_test_check_output_bpc_format_vic_1
[21:54:39] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[21:54:39] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[21:54:39] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[21:54:39] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[21:54:39] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[21:54:39] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[21:54:39] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[21:54:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[21:54:39] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[21:54:39] [PASSED] drm_test_check_broadcast_rgb_value
[21:54:39] [PASSED] drm_test_check_bpc_8_value
[21:54:39] [PASSED] drm_test_check_bpc_10_value
[21:54:39] [PASSED] drm_test_check_bpc_12_value
[21:54:39] [PASSED] drm_test_check_format_value
[21:54:39] [PASSED] drm_test_check_tmds_char_value
[21:54:39] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[21:54:39] ================= drm_managed (2 subtests) =================
[21:54:39] [PASSED] drm_test_managed_release_action
[21:54:39] [PASSED] drm_test_managed_run_action
[21:54:39] =================== [PASSED] drm_managed ===================
[21:54:39] =================== drm_mm (6 subtests) ====================
[21:54:39] [PASSED] drm_test_mm_init
[21:54:39] [PASSED] drm_test_mm_debug
[21:54:39] [PASSED] drm_test_mm_align32
[21:54:39] [PASSED] drm_test_mm_align64
[21:54:39] [PASSED] drm_test_mm_lowest
[21:54:39] [PASSED] drm_test_mm_highest
[21:54:39] ===================== [PASSED] drm_mm ======================
[21:54:39] ============= drm_modes_analog_tv (5 subtests) =============
[21:54:39] [PASSED] drm_test_modes_analog_tv_mono_576i
[21:54:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[21:54:39] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[21:54:39] [PASSED] drm_test_modes_analog_tv_pal_576i
[21:54:39] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[21:54:39] =============== [PASSED] drm_modes_analog_tv ===============
[21:54:39] ============== drm_plane_helper (2 subtests) ===============
[21:54:39] =============== drm_test_check_plane_state ================
[21:54:39] [PASSED] clipping_simple
[21:54:39] [PASSED] clipping_rotate_reflect
[21:54:39] [PASSED] positioning_simple
[21:54:39] [PASSED] upscaling
[21:54:39] [PASSED] downscaling
[21:54:39] [PASSED] rounding1
[21:54:39] [PASSED] rounding2
[21:54:39] [PASSED] rounding3
[21:54:39] [PASSED] rounding4
[21:54:39] =========== [PASSED] drm_test_check_plane_state ============
[21:54:39] =========== drm_test_check_invalid_plane_state ============
[21:54:39] [PASSED] positioning_invalid
[21:54:39] [PASSED] upscaling_invalid
stty: 'standard input': Inappropriate ioctl for device
[21:54:39] [PASSED] downscaling_invalid
[21:54:39] ======= [PASSED] drm_test_check_invalid_plane_state ========
[21:54:39] ================ [PASSED] drm_plane_helper =================
[21:54:39] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[21:54:39] ====== drm_test_connector_helper_tv_get_modes_check =======
[21:54:39] [PASSED] None
[21:54:39] [PASSED] PAL
[21:54:39] [PASSED] NTSC
[21:54:39] [PASSED] Both, NTSC Default
[21:54:39] [PASSED] Both, PAL Default
[21:54:39] [PASSED] Both, NTSC Default, with PAL on command-line
[21:54:39] [PASSED] Both, PAL Default, with NTSC on command-line
[21:54:39] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[21:54:39] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[21:54:39] ================== drm_rect (9 subtests) ===================
[21:54:39] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[21:54:39] [PASSED] drm_test_rect_clip_scaled_not_clipped
[21:54:39] [PASSED] drm_test_rect_clip_scaled_clipped
[21:54:39] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[21:54:39] ================= drm_test_rect_intersect =================
[21:54:39] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[21:54:39] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[21:54:39] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[21:54:39] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[21:54:39] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[21:54:39] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[21:54:39] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[21:54:39] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[21:54:39] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[21:54:39] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[21:54:39] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[21:54:39] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[21:54:39] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[21:54:39] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[21:54:39] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[21:54:39] ============= [PASSED] drm_test_rect_intersect =============
[21:54:39] ================ drm_test_rect_calc_hscale ================
[21:54:39] [PASSED] normal use
[21:54:39] [PASSED] out of max range
[21:54:39] [PASSED] out of min range
[21:54:39] [PASSED] zero dst
[21:54:39] [PASSED] negative src
[21:54:39] [PASSED] negative dst
[21:54:39] ============ [PASSED] drm_test_rect_calc_hscale ============
[21:54:39] ================ drm_test_rect_calc_vscale ================
[21:54:39] [PASSED] normal use
[21:54:39] [PASSED] out of max range
[21:54:39] [PASSED] out of min range
[21:54:39] [PASSED] zero dst
[21:54:39] [PASSED] negative src
[21:54:39] [PASSED] negative dst
[21:54:39] ============ [PASSED] drm_test_rect_calc_vscale ============
[21:54:39] ================== drm_test_rect_rotate ===================
[21:54:39] [PASSED] reflect-x
[21:54:39] [PASSED] reflect-y
[21:54:39] [PASSED] rotate-0
[21:54:39] [PASSED] rotate-90
[21:54:39] [PASSED] rotate-180
[21:54:39] [PASSED] rotate-270
[21:54:39] ============== [PASSED] drm_test_rect_rotate ===============
[21:54:39] ================ drm_test_rect_rotate_inv =================
[21:54:39] [PASSED] reflect-x
[21:54:39] [PASSED] reflect-y
[21:54:39] [PASSED] rotate-0
[21:54:39] [PASSED] rotate-90
[21:54:39] [PASSED] rotate-180
[21:54:39] [PASSED] rotate-270
[21:54:39] ============ [PASSED] drm_test_rect_rotate_inv =============
[21:54:39] ==================== [PASSED] drm_rect =====================
[21:54:39] ============================================================
[21:54:39] Testing complete. Ran 515 tests: passed: 515
[21:54:39] Elapsed time: 23.401s total, 1.733s configuring, 21.495s building, 0.152s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[21:54:39] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[21:54:41] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make ARCH=um O=.kunit --jobs=48
[21:54:50] Starting KUnit Kernel (1/1)...
[21:54:50] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[21:54:50] ================= ttm_device (5 subtests) ==================
[21:54:50] [PASSED] ttm_device_init_basic
[21:54:50] [PASSED] ttm_device_init_multiple
[21:54:50] [PASSED] ttm_device_fini_basic
[21:54:50] [PASSED] ttm_device_init_no_vma_man
[21:54:50] ================== ttm_device_init_pools ==================
[21:54:50] [PASSED] No DMA allocations, no DMA32 required
[21:54:50] [PASSED] DMA allocations, DMA32 required
[21:54:50] [PASSED] No DMA allocations, DMA32 required
[21:54:50] [PASSED] DMA allocations, no DMA32 required
[21:54:50] ============== [PASSED] ttm_device_init_pools ==============
[21:54:50] =================== [PASSED] ttm_device ====================
[21:54:50] ================== ttm_pool (8 subtests) ===================
[21:54:50] ================== ttm_pool_alloc_basic ===================
[21:54:50] [PASSED] One page
[21:54:50] [PASSED] More than one page
[21:54:50] [PASSED] Above the allocation limit
[21:54:50] [PASSED] One page, with coherent DMA mappings enabled
[21:54:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:54:50] ============== [PASSED] ttm_pool_alloc_basic ===============
[21:54:50] ============== ttm_pool_alloc_basic_dma_addr ==============
[21:54:50] [PASSED] One page
[21:54:50] [PASSED] More than one page
[21:54:50] [PASSED] Above the allocation limit
[21:54:50] [PASSED] One page, with coherent DMA mappings enabled
[21:54:50] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[21:54:50] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[21:54:50] [PASSED] ttm_pool_alloc_order_caching_match
[21:54:50] [PASSED] ttm_pool_alloc_caching_mismatch
[21:54:50] [PASSED] ttm_pool_alloc_order_mismatch
[21:54:50] [PASSED] ttm_pool_free_dma_alloc
[21:54:50] [PASSED] ttm_pool_free_no_dma_alloc
[21:54:50] [PASSED] ttm_pool_fini_basic
[21:54:50] ==================== [PASSED] ttm_pool =====================
[21:54:50] ================ ttm_resource (8 subtests) =================
[21:54:50] ================= ttm_resource_init_basic =================
[21:54:50] [PASSED] Init resource in TTM_PL_SYSTEM
[21:54:50] [PASSED] Init resource in TTM_PL_VRAM
[21:54:50] [PASSED] Init resource in a private placement
[21:54:50] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[21:54:50] ============= [PASSED] ttm_resource_init_basic =============
[21:54:50] [PASSED] ttm_resource_init_pinned
[21:54:50] [PASSED] ttm_resource_fini_basic
[21:54:50] [PASSED] ttm_resource_manager_init_basic
[21:54:50] [PASSED] ttm_resource_manager_usage_basic
[21:54:50] [PASSED] ttm_resource_manager_set_used_basic
[21:54:50] [PASSED] ttm_sys_man_alloc_basic
[21:54:50] [PASSED] ttm_sys_man_free_basic
[21:54:50] ================== [PASSED] ttm_resource ===================
[21:54:50] =================== ttm_tt (15 subtests) ===================
[21:54:50] ==================== ttm_tt_init_basic ====================
[21:54:50] [PASSED] Page-aligned size
[21:54:50] [PASSED] Extra pages requested
[21:54:50] ================ [PASSED] ttm_tt_init_basic ================
[21:54:50] [PASSED] ttm_tt_init_misaligned
[21:54:50] [PASSED] ttm_tt_fini_basic
[21:54:50] [PASSED] ttm_tt_fini_sg
[21:54:50] [PASSED] ttm_tt_fini_shmem
[21:54:50] [PASSED] ttm_tt_create_basic
[21:54:50] [PASSED] ttm_tt_create_invalid_bo_type
[21:54:50] [PASSED] ttm_tt_create_ttm_exists
[21:54:50] [PASSED] ttm_tt_create_failed
[21:54:50] [PASSED] ttm_tt_destroy_basic
[21:54:50] [PASSED] ttm_tt_populate_null_ttm
[21:54:50] [PASSED] ttm_tt_populate_populated_ttm
[21:54:50] [PASSED] ttm_tt_unpopulate_basic
[21:54:50] [PASSED] ttm_tt_unpopulate_empty_ttm
[21:54:50] [PASSED] ttm_tt_swapin_basic
[21:54:50] ===================== [PASSED] ttm_tt ======================
[21:54:50] =================== ttm_bo (14 subtests) ===================
[21:54:50] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[21:54:50] [PASSED] Cannot be interrupted and sleeps
[21:54:50] [PASSED] Cannot be interrupted, locks straight away
[21:54:50] [PASSED] Can be interrupted, sleeps
[21:54:50] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[21:54:50] [PASSED] ttm_bo_reserve_locked_no_sleep
[21:54:50] [PASSED] ttm_bo_reserve_no_wait_ticket
[21:54:50] [PASSED] ttm_bo_reserve_double_resv
[21:54:50] [PASSED] ttm_bo_reserve_interrupted
[21:54:50] [PASSED] ttm_bo_reserve_deadlock
[21:54:50] [PASSED] ttm_bo_unreserve_basic
[21:54:50] [PASSED] ttm_bo_unreserve_pinned
[21:54:50] [PASSED] ttm_bo_unreserve_bulk
[21:54:50] [PASSED] ttm_bo_put_basic
[21:54:50] [PASSED] ttm_bo_put_shared_resv
[21:54:50] [PASSED] ttm_bo_pin_basic
[21:54:50] [PASSED] ttm_bo_pin_unpin_resource
[21:54:50] [PASSED] ttm_bo_multiple_pin_one_unpin
[21:54:50] ===================== [PASSED] ttm_bo ======================
[21:54:50] ============== ttm_bo_validate (22 subtests) ===============
[21:54:50] ============== ttm_bo_init_reserved_sys_man ===============
[21:54:50] [PASSED] Buffer object for userspace
[21:54:50] [PASSED] Kernel buffer object
[21:54:50] [PASSED] Shared buffer object
[21:54:50] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[21:54:50] ============== ttm_bo_init_reserved_mock_man ==============
[21:54:50] [PASSED] Buffer object for userspace
[21:54:50] [PASSED] Kernel buffer object
[21:54:50] [PASSED] Shared buffer object
[21:54:50] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[21:54:50] [PASSED] ttm_bo_init_reserved_resv
[21:54:50] ================== ttm_bo_validate_basic ==================
[21:54:50] [PASSED] Buffer object for userspace
[21:54:50] [PASSED] Kernel buffer object
[21:54:50] [PASSED] Shared buffer object
[21:54:50] ============== [PASSED] ttm_bo_validate_basic ==============
[21:54:50] [PASSED] ttm_bo_validate_invalid_placement
[21:54:50] ============= ttm_bo_validate_same_placement ==============
[21:54:50] [PASSED] System manager
[21:54:50] [PASSED] VRAM manager
[21:54:50] ========= [PASSED] ttm_bo_validate_same_placement ==========
[21:54:50] [PASSED] ttm_bo_validate_failed_alloc
[21:54:50] [PASSED] ttm_bo_validate_pinned
[21:54:50] [PASSED] ttm_bo_validate_busy_placement
[21:54:50] ================ ttm_bo_validate_multihop =================
[21:54:50] [PASSED] Buffer object for userspace
[21:54:50] [PASSED] Kernel buffer object
[21:54:50] [PASSED] Shared buffer object
[21:54:50] ============ [PASSED] ttm_bo_validate_multihop =============
[21:54:50] ========== ttm_bo_validate_no_placement_signaled ==========
[21:54:50] [PASSED] Buffer object in system domain, no page vector
[21:54:50] [PASSED] Buffer object in system domain with an existing page vector
[21:54:50] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[21:54:50] ======== ttm_bo_validate_no_placement_not_signaled ========
[21:54:50] [PASSED] Buffer object for userspace
[21:54:50] [PASSED] Kernel buffer object
[21:54:50] [PASSED] Shared buffer object
[21:54:50] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[21:54:50] [PASSED] ttm_bo_validate_move_fence_signaled
[21:54:50] ========= ttm_bo_validate_move_fence_not_signaled =========
[21:54:50] [PASSED] Waits for GPU
[21:54:50] [PASSED] Tries to lock straight away
[21:54:50] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[21:54:50] [PASSED] ttm_bo_validate_swapout
[21:54:50] [PASSED] ttm_bo_validate_happy_evict
[21:54:50] [PASSED] ttm_bo_validate_all_pinned_evict
[21:54:50] [PASSED] ttm_bo_validate_allowed_only_evict
[21:54:50] [PASSED] ttm_bo_validate_deleted_evict
[21:54:50] [PASSED] ttm_bo_validate_busy_domain_evict
[21:54:50] [PASSED] ttm_bo_validate_evict_gutting
[21:54:50] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[21:54:50] ================= [PASSED] ttm_bo_validate =================
[21:54:50] ============================================================
[21:54:50] Testing complete. Ran 102 tests: passed: 102
[21:54:50] Elapsed time: 11.196s total, 1.717s configuring, 8.808s building, 0.557s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.Build: success for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (9 preceding siblings ...)
2024-08-27 21:54 ` ✓ CI.KUnit: success " Patchwork
@ 2024-08-27 22:09 ` Patchwork
2024-08-27 22:12 ` ✓ CI.Hooks: " Patchwork
` (3 subsequent siblings)
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-27 22:09 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : success
== Summary ==
lib/modules/6.11.0-rc5-xe/kernel/sound/core/seq/
lib/modules/6.11.0-rc5-xe/kernel/sound/core/seq/snd-seq.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/core/snd-seq-device.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/core/snd-hwdep.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/core/snd.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/core/snd-pcm.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/core/snd-compress.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/core/snd-timer.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soundcore.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/atom/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/atom/snd-soc-sst-atom-hifi2-platform.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/atom/sst/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/atom/sst/snd-intel-sst-acpi.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/atom/sst/snd-intel-sst-core.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/common/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/intel/common/snd-soc-acpi-intel-match.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/amd/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/amd/snd-acp-config.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-pci-intel-tgl.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-intel-hda-mlink.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-pci-intel-cnl.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-pci-intel-lnl.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-intel-hda-common.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-intel-hda-generic.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-intel-hda.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/intel/snd-sof-pci-intel-mtl.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/amd/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/amd/snd-sof-amd-renoir.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/amd/snd-sof-amd-acp.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/snd-sof-utils.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/snd-sof-pci.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/snd-sof.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/snd-sof-probes.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/xtensa/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/sof/xtensa/snd-sof-xtensa-dsp.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/snd-soc-core.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/snd-soc-acpi.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/codecs/
lib/modules/6.11.0-rc5-xe/kernel/sound/soc/codecs/snd-soc-hdac-hda.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/hda/
lib/modules/6.11.0-rc5-xe/kernel/sound/hda/snd-intel-sdw-acpi.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/hda/ext/
lib/modules/6.11.0-rc5-xe/kernel/sound/hda/ext/snd-hda-ext-core.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/hda/snd-intel-dspcfg.ko
lib/modules/6.11.0-rc5-xe/kernel/sound/hda/snd-hda-core.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/kernel/
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/kernel/msr.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/kernel/cpuid.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/sha512-ssse3.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/crct10dif-pclmul.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/ghash-clmulni-intel.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/sha1-ssse3.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/crc32-pclmul.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/sha256-ssse3.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/aesni-intel.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/crypto/polyval-clmulni.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/events/
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/events/intel/
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/events/intel/intel-cstate.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/events/rapl.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/kvm/
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/kvm/kvm.ko
lib/modules/6.11.0-rc5-xe/kernel/arch/x86/kvm/kvm-intel.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/
lib/modules/6.11.0-rc5-xe/kernel/crypto/crypto_simd.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/cmac.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/ccm.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/cryptd.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/polyval-generic.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/async_tx/
lib/modules/6.11.0-rc5-xe/kernel/crypto/async_tx/async_xor.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/async_tx/async_tx.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/async_tx/async_memcpy.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/async_tx/async_pq.ko
lib/modules/6.11.0-rc5-xe/kernel/crypto/async_tx/async_raid6_recov.ko
lib/modules/6.11.0-rc5-xe/build
lib/modules/6.11.0-rc5-xe/modules.alias.bin
lib/modules/6.11.0-rc5-xe/modules.builtin
lib/modules/6.11.0-rc5-xe/modules.softdep
lib/modules/6.11.0-rc5-xe/modules.alias
lib/modules/6.11.0-rc5-xe/modules.order
lib/modules/6.11.0-rc5-xe/modules.symbols
lib/modules/6.11.0-rc5-xe/modules.dep.bin
+ mv kernel-nodebug.tar.gz ..
+ cd ..
+ rm -rf archive
++ date +%s
^[[0Ksection_end:1724796567:package_x86_64_nodebug
^[[0K
+ echo -e '\e[0Ksection_end:1724796567:package_x86_64_nodebug\r\e[0K'
+ sync
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.Hooks: success for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (10 preceding siblings ...)
2024-08-27 22:09 ` ✓ CI.Build: " Patchwork
@ 2024-08-27 22:12 ` Patchwork
2024-08-27 22:14 ` ✓ CI.checksparse: " Patchwork
` (2 subsequent siblings)
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-27 22:12 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : success
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
GEN Makefile
UPD include/config/kernel.release
UPD include/generated/compile.h
UPD include/generated/utsrelease.h
mkdir -p /workspace/kernel/build64-default/tools/objtool && make O=/workspace/kernel/build64-default subdir=tools/objtool --no-print-directory -C objtool
CALL ../scripts/checksyscalls.sh
HOSTCC /workspace/kernel/build64-default/tools/objtool/fixdep.o
HOSTLD /workspace/kernel/build64-default/tools/objtool/fixdep-in.o
LINK /workspace/kernel/build64-default/tools/objtool/fixdep
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/orc.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default W=1 drivers/gpu/drm/xe
make[1]: Entering directory '/workspace/kernel/build64-default'
make[2]: Nothing to be done for 'drivers/gpu/drm/xe'.
make[1]: Leaving directory '/workspace/kernel/build64-default'
run-parts: executing /workspace/ci/hooks/11-build-32b
+++ realpath /workspace/ci/hooks/11-build-32b
++ dirname /workspace/ci/hooks/11-build-32b
+ THIS_SCRIPT_DIR=/workspace/ci/hooks
+ SRC_DIR=/workspace/kernel
+ TOOLS_SRC_DIR=/workspace/ci
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ BUILD_DIR=/workspace/kernel/build64-default/build32
+ cd /workspace/kernel
+ mkdir -p /workspace/kernel/build64-default/build32
++ nproc
+ make -j48 ARCH=i386 O=/workspace/kernel/build64-default/build32 defconfig
make[1]: Entering directory '/workspace/kernel/build64-default/build32'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
*** Default configuration is based on 'i386_defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/workspace/kernel/build64-default/build32'
+ cd /workspace/kernel/build64-default/build32
+ /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/10-xe.fragment
Using .config as base
Merging /workspace/ci/kernel/10-xe.fragment
Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/10-xe.fragment:
Previous value: # CONFIG_DRM_XE is not set
New value: CONFIG_DRM_XE=m
Value of CONFIG_SND_DEBUG is redefined by fragment /workspace/ci/kernel/10-xe.fragment:
Previous value: # CONFIG_SND_DEBUG is not set
New value: CONFIG_SND_DEBUG=y
Value of CONFIG_SND_HDA_INTEL is redefined by fragment /workspace/ci/kernel/10-xe.fragment:
Previous value: CONFIG_SND_HDA_INTEL=y
New value: CONFIG_SND_HDA_INTEL=m
Value of CONFIG_SND_HDA_CODEC_HDMI is redefined by fragment /workspace/ci/kernel/10-xe.fragment:
Previous value: # CONFIG_SND_HDA_CODEC_HDMI is not set
New value: CONFIG_SND_HDA_CODEC_HDMI=m
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
#
# configuration written to .config
#
Value requested for CONFIG_HAVE_UID16 not in final .config
Requested value: CONFIG_HAVE_UID16=y
Actual value:
Value requested for CONFIG_UID16 not in final .config
Requested value: CONFIG_UID16=y
Actual value:
Value requested for CONFIG_X86_32 not in final .config
Requested value: CONFIG_X86_32=y
Actual value:
Value requested for CONFIG_OUTPUT_FORMAT not in final .config
Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386"
Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64"
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32
Value requested for CONFIG_PGTABLE_LEVELS not in final .config
Requested value: CONFIG_PGTABLE_LEVELS=2
Actual value: CONFIG_PGTABLE_LEVELS=5
Value requested for CONFIG_X86_BIGSMP not in final .config
Requested value: # CONFIG_X86_BIGSMP is not set
Actual value:
Value requested for CONFIG_X86_INTEL_QUARK not in final .config
Requested value: # CONFIG_X86_INTEL_QUARK is not set
Actual value:
Value requested for CONFIG_X86_RDC321X not in final .config
Requested value: # CONFIG_X86_RDC321X is not set
Actual value:
Value requested for CONFIG_X86_32_NON_STANDARD not in final .config
Requested value: # CONFIG_X86_32_NON_STANDARD is not set
Actual value:
Value requested for CONFIG_X86_32_IRIS not in final .config
Requested value: # CONFIG_X86_32_IRIS is not set
Actual value:
Value requested for CONFIG_M486SX not in final .config
Requested value: # CONFIG_M486SX is not set
Actual value:
Value requested for CONFIG_M486 not in final .config
Requested value: # CONFIG_M486 is not set
Actual value:
Value requested for CONFIG_M586 not in final .config
Requested value: # CONFIG_M586 is not set
Actual value:
Value requested for CONFIG_M586TSC not in final .config
Requested value: # CONFIG_M586TSC is not set
Actual value:
Value requested for CONFIG_M586MMX not in final .config
Requested value: # CONFIG_M586MMX is not set
Actual value:
Value requested for CONFIG_M686 not in final .config
Requested value: CONFIG_M686=y
Actual value:
Value requested for CONFIG_MPENTIUMII not in final .config
Requested value: # CONFIG_MPENTIUMII is not set
Actual value:
Value requested for CONFIG_MPENTIUMIII not in final .config
Requested value: # CONFIG_MPENTIUMIII is not set
Actual value:
Value requested for CONFIG_MPENTIUMM not in final .config
Requested value: # CONFIG_MPENTIUMM is not set
Actual value:
Value requested for CONFIG_MPENTIUM4 not in final .config
Requested value: # CONFIG_MPENTIUM4 is not set
Actual value:
Value requested for CONFIG_MK6 not in final .config
Requested value: # CONFIG_MK6 is not set
Actual value:
Value requested for CONFIG_MK7 not in final .config
Requested value: # CONFIG_MK7 is not set
Actual value:
Value requested for CONFIG_MCRUSOE not in final .config
Requested value: # CONFIG_MCRUSOE is not set
Actual value:
Value requested for CONFIG_MEFFICEON not in final .config
Requested value: # CONFIG_MEFFICEON is not set
Actual value:
Value requested for CONFIG_MWINCHIPC6 not in final .config
Requested value: # CONFIG_MWINCHIPC6 is not set
Actual value:
Value requested for CONFIG_MWINCHIP3D not in final .config
Requested value: # CONFIG_MWINCHIP3D is not set
Actual value:
Value requested for CONFIG_MELAN not in final .config
Requested value: # CONFIG_MELAN is not set
Actual value:
Value requested for CONFIG_MGEODEGX1 not in final .config
Requested value: # CONFIG_MGEODEGX1 is not set
Actual value:
Value requested for CONFIG_MGEODE_LX not in final .config
Requested value: # CONFIG_MGEODE_LX is not set
Actual value:
Value requested for CONFIG_MCYRIXIII not in final .config
Requested value: # CONFIG_MCYRIXIII is not set
Actual value:
Value requested for CONFIG_MVIAC3_2 not in final .config
Requested value: # CONFIG_MVIAC3_2 is not set
Actual value:
Value requested for CONFIG_MVIAC7 not in final .config
Requested value: # CONFIG_MVIAC7 is not set
Actual value:
Value requested for CONFIG_X86_GENERIC not in final .config
Requested value: # CONFIG_X86_GENERIC is not set
Actual value:
Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5
Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6
Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_L1_CACHE_SHIFT=5
Actual value: CONFIG_X86_L1_CACHE_SHIFT=6
Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config
Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y
Actual value:
Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config
Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6
Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64
Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config
Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y
Actual value:
Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config
Requested value: CONFIG_CPU_SUP_VORTEX_32=y
Actual value:
Value requested for CONFIG_HPET_TIMER not in final .config
Requested value: # CONFIG_HPET_TIMER is not set
Actual value: CONFIG_HPET_TIMER=y
Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config
Requested value: CONFIG_NR_CPUS_RANGE_END=8
Actual value: CONFIG_NR_CPUS_RANGE_END=512
Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config
Requested value: CONFIG_NR_CPUS_DEFAULT=8
Actual value: CONFIG_NR_CPUS_DEFAULT=64
Value requested for CONFIG_X86_ANCIENT_MCE not in final .config
Requested value: # CONFIG_X86_ANCIENT_MCE is not set
Actual value:
Value requested for CONFIG_X86_LEGACY_VM86 not in final .config
Requested value: # CONFIG_X86_LEGACY_VM86 is not set
Actual value:
Value requested for CONFIG_X86_ESPFIX32 not in final .config
Requested value: CONFIG_X86_ESPFIX32=y
Actual value:
Value requested for CONFIG_TOSHIBA not in final .config
Requested value: # CONFIG_TOSHIBA is not set
Actual value:
Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config
Requested value: # CONFIG_X86_REBOOTFIXUPS is not set
Actual value:
Value requested for CONFIG_MICROCODE_INITRD32 not in final .config
Requested value: CONFIG_MICROCODE_INITRD32=y
Actual value:
Value requested for CONFIG_NOHIGHMEM not in final .config
Requested value: # CONFIG_NOHIGHMEM is not set
Actual value:
Value requested for CONFIG_HIGHMEM4G not in final .config
Requested value: CONFIG_HIGHMEM4G=y
Actual value:
Value requested for CONFIG_HIGHMEM64G not in final .config
Requested value: # CONFIG_HIGHMEM64G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_3G not in final .config
Requested value: CONFIG_VMSPLIT_3G=y
Actual value:
Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_3G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G not in final .config
Requested value: # CONFIG_VMSPLIT_2G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_2G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_1G not in final .config
Requested value: # CONFIG_VMSPLIT_1G is not set
Actual value:
Value requested for CONFIG_PAGE_OFFSET not in final .config
Requested value: CONFIG_PAGE_OFFSET=0xC0000000
Actual value:
Value requested for CONFIG_HIGHMEM not in final .config
Requested value: CONFIG_HIGHMEM=y
Actual value:
Value requested for CONFIG_X86_PAE not in final .config
Requested value: # CONFIG_X86_PAE is not set
Actual value:
Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config
Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y
Actual value:
Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config
Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0
Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
Value requested for CONFIG_HIGHPTE not in final .config
Requested value: # CONFIG_HIGHPTE is not set
Actual value:
Value requested for CONFIG_COMPAT_VDSO not in final .config
Requested value: # CONFIG_COMPAT_VDSO is not set
Actual value:
Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config
Requested value: CONFIG_FUNCTION_PADDING_CFI=0
Actual value: CONFIG_FUNCTION_PADDING_CFI=11
Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config
Requested value: CONFIG_FUNCTION_PADDING_BYTES=4
Actual value: CONFIG_FUNCTION_PADDING_BYTES=16
Value requested for CONFIG_APM not in final .config
Requested value: # CONFIG_APM is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K6 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K6 is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K7 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K7 is not set
Actual value:
Value requested for CONFIG_X86_GX_SUSPMOD not in final .config
Requested value: # CONFIG_X86_GX_SUSPMOD is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set
Actual value:
Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config
Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set
Actual value:
Value requested for CONFIG_X86_LONGRUN not in final .config
Requested value: # CONFIG_X86_LONGRUN is not set
Actual value:
Value requested for CONFIG_X86_LONGHAUL not in final .config
Requested value: # CONFIG_X86_LONGHAUL is not set
Actual value:
Value requested for CONFIG_X86_E_POWERSAVER not in final .config
Requested value: # CONFIG_X86_E_POWERSAVER is not set
Actual value:
Value requested for CONFIG_PCI_GOBIOS not in final .config
Requested value: # CONFIG_PCI_GOBIOS is not set
Actual value:
Value requested for CONFIG_PCI_GOMMCONFIG not in final .config
Requested value: # CONFIG_PCI_GOMMCONFIG is not set
Actual value:
Value requested for CONFIG_PCI_GODIRECT not in final .config
Requested value: # CONFIG_PCI_GODIRECT is not set
Actual value:
Value requested for CONFIG_PCI_GOANY not in final .config
Requested value: CONFIG_PCI_GOANY=y
Actual value:
Value requested for CONFIG_PCI_BIOS not in final .config
Requested value: CONFIG_PCI_BIOS=y
Actual value:
Value requested for CONFIG_ISA not in final .config
Requested value: # CONFIG_ISA is not set
Actual value:
Value requested for CONFIG_SCx200 not in final .config
Requested value: # CONFIG_SCx200 is not set
Actual value:
Value requested for CONFIG_OLPC not in final .config
Requested value: # CONFIG_OLPC is not set
Actual value:
Value requested for CONFIG_ALIX not in final .config
Requested value: # CONFIG_ALIX is not set
Actual value:
Value requested for CONFIG_NET5501 not in final .config
Requested value: # CONFIG_NET5501 is not set
Actual value:
Value requested for CONFIG_GEOS not in final .config
Requested value: # CONFIG_GEOS is not set
Actual value:
Value requested for CONFIG_COMPAT_32 not in final .config
Requested value: CONFIG_COMPAT_32=y
Actual value:
Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config
Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y
Actual value:
Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config
Requested value: CONFIG_ARCH_32BIT_OFF_T=y
Actual value:
Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config
Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
Actual value:
Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config
Requested value: CONFIG_MODULES_USE_ELF_REL=y
Actual value:
Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS=28
Value requested for CONFIG_CLONE_BACKWARDS not in final .config
Requested value: CONFIG_CLONE_BACKWARDS=y
Actual value:
Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config
Requested value: CONFIG_OLD_SIGSUSPEND3=y
Actual value:
Value requested for CONFIG_OLD_SIGACTION not in final .config
Requested value: CONFIG_OLD_SIGACTION=y
Actual value:
Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config
Requested value: CONFIG_ARCH_SPLIT_ARG64=y
Actual value:
Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config
Requested value: CONFIG_FUNCTION_ALIGNMENT=4
Actual value: CONFIG_FUNCTION_ALIGNMENT=16
Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_FLATMEM_MANUAL not in final .config
Requested value: CONFIG_FLATMEM_MANUAL=y
Actual value:
Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config
Requested value: # CONFIG_SPARSEMEM_MANUAL is not set
Actual value:
Value requested for CONFIG_FLATMEM not in final .config
Requested value: CONFIG_FLATMEM=y
Actual value:
Value requested for CONFIG_SPARSEMEM_STATIC not in final .config
Requested value: CONFIG_SPARSEMEM_STATIC=y
Actual value:
Value requested for CONFIG_BOUNCE not in final .config
Requested value: CONFIG_BOUNCE=y
Actual value:
Value requested for CONFIG_KMAP_LOCAL not in final .config
Requested value: CONFIG_KMAP_LOCAL=y
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set
Actual value:
Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config
Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y
Actual value:
Value requested for CONFIG_PCH_PHUB not in final .config
Requested value: # CONFIG_PCH_PHUB is not set
Actual value:
Value requested for CONFIG_SCSI_NSP32 not in final .config
Requested value: # CONFIG_SCSI_NSP32 is not set
Actual value:
Value requested for CONFIG_PATA_CS5520 not in final .config
Requested value: # CONFIG_PATA_CS5520 is not set
Actual value:
Value requested for CONFIG_PATA_CS5530 not in final .config
Requested value: # CONFIG_PATA_CS5530 is not set
Actual value:
Value requested for CONFIG_PATA_CS5535 not in final .config
Requested value: # CONFIG_PATA_CS5535 is not set
Actual value:
Value requested for CONFIG_PATA_CS5536 not in final .config
Requested value: # CONFIG_PATA_CS5536 is not set
Actual value:
Value requested for CONFIG_PATA_SC1200 not in final .config
Requested value: # CONFIG_PATA_SC1200 is not set
Actual value:
Value requested for CONFIG_PCH_GBE not in final .config
Requested value: # CONFIG_PCH_GBE is not set
Actual value:
Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config
Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set
Actual value:
Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config
Requested value: # CONFIG_SERIAL_TIMBERDALE is not set
Actual value:
Value requested for CONFIG_SERIAL_PCH_UART not in final .config
Requested value: # CONFIG_SERIAL_PCH_UART is not set
Actual value:
Value requested for CONFIG_HW_RANDOM_GEODE not in final .config
Requested value: CONFIG_HW_RANDOM_GEODE=y
Actual value:
Value requested for CONFIG_SONYPI not in final .config
Requested value: # CONFIG_SONYPI is not set
Actual value:
Value requested for CONFIG_PC8736x_GPIO not in final .config
Requested value: # CONFIG_PC8736x_GPIO is not set
Actual value:
Value requested for CONFIG_NSC_GPIO not in final .config
Requested value: # CONFIG_NSC_GPIO is not set
Actual value:
Value requested for CONFIG_I2C_EG20T not in final .config
Requested value: # CONFIG_I2C_EG20T is not set
Actual value:
Value requested for CONFIG_SCx200_ACB not in final .config
Requested value: # CONFIG_SCx200_ACB is not set
Actual value:
Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config
Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set
Actual value:
Value requested for CONFIG_SBC8360_WDT not in final .config
Requested value: # CONFIG_SBC8360_WDT is not set
Actual value:
Value requested for CONFIG_SBC7240_WDT not in final .config
Requested value: # CONFIG_SBC7240_WDT is not set
Actual value:
Value requested for CONFIG_MFD_CS5535 not in final .config
Requested value: # CONFIG_MFD_CS5535 is not set
Actual value:
Value requested for CONFIG_AGP_ALI not in final .config
Requested value: # CONFIG_AGP_ALI is not set
Actual value:
Value requested for CONFIG_AGP_ATI not in final .config
Requested value: # CONFIG_AGP_ATI is not set
Actual value:
Value requested for CONFIG_AGP_AMD not in final .config
Requested value: # CONFIG_AGP_AMD is not set
Actual value:
Value requested for CONFIG_AGP_NVIDIA not in final .config
Requested value: # CONFIG_AGP_NVIDIA is not set
Actual value:
Value requested for CONFIG_AGP_SWORKS not in final .config
Requested value: # CONFIG_AGP_SWORKS is not set
Actual value:
Value requested for CONFIG_AGP_EFFICEON not in final .config
Requested value: # CONFIG_AGP_EFFICEON is not set
Actual value:
Value requested for CONFIG_SND_PCM not in final .config
Requested value: CONFIG_SND_PCM=y
Actual value: CONFIG_SND_PCM=m
Value requested for CONFIG_SND_HWDEP not in final .config
Requested value: CONFIG_SND_HWDEP=y
Actual value: CONFIG_SND_HWDEP=m
Value requested for CONFIG_SND_DYNAMIC_MINORS not in final .config
Requested value: # CONFIG_SND_DYNAMIC_MINORS is not set
Actual value: CONFIG_SND_DYNAMIC_MINORS=y
Value requested for CONFIG_SND_CS5530 not in final .config
Requested value: # CONFIG_SND_CS5530 is not set
Actual value:
Value requested for CONFIG_SND_CS5535AUDIO not in final .config
Requested value: # CONFIG_SND_CS5535AUDIO is not set
Actual value:
Value requested for CONFIG_SND_SIS7019 not in final .config
Requested value: # CONFIG_SND_SIS7019 is not set
Actual value:
Value requested for CONFIG_SND_HDA not in final .config
Requested value: CONFIG_SND_HDA=y
Actual value: CONFIG_SND_HDA=m
Value requested for CONFIG_SND_HDA_CORE not in final .config
Requested value: CONFIG_SND_HDA_CORE=y
Actual value: CONFIG_SND_HDA_CORE=m
Value requested for CONFIG_SND_INTEL_DSP_CONFIG not in final .config
Requested value: CONFIG_SND_INTEL_DSP_CONFIG=y
Actual value: CONFIG_SND_INTEL_DSP_CONFIG=m
Value requested for CONFIG_SND_INTEL_SOUNDWIRE_ACPI not in final .config
Requested value: CONFIG_SND_INTEL_SOUNDWIRE_ACPI=y
Actual value: CONFIG_SND_INTEL_SOUNDWIRE_ACPI=m
Value requested for CONFIG_LEDS_OT200 not in final .config
Requested value: # CONFIG_LEDS_OT200 is not set
Actual value:
Value requested for CONFIG_PCH_DMA not in final .config
Requested value: # CONFIG_PCH_DMA is not set
Actual value:
Value requested for CONFIG_CLKSRC_I8253 not in final .config
Requested value: CONFIG_CLKSRC_I8253=y
Actual value:
Value requested for CONFIG_MAILBOX not in final .config
Requested value: # CONFIG_MAILBOX is not set
Actual value: CONFIG_MAILBOX=y
Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config
Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config
Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config
Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config
Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set
Actual value:
Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config
Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
Value requested for CONFIG_AUDIT_GENERIC not in final .config
Requested value: CONFIG_AUDIT_GENERIC=y
Actual value:
Value requested for CONFIG_GENERIC_VDSO_32 not in final .config
Requested value: CONFIG_GENERIC_VDSO_32=y
Actual value:
Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config
Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set
Actual value:
Value requested for CONFIG_DEBUG_HIGHMEM not in final .config
Requested value: # CONFIG_DEBUG_HIGHMEM is not set
Actual value:
Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config
Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
Actual value:
Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config
Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_RETVAL not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y
Actual value:
Value requested for CONFIG_DRM_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_KUNIT_TEST=m
Actual value:
Value requested for CONFIG_DRM_XE_WERROR not in final .config
Requested value: CONFIG_DRM_XE_WERROR=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG not in final .config
Requested value: CONFIG_DRM_XE_DEBUG=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config
Requested value: CONFIG_DRM_XE_DEBUG_MEM=y
Actual value:
Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_XE_KUNIT_TEST=m
Actual value:
++ nproc
+ make -j48 ARCH=i386 olddefconfig
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
#
# configuration written to .config
#
++ nproc
+ make -j48 ARCH=i386
SYNC include/config/auto.conf.cmd
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
GEN Makefile
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
HOSTCC arch/x86/tools/relocs_32.o
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
HOSTCC arch/x86/tools/relocs_64.o
UPD include/generated/uapi/linux/version.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
HOSTCC arch/x86/tools/relocs_common.o
WRAP arch/x86/include/generated/uapi/asm/param.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
HOSTCC scripts/kallsyms
HOSTCC scripts/sorttable
WRAP arch/x86/include/generated/uapi/asm/termbits.h
HOSTCC scripts/asn1_compiler
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
HOSTCC scripts/selinux/genheaders/genheaders
UPD include/generated/compile.h
HOSTCC scripts/selinux/mdp/mdp
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/local64.h
WRAP arch/x86/include/generated/asm/mmiowb.h
WRAP arch/x86/include/generated/asm/module.lds.h
WRAP arch/x86/include/generated/asm/rwonce.h
WRAP arch/x86/include/generated/asm/unaligned.h
HOSTLD arch/x86/tools/relocs
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
UPD scripts/mod/devicetable-offsets.h
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/sumversion.o
HOSTCC scripts/mod/symsearch.o
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
UPD include/generated/asm-offsets.h
CALL /workspace/kernel/scripts/checksyscalls.sh
LDS scripts/module.lds
HOSTCC usr/gen_init_cpio
CC init/main.o
CC certs/system_keyring.o
CC ipc/util.o
CC io_uring/io_uring.o
AS arch/x86/lib/atomic64_cx8_32.o
CC mm/filemap.o
CC security/commoncap.o
CC io_uring/opdef.o
CC security/lsm_syscalls.o
CC init/do_mounts.o
UPD init/utsversion-tmp.h
CC block/bdev.o
CC mm/mempool.o
CC arch/x86/events/core.o
CC ipc/msgutil.o
CC arch/x86/events/amd/core.o
CC io_uring/kbuf.o
CC security/keys/gc.o
AS arch/x86/lib/checksum_32.o
CC arch/x86/pci/i386.o
CC arch/x86/realmode/init.o
CC arch/x86/power/cpu.o
AR arch/x86/crypto/built-in.a
GEN security/selinux/flask.h security/selinux/av_permissions.h
CC arch/x86/video/video-common.o
CC security/integrity/iint.o
CC block/partitions/core.o
AR arch/x86/net/built-in.a
CC lib/math/div64.o
CC lib/zlib_deflate/deflate.o
CC lib/zlib_inflate/inffast.o
AR arch/x86/virt/svm/built-in.a
CC arch/x86/events/intel/core.o
CC lib/lzo/lzo1x_compress.o
CC arch/x86/events/zhaoxin/core.o
AR drivers/cache/built-in.a
CC lib/crypto/mpi/generic_mpih-lshift.o
CC net/core/sock.o
CC security/selinux/avc.o
AR arch/x86/platform/atom/built-in.a
CC arch/x86/mm/pat/set_memory.o
AR virt/lib/built-in.a
CC sound/core/seq/seq.o
AR drivers/irqchip/built-in.a
CC sound/core/seq/seq_lock.o
AR arch/x86/platform/ce4100/built-in.a
CC arch/x86/lib/cmdline.o
CC fs/notify/dnotify/dnotify.o
CC arch/x86/kernel/fpu/init.o
CC sound/core/seq/seq_clientmgr.o
AR virt/built-in.a
CC arch/x86/platform/efi/memmap.o
AR arch/x86/virt/vmx/built-in.a
CC arch/x86/kernel/cpu/mce/core.o
CC kernel/sched/core.o
AR arch/x86/virt/built-in.a
AR drivers/pwm/built-in.a
CC arch/x86/entry/vdso/vma.o
AR drivers/bus/mhi/built-in.a
CC arch/x86/entry/vdso/extable.o
CC io_uring/rsrc.o
CC arch/x86/platform/efi/quirks.o
AR drivers/bus/built-in.a
CC crypto/asymmetric_keys/asymmetric_type.o
CC lib/math/gcd.o
CC drivers/pci/msi/pcidev_msi.o
AS arch/x86/lib/cmpxchg8b_emu.o
CC lib/zlib_inflate/inflate.o
CC lib/math/lcm.o
CC arch/x86/lib/cpu.o
CC lib/math/int_log.o
GEN usr/initramfs_data.cpio
HOSTCC certs/extract-cert
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
CC lib/math/int_pow.o
CC arch/x86/kernel/fpu/bugs.o
AR usr/built-in.a
CC lib/zlib_inflate/infutil.o
CC sound/core/sound.o
CC lib/math/int_sqrt.o
CC arch/x86/kernel/fpu/core.o
CC lib/lzo/lzo1x_decompress_safe.o
AR arch/x86/platform/geode/built-in.a
CC lib/math/reciprocal_div.o
CC lib/crypto/mpi/generic_mpih-mul1.o
CC arch/x86/platform/efi/efi.o
AR arch/x86/video/built-in.a
CC sound/core/init.o
CERT certs/x509_certificate_list
CERT certs/signing_key.x509
AS certs/system_certificates.o
CC arch/x86/lib/delay.o
CC lib/math/rational.o
AS arch/x86/realmode/rm/header.o
CC security/integrity/integrity_audit.o
CC arch/x86/events/probe.o
AR certs/built-in.a
CC arch/x86/pci/init.o
AS arch/x86/realmode/rm/trampoline_32.o
CC mm/oom_kill.o
CC arch/x86/events/utils.o
CC arch/x86/kernel/fpu/regset.o
AS arch/x86/realmode/rm/stack.o
CC security/keys/key.o
AS arch/x86/realmode/rm/reboot.o
AR fs/notify/dnotify/built-in.a
CC drivers/pci/msi/api.o
CC crypto/asymmetric_keys/restrict.o
CC crypto/asymmetric_keys/signature.o
AS arch/x86/realmode/rm/wakeup_asm.o
CC crypto/asymmetric_keys/public_key.o
CC lib/zlib_deflate/deftree.o
CC lib/zlib_inflate/inftrees.o
CC lib/zlib_inflate/inflate_syms.o
CC arch/x86/realmode/rm/wakemain.o
CC arch/x86/realmode/rm/video-mode.o
CC arch/x86/power/hibernate_32.o
CC block/partitions/msdos.o
CC fs/notify/inotify/inotify_fsnotify.o
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
AS arch/x86/entry/vdso/vdso32/note.o
AR arch/x86/events/zhaoxin/built-in.a
AS arch/x86/realmode/rm/copy.o
CC ipc/msg.o
AS arch/x86/entry/vdso/vdso32/system_call.o
AS arch/x86/lib/getuser.o
AS arch/x86/realmode/rm/bioscall.o
AR fs/notify/fanotify/built-in.a
AS arch/x86/entry/vdso/vdso32/sigreturn.o
CC arch/x86/realmode/rm/regs.o
GEN arch/x86/lib/inat-tables.c
CC arch/x86/realmode/rm/video-vga.o
AR arch/x86/platform/iris/built-in.a
CC arch/x86/realmode/rm/video-vesa.o
AR lib/lzo/built-in.a
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
CC arch/x86/platform/intel/iosf_mbi.o
CC init/do_mounts_initrd.o
CC arch/x86/lib/insn-eval.o
AR lib/math/built-in.a
AR arch/x86/platform/intel-mid/built-in.a
CC arch/x86/realmode/rm/video-bios.o
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
AR arch/x86/platform/intel-quark/built-in.a
CC security/min_addr.o
CC security/security.o
CC lib/zlib_deflate/deflate_syms.o
CC crypto/api.o
AR arch/x86/platform/olpc/built-in.a
CC sound/core/seq/seq_memory.o
CC security/lsm_audit.o
CC sound/core/seq/seq_queue.o
CC arch/x86/events/rapl.o
CC sound/core/memory.o
CC arch/x86/events/amd/lbr.o
PASYMS arch/x86/realmode/rm/pasyms.h
LDS arch/x86/realmode/rm/realmode.lds
CC lib/crypto/mpi/generic_mpih-mul2.o
AR lib/zlib_inflate/built-in.a
LD arch/x86/realmode/rm/realmode.elf
CC arch/x86/events/msr.o
CC sound/core/control.o
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
AS arch/x86/realmode/rmpiggy.o
CC sound/core/misc.o
AR arch/x86/realmode/built-in.a
CC security/device_cgroup.o
CC arch/x86/platform/efi/efi_32.o
CC arch/x86/mm/pat/memtype.o
CC io_uring/notif.o
CC crypto/cipher.o
CC arch/x86/pci/pcbios.o
CC security/keys/keyring.o
CC fs/notify/inotify/inotify_user.o
AR arch/x86/platform/scx200/built-in.a
AR security/integrity/built-in.a
CC fs/notify/fsnotify.o
CC net/core/request_sock.o
AR lib/zlib_deflate/built-in.a
ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch]
CC net/core/skbuff.o
CC security/selinux/hooks.o
CC crypto/asymmetric_keys/x509_loader.o
CC drivers/pci/msi/msi.o
CC drivers/pci/msi/irqdomain.o
AR arch/x86/platform/ts5500/built-in.a
CC mm/fadvise.o
AS arch/x86/power/hibernate_asm_32.o
CC kernel/sched/fair.o
AR arch/x86/platform/uv/built-in.a
CC arch/x86/power/hibernate.o
CC kernel/sched/build_policy.o
CC block/partitions/efi.o
HOSTCC arch/x86/entry/vdso/vdso2c
CC security/keys/keyctl.o
CC crypto/asymmetric_keys/x509_public_key.o
CC arch/x86/kernel/cpu/mce/severity.o
CC arch/x86/kernel/fpu/signal.o
AR arch/x86/platform/intel/built-in.a
CC arch/x86/kernel/fpu/xstate.o
CC security/keys/permission.o
CC lib/crypto/mpi/generic_mpih-mul3.o
CC security/keys/process_keys.o
CC init/initramfs.o
CC mm/maccess.o
CC arch/x86/lib/insn.o
CC sound/core/seq/seq_fifo.o
CC drivers/video/console/dummycon.o
CC crypto/compress.o
CC sound/core/device.o
CC crypto/algapi.o
CC init/calibrate.o
CC arch/x86/events/amd/ibs.o
AS arch/x86/platform/efi/efi_stub_32.o
CC arch/x86/pci/mmconfig_32.o
CC ipc/sem.o
CC sound/core/info.o
CC arch/x86/entry/vdso/vdso32-setup.o
CC arch/x86/platform/efi/runtime-map.o
CC arch/x86/lib/kaslr.o
CC arch/x86/mm/pat/memtype_interval.o
CC fs/notify/notification.o
CC mm/page-writeback.o
CC mm/folio-compat.o
CC init/init_task.o
ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch]
AR arch/x86/power/built-in.a
CC crypto/asymmetric_keys/pkcs7_trust.o
AR arch/x86/entry/vsyscall/built-in.a
CC crypto/asymmetric_keys/pkcs7_verify.o
AS arch/x86/entry/entry.o
AR fs/notify/inotify/built-in.a
CC arch/x86/pci/direct.o
CC lib/crypto/mpi/generic_mpih-rshift.o
CC crypto/scatterwalk.o
CC arch/x86/pci/mmconfig-shared.o
CC kernel/sched/build_utility.o
CC arch/x86/lib/memcpy_32.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
OBJCOPY arch/x86/entry/vdso/vdso32.so
CC io_uring/tctx.o
CC security/keys/request_key.o
CC drivers/video/backlight/backlight.o
AR drivers/pci/msi/built-in.a
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
AS arch/x86/lib/memmove_32.o
CC arch/x86/entry/vdso/vdso-image-32.o
CC drivers/pci/pcie/portdrv.o
CC sound/core/seq/seq_prioq.o
CC arch/x86/lib/misc.o
AR block/partitions/built-in.a
CC drivers/pci/pcie/rcec.o
CC block/fops.o
CC drivers/video/console/vgacon.o
CC io_uring/filetable.o
AS arch/x86/entry/entry_32.o
CC arch/x86/lib/pc-conf-reg.o
CC mm/readahead.o
CC arch/x86/kernel/cpu/mce/genpool.o
CC fs/notify/group.o
CC security/selinux/selinuxfs.o
CC block/bio.o
AS arch/x86/lib/putuser.o
AS arch/x86/lib/retpoline.o
AR drivers/pci/pwrctl/built-in.a
AR arch/x86/entry/vdso/built-in.a
CC crypto/asymmetric_keys/x509.asn1.o
CC arch/x86/entry/syscall_32.o
CC arch/x86/lib/string_32.o
CC fs/nfs_common/nfsacl.o
CC drivers/pci/hotplug/pci_hotplug_core.o
CC drivers/pci/hotplug/acpi_pcihp.o
AR arch/x86/mm/pat/built-in.a
CC arch/x86/mm/init.o
CC arch/x86/mm/init_32.o
CC crypto/asymmetric_keys/x509_akid.asn1.o
CC fs/notify/mark.o
CC arch/x86/mm/fault.o
CC arch/x86/events/intel/bts.o
CC crypto/asymmetric_keys/x509_cert_parser.o
CC fs/notify/fdinfo.o
CC arch/x86/lib/strstr_32.o
AR arch/x86/platform/efi/built-in.a
CC arch/x86/lib/usercopy.o
AR arch/x86/platform/built-in.a
CC sound/core/isadma.o
CC lib/crypto/mpi/generic_mpih-sub1.o
CC fs/nfs_common/grace.o
CC sound/core/vmaster.o
AR arch/x86/kernel/fpu/built-in.a
CC init/version.o
CC arch/x86/events/intel/ds.o
AR sound/i2c/other/built-in.a
CC crypto/proc.o
CC net/core/datagram.o
AR sound/i2c/built-in.a
CC net/core/stream.o
CC arch/x86/events/amd/uncore.o
CC sound/core/seq/seq_timer.o
CC security/selinux/netlink.o
AR init/built-in.a
CC io_uring/rw.o
CC arch/x86/lib/usercopy_32.o
CC arch/x86/kernel/cpu/mce/intel.o
AR drivers/video/fbdev/core/built-in.a
CC drivers/pci/pcie/aspm.o
AR drivers/video/fbdev/omap/built-in.a
CC security/keys/request_key_auth.o
AR drivers/video/backlight/built-in.a
CC drivers/pci/pcie/pme.o
CC arch/x86/pci/fixup.o
CC io_uring/net.o
CC io_uring/poll.o
CC io_uring/eventfd.o
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
CC crypto/asymmetric_keys/pkcs7.asn1.o
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
AR drivers/video/fbdev/omap2/omapfb/built-in.a
CC crypto/asymmetric_keys/pkcs7_parser.o
AR drivers/video/fbdev/omap2/built-in.a
CC arch/x86/events/intel/knc.o
CC kernel/locking/mutex.o
CC security/keys/user_defined.o
AR drivers/video/console/built-in.a
CC lib/crypto/mpi/generic_mpih-add1.o
AR drivers/video/fbdev/built-in.a
CC io_uring/uring_cmd.o
CC arch/x86/entry/common.o
CC arch/x86/events/intel/lbr.o
CC arch/x86/lib/msr-smp.o
CC arch/x86/lib/cache-smp.o
CC sound/core/ctljack.o
CC drivers/video/aperture.o
CC block/elevator.o
AR drivers/pci/hotplug/built-in.a
AR fs/nfs_common/built-in.a
CC io_uring/openclose.o
CC arch/x86/mm/ioremap.o
CC arch/x86/events/intel/p4.o
CC crypto/aead.o
CC ipc/shm.o
CC arch/x86/mm/extable.o
CC arch/x86/mm/mmap.o
AR fs/notify/built-in.a
CC fs/iomap/trace.o
CC fs/quota/dquot.o
CC crypto/geniv.o
CC arch/x86/kernel/cpu/mce/amd.o
CC sound/core/seq/seq_system.o
CC arch/x86/lib/msr.o
CC fs/proc/task_mmu.o
CC mm/swap.o
AS arch/x86/entry/thunk.o
CC fs/quota/quota_v2.o
CC net/core/scm.o
CC arch/x86/mm/pgtable.o
AR crypto/asymmetric_keys/built-in.a
CC net/core/gen_stats.o
CC arch/x86/mm/physaddr.o
CC fs/iomap/iter.o
CC net/core/gen_estimator.o
CC block/blk-core.o
CC lib/crypto/mpi/ec.o
AR arch/x86/events/amd/built-in.a
CC arch/x86/kernel/acpi/boot.o
CC arch/x86/pci/acpi.o
CC security/keys/proc.o
CC security/selinux/nlmsgtab.o
CC mm/truncate.o
CC kernel/locking/semaphore.o
AR arch/x86/entry/built-in.a
CC arch/x86/events/intel/p6.o
AR drivers/pci/pcie/built-in.a
CC block/blk-sysfs.o
CC sound/core/seq/seq_ports.o
CC drivers/video/cmdline.o
CC drivers/video/nomodeset.o
AR drivers/pci/controller/mobiveil/built-in.a
AR drivers/pci/controller/plda/built-in.a
AR drivers/pci/controller/dwc/built-in.a
CC arch/x86/kernel/apic/apic.o
AR drivers/pci/controller/built-in.a
CC arch/x86/kernel/kprobes/core.o
CC kernel/locking/rwsem.o
LDS arch/x86/kernel/vmlinux.lds
CC mm/vmscan.o
AR drivers/pci/switch/built-in.a
CC mm/shrinker.o
CC drivers/pci/access.o
CC mm/shmem.o
CC security/selinux/netif.o
CC fs/quota/quota_tree.o
CC security/selinux/netnode.o
CC security/selinux/netport.o
CC crypto/lskcipher.o
CC arch/x86/kernel/kprobes/opt.o
CC arch/x86/mm/tlb.o
AS arch/x86/lib/msr-reg.o
CC kernel/locking/percpu-rwsem.o
CC mm/util.o
CC arch/x86/lib/msr-reg-export.o
CC ipc/syscall.o
CC ipc/ipc_sysctl.o
CC drivers/video/hdmi.o
CC block/blk-flush.o
CC arch/x86/pci/legacy.o
CC security/keys/sysctl.o
CC io_uring/sqpoll.o
AS arch/x86/lib/hweight.o
CC security/selinux/status.o
CC fs/iomap/buffered-io.o
CC io_uring/xattr.o
CC arch/x86/lib/iomem.o
CC sound/core/seq/seq_info.o
CC io_uring/nop.o
CC ipc/mqueue.o
CC arch/x86/pci/irq.o
CC security/keys/keyctl_pkey.o
CC sound/core/jack.o
CC arch/x86/lib/atomic64_32.o
CC lib/crypto/mpi/mpicoder.o
CC arch/x86/events/intel/pt.o
CC crypto/skcipher.o
CC io_uring/fs.o
CC kernel/locking/spinlock.o
CC arch/x86/kernel/acpi/sleep.o
CC block/blk-settings.o
CC fs/iomap/direct-io.o
CC lib/crypto/mpi/mpi-add.o
CC arch/x86/kernel/cpu/mce/threshold.o
CC io_uring/splice.o
CC net/ethernet/eth.o
CC drivers/pci/bus.o
CC arch/x86/kernel/cpu/mtrr/mtrr.o
CC drivers/pci/probe.o
CC fs/proc/inode.o
CC fs/proc/root.o
AR arch/x86/kernel/kprobes/built-in.a
CC mm/mmzone.o
CC arch/x86/kernel/cpu/mtrr/if.o
CC arch/x86/lib/inat.o
CC fs/quota/quota.o
AR drivers/video/built-in.a
AR drivers/idle/built-in.a
CC net/core/net_namespace.o
CC net/core/secure_seq.o
CC arch/x86/pci/common.o
CC sound/core/timer.o
CC arch/x86/mm/cpu_entry_area.o
CC arch/x86/kernel/apic/apic_common.o
CC crypto/seqiv.o
CC kernel/locking/osq_lock.o
AR arch/x86/lib/built-in.a
CC sound/core/seq/seq_dummy.o
AR arch/x86/lib/lib.a
CC crypto/echainiv.o
CC mm/vmstat.o
CC mm/backing-dev.o
CC kernel/power/qos.o
AR kernel/sched/built-in.a
CC net/core/flow_dissector.o
CC arch/x86/kernel/cpu/mtrr/generic.o
AR security/keys/built-in.a
CC kernel/power/main.o
CC kernel/power/console.o
CC kernel/power/process.o
CC ipc/namespace.o
CC lib/lz4/lz4_decompress.o
CC kernel/locking/qspinlock.o
AS arch/x86/kernel/acpi/wakeup_32.o
CC arch/x86/kernel/acpi/cstate.o
CC mm/mm_init.o
CC arch/x86/kernel/apic/apic_noop.o
CC lib/crypto/mpi/mpi-bit.o
CC lib/crypto/mpi/mpi-cmp.o
CC security/selinux/ss/ebitmap.o
CC arch/x86/pci/early.o
CC arch/x86/mm/maccess.o
CC block/blk-ioc.o
AR drivers/char/ipmi/built-in.a
CC kernel/locking/rtmutex_api.o
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC arch/x86/mm/pgprot.o
CC drivers/pci/host-bridge.o
CC arch/x86/kernel/cpu/mtrr/amd.o
CC fs/proc/base.o
CC mm/percpu.o
CC io_uring/sync.o
AR sound/core/seq/built-in.a
CC mm/slab_common.o
CC lib/crypto/memneq.o
CC kernel/locking/qrwlock.o
CC sound/core/hrtimer.o
CC crypto/ahash.o
CC fs/proc/generic.o
CC arch/x86/mm/pgtable_32.o
CC drivers/acpi/acpica/dsargs.o
CC arch/x86/kernel/cpu/mtrr/cyrix.o
CC arch/x86/kernel/apic/ipi.o
CC arch/x86/kernel/apic/vector.o
CC arch/x86/kernel/apic/init.o
CC ipc/mq_sysctl.o
CC arch/x86/events/intel/uncore.o
CC fs/quota/kqid.o
AR arch/x86/kernel/cpu/mce/built-in.a
AR arch/x86/kernel/acpi/built-in.a
AR net/802/built-in.a
CC arch/x86/kernel/cpu/microcode/core.o
CC net/sched/sch_generic.o
CC arch/x86/pci/bus_numa.o
CC sound/core/seq_device.o
CC lib/crypto/utils.o
CC lib/crypto/chacha.o
AR net/ethernet/built-in.a
CC arch/x86/mm/iomap_32.o
CC arch/x86/mm/hugetlbpage.o
CC arch/x86/kernel/cpu/mtrr/centaur.o
CC lib/crypto/mpi/mpi-sub-ui.o
CC drivers/pnp/pnpacpi/core.o
CC security/selinux/ss/hashtab.o
CC drivers/pnp/pnpacpi/rsparser.o
CC arch/x86/kernel/cpu/cacheinfo.o
CC arch/x86/kernel/cpu/scattered.o
AR ipc/built-in.a
CC fs/quota/netlink.o
CC arch/x86/events/intel/uncore_nhmex.o
CC arch/x86/kernel/cpu/topology_common.o
CC lib/crypto/aes.o
CC net/netlink/af_netlink.o
CC drivers/acpi/acpica/dscontrol.o
CC fs/iomap/fiemap.o
CC fs/iomap/seek.o
CC drivers/pci/remove.o
CC drivers/pci/pci.o
CC kernel/power/suspend.o
CC arch/x86/kernel/apic/hw_nmi.o
CC block/blk-map.o
CC [M] sound/core/hwdep.o
AR lib/lz4/built-in.a
CC arch/x86/events/intel/uncore_snb.o
CC drivers/pnp/core.o
CC arch/x86/events/intel/uncore_snbep.o
AR kernel/locking/built-in.a
CC arch/x86/events/intel/uncore_discovery.o
CC arch/x86/kernel/cpu/mtrr/legacy.o
CC drivers/pnp/card.o
CC drivers/pnp/driver.o
CC net/netlink/genetlink.o
CC io_uring/msg_ring.o
CC kernel/printk/printk.o
CC arch/x86/mm/dump_pagetables.o
CC arch/x86/mm/highmem_32.o
CC [M] sound/core/pcm.o
CC net/sched/sch_mq.o
CC arch/x86/pci/amd_bus.o
AS arch/x86/kernel/head_32.o
CC security/selinux/ss/symtab.o
CC [M] sound/core/pcm_native.o
CC net/sched/sch_frag.o
CC mm/compaction.o
CC drivers/acpi/acpica/dsdebug.o
CC crypto/shash.o
CC arch/x86/kernel/cpu/microcode/intel.o
CC mm/show_mem.o
CC arch/x86/kernel/cpu/topology_ext.o
CC lib/crypto/mpi/mpi-div.o
CC lib/crypto/mpi/mpi-inv.o
CC net/core/sysctl_net_core.o
CC kernel/irq/irqdesc.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC security/selinux/ss/sidtab.o
CC net/sched/sch_api.o
CC drivers/acpi/acpica/dsfield.o
CC fs/iomap/swapfile.o
AR fs/quota/built-in.a
CC net/netlink/policy.o
CC drivers/acpi/acpica/dsinit.o
CC drivers/acpi/acpica/dsmethod.o
CC mm/shmem_quota.o
CC mm/interval_tree.o
CC lib/crypto/arc4.o
AR drivers/pnp/pnpacpi/built-in.a
CC fs/proc/array.o
CC kernel/printk/printk_safe.o
CC arch/x86/kernel/cpu/topology_amd.o
CC net/core/dev.o
CC drivers/pnp/resource.o
CC crypto/akcipher.o
CC mm/list_lru.o
CC fs/proc/fd.o
CC arch/x86/events/intel/cstate.o
CC mm/workingset.o
AR arch/x86/mm/built-in.a
CC block/blk-merge.o
AR drivers/amba/built-in.a
CC drivers/pci/pci-driver.o
CC drivers/pci/search.o
AR arch/x86/pci/built-in.a
CC kernel/irq/handle.o
CC lib/crypto/mpi/mpi-mod.o
CC arch/x86/kernel/head32.o
CC fs/proc/proc_tty.o
CC arch/x86/kernel/apic/io_apic.o
CC net/sched/sch_blackhole.o
CC net/sched/cls_api.o
CC kernel/power/hibernate.o
CC io_uring/advise.o
CC arch/x86/kernel/cpu/microcode/amd.o
CC io_uring/epoll.o
CC kernel/irq/manage.o
CC io_uring/statx.o
CC drivers/acpi/acpica/dsmthdat.o
AR drivers/acpi/pmic/built-in.a
CC block/blk-timeout.o
AR drivers/clk/actions/built-in.a
CC drivers/dma/dw/core.o
AR drivers/clk/analogbits/built-in.a
AR net/bpf/built-in.a
CC mm/debug.o
CC net/sched/act_api.o
AR fs/iomap/built-in.a
AR drivers/clk/bcm/built-in.a
CC mm/gup.o
CC fs/kernfs/mount.o
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
CC fs/kernfs/inode.o
AR drivers/clk/ingenic/built-in.a
CC drivers/dma/dw/dw.o
AR drivers/clk/mediatek/built-in.a
CC kernel/printk/nbcon.o
AR drivers/clk/microchip/built-in.a
CC security/selinux/ss/avtab.o
CC security/selinux/ss/policydb.o
CC security/selinux/ss/services.o
AR drivers/clk/mstar/built-in.a
AR drivers/clk/mvebu/built-in.a
AR drivers/clk/ralink/built-in.a
CC drivers/acpi/acpica/dsobject.o
CC drivers/acpi/acpica/dsopcode.o
CC drivers/pnp/manager.o
AR drivers/clk/renesas/built-in.a
CC mm/mmap_lock.o
AR drivers/clk/socfpga/built-in.a
CC lib/crypto/mpi/mpi-mul.o
CC crypto/sig.o
AR drivers/clk/sophgo/built-in.a
CC mm/highmem.o
CC mm/memory.o
CC arch/x86/kernel/cpu/common.o
AR drivers/clk/starfive/built-in.a
CC security/selinux/ss/conditional.o
CC arch/x86/kernel/cpu/rdrand.o
AR drivers/clk/sunxi-ng/built-in.a
AR drivers/clk/sprd/built-in.a
CC security/selinux/ss/mls.o
AR drivers/clk/ti/built-in.a
AR drivers/clk/versatile/built-in.a
CC fs/proc/cmdline.o
AR drivers/soc/apple/built-in.a
CC net/sched/sch_fifo.o
AR drivers/soc/aspeed/built-in.a
AR drivers/clk/xilinx/built-in.a
AR drivers/clk/built-in.a
AR drivers/soc/bcm/built-in.a
CC lib/crypto/gf128mul.o
AR drivers/soc/fsl/built-in.a
CC security/selinux/ss/context.o
AR drivers/soc/fujitsu/built-in.a
CC security/selinux/netlabel.o
CC drivers/acpi/dptf/int340x_thermal.o
CC drivers/acpi/x86/apple.o
AR drivers/soc/hisilicon/built-in.a
CC drivers/acpi/x86/cmos_rtc.o
CC drivers/acpi/x86/lpss.o
AR drivers/soc/imx/built-in.a
CC drivers/acpi/x86/s2idle.o
AR drivers/soc/ixp4xx/built-in.a
AR arch/x86/kernel/cpu/microcode/built-in.a
AR drivers/soc/loongson/built-in.a
CC lib/crypto/blake2s.o
CC kernel/printk/printk_ringbuffer.o
AR drivers/soc/mediatek/built-in.a
CC io_uring/timeout.o
AR drivers/soc/microchip/built-in.a
CC io_uring/fdinfo.o
CC drivers/acpi/acpica/dspkginit.o
AR net/netlink/built-in.a
CC drivers/acpi/acpica/dsutils.o
CC drivers/acpi/acpica/dswexec.o
AR drivers/soc/nuvoton/built-in.a
CC drivers/pci/rom.o
CC fs/kernfs/dir.o
AR drivers/soc/pxa/built-in.a
CC drivers/pnp/support.o
AR arch/x86/events/intel/built-in.a
AR arch/x86/events/built-in.a
AR drivers/soc/amlogic/built-in.a
AR drivers/soc/qcom/built-in.a
AR drivers/soc/renesas/built-in.a
CC lib/crypto/mpi/mpih-cmp.o
CC fs/sysfs/file.o
CC fs/sysfs/dir.o
CC lib/zstd/zstd_decompress_module.o
AR drivers/soc/rockchip/built-in.a
AR drivers/soc/sunxi/built-in.a
CC fs/proc/consoles.o
AR drivers/acpi/dptf/built-in.a
CC drivers/dma/dw/idma32.o
AR drivers/soc/ti/built-in.a
CC kernel/power/snapshot.o
CC drivers/dma/dw/acpi.o
CC drivers/virtio/virtio.o
AR drivers/soc/xilinx/built-in.a
CC drivers/acpi/x86/utils.o
CC crypto/kpp.o
AR drivers/soc/built-in.a
CC net/sched/cls_cgroup.o
CC lib/xz/xz_dec_syms.o
CC net/sched/ematch.o
CC drivers/pci/setup-res.o
CC block/blk-lib.o
CC kernel/irq/spurious.o
CC mm/mincore.o
CC block/blk-mq.o
CC kernel/printk/sysctl.o
CC block/blk-mq-tag.o
CC lib/xz/xz_dec_stream.o
CC drivers/acpi/acpica/dswload.o
CC net/core/dev_addr_lists.o
CC drivers/tty/vt/vt_ioctl.o
CC [M] sound/core/pcm_lib.o
CC arch/x86/kernel/apic/msi.o
CC drivers/pnp/interface.o
CC drivers/tty/vt/vc_screen.o
CC lib/zstd/decompress/huf_decompress.o
AR kernel/printk/built-in.a
CC kernel/power/swap.o
CC lib/zstd/decompress/zstd_ddict.o
CC mm/mlock.o
CC lib/zstd/decompress/zstd_decompress.o
CC lib/crypto/mpi/mpih-div.o
CC kernel/power/user.o
CC drivers/pci/irq.o
CC kernel/rcu/update.o
CC kernel/irq/resend.o
CC kernel/rcu/sync.o
CC lib/zstd/decompress/zstd_decompress_block.o
CC drivers/pnp/quirks.o
CC drivers/acpi/x86/blacklist.o
CC fs/proc/cpuinfo.o
CC drivers/acpi/acpica/dswload2.o
CC fs/proc/devices.o
CC fs/sysfs/symlink.o
CC fs/proc/interrupts.o
CC fs/proc/loadavg.o
AR drivers/dma/dw/built-in.a
CC lib/xz/xz_dec_lzma2.o
CC drivers/dma/hsu/hsu.o
CC drivers/virtio/virtio_ring.o
CC io_uring/cancel.o
CC fs/kernfs/file.o
CC fs/kernfs/symlink.o
AR drivers/dma/idxd/built-in.a
ASN.1 crypto/rsapubkey.asn1.[ch]
CC io_uring/waitid.o
ASN.1 crypto/rsaprivkey.asn1.[ch]
CC kernel/rcu/srcutree.o
CC crypto/rsa.o
CC arch/x86/kernel/cpu/match.o
CC fs/sysfs/mount.o
CC arch/x86/kernel/apic/probe_32.o
CC fs/devpts/inode.o
CC kernel/irq/chip.o
CC drivers/tty/vt/selection.o
CC kernel/power/poweroff.o
CC mm/mmap.o
CC drivers/pci/vpd.o
CC mm/mmu_gather.o
CC drivers/pnp/system.o
CC drivers/acpi/acpica/dswscope.o
AR drivers/acpi/x86/built-in.a
CC kernel/rcu/tree.o
CC lib/zstd/zstd_common_module.o
CC lib/zstd/common/debug.o
CC lib/zstd/common/entropy_common.o
CC fs/proc/meminfo.o
CC drivers/virtio/virtio_anchor.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC fs/netfs/buffered_read.o
AR net/sched/built-in.a
CC block/blk-stat.o
CC lib/crypto/mpi/mpih-mul.o
CC arch/x86/kernel/cpu/bugs.o
CC fs/proc/stat.o
CC drivers/tty/hvc/hvc_console.o
CC fs/ext4/balloc.o
CC fs/proc/uptime.o
CC drivers/acpi/tables.o
CC fs/netfs/buffered_write.o
CC fs/ext4/bitmap.o
CC fs/ext4/block_validity.o
AR arch/x86/kernel/apic/built-in.a
CC fs/proc/util.o
CC lib/xz/xz_dec_bcj.o
CC crypto/rsa_helper.o
CC drivers/acpi/acpica/dswstate.o
CC drivers/acpi/acpica/evevent.o
CC net/core/dst.o
AR drivers/dma/hsu/built-in.a
CC fs/ext4/dir.o
AR drivers/dma/mediatek/built-in.a
CC crypto/rsa-pkcs1pad.o
CC fs/sysfs/group.o
AR drivers/pnp/built-in.a
AR drivers/dma/qcom/built-in.a
CC io_uring/register.o
AR drivers/dma/stm32/built-in.a
CC arch/x86/kernel/ebda.o
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
AR security/selinux/built-in.a
CC arch/x86/kernel/platform-quirks.o
CC arch/x86/kernel/process_32.o
CC lib/crypto/mpi/mpi-pow.o
CC drivers/dma/dmaengine.o
AR security/built-in.a
AR kernel/power/built-in.a
CC drivers/tty/vt/keyboard.o
CC lib/crypto/mpi/mpiutil.o
AR kernel/livepatch/built-in.a
AR fs/devpts/built-in.a
CC lib/crypto/blake2s-generic.o
CC lib/crypto/sha1.o
CC [M] sound/core/pcm_misc.o
CC drivers/virtio/virtio_pci_legacy_dev.o
AR fs/kernfs/built-in.a
CC arch/x86/kernel/signal.o
CC mm/mprotect.o
AR lib/xz/built-in.a
CC [M] sound/core/pcm_memory.o
CC io_uring/truncate.o
CC mm/mremap.o
CC drivers/pci/setup-bus.o
CC [M] sound/core/memalloc.o
CC kernel/irq/dummychip.o
CC kernel/dma/mapping.o
CC [M] sound/core/pcm_timer.o
CC drivers/acpi/acpica/evgpe.o
CC fs/proc/version.o
CC fs/proc/softirqs.o
CC drivers/pci/vc.o
CC drivers/pci/mmap.o
CC drivers/pci/devres.o
CC fs/ext4/ext4_jbd2.o
CC lib/zstd/common/error_private.o
CC lib/crypto/sha256.o
CC drivers/acpi/acpica/evgpeblk.o
CC fs/ext4/extents.o
CC lib/zstd/common/fse_decompress.o
CC lib/zstd/common/zstd_common.o
AR fs/sysfs/built-in.a
AR drivers/tty/hvc/built-in.a
CC arch/x86/kernel/signal_32.o
CC drivers/pci/proc.o
CC io_uring/memmap.o
CC kernel/dma/direct.o
CC drivers/tty/serial/8250/8250_core.o
CC fs/jbd2/transaction.o
CC drivers/tty/serial/8250/8250_platform.o
CC crypto/acompress.o
AR lib/crypto/mpi/built-in.a
CC fs/jbd2/commit.o
CC kernel/irq/devres.o
CC fs/jbd2/recovery.o
CC lib/dim/dim.o
CC fs/jbd2/checkpoint.o
CC fs/netfs/direct_read.o
CC fs/netfs/direct_write.o
LD [M] sound/core/snd-hwdep.o
CC drivers/virtio/virtio_pci_modern.o
CC drivers/virtio/virtio_pci_common.o
CC drivers/virtio/virtio_pci_legacy.o
CC fs/proc/namespaces.o
CC drivers/tty/tty_io.o
AR drivers/tty/ipwireless/built-in.a
CC drivers/acpi/acpica/evgpeinit.o
CC drivers/dma/virt-dma.o
CC drivers/dma/acpi-dma.o
CC lib/fonts/fonts.o
CC lib/argv_split.o
CC lib/fonts/font_8x16.o
CC kernel/irq/autoprobe.o
AR lib/zstd/built-in.a
CC lib/bug.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC arch/x86/kernel/traps.o
AR sound/core/built-in.a
AR lib/crypto/built-in.a
LD [M] sound/core/snd-pcm.o
CC arch/x86/kernel/idt.o
CC drivers/tty/serial/8250/8250_pnp.o
CC lib/dim/net_dim.o
AR sound/drivers/opl3/built-in.a
CC kernel/irq/irqdomain.o
CC drivers/virtio/virtio_pci_admin_legacy_io.o
AR sound/drivers/opl4/built-in.a
AR sound/drivers/mpu401/built-in.a
CC fs/ext4/extents_status.o
CC kernel/dma/ops_helpers.o
CC kernel/irq/proc.o
AR sound/drivers/vx/built-in.a
AR sound/drivers/pcsp/built-in.a
AR sound/drivers/built-in.a
AR sound/isa/ad1816a/built-in.a
CC kernel/irq/migration.o
AR sound/isa/ad1848/built-in.a
CC kernel/irq/cpuhotplug.o
CC drivers/acpi/acpica/evgpeutil.o
AR sound/isa/cs423x/built-in.a
AR lib/fonts/built-in.a
CC mm/msync.o
CC fs/ext4/file.o
CC fs/ext4/fsmap.o
AR sound/isa/es1688/built-in.a
AR sound/isa/galaxy/built-in.a
AR sound/isa/gus/built-in.a
CC fs/ext4/fsync.o
CC io_uring/io-wq.o
AR sound/isa/msnd/built-in.a
CC lib/buildid.o
CC io_uring/futex.o
CC drivers/tty/vt/vt.o
AR sound/isa/opti9xx/built-in.a
CC drivers/acpi/acpica/evglock.o
AR sound/isa/sb/built-in.a
CC crypto/scompress.o
AR sound/isa/wavefront/built-in.a
AR sound/pci/ac97/built-in.a
AR sound/pci/ali5451/built-in.a
AR sound/isa/wss/built-in.a
CC block/blk-mq-sysfs.o
AR sound/isa/built-in.a
AR sound/pci/asihpi/built-in.a
AR sound/ppc/built-in.a
CC fs/proc/self.o
AR sound/pci/au88x0/built-in.a
AR sound/pci/aw2/built-in.a
AR sound/pci/ctxfi/built-in.a
CC kernel/irq/pm.o
CC drivers/acpi/acpica/evhandler.o
AR sound/pci/ca0106/built-in.a
CC block/blk-mq-cpumap.o
CC kernel/irq/msi.o
AR sound/pci/cs46xx/built-in.a
CC drivers/pci/pci-sysfs.o
CC drivers/acpi/acpica/evmisc.o
CC drivers/acpi/acpica/evregion.o
AR sound/pci/cs5535audio/built-in.a
AR drivers/dma/built-in.a
CC arch/x86/kernel/irq.o
CC arch/x86/kernel/irq_32.o
CC kernel/irq/affinity.o
AR sound/pci/lola/built-in.a
CC fs/jbd2/revoke.o
CC fs/jbd2/journal.o
CC fs/netfs/io.o
CC fs/ext4/hash.o
AR sound/pci/lx6464es/built-in.a
CC fs/ramfs/inode.o
AR sound/pci/echoaudio/built-in.a
CC arch/x86/kernel/cpu/cpuid-deps.o
CC fs/ext4/ialloc.o
AR sound/pci/emu10k1/built-in.a
CC drivers/tty/serial/8250/8250_rsa.o
CC drivers/virtio/virtio_input.o
CC fs/ext4/indirect.o
CC fs/hugetlbfs/inode.o
CC kernel/dma/dummy.o
AR sound/pci/hda/built-in.a
CC fs/netfs/iterator.o
CC [M] sound/pci/hda/hda_bind.o
CC [M] sound/pci/hda/hda_codec.o
CC drivers/acpi/acpica/evrgnini.o
CC drivers/acpi/acpica/evsci.o
CC fs/netfs/locking.o
CC lib/dim/rdma_dim.o
CC drivers/acpi/acpica/evxface.o
CC lib/clz_tab.o
CC mm/page_vma_mapped.o
CC drivers/virtio/virtio_dma_buf.o
CC arch/x86/kernel/dumpstack_32.o
CC arch/x86/kernel/time.o
CC arch/x86/kernel/cpu/umwait.o
CC fs/proc/thread_self.o
CC net/ethtool/ioctl.o
CC net/ethtool/common.o
CC fs/ext4/inline.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC block/blk-mq-sched.o
CC kernel/rcu/rcu_segcblist.o
CC crypto/algboss.o
CC drivers/acpi/acpica/evxfevnt.o
CC drivers/pci/slot.o
CC kernel/entry/common.o
CC kernel/entry/syscall_user_dispatch.o
CC fs/proc/proc_sysctl.o
CC drivers/acpi/acpica/evxfgpe.o
CC kernel/dma/remap.o
CC fs/ramfs/file-mmu.o
CC drivers/tty/serial/8250/8250_port.o
AR lib/dim/built-in.a
CC drivers/tty/n_tty.o
CC lib/cmdline.o
CC drivers/tty/tty_ioctl.o
CC arch/x86/kernel/cpu/powerflags.o
CC drivers/pci/pci-acpi.o
CC arch/x86/kernel/ioport.o
CC net/core/netevent.o
CC kernel/module/main.o
CC lib/cpumask.o
CC kernel/irq/matrix.o
CC kernel/module/strict_rwx.o
CC net/core/neighbour.o
AR drivers/virtio/built-in.a
CC io_uring/napi.o
CC crypto/testmgr.o
CC drivers/acpi/acpica/evxfregn.o
CC [M] sound/pci/hda/hda_jack.o
CC [M] sound/pci/hda/hda_auto_parser.o
CC arch/x86/kernel/dumpstack.o
CC arch/x86/kernel/nmi.o
CC mm/pagewalk.o
COPY drivers/tty/vt/defkeymap.c
CC arch/x86/kernel/ldt.o
CC crypto/cmac.o
CC fs/netfs/main.o
CC arch/x86/kernel/cpu/topology.o
AR sound/pci/ice1712/built-in.a
AR kernel/dma/built-in.a
CC fs/proc/proc_net.o
AR sound/pci/korg1212/built-in.a
AR fs/hugetlbfs/built-in.a
CC net/core/rtnetlink.o
AR sound/pci/mixart/built-in.a
CC fs/fat/cache.o
AR sound/pci/nm256/built-in.a
CC fs/fat/dir.o
CC fs/fat/fatent.o
AR fs/ramfs/built-in.a
AR kernel/rcu/built-in.a
CC drivers/acpi/acpica/exconcat.o
CC drivers/acpi/acpica/exconfig.o
CC drivers/acpi/acpica/exconvrt.o
CC arch/x86/kernel/cpu/proc.o
CC arch/x86/kernel/cpu/feat_ctl.o
AR sound/pci/oxygen/built-in.a
CC crypto/hmac.o
CC crypto/crypto_null.o
CC lib/ctype.o
CC fs/fat/file.o
CC net/core/utils.o
AR sound/pci/pcxhr/built-in.a
CC lib/dec_and_lock.o
CC fs/proc/kcore.o
CC block/ioctl.o
AR sound/pci/riptide/built-in.a
CC mm/pgtable-generic.o
CC mm/rmap.o
AR kernel/entry/built-in.a
CC arch/x86/kernel/setup.o
CC net/core/link_watch.o
CC lib/decompress.o
CC lib/decompress_bunzip2.o
CC lib/decompress_inflate.o
CC drivers/pci/iomap.o
CC mm/vmalloc.o
CC crypto/md5.o
CC block/genhd.o
AR sound/pci/rme9652/built-in.a
CC drivers/acpi/acpica/excreate.o
CC drivers/acpi/acpica/exdebug.o
CC fs/ext4/inode.o
CC lib/decompress_unlz4.o
CC drivers/tty/vt/consolemap.o
HOSTCC drivers/tty/vt/conmakehash
CC [M] sound/pci/hda/hda_sysfs.o
CC arch/x86/kernel/cpu/intel.o
CC fs/ext4/ioctl.o
CC crypto/sha256_generic.o
CC [M] sound/pci/hda/hda_controller.o
CC crypto/sha512_generic.o
CC crypto/sha3_generic.o
AR sound/pci/trident/built-in.a
CC crypto/ecb.o
AR sound/pci/ymfpci/built-in.a
CC net/core/filter.o
CC kernel/module/kmod.o
CC crypto/cbc.o
CC arch/x86/kernel/x86_init.o
CC drivers/pci/quirks.o
CC mm/process_vm_access.o
CC crypto/ctr.o
AR kernel/irq/built-in.a
CC fs/fat/inode.o
CC net/core/sock_diag.o
CC drivers/tty/serial/8250/8250_dma.o
CC drivers/acpi/acpica/exdump.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC block/ioprio.o
CC block/badblocks.o
AR fs/jbd2/built-in.a
AR sound/pci/vx222/built-in.a
CC fs/isofs/namei.o
CC drivers/acpi/osi.o
CC drivers/tty/vt/defkeymap.o
CC lib/decompress_unlzma.o
CC arch/x86/kernel/i8259.o
CC kernel/module/tree_lookup.o
CC fs/proc/vmcore.o
CC fs/proc/kmsg.o
AR io_uring/built-in.a
CC fs/ext4/mballoc.o
CC drivers/tty/tty_ldisc.o
CC net/ethtool/netlink.o
CC arch/x86/kernel/irqinit.o
CC lib/decompress_unlzo.o
CC mm/page_alloc.o
CC fs/isofs/inode.o
CC drivers/acpi/acpica/exfield.o
CC net/ethtool/bitset.o
CC kernel/time/time.o
CC fs/netfs/misc.o
CC fs/netfs/objects.o
CC kernel/time/timer.o
CC fs/isofs/dir.o
CC kernel/futex/core.o
CC fs/fat/misc.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC drivers/tty/vt/consolemap_deftbl.o
CC net/netfilter/core.o
AR drivers/tty/vt/built-in.a
CC arch/x86/kernel/jump_label.o
CC crypto/gcm.o
CC block/blk-rq-qos.o
CC fs/ext4/migrate.o
CC fs/nfs/client.o
CC fs/nfs/dir.o
CC fs/proc/page.o
CC fs/nfs/file.o
CC mm/init-mm.o
CC fs/exportfs/expfs.o
CC arch/x86/kernel/cpu/tsx.o
CC arch/x86/kernel/irq_work.o
CC kernel/module/kallsyms.o
CC drivers/acpi/acpica/exfldio.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC mm/memblock.o
CC fs/isofs/util.o
CC lib/decompress_unxz.o
CC fs/lockd/clntlock.o
CC lib/decompress_unzstd.o
CC arch/x86/kernel/probe_roms.o
CC mm/slub.o
CC [M] sound/pci/hda/hda_proc.o
CC [M] sound/pci/hda/hda_hwdep.o
CC arch/x86/kernel/sys_ia32.o
CC arch/x86/kernel/ksysfs.o
CC arch/x86/kernel/bootflag.o
CC arch/x86/kernel/e820.o
CC arch/x86/kernel/cpu/intel_epb.o
CC arch/x86/kernel/pci-dma.o
CC fs/fat/nfs.o
CC kernel/time/hrtimer.o
AR fs/exportfs/built-in.a
CC drivers/tty/tty_buffer.o
CC fs/nls/nls_base.o
CC drivers/acpi/acpica/exmisc.o
CC drivers/tty/tty_port.o
CC mm/madvise.o
CC kernel/futex/syscalls.o
CC block/disk-events.o
CC fs/netfs/write_collect.o
CC block/blk-ia-ranges.o
CC drivers/tty/serial/8250/8250_early.o
AR fs/proc/built-in.a
CC block/early-lookup.o
CC drivers/acpi/acpica/exmutex.o
CC crypto/ccm.o
CC [M] sound/pci/hda/patch_hdmi.o
CC fs/isofs/rock.o
CC lib/dump_stack.o
CC kernel/module/procfs.o
CC drivers/tty/tty_mutex.o
CC net/ethtool/strset.o
CC arch/x86/kernel/quirks.o
CC arch/x86/kernel/cpu/amd.o
CC net/ethtool/linkinfo.o
CC drivers/pci/pci-label.o
CC fs/isofs/export.o
CC fs/nls/nls_cp437.o
CC arch/x86/kernel/kdebugfs.o
CC fs/ext4/mmp.o
CC arch/x86/kernel/cpu/hygon.o
CC drivers/tty/serial/8250/8250_exar.o
CC drivers/acpi/acpica/exnames.o
CC net/netfilter/nf_log.o
CC arch/x86/kernel/alternative.o
CC fs/fat/namei_vfat.o
CC fs/fat/namei_msdos.o
CC fs/lockd/clntproc.o
CC net/ipv4/netfilter/nf_defrag_ipv4.o
CC drivers/tty/tty_ldsem.o
CC kernel/futex/pi.o
CC kernel/futex/requeue.o
CC kernel/futex/waitwake.o
CC block/bounce.o
CC kernel/module/sysfs.o
CC fs/nls/nls_ascii.o
CC lib/earlycpio.o
CC drivers/tty/tty_baudrate.o
CC arch/x86/kernel/i8253.o
CC arch/x86/kernel/hw_breakpoint.o
CC arch/x86/kernel/tsc.o
CC fs/ext4/move_extent.o
CC lib/extable.o
CC fs/isofs/joliet.o
CC drivers/pci/vgaarb.o
CC fs/ext4/namei.o
CC drivers/acpi/acpica/exoparg1.o
CC kernel/cgroup/cgroup.o
CC drivers/tty/serial/serial_core.o
CC fs/netfs/write_issue.o
AR fs/unicode/built-in.a
CC kernel/trace/trace_clock.o
CC kernel/trace/ring_buffer.o
CC net/core/dev_ioctl.o
CC crypto/aes_generic.o
CC kernel/trace/trace.o
CC fs/nls/nls_iso8859-1.o
CC fs/lockd/clntxdr.o
CC kernel/time/timekeeping.o
CC arch/x86/kernel/cpu/centaur.o
CC net/ethtool/linkmodes.o
CC fs/nfs/getroot.o
CC fs/autofs/init.o
CC arch/x86/kernel/cpu/transmeta.o
CC arch/x86/kernel/cpu/zhaoxin.o
CC arch/x86/kernel/cpu/vortex.o
CC lib/flex_proportions.o
CC lib/idr.o
CC fs/nfs/inode.o
CC lib/irq_regs.o
CC drivers/tty/serial/8250/8250_lpss.o
AR kernel/module/built-in.a
CC drivers/tty/serial/8250/8250_mid.o
AR kernel/futex/built-in.a
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC drivers/tty/serial/8250/8250_pci.o
CC kernel/time/ntp.o
CC kernel/trace/trace_output.o
CC drivers/acpi/acpica/exoparg2.o
CC fs/isofs/compress.o
CC fs/nls/nls_utf8.o
CC lib/is_single_threaded.o
CC net/netfilter/nf_queue.o
CC lib/klist.o
CC arch/x86/kernel/tsc_msr.o
AR fs/fat/built-in.a
CC arch/x86/kernel/io_delay.o
CC block/bsg.o
CC block/blk-cgroup.o
CC block/blk-ioprio.o
CC arch/x86/kernel/rtc.o
CC fs/ext4/page-io.o
CC lib/kobject.o
CC net/ipv4/netfilter/nf_reject_ipv4.o
CC [M] sound/pci/hda/hda_eld.o
CC crypto/crc32c_generic.o
AR fs/nls/built-in.a
CC net/ipv4/netfilter/ip_tables.o
CC kernel/trace/trace_seq.o
CC drivers/acpi/acpica/exoparg3.o
CC kernel/time/clocksource.o
AR drivers/pci/built-in.a
CC drivers/tty/tty_jobctrl.o
AR sound/arm/built-in.a
CC mm/page_io.o
CC drivers/acpi/acpica/exoparg6.o
CC mm/swap_state.o
AR sound/sh/built-in.a
CC fs/autofs/inode.o
CC crypto/authenc.o
CC crypto/authencesn.o
CC lib/kobject_uevent.o
CC drivers/char/hw_random/core.o
CC drivers/char/agp/backend.o
CC drivers/char/mem.o
AR fs/netfs/built-in.a
CC drivers/char/agp/generic.o
CC arch/x86/kernel/cpu/vmware.o
CC drivers/char/random.o
CC fs/lockd/host.o
CC net/ethtool/rss.o
CC drivers/acpi/acpica/exprep.o
AR fs/isofs/built-in.a
CC fs/ext4/readpage.o
CC block/blk-iolatency.o
CC net/ethtool/linkstate.o
CC fs/lockd/svc.o
CC kernel/time/jiffies.o
CC drivers/acpi/acpica/exregion.o
CC fs/nfs/super.o
CC kernel/cgroup/rstat.o
CC net/netfilter/nf_sockopt.o
CC fs/ext4/resize.o
CC [M] sound/pci/hda/hda_intel.o
CC fs/9p/vfs_super.o
CC kernel/time/timer_list.o
CC mm/swapfile.o
CC mm/swap_slots.o
CC drivers/tty/serial/8250/8250_pericom.o
CC net/core/tso.o
CC net/core/sock_reuseport.o
CC drivers/tty/n_null.o
CC fs/ext4/super.o
CC arch/x86/kernel/cpu/hypervisor.o
CC kernel/bpf/core.o
CC fs/autofs/root.o
CC drivers/char/hw_random/intel-rng.o
CC drivers/acpi/acpica/exresnte.o
CC net/netfilter/utils.o
CC net/xfrm/xfrm_policy.o
CC net/xfrm/xfrm_state.o
CC net/xfrm/xfrm_hash.o
CC kernel/trace/trace_stat.o
CC kernel/trace/trace_printk.o
CC arch/x86/kernel/cpu/mshyperv.o
CC drivers/acpi/acpica/exresolv.o
CC crypto/lzo.o
CC fs/9p/vfs_inode.o
CC crypto/lzo-rle.o
CC lib/logic_pio.o
CC drivers/char/agp/isoch.o
CC drivers/char/misc.o
CC arch/x86/kernel/resource.o
CC drivers/tty/serial/serial_base_bus.o
CC arch/x86/kernel/cpu/debugfs.o
CC drivers/tty/serial/serial_ctrl.o
CC kernel/cgroup/namespace.o
CC net/ethtool/debug.o
CC kernel/time/timeconv.o
CC net/unix/af_unix.o
CC drivers/tty/pty.o
CC drivers/tty/tty_audit.o
CC fs/ext4/symlink.o
CC net/ipv4/netfilter/iptable_filter.o
AS arch/x86/kernel/irqflags.o
AR drivers/tty/serial/8250/built-in.a
CC drivers/acpi/acpica/exresop.o
CC arch/x86/kernel/static_call.o
CC drivers/acpi/acpica/exserial.o
CC fs/lockd/svclock.o
AR drivers/iommu/amd/built-in.a
CC fs/lockd/svcshare.o
AR drivers/iommu/intel/built-in.a
AR drivers/iommu/arm/arm-smmu/built-in.a
CC drivers/char/hw_random/amd-rng.o
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
CC net/xfrm/xfrm_input.o
AR drivers/iommu/arm/built-in.a
CC drivers/tty/sysrq.o
CC fs/lockd/svcproc.o
CC block/blk-iocost.o
CC kernel/time/timecounter.o
AR drivers/iommu/iommufd/built-in.a
CC kernel/time/alarmtimer.o
CC lib/maple_tree.o
CC drivers/iommu/iommu.o
CC crypto/rng.o
CC drivers/char/agp/amd64-agp.o
CC drivers/char/agp/intel-agp.o
CC fs/autofs/symlink.o
LD [M] sound/pci/hda/snd-hda-codec.o
CC drivers/iommu/iommu-traces.o
CC net/ethtool/wol.o
CC kernel/time/posix-timers.o
CC drivers/char/agp/intel-gtt.o
CC net/core/fib_notifier.o
CC drivers/tty/serial/serial_port.o
CC net/ethtool/features.o
CC drivers/acpi/acpica/exstore.o
AR fs/hostfs/built-in.a
CC fs/autofs/waitq.o
CC net/ethtool/privflags.o
CC kernel/cgroup/cgroup-v1.o
CC net/ipv6/netfilter/ip6_tables.o
CC kernel/cgroup/freezer.o
LD [M] sound/pci/hda/snd-hda-codec-hdmi.o
CC kernel/trace/pid_list.o
LD [M] sound/pci/hda/snd-hda-intel.o
AR sound/pci/built-in.a
CC net/netfilter/nfnetlink.o
CC net/packet/af_packet.o
CC fs/ext4/sysfs.o
AR sound/synth/emux/built-in.a
CC fs/9p/vfs_inode_dotl.o
AR sound/synth/built-in.a
CC net/ethtool/rings.o
CC net/ethtool/channels.o
CC drivers/char/hw_random/geode-rng.o
AR sound/usb/misc/built-in.a
AR sound/usb/usx2y/built-in.a
AR sound/usb/caiaq/built-in.a
CC drivers/acpi/acpica/exstoren.o
AR sound/usb/6fire/built-in.a
CC fs/nfs/io.o
AR sound/usb/hiface/built-in.a
AR sound/usb/bcd2000/built-in.a
CC fs/nfs/direct.o
AR sound/usb/built-in.a
CC net/ipv4/netfilter/iptable_mangle.o
CC kernel/events/core.o
AR sound/firewire/built-in.a
AR sound/sparc/built-in.a
AR sound/spi/built-in.a
AR sound/parisc/built-in.a
AR net/dsa/built-in.a
CC net/ethtool/coalesce.o
CC drivers/acpi/acpica/exstorob.o
AR sound/pcmcia/vx/built-in.a
CC drivers/char/virtio_console.o
AR sound/pcmcia/pdaudiocf/built-in.a
CC drivers/char/hpet.o
AR sound/pcmcia/built-in.a
CC crypto/drbg.o
CC drivers/tty/serial/earlycon.o
CC lib/memcat_p.o
AR sound/mips/built-in.a
CC fs/nfs/pagelist.o
AR sound/soc/built-in.a
AR sound/atmel/built-in.a
CC fs/nfs/read.o
CC fs/lockd/svcsubs.o
AR sound/hda/built-in.a
CC fs/lockd/mon.o
CC [M] sound/hda/hda_bus_type.o
CC [M] sound/hda/hdac_bus.o
CC drivers/char/hw_random/via-rng.o
CC fs/autofs/expire.o
AR drivers/char/agp/built-in.a
CC drivers/iommu/iommu-sysfs.o
CC arch/x86/kernel/process.o
CC [M] sound/hda/hdac_device.o
CC mm/dmapool.o
CC lib/nmi_backtrace.o
CC lib/objpool.o
CC lib/plist.o
CC kernel/trace/trace_sched_switch.o
CC fs/lockd/trace.o
CC drivers/acpi/acpica/exsystem.o
CC drivers/char/nvram.o
CC arch/x86/kernel/ptrace.o
CC kernel/time/posix-cpu-timers.o
CC fs/ext4/xattr.o
CC fs/9p/vfs_addr.o
CC net/core/xdp.o
CC kernel/cgroup/legacy_freezer.o
CC fs/debugfs/inode.o
AR drivers/char/hw_random/built-in.a
AR sound/x86/built-in.a
CC net/xfrm/xfrm_output.o
CC drivers/iommu/dma-iommu.o
CC net/netfilter/nfnetlink_log.o
AR drivers/tty/serial/built-in.a
CC fs/debugfs/file.o
AR drivers/tty/built-in.a
CC arch/x86/kernel/tls.o
CC arch/x86/kernel/step.o
CC drivers/acpi/acpica/extrace.o
CC drivers/acpi/acpica/exutils.o
CC crypto/jitterentropy.o
CC arch/x86/kernel/i8237.o
CC net/ipv4/netfilter/ipt_REJECT.o
CC crypto/jitterentropy-kcapi.o
CC net/sunrpc/auth_gss/auth_gss.o
CC net/sunrpc/auth_gss/gss_generic_token.o
CC net/unix/garbage.o
CC kernel/cgroup/pids.o
AR kernel/bpf/built-in.a
CC mm/hugetlb.o
CC net/ipv6/netfilter/ip6table_filter.o
CC net/ipv6/netfilter/ip6table_mangle.o
CC [M] net/ipv4/netfilter/iptable_nat.o
CC net/ethtool/pause.o
CC fs/autofs/dev-ioctl.o
CC net/sunrpc/auth_gss/gss_mech_switch.o
CC net/sunrpc/clnt.o
CC net/sunrpc/xprt.o
CC net/unix/sysctl_net_unix.o
CC drivers/acpi/acpica/hwacpi.o
CC net/sunrpc/socklib.o
AR drivers/char/built-in.a
CC [M] sound/hda/hdac_sysfs.o
CC net/sunrpc/xprtsock.o
AR sound/xen/built-in.a
CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
CC net/ipv6/netfilter/nf_conntrack_reasm.o
CC drivers/iommu/iova.o
CC fs/9p/vfs_file.o
CC crypto/ghash-generic.o
CC fs/nfs/symlink.o
CC net/ipv6/netfilter/nf_reject_ipv6.o
CC fs/lockd/xdr.o
CC fs/lockd/clnt4xdr.o
CC kernel/trace/trace_nop.o
CC kernel/time/posix-clock.o
CC kernel/cgroup/rdma.o
CC drivers/acpi/osl.o
CC block/mq-deadline.o
CC drivers/acpi/utils.o
CC drivers/acpi/acpica/hwesleep.o
AR fs/debugfs/built-in.a
CC kernel/cgroup/cpuset.o
CC block/kyber-iosched.o
CC fs/9p/vfs_dir.o
CC net/xfrm/xfrm_sysctl.o
CC kernel/cgroup/misc.o
CC net/ethtool/eee.o
CC kernel/cgroup/debug.o
AR fs/autofs/built-in.a
CC net/netfilter/nf_conntrack_core.o
CC net/core/flow_offload.o
CC kernel/fork.o
CC net/core/gro.o
CC crypto/hash_info.o
CC kernel/exec_domain.o
CC crypto/rsapubkey.asn1.o
CC lib/radix-tree.o
CC crypto/rsaprivkey.asn1.o
CC net/ipv6/netfilter/ip6t_ipv6header.o
AR net/unix/built-in.a
CC net/ethtool/tsinfo.o
CC net/xfrm/xfrm_replay.o
CC drivers/acpi/acpica/hwgpe.o
CC net/ethtool/cabletest.o
AR crypto/built-in.a
CC [M] sound/hda/hdac_regmap.o
CC fs/9p/vfs_dentry.o
AR net/ipv4/netfilter/built-in.a
AR drivers/iommu/built-in.a
CC net/ipv4/route.o
CC fs/nfs/unlink.o
AR net/packet/built-in.a
CC drivers/acpi/reboot.o
CC kernel/trace/blktrace.o
CC fs/ext4/xattr_hurd.o
CC fs/lockd/xdr4.o
CC fs/lockd/svc4proc.o
CC fs/lockd/procfs.o
CC kernel/time/itimer.o
CC net/sunrpc/sched.o
CC net/sunrpc/auth.o
CC net/ipv6/netfilter/ip6t_REJECT.o
CC fs/tracefs/inode.o
CC [M] fs/efivarfs/inode.o
CC fs/tracefs/event_inode.o
CC drivers/acpi/acpica/hwregs.o
CC fs/nfs/write.o
CC fs/open.o
CC fs/read_write.o
CC fs/9p/v9fs.o
CC [M] fs/efivarfs/file.o
CC [M] fs/efivarfs/super.o
CC [M] fs/efivarfs/vars.o
CC fs/9p/fid.o
CC fs/9p/xattr.o
CC net/xfrm/xfrm_device.o
CC net/sunrpc/auth_gss/svcauth_gss.o
CC [M] sound/hda/hdac_controller.o
CC [M] sound/hda/hdac_stream.o
CC [M] sound/hda/array.o
CC net/ethtool/tunnels.o
AR net/wireless/tests/built-in.a
CC net/wireless/core.o
CC drivers/acpi/acpica/hwsleep.o
CC [M] sound/hda/hdmi_chmap.o
CC drivers/acpi/nvs.o
CC kernel/time/clockevents.o
CC net/netlabel/netlabel_user.o
AR net/mac80211/tests/built-in.a
CC net/mac80211/main.o
CC block/blk-mq-pci.o
CC [M] sound/hda/trace.o
CC kernel/time/tick-common.o
CC net/sunrpc/auth_null.o
CC kernel/time/tick-broadcast.o
AR fs/lockd/built-in.a
CC net/rfkill/core.o
CC fs/file_table.o
CC net/9p/mod.o
CC net/rfkill/input.o
CC drivers/acpi/acpica/hwvalid.o
AR fs/tracefs/built-in.a
CC drivers/acpi/acpica/hwxface.o
CC net/wireless/sysfs.o
AR fs/9p/built-in.a
CC net/dns_resolver/dns_key.o
CC net/wireless/radiotap.o
CC net/core/netdev-genl.o
AR net/ipv6/netfilter/built-in.a
CC net/ipv6/af_inet6.o
LD [M] fs/efivarfs/efivarfs.o
CC lib/ratelimit.o
CC [M] sound/hda/hdac_component.o
CC net/dns_resolver/dns_query.o
CC kernel/time/tick-broadcast-hrtimer.o
CC drivers/acpi/acpica/hwxfsleep.o
CC net/ipv6/anycast.o
CC kernel/trace/trace_events.o
CC net/xfrm/xfrm_nat_keepalive.o
CC kernel/trace/trace_export.o
CC lib/rbtree.o
AR kernel/cgroup/built-in.a
CC lib/seq_buf.o
CC lib/siphash.o
CC lib/string.o
CC net/ethtool/fec.o
CC net/netfilter/nf_conntrack_standalone.o
CC block/blk-mq-virtio.o
CC net/9p/client.o
CC net/netlabel/netlabel_kapi.o
CC net/netlabel/netlabel_domainhash.o
AR sound/virtio/built-in.a
CC kernel/time/tick-oneshot.o
CC kernel/events/ring_buffer.o
CC net/9p/error.o
CC net/wireless/util.o
CC net/core/netdev-genl-gen.o
CC mm/mmu_notifier.o
CC fs/super.o
AR drivers/gpu/host1x/built-in.a
CC net/9p/protocol.o
CC kernel/events/callchain.o
CC drivers/acpi/acpica/hwpci.o
CC kernel/events/hw_breakpoint.o
CC fs/char_dev.o
CC fs/stat.o
CC [M] sound/hda/hdac_i915.o
CC mm/migrate.o
CC net/sunrpc/auth_gss/gss_rpc_upcall.o
AR net/rfkill/built-in.a
AR drivers/gpu/vga/built-in.a
CC kernel/time/tick-sched.o
CC kernel/time/timer_migration.o
CC block/blk-mq-debugfs.o
CC net/netfilter/nf_conntrack_expect.o
CC lib/timerqueue.o
AR drivers/gpu/drm/tests/built-in.a
AR net/dns_resolver/built-in.a
CC net/sunrpc/auth_tls.o
AR drivers/gpu/drm/arm/built-in.a
CC net/sunrpc/auth_unix.o
CC net/sunrpc/auth_gss/gss_rpc_xdr.o
CC drivers/gpu/drm/display/drm_display_helper_mod.o
CC net/ipv4/inetpeer.o
CC net/handshake/alert.o
CC net/devres.o
CC drivers/acpi/acpica/nsaccess.o
CC lib/vsprintf.o
CC net/handshake/genl.o
CC kernel/trace/trace_event_perf.o
CC net/handshake/netlink.o
CC fs/exec.o
CC net/ethtool/eeprom.o
CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC drivers/connector/cn_queue.o
CC net/ipv6/ip6_output.o
CC [M] sound/hda/intel-dsp-config.o
CC net/ipv6/ip6_input.o
CC net/xfrm/xfrm_algo.o
CC drivers/connector/connector.o
CC net/core/gso.o
CC net/core/net-sysfs.o
CC net/handshake/request.o
CC drivers/connector/cn_proc.o
CC net/9p/trans_common.o
CC block/blk-pm.o
CC [M] sound/hda/intel-nhlt.o
CC drivers/acpi/acpica/nsalloc.o
CC fs/nfs/namespace.o
CC net/handshake/tlshd.o
CC net/netlabel/netlabel_addrlist.o
CC drivers/acpi/wakeup.o
CC net/socket.o
CC net/sunrpc/auth_gss/trace.o
CC drivers/acpi/sleep.o
CC drivers/acpi/device_sysfs.o
CC net/sunrpc/svc.o
CC kernel/events/uprobes.o
CC net/netlabel/netlabel_mgmt.o
CC net/wireless/reg.o
CC drivers/acpi/acpica/nsarguments.o
CC fs/ext4/xattr_trusted.o
CC drivers/acpi/device_pm.o
CC net/wireless/scan.o
CC net/ipv4/protocol.o
CC net/wireless/nl80211.o
CC net/xfrm/xfrm_user.o
CC net/9p/trans_fd.o
CC net/wireless/mlme.o
CC [M] sound/hda/intel-sdw-acpi.o
CC arch/x86/kernel/cpu/capflags.o
AR arch/x86/kernel/cpu/built-in.a
CC net/netfilter/nf_conntrack_helper.o
CC block/holder.o
CC drivers/gpu/drm/display/drm_dp_helper.o
CC arch/x86/kernel/stacktrace.o
CC net/netfilter/nf_conntrack_proto.o
CC arch/x86/kernel/reboot.o
CC fs/nfs/mount_clnt.o
CC mm/page_counter.o
CC net/ethtool/stats.o
CC kernel/trace/trace_events_filter.o
CC mm/hugetlb_cgroup.o
CC drivers/acpi/acpica/nsconvert.o
CC kernel/time/vsyscall.o
CC lib/win_minmax.o
CC net/ethtool/phc_vclocks.o
CC drivers/acpi/proc.o
AR drivers/connector/built-in.a
CC net/ethtool/mm.o
CC fs/nfs/nfstrace.o
CC fs/ext4/xattr_user.o
CC fs/nfs/export.o
CC mm/early_ioremap.o
CC net/mac80211/status.o
CC net/sysctl_net.o
LD [M] sound/hda/snd-hda-core.o
CC drivers/acpi/bus.o
LD [M] sound/hda/snd-intel-dspcfg.o
LD [M] sound/hda/snd-intel-sdw-acpi.o
CC drivers/acpi/acpica/nsdump.o
CC sound/sound_core.o
CC drivers/acpi/glue.o
CC arch/x86/kernel/msr.o
CC lib/xarray.o
AR block/built-in.a
CC kernel/time/timekeeping_debug.o
CC net/handshake/trace.o
CC sound/last.o
CC net/ipv4/ip_input.o
CC drivers/base/power/sysfs.o
CC arch/x86/kernel/cpuid.o
CC net/ipv4/ip_fragment.o
CC drivers/base/firmware_loader/builtin/main.o
CC drivers/base/firmware_loader/main.o
CC arch/x86/kernel/early-quirks.o
CC drivers/acpi/acpica/nseval.o
CC lib/lockref.o
CC net/9p/trans_virtio.o
CC net/netlabel/netlabel_unlabeled.o
CC fs/nfs/sysfs.o
CC net/core/hotdata.o
CC fs/ext4/fast_commit.o
CC fs/ext4/orphan.o
CC mm/secretmem.o
AR sound/built-in.a
CC lib/bcd.o
CC lib/sort.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC drivers/gpu/drm/ttm/ttm_tt.o
AR kernel/events/built-in.a
CC drivers/gpu/drm/ttm/ttm_bo.o
CC kernel/panic.o
CC lib/parser.o
CC fs/nfs/fs_context.o
CC fs/nfs/nfsroot.o
CC drivers/gpu/drm/ttm/ttm_bo_util.o
CC drivers/gpu/drm/i915/i915_config.o
CC drivers/base/power/generic_ops.o
CC fs/ext4/acl.o
CC drivers/acpi/acpica/nsinit.o
CC fs/ext4/xattr_security.o
CC kernel/time/namespace.o
CC net/ethtool/module.o
CC lib/debug_locks.o
CC net/netfilter/nf_conntrack_proto_generic.o
CC fs/pipe.o
CC fs/namei.o
CC drivers/acpi/scan.o
CC net/ipv6/addrconf.o
CC drivers/gpu/drm/i915/i915_driver.o
CC kernel/trace/trace_events_trigger.o
CC kernel/trace/trace_eprobe.o
CC net/ipv4/ip_forward.o
CC kernel/cpu.o
CC drivers/gpu/drm/display/drm_dp_mst_topology.o
CC lib/random32.o
CC net/sunrpc/auth_gss/gss_krb5_mech.o
CC drivers/base/power/common.o
CC arch/x86/kernel/smp.o
CC drivers/acpi/acpica/nsload.o
AR drivers/base/firmware_loader/built-in.a
CC net/core/net-procfs.o
CC net/core/netpoll.o
CC net/ipv4/ip_options.o
CC drivers/gpu/drm/ttm/ttm_bo_vm.o
CC drivers/acpi/mipi-disco-img.o
AR kernel/time/built-in.a
CC mm/hmm.o
CC mm/memfd.o
CC lib/bust_spinlocks.o
CC kernel/trace/trace_kprobe.o
CC fs/nfs/sysctl.o
CC drivers/gpu/drm/ttm/ttm_module.o
CC kernel/exit.o
CC kernel/softirq.o
CC drivers/gpu/drm/ttm/ttm_execbuf_util.o
CC drivers/gpu/drm/ttm/ttm_range_manager.o
CC mm/ptdump.o
AR net/xfrm/built-in.a
AR net/9p/built-in.a
AR net/handshake/built-in.a
CC drivers/acpi/acpica/nsnames.o
CC fs/fcntl.o
CC drivers/gpu/drm/ttm/ttm_resource.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
CC drivers/gpu/drm/ttm/ttm_pool.o
AR drivers/gpu/drm/renesas/rz-du/built-in.a
AR drivers/gpu/drm/renesas/built-in.a
CC drivers/base/power/qos.o
CC drivers/acpi/acpica/nsobject.o
CC drivers/acpi/resource.o
CC net/netfilter/nf_conntrack_proto_tcp.o
CC net/netlabel/netlabel_cipso_v4.o
CC net/ethtool/cmis_fw_update.o
CC net/sunrpc/auth_gss/gss_krb5_seal.o
CC drivers/acpi/acpi_processor.o
CC kernel/resource.o
CC net/mac80211/driver-ops.o
CC kernel/sysctl.o
CC lib/kasprintf.o
CC drivers/gpu/drm/ttm/ttm_device.o
CC mm/execmem.o
CC drivers/acpi/acpica/nsparse.o
CC net/sunrpc/auth_gss/gss_krb5_unseal.o
CC net/ethtool/cmis_cdb.o
CC net/ethtool/pse-pd.o
CC kernel/trace/error_report-traces.o
CC net/ipv6/addrlabel.o
CC drivers/gpu/drm/i915/i915_drm_client.o
CC drivers/block/loop.o
CC arch/x86/kernel/smpboot.o
CC drivers/block/virtio_blk.o
CC net/sunrpc/svcsock.o
CC drivers/gpu/drm/i915/i915_getparam.o
CC net/core/fib_rules.o
CC lib/bitmap.o
CC net/sunrpc/svcauth.o
CC drivers/acpi/acpica/nspredef.o
CC drivers/acpi/acpica/nsprepkg.o
CC drivers/gpu/drm/ttm/ttm_sys_manager.o
CC net/mac80211/sta_info.o
CC fs/ioctl.o
CC drivers/acpi/acpica/nsrepair.o
CC drivers/gpu/drm/i915/i915_ioctl.o
CC drivers/gpu/drm/ttm/ttm_agp_backend.o
CC net/ipv4/ip_output.o
CC net/sunrpc/auth_gss/gss_krb5_wrap.o
AR mm/built-in.a
CC fs/nfs/nfs3super.o
CC fs/nfs/nfs3client.o
CC net/sunrpc/svcauth_unix.o
AR fs/ext4/built-in.a
CC net/core/net-traces.o
CC net/mac80211/wep.o
CC fs/nfs/nfs3proc.o
CC drivers/acpi/processor_core.o
CC drivers/acpi/acpica/nsrepair2.o
CC net/wireless/ibss.o
CC drivers/base/power/runtime.o
CC fs/readdir.o
AR drivers/gpu/drm/omapdrm/built-in.a
CC net/ethtool/plca.o
CC net/ipv6/route.o
AR drivers/gpu/drm/tilcdc/built-in.a
CC drivers/base/power/wakeirq.o
CC net/netlabel/netlabel_calipso.o
CC drivers/acpi/processor_pdc.o
CC net/core/selftests.o
CC arch/x86/kernel/tsc_sync.o
CC drivers/acpi/ec.o
CC drivers/gpu/drm/i915/i915_irq.o
CC drivers/gpu/drm/i915/i915_mitigations.o
CC lib/scatterlist.o
CC net/wireless/sme.o
CC kernel/trace/power-traces.o
CC arch/x86/kernel/setup_percpu.o
CC drivers/acpi/acpica/nssearch.o
AR drivers/gpu/drm/ttm/built-in.a
CC arch/x86/kernel/mpparse.o
CC drivers/gpu/drm/virtio/virtgpu_drv.o
CC arch/x86/kernel/trace_clock.o
CC net/sunrpc/auth_gss/gss_krb5_crypto.o
CC net/mac80211/aead_api.o
CC net/netfilter/nf_conntrack_proto_udp.o
CC drivers/acpi/dock.o
CC net/mac80211/wpa.o
CC drivers/acpi/pci_root.o
CC drivers/base/power/main.o
AR drivers/misc/eeprom/built-in.a
CC kernel/trace/rpm-traces.o
CC net/wireless/chan.o
AR drivers/misc/cb710/built-in.a
CC kernel/trace/trace_dynevent.o
CC net/netfilter/nf_conntrack_proto_icmp.o
CC drivers/gpu/drm/virtio/virtgpu_kms.o
CC net/netfilter/nf_conntrack_extend.o
CC lib/list_sort.o
AR drivers/misc/ti-st/built-in.a
AR drivers/block/built-in.a
CC drivers/base/power/wakeup.o
AR drivers/misc/lis3lv02d/built-in.a
CC drivers/acpi/acpica/nsutils.o
AR drivers/misc/cardreader/built-in.a
CC arch/x86/kernel/trace.o
CC lib/uuid.o
AR drivers/misc/keba/built-in.a
CC drivers/gpu/drm/display/drm_dsc_helper.o
AR drivers/misc/built-in.a
CC net/mac80211/scan.o
CC net/core/ptp_classifier.o
AR drivers/gpu/drm/imx/built-in.a
CC fs/select.o
AR drivers/mfd/built-in.a
CC drivers/gpu/drm/i915/i915_module.o
CC drivers/base/power/wakeup_stats.o
AR drivers/nfc/built-in.a
CC drivers/gpu/drm/i915/i915_params.o
CC lib/iov_iter.o
CC drivers/gpu/drm/virtio/virtgpu_gem.o
AR net/ethtool/built-in.a
CC net/mac80211/offchannel.o
CC drivers/gpu/drm/virtio/virtgpu_vram.o
CC fs/nfs/nfs3xdr.o
AR net/netlabel/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_display.o
CC drivers/gpu/drm/virtio/virtgpu_vq.o
CC net/ipv6/ip6_fib.o
CC drivers/acpi/pci_link.o
CC drivers/acpi/acpica/nswalk.o
CC lib/clz_ctz.o
AR drivers/dax/hmem/built-in.a
CC arch/x86/kernel/rethook.o
CC drivers/acpi/pci_irq.o
AR drivers/dax/built-in.a
CC drivers/gpu/drm/i915/i915_pci.o
CC drivers/acpi/acpi_apd.o
CC drivers/gpu/drm/i915/i915_scatterlist.o
CC drivers/acpi/acpi_platform.o
CC drivers/acpi/acpi_pnp.o
CC drivers/base/power/trace.o
CC drivers/acpi/power.o
CC drivers/gpu/drm/virtio/virtgpu_fence.o
CC net/sunrpc/auth_gss/gss_krb5_keys.o
CC net/wireless/ethtool.o
CC net/wireless/mesh.o
CC drivers/acpi/acpica/nsxfeval.o
CC drivers/gpu/drm/display/drm_hdcp_helper.o
CC net/netfilter/nf_conntrack_acct.o
CC net/sunrpc/addr.o
CC net/ipv4/ip_sockglue.o
CC net/sunrpc/rpcb_clnt.o
CC net/ipv6/ipv6_sockglue.o
CC net/ipv4/inet_hashtables.o
CC net/ipv6/ndisc.o
CC net/wireless/ap.o
CC drivers/gpu/drm/display/drm_hdmi_helper.o
CC net/netfilter/nf_conntrack_seqadj.o
CC net/ipv4/inet_timewait_sock.o
CC arch/x86/kernel/vmcore_info_32.o
CC net/mac80211/ht.o
CC drivers/gpu/drm/virtio/virtgpu_object.o
CC kernel/trace/trace_probe.o
CC drivers/gpu/drm/display/drm_scdc_helper.o
CC drivers/gpu/drm/i915/i915_suspend.o
AR drivers/gpu/drm/i2c/built-in.a
CC fs/dcache.o
CC drivers/gpu/drm/virtio/virtgpu_debugfs.o
CC net/core/netprio_cgroup.o
CC drivers/acpi/acpica/nsxfname.o
CC drivers/acpi/acpica/nsxfobj.o
AR drivers/base/power/built-in.a
CC fs/nfs/nfs3acl.o
CC drivers/base/regmap/regmap.o
CC net/core/netclassid_cgroup.o
CC net/core/dst_cache.o
AR drivers/base/test/built-in.a
AR net/sunrpc/auth_gss/built-in.a
CC drivers/acpi/event.o
CC net/sunrpc/timer.o
CC net/sunrpc/xdr.o
CC fs/inode.o
CC drivers/gpu/drm/virtio/virtgpu_plane.o
CC drivers/gpu/drm/i915/i915_switcheroo.o
CC drivers/dma-buf/dma-buf.o
CC drivers/base/component.o
CC arch/x86/kernel/machine_kexec_32.o
CC drivers/acpi/acpica/psargs.o
CC drivers/dma-buf/dma-fence.o
CC drivers/acpi/acpica/psloop.o
CC lib/bsearch.o
CC drivers/dma-buf/dma-fence-array.o
CC drivers/dma-buf/dma-fence-chain.o
AR drivers/gpu/drm/display/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_ioctl.o
CC drivers/gpu/drm/i915/i915_sysfs.o
AS arch/x86/kernel/relocate_kernel_32.o
CC fs/attr.o
AR drivers/gpu/drm/panel/built-in.a
CC net/core/gro_cells.o
CC drivers/base/core.o
CC drivers/acpi/acpica/psobject.o
CC kernel/capability.o
CC drivers/acpi/acpica/psopcode.o
CC net/sunrpc/sunrpc_syms.o
CC net/sunrpc/cache.o
CC kernel/trace/trace_uprobe.o
CC net/netfilter/nf_conntrack_proto_icmpv6.o
CC kernel/trace/rethook.o
CC arch/x86/kernel/crash_dump_32.o
CC drivers/base/bus.o
CC fs/nfs/nfs4proc.o
CC net/sunrpc/rpc_pipe.o
CC net/sunrpc/sysfs.o
CC net/sunrpc/svc_xprt.o
CC lib/find_bit.o
CC net/sunrpc/xprtmultipath.o
CC net/core/failover.o
CC drivers/acpi/acpica/psopinfo.o
CC drivers/acpi/acpica/psparse.o
CC drivers/dma-buf/dma-fence-unwrap.o
CC drivers/dma-buf/dma-resv.o
CC drivers/dma-buf/sync_file.o
CC drivers/gpu/drm/i915/i915_utils.o
CC drivers/gpu/drm/i915/intel_clock_gating.o
CC drivers/gpu/drm/i915/intel_device_info.o
CC net/sunrpc/stats.o
CC net/mac80211/agg-tx.o
CC lib/llist.o
CC net/mac80211/agg-rx.o
CC net/ipv6/udp.o
CC fs/bad_inode.o
CC drivers/gpu/drm/virtio/virtgpu_prime.o
CC drivers/base/dd.o
CC net/ipv4/inet_connection_sock.o
CC net/ipv4/tcp.o
CC net/ipv4/tcp_input.o
CC drivers/gpu/drm/virtio/virtgpu_trace_points.o
CC lib/lwq.o
CC net/ipv4/tcp_output.o
CC drivers/acpi/acpica/psscope.o
CC arch/x86/kernel/crash.o
CC arch/x86/kernel/module.o
CC drivers/base/syscore.o
CC drivers/base/driver.o
CC drivers/base/class.o
CC net/sunrpc/sysctl.o
CC drivers/acpi/evged.o
CC drivers/base/platform.o
AR drivers/cxl/core/built-in.a
AR drivers/cxl/built-in.a
CC drivers/acpi/sysfs.o
CC drivers/gpu/drm/i915/intel_memory_region.o
CC lib/memweight.o
CC fs/file.o
CC drivers/macintosh/mac_hid.o
AR drivers/scsi/pcmcia/built-in.a
CC drivers/scsi/scsi.o
CC lib/kfifo.o
CC drivers/scsi/hosts.o
CC drivers/acpi/acpica/pstree.o
CC lib/percpu-refcount.o
AR net/core/built-in.a
CC lib/rhashtable.o
CC net/netfilter/nf_conntrack_netlink.o
AR drivers/dma-buf/built-in.a
CC drivers/base/cpu.o
CC drivers/acpi/acpica/psutils.o
CC drivers/gpu/drm/i915/intel_pcode.o
CC net/mac80211/vht.o
CC drivers/gpu/drm/virtio/virtgpu_submit.o
CC net/ipv4/tcp_timer.o
CC net/ipv4/tcp_ipv4.o
CC net/netfilter/nf_conntrack_ftp.o
CC net/mac80211/he.o
CC arch/x86/kernel/doublefault_32.o
CC drivers/acpi/acpica/pswalk.o
CC drivers/acpi/acpica/psxface.o
CC lib/base64.o
CC fs/nfs/nfs4xdr.o
CC drivers/acpi/acpica/rsaddr.o
AR drivers/macintosh/built-in.a
CC lib/once.o
CC drivers/base/regmap/regcache.o
CC drivers/base/firmware.o
AR drivers/nvme/common/built-in.a
CC drivers/base/regmap/regcache-rbtree.o
AR drivers/nvme/target/built-in.a
CC drivers/acpi/acpica/rscalc.o
AR drivers/nvme/host/built-in.a
CC drivers/acpi/acpica/rscreate.o
CC fs/nfs/nfs4state.o
AR drivers/nvme/built-in.a
CC drivers/acpi/acpica/rsdumpinfo.o
CC arch/x86/kernel/early_printk.o
AR kernel/trace/built-in.a
CC kernel/ptrace.o
CC lib/refcount.o
CC net/netfilter/nf_conntrack_irc.o
CC drivers/base/regmap/regcache-flat.o
CC drivers/base/regmap/regcache-maple.o
CC drivers/gpu/drm/i915/intel_region_ttm.o
CC net/mac80211/s1g.o
CC net/wireless/trace.o
CC fs/nfs/nfs4renewd.o
CC drivers/acpi/property.o
CC net/wireless/ocb.o
CC drivers/base/init.o
CC drivers/gpu/drm/i915/intel_runtime_pm.o
CC fs/nfs/nfs4super.o
CC arch/x86/kernel/hpet.o
CC drivers/gpu/drm/i915/intel_sbi.o
CC drivers/acpi/debugfs.o
CC fs/nfs/nfs4file.o
CC drivers/acpi/acpica/rsinfo.o
CC net/wireless/pmsr.o
AR drivers/gpu/drm/virtio/built-in.a
CC lib/rcuref.o
CC drivers/scsi/scsi_ioctl.o
AR drivers/gpu/drm/bridge/cadence/built-in.a
AR drivers/gpu/drm/bridge/analogix/built-in.a
CC drivers/acpi/acpica/rsio.o
CC drivers/scsi/scsicam.o
CC drivers/base/regmap/regmap-debugfs.o
AR drivers/gpu/drm/bridge/imx/built-in.a
CC net/ipv6/udplite.o
AR drivers/gpu/drm/bridge/synopsys/built-in.a
AR drivers/gpu/drm/bridge/built-in.a
CC net/ipv6/raw.o
CC drivers/acpi/acpica/rsirq.o
CC lib/usercopy.o
CC net/mac80211/ibss.o
CC kernel/user.o
CC net/mac80211/iface.o
CC net/mac80211/link.o
CC net/ipv4/tcp_minisocks.o
CC drivers/gpu/drm/i915/intel_step.o
CC drivers/acpi/acpi_lpat.o
CC drivers/scsi/scsi_error.o
CC drivers/acpi/acpi_pcc.o
CC net/ipv6/icmp.o
AR drivers/gpu/drm/hisilicon/built-in.a
CC drivers/ata/libata-core.o
GEN net/wireless/shipped-certs.c
CC drivers/ata/libata-scsi.o
CC drivers/acpi/acpica/rslist.o
CC net/netfilter/nf_conntrack_sip.o
CC lib/errseq.o
AR net/sunrpc/built-in.a
CC lib/bucket_locks.o
CC net/ipv4/tcp_cong.o
CC kernel/signal.o
CC drivers/net/phy/mdio-boardinfo.o
CC drivers/net/phy/stubs.o
CC drivers/acpi/ac.o
AR drivers/net/phy/qcom/built-in.a
CC drivers/net/phy/mdio_devres.o
CC net/mac80211/rate.o
CC arch/x86/kernel/amd_nb.o
CC drivers/gpu/drm/i915/intel_uncore.o
CC drivers/net/phy/phy.o
CC fs/nfs/delegation.o
CC net/netfilter/nf_nat_core.o
CC net/wireless/shipped-certs.o
AR drivers/base/regmap/built-in.a
CC drivers/acpi/button.o
CC fs/nfs/nfs4idmap.o
CC drivers/base/map.o
CC net/netfilter/nf_nat_proto.o
CC fs/nfs/callback.o
CC drivers/acpi/acpica/rsmemory.o
CC drivers/acpi/acpica/rsmisc.o
CC drivers/acpi/acpica/rsserial.o
CC net/ipv6/mcast.o
CC lib/generic-radix-tree.o
CC drivers/acpi/acpica/rsutils.o
CC drivers/acpi/acpica/rsxface.o
CC drivers/acpi/fan_core.o
CC drivers/base/devres.o
CC drivers/acpi/fan_attr.o
CC arch/x86/kernel/kvm.o
CC drivers/firewire/init_ohci1394_dma.o
AR drivers/net/pse-pd/built-in.a
CC fs/filesystems.o
AR drivers/gpu/drm/mxsfb/built-in.a
CC net/ipv4/tcp_metrics.o
CC lib/bitmap-str.o
CC net/ipv4/tcp_fastopen.o
CC drivers/acpi/fan_hwmon.o
CC net/ipv4/tcp_rate.o
CC drivers/acpi/acpi_video.o
CC kernel/sys.o
CC drivers/scsi/scsi_lib.o
CC drivers/acpi/acpica/tbdata.o
CC drivers/base/attribute_container.o
CC arch/x86/kernel/kvmclock.o
CC net/ipv4/tcp_recovery.o
CC net/ipv4/tcp_ulp.o
CC arch/x86/kernel/paravirt.o
CC drivers/scsi/constants.o
CC drivers/scsi/scsi_lib_dma.o
CC drivers/scsi/scsi_scan.o
CC drivers/acpi/video_detect.o
AR drivers/gpu/drm/tiny/built-in.a
CC net/ipv6/reassembly.o
CC fs/namespace.o
AR drivers/gpu/drm/xlnx/built-in.a
CC fs/nfs/callback_xdr.o
CC drivers/acpi/acpica/tbfadt.o
AR drivers/firewire/built-in.a
CC drivers/acpi/processor_driver.o
GEN drivers/scsi/scsi_devinfo_tbl.c
CC lib/string_helpers.o
CC drivers/scsi/scsi_devinfo.o
CC net/mac80211/michael.o
CC drivers/net/phy/phy-c45.o
CC fs/seq_file.o
CC net/mac80211/tkip.o
CC drivers/base/transport_class.o
CC drivers/base/topology.o
CC arch/x86/kernel/pvclock.o
CC arch/x86/kernel/pcspeaker.o
CC arch/x86/kernel/check.o
CC net/netfilter/nf_nat_helper.o
CC arch/x86/kernel/uprobes.o
CC fs/nfs/callback_proc.o
CC net/netfilter/nf_nat_masquerade.o
CC net/ipv6/tcp_ipv6.o
CC drivers/acpi/acpica/tbfind.o
CC net/ipv6/ping.o
CC net/ipv6/exthdrs.o
CC net/ipv6/datagram.o
CC drivers/base/container.o
CC net/ipv6/ip6_flowlabel.o
CC drivers/net/mdio/acpi_mdio.o
CC drivers/gpu/drm/i915/intel_wakeref.o
CC drivers/gpu/drm/i915/vlv_sideband.o
CC drivers/net/mdio/fwnode_mdio.o
CC net/mac80211/aes_cmac.o
CC net/mac80211/aes_gmac.o
CC fs/nfs/nfs4namespace.o
CC drivers/scsi/scsi_sysctl.o
CC arch/x86/kernel/perf_regs.o
CC drivers/acpi/acpica/tbinstal.o
CC drivers/scsi/scsi_proc.o
CC drivers/acpi/processor_thermal.o
AR drivers/net/pcs/built-in.a
CC drivers/acpi/processor_idle.o
CC drivers/acpi/processor_throttling.o
CC net/ipv4/tcp_offload.o
CC drivers/acpi/processor_perflib.o
CC drivers/acpi/container.o
CC lib/hexdump.o
CC drivers/net/phy/phy-core.o
CC drivers/gpu/drm/i915/vlv_suspend.o
CC drivers/net/phy/phy_device.o
CC arch/x86/kernel/tracepoint.o
CC drivers/base/property.o
CC arch/x86/kernel/itmt.o
CC drivers/net/phy/linkmode.o
CC drivers/ata/libata-eh.o
CC fs/nfs/nfs4getroot.o
CC kernel/umh.o
AR drivers/net/ethernet/3com/built-in.a
CC lib/kstrtox.o
CC drivers/net/ethernet/8390/ne2k-pci.o
CC drivers/acpi/acpica/tbprint.o
AR drivers/net/ethernet/adaptec/built-in.a
AR drivers/net/ethernet/agere/built-in.a
CC arch/x86/kernel/umip.o
CC lib/iomap.o
AR drivers/net/ethernet/alacritech/built-in.a
AR drivers/net/ethernet/alteon/built-in.a
CC drivers/scsi/scsi_debugfs.o
AR drivers/net/ethernet/amazon/built-in.a
CC kernel/workqueue.o
AR drivers/net/ethernet/amd/built-in.a
CC fs/nfs/nfs4client.o
CC drivers/scsi/scsi_trace.o
CC fs/nfs/nfs4session.o
CC drivers/net/phy/mdio_bus.o
CC drivers/net/phy/mdio_device.o
CC drivers/net/phy/swphy.o
CC drivers/net/ethernet/8390/8390.o
AR drivers/net/ethernet/aquantia/built-in.a
CC drivers/net/phy/fixed_phy.o
AR drivers/net/mdio/built-in.a
AR drivers/net/ethernet/arc/built-in.a
CC drivers/net/phy/realtek.o
AR drivers/net/usb/built-in.a
AR drivers/net/wireless/admtek/built-in.a
AR drivers/net/ethernet/asix/built-in.a
AR drivers/net/wireless/ath/built-in.a
AR drivers/gpu/drm/gud/built-in.a
AR drivers/net/ethernet/atheros/built-in.a
AR drivers/net/ethernet/cadence/built-in.a
AR drivers/net/wireless/atmel/built-in.a
AR drivers/net/wireless/broadcom/built-in.a
CC drivers/acpi/acpica/tbutils.o
AR drivers/net/wireless/intel/built-in.a
CC drivers/acpi/acpica/tbxface.o
CC drivers/net/ethernet/broadcom/bnx2.o
CC net/ipv6/inet6_connection_sock.o
AR drivers/net/ethernet/brocade/built-in.a
CC drivers/acpi/thermal_lib.o
CC net/ipv6/udp_offload.o
CC net/ipv6/seg6.o
CC drivers/net/ethernet/broadcom/tg3.o
AR drivers/net/wireless/intersil/built-in.a
CC fs/xattr.o
CC fs/libfs.o
AR drivers/net/wireless/marvell/built-in.a
CC drivers/acpi/thermal.o
AR drivers/net/wireless/mediatek/built-in.a
CC net/netfilter/nf_nat_ftp.o
CC net/netfilter/nf_nat_irc.o
AR drivers/net/wireless/purelifi/built-in.a
AR drivers/net/wireless/microchip/built-in.a
AR drivers/net/wireless/quantenna/built-in.a
AR drivers/net/wireless/ralink/built-in.a
AR drivers/net/wireless/rsi/built-in.a
AR drivers/net/wireless/realtek/built-in.a
CC net/netfilter/nf_nat_sip.o
AR drivers/net/wireless/silabs/built-in.a
AR drivers/net/ethernet/cavium/common/built-in.a
AR drivers/net/wireless/st/built-in.a
AR drivers/net/ethernet/cavium/thunder/built-in.a
AR drivers/net/wireless/ti/built-in.a
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/net/ethernet/chelsio/built-in.a
CC drivers/acpi/nhlt.o
CC fs/fs-writeback.o
AR drivers/net/wireless/zydas/built-in.a
AR drivers/net/ethernet/cavium/octeon/built-in.a
AR drivers/net/wireless/virtual/built-in.a
CC drivers/acpi/acpi_memhotplug.o
AR drivers/net/ethernet/cavium/built-in.a
AR drivers/net/wireless/built-in.a
CC drivers/acpi/ioapic.o
CC net/ipv6/fib6_notifier.o
CC drivers/acpi/battery.o
CC drivers/scsi/scsi_logging.o
CC drivers/scsi/scsi_pm.o
CC fs/pnode.o
CC drivers/acpi/acpica/tbxfload.o
CC lib/iomap_copy.o
CC net/mac80211/fils_aead.o
CC fs/splice.o
CC arch/x86/kernel/unwind_frame.o
CC net/mac80211/cfg.o
CC fs/nfs/dns_resolve.o
CC net/ipv6/rpl.o
CC drivers/acpi/bgrt.o
CC drivers/net/mii.o
CC fs/sync.o
CC lib/devres.o
CC drivers/base/cacheinfo.o
CC drivers/gpu/drm/i915/soc/intel_dram.o
CC drivers/gpu/drm/i915/soc/intel_gmch.o
CC net/ipv4/tcp_plb.o
CC net/ipv4/datagram.o
CC drivers/ata/libata-transport.o
CC drivers/cdrom/cdrom.o
CC drivers/ata/libata-trace.o
CC drivers/acpi/acpica/tbxfroot.o
AR drivers/net/ethernet/8390/built-in.a
CC drivers/acpi/spcr.o
AR drivers/net/ethernet/cisco/built-in.a
CC fs/nfs/nfs4trace.o
AR drivers/net/ethernet/cortina/built-in.a
CC fs/utimes.o
CC fs/nfs/nfs4sysctl.o
CC fs/d_path.o
CC fs/stack.o
CC drivers/base/swnode.o
CC fs/fs_struct.o
AR arch/x86/kernel/built-in.a
CC net/ipv6/ioam6.o
CC fs/statfs.o
CC net/ipv6/sysctl_net_ipv6.o
AR arch/x86/built-in.a
CC lib/check_signature.o
CC net/ipv6/xfrm6_policy.o
CC net/ipv6/xfrm6_state.o
CC drivers/ata/libata-sata.o
CC drivers/gpu/drm/i915/soc/intel_pch.o
CC drivers/scsi/scsi_bsg.o
CC net/mac80211/ethtool.o
CC drivers/acpi/acpica/utaddress.o
CC kernel/pid.o
AR drivers/net/phy/built-in.a
CC drivers/net/loopback.o
CC lib/interval_tree.o
CC fs/fs_pin.o
CC net/netfilter/x_tables.o
CC drivers/net/netconsole.o
CC drivers/acpi/acpica/utalloc.o
CC drivers/base/auxiliary.o
CC net/netfilter/xt_tcpudp.o
AR drivers/net/ethernet/dec/tulip/built-in.a
AR drivers/net/ethernet/dec/built-in.a
CC net/ipv6/xfrm6_input.o
CC lib/assoc_array.o
CC net/mac80211/rx.o
CC drivers/gpu/drm/i915/i915_memcpy.o
AR drivers/auxdisplay/built-in.a
CC lib/bitrev.o
CC fs/nsfs.o
CC drivers/net/virtio_net.o
CC net/mac80211/spectmgmt.o
CC drivers/pcmcia/cs.o
AR drivers/net/ethernet/dlink/built-in.a
CC net/netfilter/xt_CONNSECMARK.o
CC drivers/usb/common/common.o
CC drivers/usb/core/usb.o
CC drivers/net/net_failover.o
CC drivers/usb/common/debug.o
CC drivers/usb/core/hub.o
CC drivers/gpu/drm/i915/i915_mm.o
CC drivers/acpi/acpica/utascii.o
AR drivers/usb/phy/built-in.a
CC net/mac80211/tx.o
CC net/mac80211/key.o
CC drivers/usb/mon/mon_main.o
CC fs/fs_types.o
CC net/ipv4/raw.o
CC net/ipv4/udp.o
CC net/ipv4/udplite.o
CC drivers/scsi/scsi_common.o
CC drivers/scsi/scsi_transport_spi.o
CC drivers/base/devtmpfs.o
CC drivers/scsi/virtio_scsi.o
CC drivers/scsi/sd.o
CC net/ipv6/xfrm6_output.o
CC net/ipv6/xfrm6_protocol.o
CC net/ipv6/netfilter.o
CC drivers/acpi/acpica/utbuffer.o
CC drivers/gpu/drm/i915/i915_sw_fence.o
CC net/ipv6/proc.o
CC net/ipv6/syncookies.o
CC lib/crc-ccitt.o
CC drivers/base/module.o
AR drivers/cdrom/built-in.a
CC drivers/ata/libata-sff.o
CC drivers/ata/libata-pmp.o
CC drivers/usb/core/hcd.o
CC drivers/pcmcia/socket_sysfs.o
CC drivers/input/serio/serio.o
AR drivers/usb/common/built-in.a
CC fs/fs_context.o
CC drivers/base/auxiliary_sysfs.o
CC drivers/acpi/acpica/utcksum.o
CC lib/crc16.o
CC net/ipv6/calipso.o
CC drivers/usb/mon/mon_stat.o
CC drivers/input/serio/i8042.o
CC drivers/usb/core/urb.o
CC kernel/task_work.o
HOSTCC lib/gen_crc32table
CC drivers/usb/host/pci-quirks.o
CC drivers/usb/host/ehci-hcd.o
CC drivers/usb/host/ehci-pci.o
CC drivers/usb/class/usblp.o
CC drivers/input/keyboard/atkbd.o
CC lib/xxhash.o
CC drivers/gpu/drm/i915/i915_sw_fence_work.o
CC net/mac80211/util.o
CC kernel/extable.o
CC drivers/input/mouse/psmouse-base.o
CC drivers/acpi/acpica/utcopy.o
CC drivers/base/devcoredump.o
CC net/ipv6/ah6.o
CC net/ipv6/esp6.o
CC drivers/base/platform-msi.o
CC net/netfilter/xt_NFLOG.o
CC drivers/scsi/sr.o
CC drivers/usb/storage/scsiglue.o
CC drivers/pcmcia/cardbus.o
CC drivers/pcmcia/ds.o
CC drivers/usb/mon/mon_text.o
CC drivers/gpu/drm/i915/i915_syncmap.o
CC drivers/usb/storage/protocol.o
CC kernel/params.o
CC drivers/scsi/sr_ioctl.o
CC drivers/acpi/acpica/utexcep.o
CC net/mac80211/parse.o
CC lib/genalloc.o
CC drivers/acpi/acpica/utdebug.o
AR drivers/input/joystick/built-in.a
AR drivers/usb/misc/built-in.a
AR drivers/net/ethernet/emulex/built-in.a
AR drivers/net/ethernet/engleder/built-in.a
CC drivers/usb/host/ohci-hcd.o
AR drivers/gpu/drm/solomon/built-in.a
CC drivers/usb/host/ohci-pci.o
CC drivers/usb/storage/transport.o
CC drivers/usb/storage/usb.o
CC drivers/usb/early/ehci-dbgp.o
CC drivers/usb/storage/initializers.o
CC fs/fs_parser.o
CC drivers/usb/storage/sierra_ms.o
CC drivers/base/physical_location.o
AR drivers/usb/class/built-in.a
CC drivers/usb/storage/option_ms.o
CC drivers/acpi/acpica/utdecode.o
CC drivers/input/serio/serport.o
CC drivers/pcmcia/pcmcia_resource.o
CC net/netfilter/xt_SECMARK.o
CC drivers/gpu/drm/i915/i915_user_extensions.o
AR drivers/input/keyboard/built-in.a
CC drivers/usb/storage/usual-tables.o
CC kernel/kthread.o
AR drivers/input/tablet/built-in.a
CC net/netfilter/xt_TCPMSS.o
CC drivers/pcmcia/cistpl.o
CC kernel/sys_ni.o
CC drivers/input/mouse/synaptics.o
CC fs/fsopen.o
AR fs/nfs/built-in.a
CC fs/init.o
CC drivers/usb/mon/mon_bin.o
CC net/mac80211/wme.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
CC lib/percpu_counter.o
CC lib/audit.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC drivers/acpi/acpica/utdelete.o
CC drivers/usb/core/message.o
CC drivers/gpu/drm/i915/i915_debugfs.o
CC net/mac80211/chan.o
CC drivers/pcmcia/pcmcia_cis.o
CC drivers/scsi/sr_vendor.o
CC drivers/base/trace.o
AR drivers/input/touchscreen/built-in.a
CC drivers/usb/core/driver.o
CC drivers/input/mouse/focaltech.o
CC drivers/input/serio/libps2.o
CC fs/kernel_read_file.o
GEN xe_wa_oob.c xe_wa_oob.h
CC net/mac80211/trace.o
CC net/ipv6/sit.o
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC fs/mnt_idmapping.o
CC drivers/ata/libata-acpi.o
AR drivers/usb/early/built-in.a
CC drivers/pcmcia/rsrc_mgr.o
CC drivers/pcmcia/rsrc_nonstatic.o
CC drivers/pcmcia/yenta_socket.o
CC net/mac80211/mlme.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC net/ipv6/addrconf_core.o
AR drivers/usb/storage/built-in.a
CC drivers/ata/libata-pata-timings.o
CC drivers/scsi/sg.o
CC net/netfilter/xt_conntrack.o
CC drivers/acpi/acpica/uterror.o
CC lib/syscall.o
CC drivers/usb/core/config.o
CC net/netfilter/xt_policy.o
CC fs/remap_range.o
CC drivers/gpu/drm/drm_aperture.o
CC net/ipv4/udp_offload.o
CC drivers/gpu/drm/i915/i915_debugfs_params.o
CC fs/pidfs.o
CC drivers/input/mouse/alps.o
CC net/netfilter/xt_state.o
AR drivers/base/built-in.a
AR drivers/input/serio/built-in.a
CC fs/buffer.o
AR drivers/usb/mon/built-in.a
CC drivers/acpi/acpica/uteval.o
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
AR drivers/input/misc/built-in.a
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC [M] net/netfilter/nf_log_syslog.o
CC drivers/scsi/scsi_sysfs.o
CC drivers/input/mouse/byd.o
CC drivers/rtc/lib.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC [M] net/netfilter/xt_mark.o
CC [M] net/netfilter/xt_nat.o
CC lib/errname.o
CC kernel/nsproxy.o
CC drivers/usb/host/uhci-hcd.o
CC drivers/ata/ahci.o
CC drivers/gpu/drm/drm_atomic.o
CC drivers/rtc/class.o
CC drivers/ata/libahci.o
CC drivers/ata/ata_piix.o
CC drivers/rtc/interface.o
CC lib/nlattr.o
CC drivers/i2c/algos/i2c-algo-bit.o
CC drivers/acpi/acpica/utglobal.o
CC drivers/ata/pata_amd.o
CC kernel/notifier.o
CC kernel/ksysfs.o
CC net/mac80211/tdls.o
CC drivers/usb/core/file.o
CC [M] net/netfilter/xt_LOG.o
AR drivers/pcmcia/built-in.a
CC drivers/input/mouse/logips2pp.o
CC drivers/input/mouse/lifebook.o
CC drivers/ata/pata_oldpiix.o
CC drivers/input/input.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC kernel/cred.o
CC drivers/usb/core/buffer.o
CC drivers/gpu/drm/i915/i915_pmu.o
CC [M] net/netfilter/xt_MASQUERADE.o
CC drivers/acpi/acpica/uthex.o
CC drivers/usb/core/sysfs.o
CC drivers/input/mouse/trackpoint.o
CC drivers/input/input-compat.o
AR net/wireless/built-in.a
CC [M] net/netfilter/xt_addrtype.o
CC net/ipv6/exthdrs_core.o
CC drivers/input/input-mt.o
CC drivers/input/input-poller.o
CC drivers/usb/core/endpoint.o
CC drivers/input/ff-core.o
CC net/ipv6/ip6_checksum.o
CC net/ipv4/arp.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC drivers/acpi/acpica/utids.o
CC kernel/reboot.o
CC kernel/async.o
CC drivers/input/mouse/cypress_ps2.o
AR drivers/scsi/built-in.a
CC drivers/gpu/drm/drm_atomic_uapi.o
CC drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC drivers/gpu/drm/i915/gt/gen6_engine_cs.o
CC drivers/ata/pata_sch.o
CC drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC drivers/usb/core/devio.o
CC drivers/ata/pata_mpiix.o
AR drivers/i2c/algos/built-in.a
CC drivers/usb/core/notify.o
CC drivers/i2c/busses/i2c-i801.o
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC drivers/ata/ata_generic.o
CC drivers/usb/core/generic.o
CC lib/cpu_rmap.o
CC drivers/gpu/drm/drm_auth.o
AR drivers/i3c/built-in.a
CC drivers/input/touchscreen.o
CC lib/dynamic_queue_limits.o
CC drivers/acpi/acpica/utinit.o
CC net/ipv4/icmp.o
CC drivers/rtc/nvmem.o
CC drivers/rtc/dev.o
CC drivers/input/mouse/psmouse-smbus.o
CC lib/glob.o
AR drivers/i2c/muxes/built-in.a
CC net/mac80211/ocb.o
CC net/mac80211/airtime.o
CC net/mac80211/eht.o
CC net/mac80211/led.o
CC net/mac80211/pm.o
CC drivers/usb/core/quirks.o
CC net/ipv6/ip6_icmp.o
CC drivers/i2c/i2c-boardinfo.o
CC net/ipv4/devinet.o
CC drivers/usb/host/xhci.o
CC drivers/gpu/drm/drm_blend.o
CC net/ipv4/af_inet.o
CC lib/strncpy_from_user.o
CC lib/strnlen_user.o
CC drivers/acpi/acpica/utlock.o
CC net/mac80211/rc80211_minstrel_ht.o
CC drivers/acpi/acpica/utmath.o
CC net/mac80211/wbrf.o
CC net/ipv6/output_core.o
AR net/netfilter/built-in.a
CC net/ipv6/protocol.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC drivers/i2c/i2c-core-base.o
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
CC net/ipv4/igmp.o
CC fs/mpage.o
AR drivers/media/i2c/built-in.a
AR drivers/ata/built-in.a
AR drivers/media/tuners/built-in.a
AR drivers/pps/clients/built-in.a
CC drivers/usb/core/devices.o
AR drivers/media/common/b2c2/built-in.a
AR drivers/media/rc/keymaps/built-in.a
AR drivers/pps/generators/built-in.a
CC drivers/pps/pps.o
AR drivers/media/rc/built-in.a
CC kernel/range.o
AR drivers/media/common/saa7146/built-in.a
AR drivers/media/common/siano/built-in.a
AR drivers/media/common/v4l2-tpg/built-in.a
CC drivers/rtc/proc.o
CC drivers/rtc/sysfs.o
AR drivers/media/platform/allegro-dvt/built-in.a
CC drivers/pps/kapi.o
AR drivers/media/common/videobuf2/built-in.a
CC drivers/pps/sysfs.o
AR drivers/media/common/built-in.a
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
AR drivers/media/platform/amlogic/built-in.a
CC drivers/usb/core/phy.o
CC drivers/usb/core/port.o
CC lib/net_utils.o
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/platform/amphion/built-in.a
CC kernel/smpboot.o
AR drivers/media/platform/aspeed/built-in.a
AR drivers/media/pci/b2c2/built-in.a
CC drivers/acpi/acpica/utmisc.o
AR drivers/media/pci/pluto2/built-in.a
AR drivers/media/platform/atmel/built-in.a
AR drivers/input/mouse/built-in.a
AR drivers/media/pci/dm1105/built-in.a
CC drivers/input/ff-memless.o
AR drivers/media/usb/b2c2/built-in.a
AR drivers/media/platform/broadcom/built-in.a
AR drivers/media/pci/pt1/built-in.a
AR drivers/media/platform/cadence/built-in.a
CC lib/sg_pool.o
AR drivers/media/usb/dvb-usb/built-in.a
CC drivers/rtc/rtc-mc146818-lib.o
AR drivers/media/pci/pt3/built-in.a
AR drivers/i2c/busses/built-in.a
AR drivers/media/platform/chips-media/wave5/built-in.a
AR drivers/media/platform/chips-media/coda/built-in.a
AR drivers/media/pci/mantis/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/platform/chips-media/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/pci/saa7146/built-in.a
AR drivers/media/usb/s2255/built-in.a
CC drivers/ptp/ptp_clock.o
CC drivers/i2c/i2c-core-smbus.o
CC drivers/ptp/ptp_chardev.o
AR drivers/media/platform/imagination/built-in.a
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/usb/siano/built-in.a
CC drivers/power/supply/power_supply_core.o
CC drivers/power/supply/power_supply_sysfs.o
AR drivers/media/platform/intel/built-in.a
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/media/platform/marvell/built-in.a
AR drivers/media/pci/netup_unidvb/built-in.a
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/usb/ttusb-dec/built-in.a
AR drivers/media/usb/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
CC drivers/hwmon/hwmon.o
AR drivers/media/pci/intel/ipu3/built-in.a
AR drivers/media/platform/mediatek/vcodec/common/built-in.a
CC drivers/gpu/drm/i915/gt/gen8_engine_cs.o
AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a
AR drivers/media/pci/intel/ivsc/built-in.a
AR drivers/media/pci/intel/built-in.a
AR drivers/media/platform/mediatek/vpu/built-in.a
AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a
AR drivers/media/pci/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
CC drivers/gpu/drm/drm_bridge.o
AR drivers/media/platform/mediatek/mdp3/built-in.a
AR drivers/media/platform/mediatek/built-in.a
CC drivers/acpi/acpica/utmutex.o
CC drivers/acpi/acpica/utnonansi.o
CC drivers/acpi/acpica/utobject.o
CC drivers/gpu/drm/drm_cache.o
AR drivers/media/platform/microchip/built-in.a
AR drivers/thermal/broadcom/built-in.a
AR drivers/watchdog/built-in.a
AR drivers/pps/built-in.a
AR drivers/media/platform/nuvoton/built-in.a
CC drivers/i2c/i2c-core-acpi.o
AR drivers/thermal/renesas/built-in.a
CC drivers/gpu/drm/drm_client.o
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
AR drivers/thermal/samsung/built-in.a
AR drivers/media/platform/nvidia/built-in.a
AR drivers/media/mmc/siano/built-in.a
AR drivers/thermal/qcom/built-in.a
AR drivers/thermal/st/built-in.a
CC drivers/thermal/intel/intel_tcc.o
AR drivers/media/platform/nxp/dw100/built-in.a
AR drivers/media/mmc/built-in.a
CC kernel/ucount.o
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
CC drivers/rtc/rtc-cmos.o
CC kernel/regset.o
CC drivers/i2c/i2c-smbus.o
CC drivers/md/md.o
AR drivers/media/platform/nxp/imx8-isi/built-in.a
AR drivers/media/firewire/built-in.a
CC net/ipv6/ip6_offload.o
AR drivers/media/platform/nxp/built-in.a
AR drivers/media/spi/built-in.a
CC net/ipv6/tcpv6_offload.o
CC lib/stackdepot.o
CC fs/proc_namespace.o
CC drivers/cpufreq/cpufreq.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
AR drivers/media/platform/qcom/camss/built-in.a
CC drivers/cpuidle/governors/menu.o
CC drivers/gpu/drm/i915/gt/gen8_ppgtt.o
AR drivers/media/platform/qcom/venus/built-in.a
CC drivers/cpufreq/freq_table.o
CC drivers/input/sparse-keymap.o
CC drivers/cpufreq/cpufreq_performance.o
CC drivers/cpufreq/cpufreq_userspace.o
AR drivers/media/platform/qcom/built-in.a
CC drivers/thermal/intel/therm_throt.o
CC drivers/power/supply/power_supply_leds.o
AR drivers/net/ethernet/broadcom/built-in.a
CC drivers/usb/core/hcd-pci.o
AR drivers/media/platform/raspberrypi/pisp_be/built-in.a
AR drivers/media/platform/raspberrypi/built-in.a
CC drivers/power/supply/power_supply_hwmon.o
AR drivers/net/ethernet/ezchip/built-in.a
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC drivers/acpi/acpica/utosi.o
AR drivers/net/ethernet/fujitsu/built-in.a
CC drivers/acpi/acpica/utownerid.o
AR drivers/media/platform/renesas/rcar-vin/built-in.a
AR drivers/net/ethernet/fungible/built-in.a
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
AR drivers/net/ethernet/google/built-in.a
AR drivers/media/platform/renesas/vsp1/built-in.a
AR drivers/media/platform/renesas/built-in.a
AR drivers/net/ethernet/huawei/built-in.a
AR drivers/media/platform/rockchip/rga/built-in.a
CC drivers/net/ethernet/intel/e1000/e1000_main.o
CC drivers/net/ethernet/intel/e1000e/82571.o
CC drivers/usb/host/xhci-mem.o
CC kernel/ksyms_common.o
AR drivers/media/platform/rockchip/rkisp1/built-in.a
CC drivers/cpuidle/governors/haltpoll.o
AR drivers/media/platform/rockchip/built-in.a
CC drivers/net/ethernet/intel/e1000e/ich8lan.o
CC drivers/ptp/ptp_sysfs.o
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
AR drivers/media/platform/samsung/exynos4-is/built-in.a
AR drivers/media/platform/samsung/s3c-camif/built-in.a
CC drivers/net/ethernet/intel/e1000/e1000_hw.o
CC drivers/net/ethernet/intel/e1000e/80003es2lan.o
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
CC drivers/usb/core/usb-acpi.o
CC kernel/groups.o
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
CC net/ipv4/fib_frontend.o
AR drivers/media/platform/st/sti/bdisp/built-in.a
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
AR drivers/media/platform/samsung/built-in.a
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
CC drivers/gpu/drm/drm_client_modeset.o
CC drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
AR drivers/power/supply/built-in.a
CC drivers/usb/host/xhci-ext-caps.o
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
AR drivers/media/platform/st/sti/delta/built-in.a
CC drivers/acpi/acpica/utpredef.o
AR drivers/power/built-in.a
CC drivers/input/vivaldi-fmap.o
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
CC drivers/gpu/drm/i915/gt/intel_context.o
AR drivers/media/platform/st/sti/hva/built-in.a
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
CC lib/asn1_decoder.o
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
AR drivers/media/platform/st/stm32/built-in.a
GEN lib/oid_registry_data.c
CC lib/ucs2_string.o
AR drivers/media/platform/sunxi/built-in.a
AR drivers/media/platform/st/built-in.a
CC net/ipv6/exthdrs_offload.o
CC drivers/net/ethernet/intel/e100.o
CC fs/direct-io.o
CC drivers/md/md-bitmap.o
CC fs/eventpoll.o
AR drivers/media/platform/ti/am437x/built-in.a
AR drivers/media/platform/ti/cal/built-in.a
CC kernel/kcmp.o
AR drivers/i2c/built-in.a
AR drivers/hwmon/built-in.a
CC drivers/input/input-leds.o
AR drivers/media/platform/ti/vpe/built-in.a
AR drivers/media/test-drivers/built-in.a
AR drivers/media/platform/ti/davinci/built-in.a
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
AR drivers/rtc/built-in.a
AR drivers/media/platform/ti/j721e-csi2rx/built-in.a
AR drivers/media/platform/ti/omap/built-in.a
CC lib/sbitmap.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC kernel/freezer.o
AR drivers/media/platform/ti/omap3isp/built-in.a
AR drivers/media/platform/ti/built-in.a
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
CC net/ipv4/fib_semantics.o
CC [M] drivers/gpu/drm/xe/xe_gpu_scheduler.o
CC drivers/acpi/acpica/utresdecode.o
AR drivers/media/platform/verisilicon/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gsc.o
CC [M] drivers/gpu/drm/xe/xe_gsc_proxy.o
AR drivers/media/platform/via/built-in.a
CC drivers/acpi/acpica/utresrc.o
AR drivers/media/platform/xilinx/built-in.a
AR drivers/media/platform/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gsc_submit.o
CC net/ipv6/inet6_hashtables.o
CC net/ipv6/mcast_snoop.o
AR drivers/thermal/intel/built-in.a
AR drivers/usb/core/built-in.a
AR drivers/thermal/tegra/built-in.a
AR drivers/media/built-in.a
AR drivers/thermal/mediatek/built-in.a
CC fs/anon_inodes.o
CC fs/signalfd.o
CC drivers/cpuidle/cpuidle.o
CC drivers/thermal/thermal_core.o
CC drivers/ptp/ptp_vclock.o
CC drivers/cpufreq/cpufreq_ondemand.o
CC drivers/ptp/ptp_kvm_x86.o
AR drivers/cpuidle/governors/built-in.a
CC kernel/profile.o
CC net/ipv4/fib_trie.o
CC drivers/thermal/thermal_sysfs.o
CC lib/group_cpus.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC drivers/input/evdev.o
CC drivers/acpi/acpica/utstate.o
CC drivers/gpu/drm/i915/gt/intel_context_sseu.o
CC drivers/usb/host/xhci-ring.o
CC drivers/usb/host/xhci-hub.o
CC drivers/acpi/acpica/utstring.o
CC net/ipv4/fib_notifier.o
CC net/ipv4/inet_fragment.o
CC lib/fw_table.o
CC fs/timerfd.o
CC drivers/gpu/drm/drm_color_mgmt.o
CC drivers/gpu/drm/drm_connector.o
CC fs/eventfd.o
CC drivers/cpufreq/cpufreq_governor.o
AR lib/lib.a
GEN lib/crc32table.h
CC [M] drivers/gpu/drm/xe/xe_gt_ccs_mode.o
CC lib/oid_registry.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC drivers/acpi/acpica/utstrsuppt.o
CC drivers/gpu/drm/drm_crtc.o
CC drivers/gpu/drm/drm_displayid.o
CC drivers/md/md-autodetect.o
CC drivers/md/dm.o
CC drivers/md/dm-table.o
CC kernel/stacktrace.o
CC lib/crc32.o
CC drivers/acpi/acpica/utstrtoul64.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC drivers/cpufreq/acpi-cpufreq.o
CC drivers/ptp/ptp_kvm_common.o
AR drivers/net/ethernet/i825xx/built-in.a
CC fs/aio.o
AR drivers/net/ethernet/microsoft/built-in.a
CC drivers/net/ethernet/intel/e1000e/mac.o
CC drivers/net/ethernet/intel/e1000e/manage.o
CC drivers/gpu/drm/drm_drv.o
CC fs/locks.o
CC drivers/gpu/drm/drm_dumb_buffers.o
CC drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC drivers/net/ethernet/intel/e1000/e1000_param.o
CC drivers/acpi/acpica/utxface.o
CC drivers/acpi/acpica/utxfinit.o
CC net/ipv4/ping.o
CC net/ipv4/ip_tunnel_core.o
CC net/ipv4/gre_offload.o
AR drivers/input/built-in.a
CC drivers/cpuidle/driver.o
CC fs/binfmt_misc.o
AR drivers/mmc/built-in.a
CC drivers/gpu/drm/drm_edid.o
CC drivers/gpu/drm/drm_eld.o
AR net/ipv6/built-in.a
CC net/ipv4/metrics.o
CC drivers/cpuidle/governor.o
AR drivers/ufs/built-in.a
AR lib/built-in.a
CC drivers/cpufreq/amd-pstate.o
CC drivers/cpufreq/amd-pstate-trace.o
CC drivers/acpi/acpica/utxferror.o
CC [M] drivers/gpu/drm/xe/xe_gt_freq.o
CC drivers/gpu/drm/drm_encoder.o
AR drivers/leds/trigger/built-in.a
CC kernel/dma.o
CC drivers/gpu/drm/i915/gt/intel_engine_cs.o
CC kernel/smp.o
AR drivers/leds/blink/built-in.a
AR drivers/net/ethernet/litex/built-in.a
CC drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
CC drivers/thermal/thermal_trip.o
CC drivers/leds/led-core.o
AR drivers/leds/simple/built-in.a
CC drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC kernel/uid16.o
CC fs/binfmt_script.o
AR drivers/ptp/built-in.a
CC drivers/leds/led-class.o
CC drivers/acpi/acpica/utxfmutex.o
CC drivers/leds/led-triggers.o
AR drivers/firmware/arm_ffa/built-in.a
CC fs/binfmt_elf.o
AR drivers/firmware/arm_scmi/built-in.a
AR drivers/firmware/broadcom/built-in.a
CC fs/mbcache.o
CC drivers/cpufreq/intel_pstate.o
CC drivers/thermal/thermal_helpers.o
AR drivers/firmware/cirrus/built-in.a
AR drivers/firmware/meson/built-in.a
CC drivers/cpuidle/sysfs.o
AR drivers/firmware/microchip/built-in.a
CC drivers/firmware/efi/efi-bgrt.o
CC drivers/gpu/drm/drm_file.o
AR drivers/firmware/imx/built-in.a
CC drivers/cpuidle/poll_state.o
AR drivers/firmware/psci/built-in.a
CC drivers/thermal/thermal_hwmon.o
CC drivers/cpuidle/cpuidle-haltpoll.o
CC drivers/thermal/gov_step_wise.o
CC drivers/usb/host/xhci-dbg.o
CC drivers/thermal/gov_user_space.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
AR drivers/acpi/acpica/built-in.a
AR drivers/acpi/built-in.a
CC fs/posix_acl.o
CC fs/coredump.o
CC drivers/gpu/drm/drm_fourcc.o
CC drivers/firmware/efi/efi.o
CC net/ipv4/netlink.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle.o
AR drivers/net/ethernet/marvell/octeon_ep/built-in.a
AR drivers/net/ethernet/mellanox/built-in.a
AR drivers/net/ethernet/marvell/octeon_ep_vf/built-in.a
AR drivers/net/ethernet/marvell/octeontx2/built-in.a
AR drivers/net/ethernet/meta/built-in.a
AR drivers/net/ethernet/micrel/built-in.a
AR drivers/net/ethernet/marvell/prestera/built-in.a
AR drivers/net/ethernet/microchip/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
AR net/mac80211/built-in.a
CC drivers/net/ethernet/marvell/sky2.o
AR drivers/net/ethernet/mscc/built-in.a
CC drivers/clocksource/acpi_pm.o
CC net/ipv4/nexthop.o
CC drivers/hid/usbhid/hid-core.o
AR drivers/crypto/stm32/built-in.a
CC drivers/mailbox/mailbox.o
AR drivers/crypto/xilinx/built-in.a
AR drivers/perf/built-in.a
AR drivers/platform/x86/amd/built-in.a
CC drivers/gpu/drm/i915/gt/intel_engine_user.o
CC drivers/net/ethernet/intel/e1000e/nvm.o
CC drivers/usb/host/xhci-trace.o
AR drivers/leds/built-in.a
AR drivers/crypto/hisilicon/built-in.a
AR drivers/platform/x86/intel/built-in.a
CC drivers/platform/x86/wmi.o
CC drivers/hid/usbhid/hiddev.o
AR drivers/cpuidle/built-in.a
CC drivers/hid/usbhid/hid-pidff.o
AR drivers/platform/surface/built-in.a
AR drivers/crypto/intel/keembay/built-in.a
CC drivers/usb/host/xhci-debugfs.o
AR drivers/crypto/intel/ixp4xx/built-in.a
AR drivers/hwtracing/intel_th/built-in.a
AR drivers/crypto/intel/built-in.a
CC drivers/md/dm-target.o
CC drivers/platform/x86/wmi-bmof.o
CC drivers/md/dm-linear.o
CC drivers/gpu/drm/i915/gt/intel_execlists_submission.o
AR drivers/crypto/starfive/built-in.a
CC drivers/gpu/drm/i915/gt/intel_ggtt.o
AR drivers/thermal/built-in.a
AR drivers/crypto/built-in.a
CC drivers/platform/x86/eeepc-laptop.o
CC drivers/platform/x86/p2sb.o
CC drivers/clocksource/i8253.o
AR drivers/firmware/qcom/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC drivers/usb/host/xhci-pci.o
AR drivers/firmware/smccc/built-in.a
CC net/ipv4/udp_tunnel_stub.o
CC kernel/kallsyms.o
CC kernel/acct.o
AR drivers/firmware/tegra/built-in.a
CC net/ipv4/ip_tunnel.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_throttle.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC drivers/mailbox/pcc.o
CC drivers/firmware/efi/libstub/gop.o
AR drivers/net/ethernet/intel/e1000/built-in.a
CC drivers/firmware/efi/libstub/secureboot.o
CC kernel/vmcore_info.o
CC fs/drop_caches.o
AR drivers/firmware/xilinx/built-in.a
CC drivers/firmware/dmi_scan.o
CC fs/sysctls.o
CC drivers/firmware/dmi-id.o
CC drivers/md/dm-stripe.o
AR drivers/clocksource/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
CC drivers/md/dm-ioctl.o
CC net/ipv4/sysctl_net_ipv4.o
CC net/ipv4/proc.o
CC drivers/md/dm-io.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC net/ipv4/fib_rules.o
CC drivers/firmware/memmap.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
AR drivers/android/built-in.a
AR drivers/nvmem/layouts/built-in.a
CC drivers/nvmem/core.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
CC net/ipv4/ipmr.o
CC drivers/gpu/drm/drm_framebuffer.o
CC drivers/firmware/efi/libstub/tpm.o
CC [M] drivers/gpu/drm/xe/xe_guc_capture.o
AR drivers/mailbox/built-in.a
CC drivers/net/ethernet/intel/e1000e/phy.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC drivers/net/ethernet/intel/e1000e/param.o
AR drivers/net/ethernet/myricom/built-in.a
CC drivers/firmware/efi/libstub/file.o
CC drivers/md/dm-kcopyd.o
AR drivers/net/ethernet/natsemi/built-in.a
CC drivers/firmware/efi/libstub/mem.o
CC drivers/md/dm-sysfs.o
CC drivers/gpu/drm/drm_gem.o
CC drivers/firmware/efi/libstub/random.o
CC drivers/firmware/efi/libstub/randomalloc.o
AR drivers/platform/x86/built-in.a
AR drivers/hid/usbhid/built-in.a
CC kernel/elfcorehdr.o
CC kernel/crash_reserve.o
CC drivers/hid/hid-core.o
AR drivers/platform/built-in.a
CC fs/fhandle.o
CC net/ipv4/ipmr_base.o
CC drivers/gpu/drm/drm_ioctl.o
CC drivers/firmware/efi/vars.o
CC [M] drivers/gpu/drm/xe/xe_guc_db_mgr.o
CC drivers/firmware/efi/reboot.o
CC kernel/kexec_core.o
CC drivers/gpu/drm/drm_lease.o
CC net/ipv4/syncookies.o
AR drivers/cpufreq/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
AR drivers/net/ethernet/neterion/built-in.a
CC kernel/crash_core.o
AR drivers/net/ethernet/netronome/built-in.a
CC drivers/net/ethernet/nvidia/forcedeth.o
AR drivers/net/ethernet/ni/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_id_mgr.o
CC drivers/net/ethernet/intel/e1000e/ethtool.o
CC kernel/kexec.o
CC drivers/hid/hid-input.o
CC drivers/firmware/efi/libstub/pci.o
CC drivers/hid/hid-quirks.o
CC drivers/firmware/efi/libstub/skip_spaces.o
CC kernel/utsname.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC drivers/gpu/drm/drm_managed.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC drivers/gpu/drm/drm_mm.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC drivers/firmware/efi/libstub/relocate.o
CC kernel/pid_namespace.o
CC drivers/gpu/drm/i915/gt/intel_gt.o
CC drivers/firmware/efi/libstub/printk.o
CC kernel/stop_machine.o
AR drivers/nvmem/built-in.a
CC drivers/md/dm-stats.o
CC drivers/firmware/efi/memattr.o
CC drivers/gpu/drm/drm_mode_config.o
CC drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o
CC kernel/audit.o
CC drivers/gpu/drm/drm_mode_object.o
CC drivers/firmware/efi/tpm.o
AR fs/built-in.a
CC drivers/md/dm-rq.o
CC net/ipv4/tunnel4.o
CC [M] drivers/gpu/drm/xe/xe_guc_klv_helpers.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
CC drivers/net/ethernet/intel/e1000e/netdev.o
CC net/ipv4/ipconfig.o
CC drivers/gpu/drm/drm_modes.o
CC drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
CC drivers/firmware/efi/libstub/vsprintf.o
AR drivers/usb/host/built-in.a
CC drivers/md/dm-io-rewind.o
AR drivers/usb/built-in.a
CC drivers/md/dm-builtin.o
CC net/ipv4/netfilter.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC kernel/auditfilter.o
CC kernel/auditsc.o
CC drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC drivers/hid/hid-debug.o
CC kernel/audit_watch.o
CC drivers/firmware/efi/libstub/smbios.o
CC kernel/audit_fsnotify.o
CC kernel/audit_tree.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
CC net/ipv4/tcp_cubic.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
CC drivers/md/dm-raid1.o
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
CC drivers/net/ethernet/intel/e1000e/ptp.o
AR drivers/net/ethernet/marvell/built-in.a
CC drivers/firmware/efi/memmap.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
AR drivers/net/ethernet/oki-semi/built-in.a
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
CC kernel/kprobes.o
CC kernel/seccomp.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC net/ipv4/tcp_sigpool.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC drivers/gpu/drm/drm_modeset_lock.o
CC kernel/relay.o
CC kernel/utsname_sysctl.o
CC drivers/gpu/drm/drm_plane.o
CC drivers/firmware/efi/capsule.o
CC drivers/firmware/efi/esrt.o
CC drivers/hid/hidraw.o
CC net/ipv4/cipso_ipv4.o
CC drivers/gpu/drm/i915/gt/intel_gt_irq.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC kernel/delayacct.o
CC drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC drivers/md/dm-log.o
CC drivers/md/dm-region-hash.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
CC drivers/md/dm-zero.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_group.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
CC net/ipv4/xfrm4_policy.o
CC drivers/firmware/efi/runtime-wrappers.o
STUBCPY drivers/firmware/efi/libstub/smbios.stub.o
CC drivers/firmware/efi/capsule-loader.o
CC drivers/firmware/efi/earlycon.o
CC drivers/hid/hid-generic.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
AR drivers/net/ethernet/packetengines/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
CC drivers/gpu/drm/drm_prime.o
CC net/ipv4/xfrm4_state.o
CC net/ipv4/xfrm4_input.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
CC drivers/hid/hid-a4tech.o
CC drivers/hid/hid-apple.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
CC drivers/hid/hid-belkin.o
CC drivers/hid/hid-cherry.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
CC drivers/hid/hid-chicony.o
AR drivers/firmware/efi/libstub/lib.a
CC drivers/hid/hid-cypress.o
CC drivers/hid/hid-ezkey.o
CC kernel/taskstats.o
CC kernel/tsacct.o
CC kernel/tracepoint.o
CC kernel/irq_work.o
AR drivers/net/ethernet/qlogic/built-in.a
AR drivers/net/ethernet/qualcomm/emac/built-in.a
CC kernel/static_call.o
CC drivers/net/ethernet/realtek/8139too.o
AR drivers/net/ethernet/qualcomm/built-in.a
CC kernel/padata.o
AR drivers/net/ethernet/renesas/built-in.a
CC kernel/jump_label.o
AR drivers/net/ethernet/rdc/built-in.a
CC [M] drivers/gpu/drm/xe/xe_huc.o
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC drivers/gpu/drm/drm_print.o
CC net/ipv4/xfrm4_output.o
CC kernel/context_tracking.o
CC drivers/hid/hid-gyration.o
CC drivers/gpu/drm/drm_property.o
CC net/ipv4/xfrm4_protocol.o
AR drivers/net/ethernet/rocker/built-in.a
AR drivers/net/ethernet/samsung/built-in.a
CC drivers/hid/hid-ite.o
CC kernel/iomem.o
CC kernel/rseq.o
AR drivers/md/built-in.a
CC drivers/hid/hid-kensington.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
CC [M] drivers/gpu/drm/xe/xe_module.o
CC [M] drivers/gpu/drm/xe/xe_oa.o
CC [M] drivers/gpu/drm/xe/xe_observation.o
CC drivers/hid/hid-lg.o
AR drivers/firmware/efi/built-in.a
CC drivers/hid/hid-lgff.o
AR drivers/firmware/built-in.a
CC drivers/hid/hid-lg4ff.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC drivers/gpu/drm/drm_syncobj.o
CC drivers/hid/hid-lg-g15.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
CC drivers/hid/hid-microsoft.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
CC drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
CC drivers/gpu/drm/i915/gt/intel_gtt.o
AR drivers/net/ethernet/seeq/built-in.a
CC drivers/gpu/drm/i915/gt/intel_llc.o
AR drivers/net/ethernet/silan/built-in.a
AR drivers/net/ethernet/sis/built-in.a
AR drivers/net/ethernet/sfc/built-in.a
AR drivers/net/ethernet/nvidia/built-in.a
AR drivers/net/ethernet/smsc/built-in.a
AR drivers/net/ethernet/socionext/built-in.a
AR drivers/net/ethernet/stmicro/built-in.a
CC drivers/gpu/drm/i915/gt/intel_lrc.o
AR drivers/net/ethernet/sun/built-in.a
CC drivers/gpu/drm/i915/gt/intel_migrate.o
AR drivers/net/ethernet/tehuti/built-in.a
AR drivers/net/ethernet/vertexcom/built-in.a
AR drivers/net/ethernet/ti/built-in.a
CC drivers/gpu/drm/i915/gt/intel_mocs.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC drivers/net/ethernet/realtek/r8169_main.o
AR drivers/net/ethernet/via/built-in.a
CC drivers/net/ethernet/realtek/r8169_firmware.o
CC drivers/gpu/drm/drm_sysfs.o
CC drivers/gpu/drm/i915/gt/intel_ppgtt.o
AR drivers/net/ethernet/wangxun/built-in.a
CC drivers/gpu/drm/i915/gt/intel_rc6.o
CC drivers/gpu/drm/i915/gt/intel_region_lmem.o
CC drivers/hid/hid-monterey.o
CC drivers/net/ethernet/realtek/r8169_phy_config.o
CC drivers/hid/hid-ntrig.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC drivers/hid/hid-pl.o
CC drivers/hid/hid-petalynx.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC drivers/hid/hid-redragon.o
CC drivers/gpu/drm/drm_trace_points.o
CC drivers/hid/hid-samsung.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
AR kernel/built-in.a
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC drivers/gpu/drm/i915/gt/intel_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
AR drivers/net/ethernet/wiznet/built-in.a
CC drivers/gpu/drm/i915/gt/intel_reset.o
CC [M] drivers/gpu/drm/xe/xe_step.o
AR net/ipv4/built-in.a
AR net/built-in.a
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC drivers/hid/hid-sony.o
CC drivers/hid/hid-sunplus.o
AR drivers/net/ethernet/xilinx/built-in.a
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC [M] drivers/gpu/drm/xe/xe_trace_bo.o
CC drivers/gpu/drm/i915/gt/intel_ring.o
CC [M] drivers/gpu/drm/xe/xe_trace_guc.o
CC drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC drivers/hid/hid-topseed.o
CC drivers/gpu/drm/i915/gt/intel_rps.o
CC drivers/gpu/drm/i915/gt/intel_sa_media.o
CC drivers/gpu/drm/i915/gt/intel_sseu.o
CC drivers/gpu/drm/drm_vblank.o
AR drivers/net/ethernet/xircom/built-in.a
CC drivers/gpu/drm/drm_vblank_work.o
AR drivers/net/ethernet/synopsys/built-in.a
CC drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
CC drivers/gpu/drm/i915/gt/intel_timeline.o
AR drivers/net/ethernet/pensando/built-in.a
CC drivers/gpu/drm/drm_vma_manager.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC drivers/gpu/drm/i915/gt/intel_tlb.o
CC drivers/gpu/drm/drm_writeback.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC drivers/gpu/drm/i915/gt/intel_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC drivers/gpu/drm/drm_panel.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
AR drivers/net/ethernet/intel/e1000e/built-in.a
CC [M] drivers/gpu/drm/xe/xe_vm.o
AR drivers/net/ethernet/intel/built-in.a
CC [M] drivers/gpu/drm/xe/xe_vram.o
CC drivers/gpu/drm/i915/gt/intel_workarounds.o
CC drivers/gpu/drm/i915/gt/shmem_utils.o
CC [M] drivers/gpu/drm/xe/xe_vram_freq.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC drivers/gpu/drm/i915/gt/sysfs_engines.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC drivers/gpu/drm/drm_pci.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_hmm.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf.o
CC drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC drivers/gpu/drm/i915/gt/gen9_renderstate.o
CC drivers/gpu/drm/i915/gem/i915_gem_busy.o
CC [M] drivers/gpu/drm/xe/xe_guc_relay.o
CC [M] drivers/gpu/drm/xe/xe_memirq.o
CC drivers/gpu/drm/i915/gem/i915_gem_clflush.o
CC drivers/gpu/drm/drm_debugfs.o
CC drivers/gpu/drm/i915/gem/i915_gem_context.o
CC [M] drivers/gpu/drm/xe/xe_sriov.o
CC drivers/gpu/drm/i915/gem/i915_gem_create.o
CC drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC drivers/gpu/drm/drm_debugfs_crc.o
CC drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
CC drivers/gpu/drm/drm_panel_orientation_quirks.o
AR drivers/hid/built-in.a
CC drivers/gpu/drm/drm_buddy.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC drivers/gpu/drm/drm_gem_shmem_helper.o
CC drivers/gpu/drm/drm_atomic_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC drivers/gpu/drm/drm_atomic_state_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC drivers/gpu/drm/drm_bridge_connector.o
CC [M] drivers/gpu/drm/xe/display/intel_fb_bo.o
CC drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC drivers/gpu/drm/drm_crtc_helper.o
CC drivers/gpu/drm/drm_damage_helper.o
CC [M] drivers/gpu/drm/xe/display/intel_fbdev_fb.o
CC drivers/gpu/drm/i915/gem/i915_gem_object.o
CC drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/xe/display/xe_display.o
CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC drivers/gpu/drm/drm_encoder_slave.o
CC [M] drivers/gpu/drm/xe/display/xe_display_wa.o
CC [M] drivers/gpu/drm/xe/display/xe_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC drivers/gpu/drm/i915/gem/i915_gem_region.o
CC drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC [M] drivers/gpu/drm/xe/display/xe_tdf.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o
CC drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
AR drivers/net/ethernet/realtek/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_throttle.o
CC drivers/gpu/drm/drm_flip_work.o
CC drivers/gpu/drm/drm_format_helper.o
AR drivers/net/ethernet/built-in.a
CC [M] drivers/gpu/drm/xe/i915-display/intel_alpm.o
CC drivers/gpu/drm/drm_gem_atomic_helper.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC drivers/gpu/drm/drm_gem_framebuffer_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC drivers/gpu/drm/drm_kms_helper_common.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
AR drivers/net/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_userptr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC drivers/gpu/drm/drm_modeset_helper.o
CC drivers/gpu/drm/drm_plane_helper.o
CC drivers/gpu/drm/drm_probe_helper.o
CC drivers/gpu/drm/drm_rect.o
CC drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC drivers/gpu/drm/drm_self_refresh_helper.o
CC drivers/gpu/drm/i915/gem/i915_gemfs.o
CC drivers/gpu/drm/drm_simple_kms_helper.o
CC drivers/gpu/drm/bridge/panel.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC drivers/gpu/drm/i915/i915_active.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC [M] drivers/gpu/drm/drm_exec.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC drivers/gpu/drm/i915/i915_cmd_parser.o
CC drivers/gpu/drm/i915/i915_deps.o
CC drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC [M] drivers/gpu/drm/drm_gpuvm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC drivers/gpu/drm/i915/i915_gem_gtt.o
CC drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/i915_query.o
CC drivers/gpu/drm/i915/i915_request.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC drivers/gpu/drm/i915/i915_scheduler.o
CC drivers/gpu/drm/i915/i915_trace_points.o
CC drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC drivers/gpu/drm/i915/i915_vma.o
CC drivers/gpu/drm/i915/i915_vma_resource.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC drivers/gpu/drm/i915/gt/intel_gsc.o
CC drivers/gpu/drm/i915/i915_hwmon.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt_common.o
CC drivers/gpu/drm/i915/display/hsw_ips.o
CC drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC drivers/gpu/drm/i915/display/i9xx_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_alpm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_atomic.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_audio.o
CC drivers/gpu/drm/i915/display/intel_bios.o
CC drivers/gpu/drm/i915/display/intel_bw.o
CC drivers/gpu/drm/i915/display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC drivers/gpu/drm/i915/display/intel_color.o
CC drivers/gpu/drm/i915/display/intel_combo_phy.o
CC drivers/gpu/drm/i915/display/intel_connector.o
CC drivers/gpu/drm/i915/display/intel_crtc.o
CC drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC drivers/gpu/drm/i915/display/intel_cursor.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC drivers/gpu/drm/i915/display/intel_display_driver.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC drivers/gpu/drm/i915/display/intel_display_irq.o
CC drivers/gpu/drm/i915/display/intel_display_params.o
CC drivers/gpu/drm/i915/display/intel_display_power.o
CC drivers/gpu/drm/i915/display/intel_display_power_map.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_display_power_well.o
CC drivers/gpu/drm/i915/display/intel_display_reset.o
CC drivers/gpu/drm/i915/display/intel_display_rps.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp_gsc_message.o
CC drivers/gpu/drm/i915/display/intel_display_wa.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o
CC drivers/gpu/drm/i915/display/intel_dmc_wl.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC drivers/gpu/drm/i915/display/intel_dpll.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC drivers/gpu/drm/i915/display/intel_dpt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_dpt_common.o
CC drivers/gpu/drm/i915/display/intel_drrs.o
CC drivers/gpu/drm/i915/display/intel_dsb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_fb.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_fb_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_fb_pin.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC drivers/gpu/drm/i915/display/intel_fdi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc_wl.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC drivers/gpu/drm/i915/display/intel_hotplug.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_stats.o
CC drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC drivers/gpu/drm/i915/display/intel_hti.o
CC drivers/gpu/drm/i915/display/intel_link_bw.o
CC drivers/gpu/drm/i915/display/intel_load_detect.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC drivers/gpu/drm/i915/display/intel_overlay.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o
CC drivers/gpu/drm/i915/display/intel_pch_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC drivers/gpu/drm/i915/display/intel_plane_initial.o
CC drivers/gpu/drm/i915/display/intel_pmdemand.o
CC drivers/gpu/drm/i915/display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_quirks.o
CC drivers/gpu/drm/i915/display/intel_sprite.o
CC drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC drivers/gpu/drm/i915/display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_vblank.o
CC drivers/gpu/drm/i915/display/intel_vga.o
CC drivers/gpu/drm/i915/display/intel_wm.o
CC drivers/gpu/drm/i915/display/skl_scaler.o
CC drivers/gpu/drm/i915/display/skl_universal_plane.o
CC drivers/gpu/drm/i915/display/skl_watermark.o
CC drivers/gpu/drm/i915/display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs_params.o
CC drivers/gpu/drm/i915/display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/dvo_ch7017.o
CC drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC drivers/gpu/drm/i915/display/dvo_ivch.o
CC drivers/gpu/drm/i915/display/dvo_ns2501.o
CC drivers/gpu/drm/i915/display/dvo_sil164.o
CC drivers/gpu/drm/i915/display/dvo_tfp410.o
CC drivers/gpu/drm/i915/display/g4x_dp.o
CC drivers/gpu/drm/i915/display/g4x_hdmi.o
CC drivers/gpu/drm/i915/display/icl_dsi.o
CC drivers/gpu/drm/i915/display/intel_backlight.o
CC drivers/gpu/drm/i915/display/intel_crt.o
CC drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_ddi.o
CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_dp.o
CC drivers/gpu/drm/i915/display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dvo.o
CC drivers/gpu/drm/i915/display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_lvds.o
CC drivers/gpu/drm/i915/display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_sdvo.o
CC drivers/gpu/drm/i915/display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_tv.o
CC drivers/gpu/drm/i915/display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_vrr.o
CC drivers/gpu/drm/i915/display/vlv_dsi.o
CC drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC drivers/gpu/drm/i915/i915_perf.o
LD [M] drivers/gpu/drm/xe/xe.o
CC drivers/gpu/drm/i915/pxp/intel_pxp.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC drivers/gpu/drm/i915/i915_gpu_error.o
CC drivers/gpu/drm/i915/i915_vgpu.o
AR drivers/gpu/drm/i915/built-in.a
AR drivers/gpu/drm/built-in.a
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR vmlinux.a
LD vmlinux.o
OBJCOPY modules.builtin.modinfo
GEN modules.builtin
MODPOST Module.symvers
CC .vmlinux.export.o
CC [M] fs/efivarfs/efivarfs.mod.o
CC [M] drivers/gpu/drm/drm_exec.mod.o
CC [M] drivers/gpu/drm/drm_gpuvm.mod.o
CC [M] drivers/gpu/drm/drm_suballoc_helper.mod.o
CC [M] drivers/gpu/drm/drm_ttm_helper.mod.o
CC [M] drivers/gpu/drm/scheduler/gpu-sched.mod.o
CC [M] drivers/gpu/drm/xe/xe.mod.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.mod.o
CC [M] sound/core/snd-hwdep.mod.o
CC [M] sound/core/snd-pcm.mod.o
CC [M] sound/pci/hda/snd-hda-codec.mod.o
CC [M] sound/pci/hda/snd-hda-codec-hdmi.mod.o
CC [M] sound/pci/hda/snd-hda-intel.mod.o
CC [M] sound/hda/snd-hda-core.mod.o
CC [M] sound/hda/snd-intel-dspcfg.mod.o
CC [M] sound/hda/snd-intel-sdw-acpi.mod.o
CC [M] net/netfilter/nf_log_syslog.mod.o
CC [M] net/netfilter/xt_mark.mod.o
CC [M] net/netfilter/xt_nat.mod.o
CC [M] net/netfilter/xt_LOG.mod.o
CC [M] net/netfilter/xt_MASQUERADE.mod.o
CC [M] net/netfilter/xt_addrtype.mod.o
CC [M] net/ipv4/netfilter/iptable_nat.mod.o
LD [M] fs/efivarfs/efivarfs.ko
LD [M] drivers/gpu/drm/drm_exec.ko
LD [M] drivers/gpu/drm/scheduler/gpu-sched.ko
LD [M] net/netfilter/xt_MASQUERADE.ko
LD [M] net/netfilter/xt_addrtype.ko
LD [M] net/netfilter/xt_LOG.ko
LD [M] drivers/gpu/drm/drm_suballoc_helper.ko
LD [M] net/ipv4/netfilter/iptable_nat.ko
LD [M] sound/hda/snd-intel-sdw-acpi.ko
LD [M] net/netfilter/xt_mark.ko
LD [M] sound/pci/hda/snd-hda-codec-hdmi.ko
LD [M] sound/pci/hda/snd-hda-intel.ko
LD [M] drivers/thermal/intel/x86_pkg_temp_thermal.ko
LD [M] sound/core/snd-hwdep.ko
LD [M] drivers/gpu/drm/drm_ttm_helper.ko
LD [M] drivers/gpu/drm/drm_gpuvm.ko
LD [M] sound/hda/snd-hda-core.ko
LD [M] net/netfilter/nf_log_syslog.ko
LD [M] sound/pci/hda/snd-hda-codec.ko
LD [M] net/netfilter/xt_nat.ko
LD [M] sound/hda/snd-intel-dspcfg.ko
LD [M] sound/core/snd-pcm.ko
LD [M] drivers/gpu/drm/xe/xe.ko
UPD include/generated/utsversion.h
CC init/version-timestamp.o
KSYMS .tmp_vmlinux0.kallsyms.S
AS .tmp_vmlinux0.kallsyms.o
LD .tmp_vmlinux1
NM .tmp_vmlinux1.syms
KSYMS .tmp_vmlinux1.kallsyms.S
AS .tmp_vmlinux1.kallsyms.o
LD .tmp_vmlinux2
NM .tmp_vmlinux2.syms
KSYMS .tmp_vmlinux2.kallsyms.S
AS .tmp_vmlinux2.kallsyms.o
LD vmlinux
NM System.map
SORTTAB vmlinux
RELOCS arch/x86/boot/compressed/vmlinux.relocs
RSTRIP vmlinux
CC arch/x86/boot/a20.o
AS arch/x86/boot/bioscall.o
CC arch/x86/boot/cmdline.o
AS arch/x86/boot/copy.o
HOSTCC arch/x86/boot/mkcpustr
CC arch/x86/boot/cpuflags.o
CC arch/x86/boot/cpucheck.o
CC arch/x86/boot/early_serial_console.o
CC arch/x86/boot/edd.o
CC arch/x86/boot/main.o
CC arch/x86/boot/memory.o
CC arch/x86/boot/pm.o
AS arch/x86/boot/pmjump.o
CC arch/x86/boot/printf.o
CC arch/x86/boot/regs.o
CC arch/x86/boot/string.o
CC arch/x86/boot/tty.o
CC arch/x86/boot/video.o
CC arch/x86/boot/video-mode.o
CC arch/x86/boot/version.o
CC arch/x86/boot/video-vga.o
CC arch/x86/boot/video-vesa.o
CC arch/x86/boot/video-bios.o
HOSTCC arch/x86/boot/tools/build
CPUSTR arch/x86/boot/cpustr.h
CC arch/x86/boot/cpu.o
LDS arch/x86/boot/compressed/vmlinux.lds
AS arch/x86/boot/compressed/kernel_info.o
AS arch/x86/boot/compressed/head_32.o
VOFFSET arch/x86/boot/compressed/../voffset.h
CC arch/x86/boot/compressed/string.o
CC arch/x86/boot/compressed/cmdline.o
CC arch/x86/boot/compressed/error.o
OBJCOPY arch/x86/boot/compressed/vmlinux.bin
HOSTCC arch/x86/boot/compressed/mkpiggy
CC arch/x86/boot/compressed/cpuflags.o
CC arch/x86/boot/compressed/kaslr.o
CC arch/x86/boot/compressed/early_serial_console.o
CC arch/x86/boot/compressed/acpi.o
CC arch/x86/boot/compressed/efi.o
GZIP arch/x86/boot/compressed/vmlinux.bin.gz
CC arch/x86/boot/compressed/misc.o
MKPIGGY arch/x86/boot/compressed/piggy.S
AS arch/x86/boot/compressed/piggy.o
LD arch/x86/boot/compressed/vmlinux
ZOFFSET arch/x86/boot/zoffset.h
OBJCOPY arch/x86/boot/vmlinux.bin
AS arch/x86/boot/header.o
LD arch/x86/boot/setup.elf
OBJCOPY arch/x86/boot/setup.bin
BUILD arch/x86/boot/bzImage
Kernel: arch/x86/boot/bzImage is ready (#1)
run-parts: executing /workspace/ci/hooks/20-kernel-doc
+ SRC_DIR=/workspace/kernel
+ cd /workspace/kernel
+ find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*'
+ xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h
All hooks done
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.checksparse: success for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (11 preceding siblings ...)
2024-08-27 22:12 ` ✓ CI.Hooks: " Patchwork
@ 2024-08-27 22:14 ` Patchwork
2024-08-27 22:35 ` ✓ CI.BAT: " Patchwork
2024-08-28 7:41 ` ✗ CI.FULL: failure " Patchwork
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-27 22:14 UTC (permalink / raw)
To: Zhanjun Dong; +Cc: intel-xe
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : success
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 585f8637f5e5ec0a20162bad3051d2a9e2b78de5
Sparse version: 0.6.1 (Ubuntu: 0.6.1-2build1)
Fast mode used, each commit won't be checked separately.
Okay!
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v17 5/7] drm/xe/guc: Move xe_lrc_snapshot to header file
2024-08-27 21:47 ` [PATCH v17 5/7] drm/xe/guc: Move xe_lrc_snapshot to header file Zhanjun Dong
@ 2024-08-27 22:32 ` Teres Alexis, Alan Previn
0 siblings, 0 replies; 23+ messages in thread
From: Teres Alexis, Alan Previn @ 2024-08-27 22:32 UTC (permalink / raw)
To: Dong, Zhanjun, intel-xe@lists.freedesktop.org
On Tue, 2024-08-27 at 14:47 -0700, Zhanjun Dong wrote:
> Move xe_lrc_snapshot structure define to header file, GuC capture
> feature
> need to access structure fields.
>
> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
> ---
> drivers/gpu/drm/xe/xe_lrc.c | 18 ------------------
> drivers/gpu/drm/xe/xe_lrc_types.h | 18 +++++++++++++++++-
> 2 files changed, 17 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_lrc.c
> b/drivers/gpu/drm/xe/xe_lrc.c
> index aec7db39c061..52f8d202e262 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.c
> +++ b/drivers/gpu/drm/xe/xe_lrc.c
> @@ -38,24 +38,6 @@
>
> #define LRC_INDIRECT_RING_STATE_SIZE SZ_4K
>
> -struct xe_lrc_snapshot {
> - struct xe_bo *lrc_bo;
> - void *lrc_snapshot;
> - unsigned long lrc_size, lrc_offset;
> -
> - u32 context_desc;
> - u32 indirect_context_desc;
> - u32 head;
> - struct {
> - u32 internal;
> - u32 memory;
> - } tail;
> - u32 start_seqno;
> - u32 seqno;
> - u32 ctx_timestamp;
> - u32 ctx_job_timestamp;
> -};
> -
> static struct xe_device *
> lrc_to_xe(struct xe_lrc *lrc)
> {
> diff --git a/drivers/gpu/drm/xe/xe_lrc_types.h
> b/drivers/gpu/drm/xe/xe_lrc_types.h
> index 71ecb453f811..011d4607e585 100644
> --- a/drivers/gpu/drm/xe/xe_lrc_types.h
> +++ b/drivers/gpu/drm/xe/xe_lrc_types.h
> @@ -55,6 +55,22 @@ struct xe_lrc {
> u32 ctx_timestamp;
> };
>
> -struct xe_lrc_snapshot;
> +struct xe_lrc_snapshot {
> + struct xe_bo *lrc_bo;
> + void *lrc_snapshot;
> + unsigned long lrc_size, lrc_offset;
> +
> + u32 context_desc;
> + u32 indirect_context_desc;
> + u32 head;
> + struct {
> + u32 internal;
> + u32 memory;
> + } tail;
> + u32 start_seqno;
> + u32 seqno;
> + u32 ctx_timestamp;
> + u32 ctx_job_timestamp;
> +};
>
> #endif
alan: repeating from v16: alan: i believe it's not acceptable to make
this patch changes independant of where the changes is being used.
From what i recall from our conf-call review last week, this change is
needed by patch #7. That said, i am providing a conditional rb with the
condition that this patch needs to be squashed with patch #7 (i.e. the
patch titled "drm/xe/guc: Plumb GuC-capture into dev coredump"):
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✓ CI.BAT: success for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (12 preceding siblings ...)
2024-08-27 22:14 ` ✓ CI.checksparse: " Patchwork
@ 2024-08-27 22:35 ` Patchwork
2024-08-28 7:41 ` ✗ CI.FULL: failure " Patchwork
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-27 22:35 UTC (permalink / raw)
To: Dong, Zhanjun; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2357 bytes --]
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : success
== Summary ==
CI Bug Log - changes from xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8_BAT -> xe-pw-128077v17_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (9 -> 9)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-128077v17_BAT:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@xe_evict@evict-small:
- {bat-bmg-2}: [PASS][1] -> [FAIL][2] +1 other test fail
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/bat-bmg-2/igt@xe_evict@evict-small.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/bat-bmg-2/igt@xe_evict@evict-small.html
Known issues
------------
Here are the changes found in xe-pw-128077v17_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-wf_vblank:
- bat-lnl-1: [PASS][3] -> [FAIL][4] ([Intel XE#886]) +1 other test fail
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/bat-lnl-1/igt@kms_flip@basic-flip-vs-wf_vblank.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/bat-lnl-1/igt@kms_flip@basic-flip-vs-wf_vblank.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
Build changes
-------------
* Linux: xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8 -> xe-pw-128077v17
IGT_7993: 3b6b2d238e864ff1af9e33159d3bbf4b7f01d86d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8: 5cb507fe7eb6fde0c8ca4568c908a22afa6590a8
xe-pw-128077v17: 128077v17
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/index.html
[-- Attachment #2: Type: text/html, Size: 2965 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v17 1/7] drm/xe/guc: Prepare GuC register list and update ADS size for error capture
2024-08-27 21:47 ` [PATCH v17 1/7] drm/xe/guc: Prepare GuC register list and update ADS size " Zhanjun Dong
@ 2024-08-27 23:05 ` Teres Alexis, Alan Previn
0 siblings, 0 replies; 23+ messages in thread
From: Teres Alexis, Alan Previn @ 2024-08-27 23:05 UTC (permalink / raw)
To: Dong, Zhanjun, intel-xe@lists.freedesktop.org
On Tue, 2024-08-27 at 14:47 -0700, Zhanjun Dong wrote:
> Add referenced registers defines and list of registers.
> Update GuC ADS size allocation to include space for
> the lists of error state capture register descriptors.
>
> Then, populate GuC ADS with the lists of registers we want
> GuC to report back to host on engine reset events. This list
> should include global, engine-class and engine-instance
> registers for every engine-class type on the current hardware.
>
> Ensure we allocate a persistent storage for the register lists
> that are populated into ADS so that we don't need to allocate
> memory during GT resets when GuC is reloaded and ADS population
> happens again.
>
> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
> ---
LGTM.
Ofc as per last rev and offline discussions, while we close
on the remaining review comments of the entire series, lets
ensure the register printout ordering is good for debug tools.
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v17 6/7] drm/xe/guc: Add dss conversion from group/instance ID
2024-08-27 21:47 ` [PATCH v17 6/7] drm/xe/guc: Add dss conversion from group/instance ID Zhanjun Dong
@ 2024-08-27 23:15 ` Teres Alexis, Alan Previn
0 siblings, 0 replies; 23+ messages in thread
From: Teres Alexis, Alan Previn @ 2024-08-27 23:15 UTC (permalink / raw)
To: Dong, Zhanjun, intel-xe@lists.freedesktop.org
Looks good to me - although, and I'll call this a nit:
just like the patch #5, this patch also appears as an orphan
with no caller/user. So perhaps we can either squash this into
patch-7 as part of a rev18, if we need a rev18... OR ...
when its time to merge, we can ask the committer to help
squash patch 5, 6 and 7 together:
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
On Tue, 2024-08-27 at 14:47 -0700, Zhanjun Dong wrote:
> Add dss conversion from group/instance ID.
>
> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
> Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
> ---
> drivers/gpu/drm/xe/xe_gt_mcr.c | 13 +++++++++++++
> drivers/gpu/drm/xe/xe_gt_mcr.h | 1 +
> 2 files changed, 14 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.c
> b/drivers/gpu/drm/xe/xe_gt_mcr.c
> index 7d7bd0be6233..5deef7ee7925 100644
> --- a/drivers/gpu/drm/xe/xe_gt_mcr.c
> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.c
> @@ -352,6 +352,19 @@ void xe_gt_mcr_get_dss_steering(struct xe_gt
> *gt, unsigned int dss, u16 *group,
> *instance = dss % gt->steering_dss_per_grp;
> }
>
> +/**
> + * xe_gt_mcr_steering_info_to_dss_id - Get DSS ID from
> group/instance steering
> + * @gt: GT structure
> + * @group: steering group ID
> + * @instance: steering instance ID
> + *
> + * Return: the coverted DSS id.
> + */
> +u32 xe_gt_mcr_steering_info_to_dss_id(struct xe_gt *gt, u16 group,
> u16 instance)
> +{
> + return group * dss_per_group(gt) + instance;
> +}
> +
> static void init_steering_dss(struct xe_gt *gt)
> {
> gt->steering_dss_per_grp = dss_per_group(gt);
> diff --git a/drivers/gpu/drm/xe/xe_gt_mcr.h
> b/drivers/gpu/drm/xe/xe_gt_mcr.h
> index 8d119a0d5493..c0cd36021c24 100644
> --- a/drivers/gpu/drm/xe/xe_gt_mcr.h
> +++ b/drivers/gpu/drm/xe/xe_gt_mcr.h
> @@ -28,6 +28,7 @@ void xe_gt_mcr_multicast_write(struct xe_gt *gt,
> struct xe_reg_mcr mcr_reg,
>
> void xe_gt_mcr_steering_dump(struct xe_gt *gt, struct drm_printer
> *p);
> void xe_gt_mcr_get_dss_steering(struct xe_gt *gt, unsigned int dss,
> u16 *group, u16 *instance);
> +u32 xe_gt_mcr_steering_info_to_dss_id(struct xe_gt *gt, u16 group,
> u16 instance);
>
> /*
> * Loop over each DSS and determine the group and instance IDs that
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v17 4/7] drm/xe/guc: Extract GuC error capture lists
2024-08-27 21:47 ` [PATCH v17 4/7] drm/xe/guc: Extract GuC error capture lists Zhanjun Dong
@ 2024-08-28 0:22 ` Teres Alexis, Alan Previn
0 siblings, 0 replies; 23+ messages in thread
From: Teres Alexis, Alan Previn @ 2024-08-28 0:22 UTC (permalink / raw)
To: Dong, Zhanjun, intel-xe@lists.freedesktop.org
So I compared the v15 vs v17 and looked at the difference..
I already did a full review in v14 and v15 addressed v14.
That said, everything looks good here except a couple of minor nits.
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
On Tue, 2024-08-27 at 14:47 -0700, Zhanjun Dong wrote:
> Upon the G2H Notify-Err-Capture event, parse through the
> GuC Log Buffer (error-capture-subregion) and generate one or
> more capture-nodes. A single node represents a single "engine-
> instance-capture-dump" and contains at least 3 register lists:
> global, engine-class and engine-instance. An internal link
> list is maintained to store one or more nodes.
>
>
alan:snip
> +static void
> +guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *node)
> +{
> + struct guc_mmio_reg *tmp[GUC_STATE_CAPTURE_TYPE_MAX];
> + int i;
> +
> + for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
> + tmp[i] = node->reginfo[i].regs;
> + memset(tmp[i], 0, sizeof(struct guc_mmio_reg) *
> + guc->capture->max_mmio_per_node);
> + }
> + memset(node, 0, sizeof(*node));
> + for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i)
> + node->reginfo[i].regs = tmp[i];
> +
> + INIT_LIST_HEAD(&node->link);
> +}
> +
> +/**
> + * DOC: Init, G2H-event and reporting flows for GuC-error-capture
> + *
> + * KMD Init time flows:
> + * --------------------
> + * --> alloc A: GuC input capture regs lists (registered to GuC via ADS).
> + * xe_guc_ads acquires the register lists by calling
> + * xe_guc_capture_list_size and xe_guc_capture_list_get 'n' times,
alan: looks like we've been updating the codes but not this documentation:
:%s/xe_guc_capture_list_size/xe_guc_capture_getlistsize
:%s/xe_guc_capture_list_get/xe_guc_capture_getlist
> + * where n = 1 for global-reg-list +
> + * num_engine_classes for class-reg-list +
> + * num_engine_classes for instance-reg-list
> + * (since all instances of the same engine-class type
> + * have an identical engine-instance register-list).
> + * ADS module also calls separately for PF vs VF.
> + *
> + * --> alloc B: GuC output capture buf (registered via guc_init_params(log_param))
> + * Size = #define CAPTURE_BUFFER_SIZE (warns if on too-small)
> + * Note2: 'x 3' to hold multiple capture groups
> + *
> + * GUC Runtime notify capture:
> + * --------------------------
> + * --> G2H STATE_CAPTURE_NOTIFICATION
> + * L--> xe_guc_capture_process
> + * L--> Loop through B (head..tail) and for each engine instance's
> + * err-state-captured register-list we find, we alloc 'C':
> + * --> alloc C: A capture-output-node structure that includes misc capture info along
> + * with 3 register list dumps (global, engine-class and engine-instance)
> + * This node is created from a pre-allocated list of blank nodes in
> + * guc->capture->cachelist and populated with the error-capture
> + * data from GuC and then it's added into guc->capture->outlist linked
> + * list. This list is used for matchup and printout by xe_devcoredump_read
> + * and xe_hw_engine_snapshot_print, (when user invokes the devcoredump sysfs).
> + *
> + * GUC --> notify context reset:
> + * -----------------------------
> + * --> guc_exec_queue_timedout_job
> + * L--> xe_devcoredump
> + * L--> devcoredump_snapshot(..IS_GUC_CAPTURE)
alan: nit: can we remove the "IS_GUC_CAPTURE"
> + * --> xe_hw_engine_snapshot_capture(..IS_GUC_CAPTURE)
alan: nit: same here.. remove the "IS_GUC_CAPTURE"
> + *
> + * User Sysfs / Debugfs
> + * --------------------
> + * --> xe_devcoredump_read->
> + * L--> xxx_snapshot_print
> + * L--> xe_hw_engine_snapshot_print
> + * Print register lists values saved at
> + * guc->capture->outlist
> + *
> + */
> +
alan:snip
^ permalink raw reply [flat|nested] 23+ messages in thread
* ✗ CI.FULL: failure for drm/xe/guc: Add GuC based register capture for error capture (rev17)
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
` (13 preceding siblings ...)
2024-08-27 22:35 ` ✓ CI.BAT: " Patchwork
@ 2024-08-28 7:41 ` Patchwork
14 siblings, 0 replies; 23+ messages in thread
From: Patchwork @ 2024-08-28 7:41 UTC (permalink / raw)
To: Dong, Zhanjun; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 83340 bytes --]
== Series Details ==
Series: drm/xe/guc: Add GuC based register capture for error capture (rev17)
URL : https://patchwork.freedesktop.org/series/128077/
State : failure
== Summary ==
CI Bug Log - changes from xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8_full -> xe-pw-128077v17_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-128077v17_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-128077v17_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-128077v17_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_flip@2x-flip-vs-panning-interruptible@ac-hdmi-a6-dp4:
- shard-dg2-set2: [PASS][1] -> [DMESG-WARN][2] +3 other tests dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-435/igt@kms_flip@2x-flip-vs-panning-interruptible@ac-hdmi-a6-dp4.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-436/igt@kms_flip@2x-flip-vs-panning-interruptible@ac-hdmi-a6-dp4.html
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@kms_async_flips@test-time-stamp@pipe-a-dp-2:
- {shard-bmg}: [PASS][3] -> [DMESG-WARN][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-3/igt@kms_async_flips@test-time-stamp@pipe-a-dp-2.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-3/igt@kms_async_flips@test-time-stamp@pipe-a-dp-2.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-b-dp-2:
- {shard-bmg}: [SKIP][5] ([Intel XE#787]) -> [FAIL][6]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-b-dp-2.html
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-b-dp-2.html
* igt@kms_rotation_crc@multiplane-rotation:
- {shard-bmg}: [PASS][7] -> [INCOMPLETE][8] +2 other tests incomplete
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-5/igt@kms_rotation_crc@multiplane-rotation.html
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-6/igt@kms_rotation_crc@multiplane-rotation.html
Known issues
------------
Here are the changes found in xe-pw-128077v17_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-lnl: NOTRUN -> [SKIP][9] ([Intel XE#1125])
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@intel_hwmon@hwmon-write.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition:
- shard-adlp: [PASS][10] -> [FAIL][11] ([Intel XE#1426]) +3 other tests fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-8/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0:
- shard-adlp: NOTRUN -> [SKIP][12] ([Intel XE#1124] / [Intel XE#1201]) +5 other tests skip
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@linear-8bpp-rotate-90:
- shard-dg2-set2: NOTRUN -> [SKIP][13] ([Intel XE#1201] / [Intel XE#316])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_big_fb@linear-8bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][14] ([Intel XE#1201] / [Intel XE#316]) +3 other tests skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_big_fb@y-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- shard-adlp: NOTRUN -> [FAIL][15] ([Intel XE#1874])
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip:
- shard-lnl: NOTRUN -> [SKIP][16] ([Intel XE#1124]) +3 other tests skip
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg2-set2: NOTRUN -> [SKIP][17] ([Intel XE#1124] / [Intel XE#1201]) +1 other test skip
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_joiner@basic:
- shard-adlp: NOTRUN -> [SKIP][18] ([Intel XE#1201] / [Intel XE#346])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_big_joiner@basic.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][19] ([Intel XE#1201] / [Intel XE#2191])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
- shard-dg2-set2: NOTRUN -> [SKIP][20] ([Intel XE#1201] / [Intel XE#2191])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-adlp: NOTRUN -> [SKIP][21] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) +15 other tests skip
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][22] ([Intel XE#787]) +13 other tests skip
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs@pipe-b-dp-4.html
* igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][23] ([Intel XE#1201] / [Intel XE#787]) +23 other tests skip
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-b-hdmi-a-1.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs:
- shard-dg2-set2: NOTRUN -> [SKIP][24] ([Intel XE#1201] / [Intel XE#455] / [Intel XE#787]) +3 other tests skip
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][25] ([Intel XE#1201] / [Intel XE#787]) +13 other tests skip
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs@pipe-a-dp-4.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs:
- shard-adlp: NOTRUN -> [SKIP][26] ([Intel XE#1201] / [Intel XE#1252]) +1 other test skip
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [FAIL][27] ([Intel XE#616]) +8 other tests fail
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][28] ([Intel XE#455] / [Intel XE#787]) +1 other test skip
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@random-ccs-data-y-tiled-ccs:
- shard-lnl: NOTRUN -> [SKIP][29] ([Intel XE#1399]) +5 other tests skip
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html
* igt@kms_chamelium_color@gamma:
- shard-lnl: NOTRUN -> [SKIP][30] ([Intel XE#306]) +2 other tests skip
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@dp-edid-resolution-list:
- shard-adlp: NOTRUN -> [SKIP][31] ([Intel XE#1201] / [Intel XE#373]) +6 other tests skip
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_chamelium_edid@dp-edid-resolution-list.html
- shard-dg2-set2: NOTRUN -> [SKIP][32] ([Intel XE#1201] / [Intel XE#373]) +2 other tests skip
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_chamelium_edid@dp-edid-resolution-list.html
* igt@kms_chamelium_hpd@dp-hpd-after-hibernate:
- shard-lnl: NOTRUN -> [SKIP][33] ([Intel XE#373])
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_chamelium_hpd@dp-hpd-after-hibernate.html
* igt@kms_content_protection@lic-type-0@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][34] ([Intel XE#1204])
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_content_protection@lic-type-0@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-offscreen-512x170:
- shard-adlp: NOTRUN -> [SKIP][35] ([Intel XE#1201] / [Intel XE#308])
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_cursor_crc@cursor-offscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-32x32:
- shard-lnl: NOTRUN -> [SKIP][36] ([Intel XE#1424])
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_cursor_crc@cursor-onscreen-32x32.html
* igt@kms_cursor_crc@cursor-onscreen-512x512:
- shard-lnl: NOTRUN -> [SKIP][37] ([Intel XE#1413]) +1 other test skip
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_cursor_crc@cursor-onscreen-512x512.html
* igt@kms_cursor_crc@cursor-sliding-32x10:
- shard-adlp: NOTRUN -> [SKIP][38] ([Intel XE#1201] / [Intel XE#455]) +6 other tests skip
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_cursor_crc@cursor-sliding-32x10.html
* igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy:
- shard-lnl: NOTRUN -> [SKIP][39] ([Intel XE#309])
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_cursor_legacy@2x-cursor-vs-flip-legacy.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-adlp: NOTRUN -> [SKIP][40] ([Intel XE#1201] / [Intel XE#309]) +1 other test skip
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-lnl: NOTRUN -> [SKIP][41] ([Intel XE#599]) +1 other test skip
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_feature_discovery@psr2:
- shard-adlp: NOTRUN -> [SKIP][42] ([Intel XE#1135] / [Intel XE#1201])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_feature_discovery@psr2.html
- shard-dg2-set2: NOTRUN -> [SKIP][43] ([Intel XE#1135] / [Intel XE#1201])
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_feature_discovery@psr2.html
* igt@kms_flip@2x-dpms-vs-vblank-race:
- shard-lnl: NOTRUN -> [SKIP][44] ([Intel XE#1421]) +2 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_flip@2x-dpms-vs-vblank-race.html
* igt@kms_flip@2x-flip-vs-panning-interruptible:
- shard-dg2-set2: [PASS][45] -> [DMESG-WARN][46] ([Intel XE#877])
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-435/igt@kms_flip@2x-flip-vs-panning-interruptible.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-436/igt@kms_flip@2x-flip-vs-panning-interruptible.html
* igt@kms_flip@2x-plain-flip:
- shard-adlp: NOTRUN -> [SKIP][47] ([Intel XE#1201] / [Intel XE#310]) +4 other tests skip
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_flip@2x-plain-flip.html
* igt@kms_flip@flip-vs-absolute-wf_vblank:
- shard-lnl: [PASS][48] -> [FAIL][49] ([Intel XE#886]) +1 other test fail
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-2/igt@kms_flip@flip-vs-absolute-wf_vblank.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-1/igt@kms_flip@flip-vs-absolute-wf_vblank.html
* igt@kms_flip@modeset-vs-vblank-race-interruptible:
- shard-dg2-set2: [PASS][50] -> [INCOMPLETE][51] ([Intel XE#1195]) +2 other tests incomplete
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_flip@modeset-vs-vblank-race-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][52] ([Intel XE#1401] / [Intel XE#1745]) +1 other test skip
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-64bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][53] ([Intel XE#1401]) +1 other test skip
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytilegen12rcccs-upscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][54] ([Intel XE#1397] / [Intel XE#1745])
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_flip_scaled_crc@flip-64bpp-4tile-to-16bpp-4tile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][55] ([Intel XE#1397]) +1 other test skip
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][56] ([Intel XE#455]) +1 other test skip
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt:
- shard-lnl: NOTRUN -> [SKIP][57] ([Intel XE#656]) +17 other tests skip
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
- shard-adlp: NOTRUN -> [FAIL][58] ([Intel XE#1861])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-shrfb-draw-render:
- shard-adlp: NOTRUN -> [SKIP][59] ([Intel XE#1201] / [Intel XE#651]) +6 other tests skip
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcdrrs-1p-offscren-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][60] ([Intel XE#1201] / [Intel XE#651]) +7 other tests skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc:
- shard-lnl: NOTRUN -> [SKIP][61] ([Intel XE#651]) +7 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4:
- shard-adlp: NOTRUN -> [SKIP][62] ([Intel XE#1151] / [Intel XE#1201])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-4.html
* igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary:
- shard-adlp: NOTRUN -> [SKIP][63] ([Intel XE#1201] / [Intel XE#653]) +9 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcpsr-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-wc:
- shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#1201] / [Intel XE#653]) +6 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][65] ([Intel XE#1201] / [Intel XE#656]) +16 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_hdr@invalid-metadata-sizes:
- shard-lnl: NOTRUN -> [SKIP][66] ([Intel XE#1503] / [Intel XE#599]) +1 other test skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_hdr@invalid-metadata-sizes.html
* igt@kms_plane@plane-position-covered:
- shard-lnl: [PASS][67] -> [DMESG-FAIL][68] ([Intel XE#324]) +2 other tests dmesg-fail
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-1/igt@kms_plane@plane-position-covered.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_plane@plane-position-covered.html
* igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-3:
- shard-lnl: [PASS][69] -> [DMESG-WARN][70] ([Intel XE#324]) +5 other tests dmesg-warn
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-3/igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-3.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-4/igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-3.html
* igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6:
- shard-dg2-set2: [PASS][71] -> [FAIL][72] ([Intel XE#361])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-433/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6.html
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-434/igt@kms_plane_scaling@intel-max-src-size@pipe-a-hdmi-a-6.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [SKIP][73] ([Intel XE#498]) +3 other tests skip
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-rotation@pipe-b-edp-1.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#2318]) +6 other tests skip
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20@pipe-a-edp-1.html
* igt@kms_pm_backlight@basic-brightness:
- shard-adlp: NOTRUN -> [SKIP][75] ([Intel XE#1201] / [Intel XE#870])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_pm_backlight@basic-brightness.html
- shard-dg2-set2: NOTRUN -> [SKIP][76] ([Intel XE#1201] / [Intel XE#870])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_pm_backlight@basic-brightness.html
* igt@kms_pm_dc@dc6-psr:
- shard-lnl: [PASS][77] -> [FAIL][78] ([Intel XE#1430])
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-3/igt@kms_pm_dc@dc6-psr.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-4/igt@kms_pm_dc@dc6-psr.html
* igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf:
- shard-adlp: NOTRUN -> [SKIP][79] ([Intel XE#1201])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf.html
- shard-dg2-set2: NOTRUN -> [SKIP][80] ([Intel XE#1201] / [Intel XE#1489])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_psr2_sf@fbc-cursor-plane-move-continuous-exceed-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#1128])
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-pr-sprite-plane-onoff:
- shard-adlp: NOTRUN -> [SKIP][82] ([Intel XE#1201] / [Intel XE#929]) +8 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_psr@fbc-pr-sprite-plane-onoff.html
* igt@kms_psr@fbc-psr2-no-drrs:
- shard-dg2-set2: NOTRUN -> [SKIP][83] ([Intel XE#1201] / [Intel XE#929]) +3 other tests skip
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_psr@fbc-psr2-no-drrs.html
* igt@kms_psr@pr-primary-render:
- shard-lnl: NOTRUN -> [SKIP][84] ([Intel XE#1406])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_psr@pr-primary-render.html
* igt@kms_rotation_crc@bad-pixel-format:
- shard-adlp: NOTRUN -> [SKIP][85] ([Intel XE#1201] / [Intel XE#327]) +2 other tests skip
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@kms_rotation_crc@bad-pixel-format.html
- shard-dg2-set2: NOTRUN -> [SKIP][86] ([Intel XE#1201] / [Intel XE#327])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_rotation_crc@bad-pixel-format.html
* igt@kms_rotation_crc@sprite-rotation-270:
- shard-lnl: NOTRUN -> [SKIP][87] ([Intel XE#1437])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_rotation_crc@sprite-rotation-270.html
* igt@kms_tiled_display@basic-test-pattern-with-chamelium:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#1201] / [Intel XE#1500])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
* igt@kms_tv_load_detect@load-detect:
- shard-lnl: NOTRUN -> [SKIP][89] ([Intel XE#330])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_tv_load_detect@load-detect.html
* igt@kms_universal_plane@cursor-fb-leak:
- shard-lnl: [PASS][90] -> [FAIL][91] ([Intel XE#899]) +1 other test fail
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-6/igt@kms_universal_plane@cursor-fb-leak.html
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_universal_plane@cursor-fb-leak.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-dp-4:
- shard-dg2-set2: [PASS][92] -> [FAIL][93] ([Intel XE#899]) +1 other test fail
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-433/igt@kms_universal_plane@cursor-fb-leak@pipe-b-dp-4.html
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-434/igt@kms_universal_plane@cursor-fb-leak@pipe-b-dp-4.html
* igt@kms_vrr@flipline:
- shard-dg2-set2: NOTRUN -> [SKIP][94] ([Intel XE#1201] / [Intel XE#455]) +2 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_vrr@flipline.html
* igt@kms_vrr@max-min:
- shard-lnl: NOTRUN -> [FAIL][95] ([Intel XE#2443]) +1 other test fail
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@kms_vrr@max-min.html
* igt@kms_writeback@writeback-pixel-formats:
- shard-adlp: NOTRUN -> [SKIP][96] ([Intel XE#1201] / [Intel XE#756])
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_writeback@writeback-pixel-formats.html
* igt@xe_compute@ccs-mode-basic:
- shard-lnl: NOTRUN -> [SKIP][97] ([Intel XE#1447])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@xe_compute@ccs-mode-basic.html
* igt@xe_create@create-big-vram:
- shard-adlp: NOTRUN -> [SKIP][98] ([Intel XE#1062] / [Intel XE#1201])
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@xe_create@create-big-vram.html
* igt@xe_drm_fdinfo@drm-most-busy-idle-check-all:
- shard-lnl: [PASS][99] -> [FAIL][100] ([Intel XE#2623])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-6/igt@xe_drm_fdinfo@drm-most-busy-idle-check-all.html
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-5/igt@xe_drm_fdinfo@drm-most-busy-idle-check-all.html
* igt@xe_evict@evict-beng-small:
- shard-lnl: NOTRUN -> [SKIP][101] ([Intel XE#688]) +2 other tests skip
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@xe_evict@evict-beng-small.html
* igt@xe_evict@evict-small-external-cm:
- shard-adlp: NOTRUN -> [SKIP][102] ([Intel XE#1201] / [Intel XE#261] / [Intel XE#688])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@xe_evict@evict-small-external-cm.html
* igt@xe_evict@evict-threads-large-multi-vm:
- shard-adlp: NOTRUN -> [SKIP][103] ([Intel XE#1201] / [Intel XE#261]) +4 other tests skip
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@xe_evict@evict-threads-large-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd:
- shard-adlp: NOTRUN -> [SKIP][104] ([Intel XE#1201] / [Intel XE#688])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-samefd.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-rebind:
- shard-adlp: NOTRUN -> [SKIP][105] ([Intel XE#1201] / [Intel XE#1392]) +2 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-rebind.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
- shard-lnl: NOTRUN -> [SKIP][106] ([Intel XE#1392]) +2 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-rebind-imm:
- shard-dg2-set2: NOTRUN -> [SKIP][107] ([Intel XE#1201] / [Intel XE#288]) +5 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-rebind-imm.html
* igt@xe_exec_fault_mode@many-execqueues-rebind:
- shard-adlp: NOTRUN -> [SKIP][108] ([Intel XE#1201] / [Intel XE#288]) +12 other tests skip
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@xe_exec_fault_mode@many-execqueues-rebind.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-adlp: NOTRUN -> [SKIP][109] ([Intel XE#1201] / [Intel XE#2360])
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_oa@mmio-triggered-reports@ccs-0:
- shard-lnl: NOTRUN -> [FAIL][110] ([Intel XE#2249])
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@xe_oa@mmio-triggered-reports@ccs-0.html
* igt@xe_oa@oa-formats:
- shard-adlp: NOTRUN -> [SKIP][111] ([Intel XE#1201] / [Intel XE#2541]) +2 other tests skip
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@xe_oa@oa-formats.html
* igt@xe_oa@oa-tlb-invalidate:
- shard-lnl: NOTRUN -> [SKIP][112] ([Intel XE#2248])
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@xe_oa@oa-tlb-invalidate.html
* igt@xe_oa@oa-unit-exclusive-stream-exec-q:
- shard-dg2-set2: NOTRUN -> [SKIP][113] ([Intel XE#1201] / [Intel XE#2541])
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@xe_oa@oa-unit-exclusive-stream-exec-q.html
* igt@xe_peer2peer@read:
- shard-adlp: NOTRUN -> [SKIP][114] ([Intel XE#1061] / [Intel XE#1201])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@xe_peer2peer@read.html
* igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
- shard-dg2-set2: NOTRUN -> [FAIL][115] ([Intel XE#1173]) +1 other test fail
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html
* igt@xe_pm@d3cold-mocs:
- shard-lnl: NOTRUN -> [SKIP][116] ([Intel XE#2284])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@xe_pm@d3cold-mocs.html
* igt@xe_pm@s4-d3hot-basic-exec:
- shard-lnl: [PASS][117] -> [ABORT][118] ([Intel XE#1358] / [Intel XE#1607])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-6/igt@xe_pm@s4-d3hot-basic-exec.html
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-2/igt@xe_pm@s4-d3hot-basic-exec.html
* igt@xe_pm@s4-multiple-execs:
- shard-adlp: [PASS][119] -> [ABORT][120] ([Intel XE#1358] / [Intel XE#1607] / [Intel XE#1794])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-2/igt@xe_pm@s4-multiple-execs.html
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-9/igt@xe_pm@s4-multiple-execs.html
* igt@xe_query@multigpu-query-engines:
- shard-adlp: NOTRUN -> [SKIP][121] ([Intel XE#1201] / [Intel XE#944]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@xe_query@multigpu-query-engines.html
* igt@xe_wedged@basic-wedged:
- shard-lnl: NOTRUN -> [DMESG-WARN][122] ([Intel XE#1760])
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_wedged@basic-wedged.html
#### Possible fixes ####
* igt@fbdev@pan:
- shard-dg2-set2: [SKIP][123] ([Intel XE#1201] / [Intel XE#2134]) -> [PASS][124]
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@fbdev@pan.html
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@fbdev@pan.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-4:
- {shard-bmg}: [DMESG-WARN][125] ([Intel XE#1033]) -> [PASS][126] +7 other tests pass
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-7/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-4.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-2/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-a-hdmi-a-3-4.html
* igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1:
- shard-adlp: [FAIL][127] ([Intel XE#1426]) -> [PASS][128] +1 other test pass
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-9/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-1/igt@kms_atomic_transition@plane-all-modeset-transition@pipe-a-hdmi-a-1.html
* igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-edp-1:
- shard-lnl: [FAIL][129] ([Intel XE#1426]) -> [PASS][130] +3 other tests pass
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-6/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-edp-1.html
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_atomic_transition@plane-toggle-modeset-transition@pipe-a-edp-1.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0:
- shard-lnl: [FAIL][131] ([Intel XE#1659]) -> [PASS][132]
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip:
- {shard-bmg}: [FAIL][133] ([Intel XE#1659]) -> [PASS][134] +1 other test pass
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-1/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-4/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip.html
* igt@kms_big_fb@linear-16bpp-rotate-0:
- shard-dg2-set2: [SKIP][135] ([Intel XE#1201]) -> [PASS][136] +9 other tests pass
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_big_fb@linear-16bpp-rotate-0.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_big_fb@linear-16bpp-rotate-0.html
* igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs:
- shard-dg2-set2: [SKIP][137] ([Intel XE#1201] / [Intel XE#2351]) -> [PASS][138] +1 other test pass
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs.html
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_ccs@crc-primary-basic-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-d-dp-2:
- {shard-bmg}: [SKIP][139] ([Intel XE#787]) -> [PASS][140] +42 other tests pass
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-d-dp-2.html
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-7/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-bmg-ccs@pipe-d-dp-2.html
* igt@kms_flip@2x-flip-vs-rmfb@bc-dp2-hdmi-a3:
- {shard-bmg}: [DMESG-WARN][141] ([Intel XE#877]) -> [PASS][142] +8 other tests pass
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-8/igt@kms_flip@2x-flip-vs-rmfb@bc-dp2-hdmi-a3.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-8/igt@kms_flip@2x-flip-vs-rmfb@bc-dp2-hdmi-a3.html
* igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1:
- shard-lnl: [FAIL][143] ([Intel XE#886]) -> [PASS][144] +3 other tests pass
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-3/igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-5/igt@kms_flip@flip-vs-blocking-wf-vblank@c-edp1.html
* igt@kms_flip@flip-vs-rmfb:
- shard-lnl: [SKIP][145] ([Intel XE#2423]) -> [PASS][146] +15 other tests pass
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_flip@flip-vs-rmfb.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_flip@flip-vs-rmfb.html
* igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw:
- shard-lnl: [SKIP][147] ([Intel XE#2351]) -> [PASS][148] +15 other tests pass
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_frontbuffer_tracking@psr-1p-pri-indfb-multidraw.html
* igt@kms_plane@plane-position-hole:
- shard-lnl: [DMESG-FAIL][149] ([Intel XE#324]) -> [PASS][150] +1 other test pass
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-3/igt@kms_plane@plane-position-hole.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@kms_plane@plane-position-hole.html
* igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-4:
- shard-lnl: [DMESG-WARN][151] ([Intel XE#324]) -> [PASS][152] +1 other test pass
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-3/igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-4.html
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-4/igt@kms_plane@plane-position-hole-dpms@pipe-b-plane-4.html
* igt@kms_plane_scaling@plane-upscale-20x20-with-rotation:
- shard-dg2-set2: [SKIP][153] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [PASS][154] +19 other tests pass
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation.html
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_plane_scaling@plane-upscale-20x20-with-rotation.html
* igt@kms_pm_dc@dc6-dpms:
- shard-adlp: [FAIL][155] ([Intel XE#718]) -> [PASS][156]
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-6/igt@kms_pm_dc@dc6-dpms.html
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-8/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-dg2-set2: [SKIP][157] ([Intel XE#1201] / [Intel XE#2446]) -> [PASS][158]
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@legacy-planes:
- shard-lnl: [SKIP][159] ([Intel XE#2446]) -> [PASS][160]
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_pm_rpm@legacy-planes.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_pm_rpm@legacy-planes.html
* igt@kms_universal_plane@cursor-fb-leak:
- shard-adlp: [FAIL][161] ([Intel XE#771] / [Intel XE#899]) -> [PASS][162]
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-8/igt@kms_universal_plane@cursor-fb-leak.html
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-1/igt@kms_universal_plane@cursor-fb-leak.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-a-dp-2:
- {shard-bmg}: [FAIL][163] ([Intel XE#899]) -> [PASS][164] +1 other test pass
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-8/igt@kms_universal_plane@cursor-fb-leak@pipe-a-dp-2.html
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-5/igt@kms_universal_plane@cursor-fb-leak@pipe-a-dp-2.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1:
- shard-adlp: [FAIL][165] ([Intel XE#899]) -> [PASS][166] +1 other test pass
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-8/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-1/igt@kms_universal_plane@cursor-fb-leak@pipe-b-hdmi-a-1.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-6:
- shard-dg2-set2: [FAIL][167] ([Intel XE#899]) -> [PASS][168]
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-433/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-6.html
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-434/igt@kms_universal_plane@cursor-fb-leak@pipe-d-hdmi-a-6.html
* igt@xe_ccs@ctrl-surf-copy-new-ctx:
- shard-dg2-set2: [SKIP][169] ([Intel XE#1130] / [Intel XE#1201]) -> [PASS][170] +35 other tests pass
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@xe_ccs@ctrl-surf-copy-new-ctx.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@xe_ccs@ctrl-surf-copy-new-ctx.html
* igt@xe_drm_fdinfo@drm-busy-exec-queue-destroy-idle:
- shard-lnl: [FAIL][171] -> [PASS][172]
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-3/igt@xe_drm_fdinfo@drm-busy-exec-queue-destroy-idle.html
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-4/igt@xe_drm_fdinfo@drm-busy-exec-queue-destroy-idle.html
* igt@xe_evict@evict-beng-mixed-many-threads-large:
- shard-dg2-set2: [TIMEOUT][173] ([Intel XE#1473]) -> [PASS][174]
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-463/igt@xe_evict@evict-beng-mixed-many-threads-large.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@xe_evict@evict-beng-mixed-many-threads-large.html
* igt@xe_exec_balancer@twice-parallel-userptr-rebind:
- {shard-bmg}: [FAIL][175] -> [PASS][176]
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-2/igt@xe_exec_balancer@twice-parallel-userptr-rebind.html
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-1/igt@xe_exec_balancer@twice-parallel-userptr-rebind.html
* igt@xe_exec_basic@many-execqueues-many-vm-bindexecqueue:
- {shard-bmg}: [DMESG-WARN][177] -> [PASS][178]
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-bmg-2/igt@xe_exec_basic@many-execqueues-many-vm-bindexecqueue.html
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-bmg-1/igt@xe_exec_basic@many-execqueues-many-vm-bindexecqueue.html
* igt@xe_exec_fault_mode@twice-basic-imm:
- shard-lnl: [DMESG-WARN][179] -> [PASS][180]
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-6/igt@xe_exec_fault_mode@twice-basic-imm.html
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@xe_exec_fault_mode@twice-basic-imm.html
* igt@xe_exec_threads@threads-hang-userptr-rebind-err:
- shard-lnl: [ABORT][181] -> [PASS][182]
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-8/igt@xe_exec_threads@threads-hang-userptr-rebind-err.html
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-6/igt@xe_exec_threads@threads-hang-userptr-rebind-err.html
* igt@xe_gt_freq@freq_reset_multiple:
- shard-lnl: [DMESG-FAIL][183] ([Intel XE#1620] / [Intel XE#1760]) -> [PASS][184]
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@xe_gt_freq@freq_reset_multiple.html
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_gt_freq@freq_reset_multiple.html
* igt@xe_live_ktest@xe_mocs:
- shard-lnl: [SKIP][185] ([Intel XE#1192]) -> [PASS][186]
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@xe_live_ktest@xe_mocs.html
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_live_ktest@xe_mocs.html
* igt@xe_pm@s2idle-exec-after:
- shard-lnl: [INCOMPLETE][187] ([Intel XE#1358]) -> [PASS][188]
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-6/igt@xe_pm@s2idle-exec-after.html
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-8/igt@xe_pm@s2idle-exec-after.html
* igt@xe_pm@s4-exec-after:
- shard-adlp: [ABORT][189] ([Intel XE#1358] / [Intel XE#1607]) -> [PASS][190] +1 other test pass
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-9/igt@xe_pm@s4-exec-after.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-4/igt@xe_pm@s4-exec-after.html
* igt@xe_pm@s4-vm-bind-unbind-all:
- shard-lnl: [ABORT][191] ([Intel XE#1794]) -> [PASS][192]
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-2/igt@xe_pm@s4-vm-bind-unbind-all.html
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_pm@s4-vm-bind-unbind-all.html
* igt@xe_vm@mmap-style-bind-end:
- shard-lnl: [SKIP][193] ([Intel XE#1130]) -> [PASS][194] +35 other tests pass
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@xe_vm@mmap-style-bind-end.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_vm@mmap-style-bind-end.html
#### Warnings ####
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-adlp: [DMESG-FAIL][195] ([Intel XE#324]) -> [FAIL][196] ([Intel XE#1231]) +1 other test fail
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-adlp-9/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-0:
- shard-dg2-set2: [SKIP][197] ([Intel XE#1201] / [Intel XE#2351]) -> [SKIP][198] ([Intel XE#1124])
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_big_fb@y-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-270:
- shard-dg2-set2: [SKIP][199] ([Intel XE#1124]) -> [SKIP][200] ([Intel XE#1124] / [Intel XE#1201])
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_big_fb@y-tiled-32bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-lnl: [SKIP][201] ([Intel XE#2351]) -> [SKIP][202] ([Intel XE#1124]) +1 other test skip
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][203] ([Intel XE#1201]) -> [SKIP][204] ([Intel XE#1124])
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-dg2-set2: [SKIP][205] ([Intel XE#1201]) -> [SKIP][206] ([Intel XE#607])
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-lnl: [SKIP][207] ([Intel XE#2351]) -> [SKIP][208] ([Intel XE#1428])
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: [SKIP][209] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [SKIP][210] ([Intel XE#367])
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_bw@connected-linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-lnl: [SKIP][211] ([Intel XE#2423]) -> [SKIP][212] ([Intel XE#1512])
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-3840x2160p:
- shard-dg2-set2: [SKIP][213] ([Intel XE#367]) -> [SKIP][214] ([Intel XE#1201] / [Intel XE#367])
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_bw@linear-tiling-2-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-1920x1080p:
- shard-lnl: [SKIP][215] ([Intel XE#2423]) -> [SKIP][216] ([Intel XE#367])
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_bw@linear-tiling-3-displays-1920x1080p.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc:
- shard-lnl: [SKIP][217] ([Intel XE#2351]) -> [SKIP][218] ([Intel XE#1399]) +2 other tests skip
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-rc-ccs-cc.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs:
- shard-dg2-set2: [SKIP][219] ([Intel XE#1201] / [Intel XE#2351]) -> [SKIP][220] ([Intel XE#455] / [Intel XE#787])
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs:
- shard-dg2-set2: [SKIP][221] ([Intel XE#1201]) -> [SKIP][222] ([Intel XE#455] / [Intel XE#787])
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_chamelium_color@ctm-green-to-red:
- shard-dg2-set2: [SKIP][223] ([Intel XE#306]) -> [SKIP][224] ([Intel XE#1201] / [Intel XE#306])
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_chamelium_color@ctm-green-to-red.html
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_chamelium_color@ctm-green-to-red.html
* igt@kms_chamelium_edid@hdmi-edid-change-during-suspend:
- shard-dg2-set2: [SKIP][225] ([Intel XE#373]) -> [SKIP][226] ([Intel XE#1201] / [Intel XE#373]) +1 other test skip
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_chamelium_edid@hdmi-edid-change-during-suspend.html
* igt@kms_chamelium_hpd@common-hpd-after-suspend:
- shard-dg2-set2: [SKIP][227] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [SKIP][228] ([Intel XE#373]) +1 other test skip
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_chamelium_hpd@common-hpd-after-suspend.html
* igt@kms_chamelium_hpd@vga-hpd-without-ddc:
- shard-lnl: [SKIP][229] ([Intel XE#2423]) -> [SKIP][230] ([Intel XE#373]) +3 other tests skip
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_chamelium_hpd@vga-hpd-without-ddc.html
* igt@kms_content_protection@lic-type-0:
- shard-dg2-set2: [SKIP][231] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [FAIL][232] ([Intel XE#1178] / [Intel XE#1204])
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_content_protection@lic-type-0.html
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@uevent:
- shard-lnl: [SKIP][233] ([Intel XE#2423]) -> [SKIP][234] ([Intel XE#599])
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_content_protection@uevent.html
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_content_protection@uevent.html
* igt@kms_cursor_crc@cursor-sliding-64x21:
- shard-lnl: [SKIP][235] ([Intel XE#2423]) -> [SKIP][236] ([Intel XE#1424])
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_cursor_crc@cursor-sliding-64x21.html
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_cursor_crc@cursor-sliding-64x21.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2-set2: [SKIP][237] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [SKIP][238] ([Intel XE#323])
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
- shard-lnl: [SKIP][239] ([Intel XE#2423]) -> [SKIP][240] ([Intel XE#323])
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html
* igt@kms_feature_discovery@display-4x:
- shard-dg2-set2: [SKIP][241] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [SKIP][242] ([Intel XE#1138])
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_feature_discovery@display-4x.html
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_feature_discovery@display-4x.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling:
- shard-lnl: [SKIP][243] ([Intel XE#2351]) -> [SKIP][244] ([Intel XE#1397] / [Intel XE#1745])
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
- shard-dg2-set2: [SKIP][245] ([Intel XE#1201]) -> [SKIP][246] ([Intel XE#455]) +2 other tests skip
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
* igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-move:
- shard-dg2-set2: [SKIP][247] ([Intel XE#1201]) -> [SKIP][248] ([Intel XE#651]) +3 other tests skip
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-move.html
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt:
- shard-dg2-set2: [SKIP][249] ([Intel XE#651]) -> [SKIP][250] ([Intel XE#1201] / [Intel XE#651]) +1 other test skip
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-msflip-blt:
- shard-lnl: [SKIP][251] ([Intel XE#2351]) -> [SKIP][252] ([Intel XE#651]) +2 other tests skip
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-msflip-blt.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt:
- shard-dg2-set2: [SKIP][253] ([Intel XE#1201] / [Intel XE#2351]) -> [SKIP][254] ([Intel XE#651]) +2 other tests skip
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff:
- shard-lnl: [SKIP][255] ([Intel XE#2351]) -> [SKIP][256] ([Intel XE#656]) +8 other tests skip
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt:
- shard-dg2-set2: [SKIP][257] ([Intel XE#1201] / [Intel XE#2351]) -> [SKIP][258] ([Intel XE#653]) +1 other test skip
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: [SKIP][259] ([Intel XE#1201]) -> [SKIP][260] ([Intel XE#653]) +4 other tests skip
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-1p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render:
- shard-dg2-set2: [SKIP][261] ([Intel XE#653]) -> [SKIP][262] ([Intel XE#1201] / [Intel XE#653]) +2 other tests skip
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_plane_scaling@2x-scaler-multi-pipe:
- shard-lnl: [SKIP][263] ([Intel XE#2423]) -> [SKIP][264] ([Intel XE#309])
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20:
- shard-lnl: [SKIP][265] ([Intel XE#2423]) -> [SKIP][266] ([Intel XE#2318])
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-20x20.html
* igt@kms_pm_dc@deep-pkgc:
- shard-lnl: [SKIP][267] ([Intel XE#2351]) -> [FAIL][268] ([Intel XE#2029])
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_pm_dc@deep-pkgc.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: [SKIP][269] ([Intel XE#1201]) -> [SKIP][270] ([Intel XE#1489])
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_psr2_sf@overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr@fbc-pr-cursor-plane-onoff:
- shard-dg2-set2: [SKIP][271] ([Intel XE#1201]) -> [SKIP][272] ([Intel XE#929]) +2 other tests skip
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_psr@fbc-pr-cursor-plane-onoff.html
* igt@kms_psr@fbc-pr-dpms:
- shard-lnl: [SKIP][273] ([Intel XE#2351]) -> [SKIP][274] ([Intel XE#1406]) +1 other test skip
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_psr@fbc-pr-dpms.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_psr@fbc-pr-dpms.html
* igt@kms_psr@psr-cursor-plane-move:
- shard-dg2-set2: [SKIP][275] ([Intel XE#1201] / [Intel XE#2351]) -> [SKIP][276] ([Intel XE#929])
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_psr@psr-cursor-plane-move.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_psr@psr-cursor-plane-move.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
- shard-lnl: [SKIP][277] ([Intel XE#2423]) -> [SKIP][278] ([Intel XE#1127])
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
* igt@kms_scaling_modes@scaling-mode-full:
- shard-dg2-set2: [SKIP][279] ([Intel XE#455]) -> [SKIP][280] ([Intel XE#1201] / [Intel XE#455]) +3 other tests skip
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@kms_scaling_modes@scaling-mode-full.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@kms_scaling_modes@scaling-mode-full.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-dg2-set2: [SKIP][281] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [SKIP][282] ([Intel XE#455])
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_setmode@basic-clone-single-crtc.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-lnl: [SKIP][283] ([Intel XE#2423]) -> [SKIP][284] ([Intel XE#1435])
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_setmode@invalid-clone-exclusive-crtc.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [FAIL][285] ([Intel XE#1729]) -> [SKIP][286] ([Intel XE#1201] / [Intel XE#362])
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_tiled_display@basic-test-pattern.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_vrr@negative-basic:
- shard-lnl: [SKIP][287] ([Intel XE#2423]) -> [SKIP][288] ([Intel XE#1499] / [Intel XE#599])
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@kms_vrr@negative-basic.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@kms_vrr@negative-basic.html
* igt@kms_writeback@writeback-fb-id:
- shard-dg2-set2: [SKIP][289] ([Intel XE#1201] / [Intel XE#2423] / [i915#2575]) -> [SKIP][290] ([Intel XE#756])
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@kms_writeback@writeback-fb-id.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@kms_writeback@writeback-fb-id.html
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-lnl: [SKIP][291] ([Intel XE#1130]) -> [SKIP][292] ([Intel XE#1447])
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@xe_compute@ccs-mode-compute-kernel.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_evict@evict-large-external:
- shard-lnl: [SKIP][293] ([Intel XE#1130]) -> [SKIP][294] ([Intel XE#688]) +1 other test skip
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@xe_evict@evict-large-external.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_evict@evict-large-external.html
* igt@xe_evict@evict-mixed-many-threads-large:
- shard-dg2-set2: [FAIL][295] -> [TIMEOUT][296] ([Intel XE#1473])
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@xe_evict@evict-mixed-many-threads-large.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-466/igt@xe_evict@evict-mixed-many-threads-large.html
* igt@xe_exec_basic@multigpu-no-exec-userptr:
- shard-lnl: [SKIP][297] ([Intel XE#1130]) -> [SKIP][298] ([Intel XE#1392]) +1 other test skip
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@xe_exec_basic@multigpu-no-exec-userptr.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_exec_basic@multigpu-no-exec-userptr.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind:
- shard-dg2-set2: [SKIP][299] ([Intel XE#288]) -> [SKIP][300] ([Intel XE#1201] / [Intel XE#288]) +2 other tests skip
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind.html
* igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch:
- shard-dg2-set2: [SKIP][301] ([Intel XE#1130] / [Intel XE#1201]) -> [SKIP][302] ([Intel XE#288]) +6 other tests skip
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html
* igt@xe_module_load@load:
- shard-dg2-set2: [SKIP][303] ([Intel XE#378]) -> [SKIP][304] ([Intel XE#1201] / [Intel XE#378])
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@xe_module_load@load.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@xe_module_load@load.html
* igt@xe_oa@oa-unit-exclusive-stream-sample-oa:
- shard-dg2-set2: [SKIP][305] ([Intel XE#1130] / [Intel XE#1201]) -> [SKIP][306] ([Intel XE#2541]) +1 other test skip
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-436/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-432/igt@xe_oa@oa-unit-exclusive-stream-sample-oa.html
* igt@xe_oa@privileged-forked-access-vaddr:
- shard-dg2-set2: [SKIP][307] ([Intel XE#2541]) -> [SKIP][308] ([Intel XE#1201] / [Intel XE#2541])
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-dg2-432/igt@xe_oa@privileged-forked-access-vaddr.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-dg2-433/igt@xe_oa@privileged-forked-access-vaddr.html
* igt@xe_oa@unprivileged-single-ctx-counters:
- shard-lnl: [SKIP][309] ([Intel XE#1130]) -> [SKIP][310] ([Intel XE#2248])
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8/shard-lnl-5/igt@xe_oa@unprivileged-single-ctx-counters.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/shard-lnl-3/igt@xe_oa@unprivileged-single-ctx-counters.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1033]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1033
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1125]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1125
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1128]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1128
[Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
[Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
[Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
[Intel XE#1151]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1151
[Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
[Intel XE#1195]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1195
[Intel XE#1201]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1201
[Intel XE#1204]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1204
[Intel XE#1231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1231
[Intel XE#1252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1252
[Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1399]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1399
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1413
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
[Intel XE#1426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1426
[Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
[Intel XE#1430]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1430
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1437]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1437
[Intel XE#1447]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1447
[Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1512
[Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607
[Intel XE#1620]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1620
[Intel XE#1659]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1659
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1760
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#1861]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1861
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#2029]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2029
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2249
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2318]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2318
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2364
[Intel XE#2423]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2423
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2436]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2436
[Intel XE#2443]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2443
[Intel XE#2446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2446
[Intel XE#2509]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2509
[Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2623
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#324]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/324
[Intel XE#327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/327
[Intel XE#330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/330
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/361
[Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#498]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/498
[Intel XE#599]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/599
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#771]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/771
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
Build changes
-------------
* Linux: xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8 -> xe-pw-128077v17
IGT_7993: 3b6b2d238e864ff1af9e33159d3bbf4b7f01d86d @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-1840-5cb507fe7eb6fde0c8ca4568c908a22afa6590a8: 5cb507fe7eb6fde0c8ca4568c908a22afa6590a8
xe-pw-128077v17: 128077v17
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-128077v17/index.html
[-- Attachment #2: Type: text/html, Size: 105423 bytes --]
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v17 2/7] drm/xe/guc: Add XE_LP steered register lists
2024-08-27 21:47 ` [PATCH v17 2/7] drm/xe/guc: Add XE_LP steered register lists Zhanjun Dong
@ 2024-08-28 22:12 ` Teres Alexis, Alan Previn
0 siblings, 0 replies; 23+ messages in thread
From: Teres Alexis, Alan Previn @ 2024-08-28 22:12 UTC (permalink / raw)
To: Dong, Zhanjun, intel-xe@lists.freedesktop.org
Everything looks good. Only have a few nits on comments / spelling etc.
Reviewed-by: Alan Previn <alan.previn.teres.alexis@intel.com>
On Tue, 2024-08-27 at 14:47 -0700, Zhanjun Dong wrote:
> Add the ability for runtime allocation and freeing of
> steered register list extentions that depend on the
> detected HW config fuses.
>
> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_ads.c | 2 +
> drivers/gpu/drm/xe/xe_guc_capture.c | 210 ++++++++++++++++++++++++++--
> drivers/gpu/drm/xe/xe_guc_capture.h | 1 +
> 3 files changed, 202 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_ads.c b/drivers/gpu/drm/xe/xe_guc_ads.c
> index d7dc47061535..5e15a0702d6a 100644
> --- a/drivers/gpu/drm/xe/xe_guc_ads.c
> +++ b/drivers/gpu/drm/xe/xe_guc_ads.c
> @@ -596,6 +596,8 @@ static int guc_capture_prep_lists(struct xe_guc_ads *ads)
> void *ptr;
> int i, j;
>
> + xe_guc_capture_steered_list_init(ads_to_guc(ads));
alan: nit: could we add a comment to explain why we need to make this special "init" call.
perhaps something like ~"GuC Capture's steered reg-list needs to be allocated and initialized after the GuC-hwconfig is
available which guaranteed from here."
> +
> capture_offset = guc_ads_capture_offset(ads);
> ads_ggtt = xe_bo_ggtt_addr(ads->bo);
> info_map = IOSYS_MAP_INIT_OFFSET(ads_to_map(ads),
> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
> index 9138c85141a9..9ff19ac62a27 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture.c
> +++ b/drivers/gpu/drm/xe/xe_guc_capture.c
> @@ -200,6 +200,11 @@ struct __guc_capture_ads_cache {
>
> struct xe_guc_state_capture {
> const struct __guc_mmio_reg_descr_group *reglists;
> + /**
> + * NOTE: steered registers have multiple instances depending on the HW configuration
> + * (slices or dual-sub-slices) and thus depends on HW fuses discovered
> + */
> + struct __guc_mmio_reg_descr_group *extlists;
> struct __guc_capture_ads_cache ads_cache[GUC_CAPTURE_LIST_INDEX_MAX]
> [GUC_STATE_CAPTURE_TYPE_MAX]
> [GUC_CAPTURE_LIST_CLASS_MAX];
> @@ -234,14 +239,152 @@ guc_capture_get_one_list(const struct __guc_mmio_reg_descr_group *reglists,
> return NULL;
> }
>
> +struct __ext_steer_reg {
> + const char *name;
> + struct xe_reg_mcr reg;
> +};
> +
> +static const struct __ext_steer_reg xe_extregs[] = {
> + {"SAMPLER_INSTDONE", SAMPLER_INSTDONE},
> + {"ROW_INSTDONE", ROW_INSTDONE}
> +};
> +
> +static const struct __ext_steer_reg xehpg_extregs[] = {
> + {"SC_INSTDONE", XEHPG_SC_INSTDONE},
> + {"SC_INSTDONE_EXTRA", XEHPG_SC_INSTDONE_EXTRA},
> + {"SC_INSTDONE_EXTRA2", XEHPG_SC_INSTDONE_EXTRA2},
> + {"INSTDONE_GEOM_SVGUNIT", XEHPG_INSTDONE_GEOM_SVGUNIT}
> +};
> +
> +static void __fill_ext_reg(struct __guc_mmio_reg_descr *ext,
> + const struct __ext_steer_reg *extlist,
> + int slice_id, int subslice_id)
> +{
> + if (!ext || !extlist)
> + return;
> +
> + ext->reg = XE_REG(extlist->reg.__reg.addr);
> + ext->flags = FIELD_PREP(GUC_REGSET_STEERING_GROUP, slice_id);
> + ext->flags |= FIELD_PREP(GUC_REGSET_STEERING_INSTANCE, subslice_id);
> + ext->regname = extlist->name;
> +}
> +
> +static int
> +__alloc_ext_regs(struct drm_device *drm, struct __guc_mmio_reg_descr_group *newlist,
> + const struct __guc_mmio_reg_descr_group *rootlist, int num_regs)
> +{
> + struct __guc_mmio_reg_descr *list;
> +
> + list = drmm_kzalloc(drm, num_regs * sizeof(struct __guc_mmio_reg_descr), GFP_KERNEL);
> + if (!list)
> + return -ENOMEM;
> +
> + newlist->list = list;
> + newlist->num_regs = num_regs;
> + newlist->owner = rootlist->owner;
> + newlist->engine = rootlist->engine;
> + newlist->type = rootlist->type;
> +
> + return 0;
> +}
> +
> +static int guc_capture_get_steer_reg_num(struct xe_device *xe)
> +{
> + int num = ARRAY_SIZE(xe_extregs);
> +
> + if (GRAPHICS_VERx100(xe) >= 1255)
> + num += ARRAY_SIZE(xehpg_extregs);
> +
> + return num;
> +}
> +
> +static void guc_capture_alloc_steered_lists(struct xe_guc *guc)
> +{
> + struct xe_gt *gt = guc_to_gt(guc);
> + u16 slice, subslice;
> + int iter, i, total = 0;
> + const struct __guc_mmio_reg_descr_group *lists = guc->capture->reglists;
> + const struct __guc_mmio_reg_descr_group *list;
> + struct __guc_mmio_reg_descr_group *extlists;
> + struct __guc_mmio_reg_descr *extarray;
> + bool has_xehpg_extregs = GRAPHICS_VERx100(gt_to_xe(gt)) >= 1255;
> + struct drm_device *drm = >_to_xe(gt)->drm;
> + bool has_rcs_ccs = false;
> + struct xe_hw_engine *hwe;
> + enum xe_hw_engine_id id;
> +
> + /*
> + * If GT has no rcs/ccs, no need to alloc steered list.
> + * Currently, only rcs/ccs has steerign register, if in the future,
alan: nit: spelling of "steerign"
> + * other engine types has steering register, this condition check need
> + * to be extended
> + */
> + for_each_hw_engine(hwe, gt, id) {
> + if (xe_engine_class_to_guc_capture_class(hwe->class) ==
> + GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
> + has_rcs_ccs = true;
> + break;
> + }
> + }
> +
> + if (!has_rcs_ccs)
> + return;
> +
> + /* steered registers currently only exist for the render-class */
> + list = guc_capture_get_one_list(lists, GUC_CAPTURE_LIST_INDEX_PF,
> + GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
> + GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE);
> + /* skip if extlists was previously allocated */
alan: nit: "skip if this platform has no engine class registers or if extlists was previously allocated"
> + if (!list || guc->capture->extlists)
> + return;
> +
> + total = bitmap_weight(gt->fuse_topo.g_dss_mask, sizeof(gt->fuse_topo.g_dss_mask) * 8) *
> + guc_capture_get_steer_reg_num(guc_to_xe(guc));
> +
> + if (!total)
> + return;
> +
> + /* allocate an extra for an end marker */
> + extlists = drmm_kzalloc(drm, 2 * sizeof(struct __guc_mmio_reg_descr_group), GFP_KERNEL);
> + if (!extlists)
> + return;
> +
> + if (__alloc_ext_regs(drm, &extlists[0], list, total)) {
> + drmm_kfree(drm, extlists);
> + return;
> + }
> +
> + /* For steering registers, the list is generated at run-time */
> + extarray = (struct __guc_mmio_reg_descr *)extlists[0].list;
> + for_each_dss_steering(iter, gt, slice, subslice) {
> + for (i = 0; i < ARRAY_SIZE(xe_extregs); ++i) {
> + __fill_ext_reg(extarray, &xe_extregs[i], slice, subslice);
> + ++extarray;
> + }
> +
> + if (has_xehpg_extregs)
> + for (i = 0; i < ARRAY_SIZE(xehpg_extregs); ++i) {
> + __fill_ext_reg(extarray, &xehpg_extregs[i], slice, subslice);
> + ++extarray;
> + }
> + }
> +
> + extlists[0].num_regs = total;
> +
> + xe_gt_dbg(guc_to_gt(guc), "capture found %d ext-regs.\n", total);
> + guc->capture->extlists = extlists;
> +}
> +
> static int
> guc_capture_list_init(struct xe_guc *guc, u32 owner, u32 type,
> enum guc_capture_list_class_type capture_class, struct guc_mmio_reg *ptr,
> u16 num_entries)
> {
> - u32 i = 0;
> + u32 ptr_idx = 0, list_idx = 0;
> const struct __guc_mmio_reg_descr_group *reglists = guc->capture->reglists;
> + struct __guc_mmio_reg_descr_group *extlists = guc->capture->extlists;
> const struct __guc_mmio_reg_descr_group *match;
> + u32 list_num;
>
> if (!reglists)
> return -ENODEV;
> @@ -250,15 +393,27 @@ guc_capture_list_init(struct xe_guc *guc, u32 owner, u32 type,
> if (!match)
> return -ENODATA;
>
> - for (i = 0; i < num_entries && i < match->num_regs; ++i) {
> - ptr[i].offset = match->list[i].reg.addr;
> - ptr[i].value = 0xDEADF00D;
> - ptr[i].flags = match->list[i].flags;
> - ptr[i].mask = match->list[i].mask;
> + list_num = match->num_regs;
> + for (list_idx = 0; ptr_idx < num_entries && list_idx < list_num; ++list_idx, ++ptr_idx) {
> + ptr[ptr_idx].offset = match->list[list_idx].reg.addr;
> + ptr[ptr_idx].value = 0xDEADF00D;
> + ptr[ptr_idx].flags = match->list[list_idx].flags;
> + ptr[ptr_idx].mask = match->list[list_idx].mask;
> }
>
> - if (i < num_entries)
> - xe_gt_dbg(guc_to_gt(guc), "Got short capture reglist init: %d out %d.\n", i,
> + match = guc_capture_get_one_list(extlists, owner, type, capture_class);
> + if (match)
> + for (ptr_idx = list_num, list_idx = 0; ptr_idx < num_entries &&
> + ptr_idx < (list_num + match->num_regs) && list_idx < match->num_regs;
alan: nit: the check "ptr_idx < (list_num + match->num_regs)" is redundant because of the
combination of preceeding (ptr_idx < num_entries) and proceeding (list_idx < match->num_regs) checks.
> + ++ptr_idx, ++list_idx) {
> + ptr[ptr_idx].offset = match->list[list_idx].reg.addr;
> + ptr[ptr_idx].value = 0xDEADF00D;
> + ptr[ptr_idx].flags = match->list[list_idx].flags;
> + ptr[ptr_idx].mask = match->list[list_idx].mask;
> + }
> +
> + if (ptr_idx < num_entries)
> + xe_gt_dbg(guc_to_gt(guc), "Got short capture reglist init: %d out %d.\n", ptr_idx,
alan: nit: "%d out-of %d"
> num_entries);
>
> return 0;
> @@ -269,12 +424,22 @@ guc_cap_list_num_regs(struct xe_guc *guc, u32 owner, u32 type,
> enum guc_capture_list_class_type capture_class)
> {
> const struct __guc_mmio_reg_descr_group *match;
> + int num_regs = 0;
>
> match = guc_capture_get_one_list(guc->capture->reglists, owner, type, capture_class);
> - if (!match)
> - return 0;
> + if (match)
> + num_regs = match->num_regs;
> +
> + match = guc_capture_get_one_list(guc->capture->extlists, owner, type, capture_class);
> + if (match)
> + num_regs += match->num_regs;
> + else
> + /* Estimate steering register size for rcs/ccs */
> + if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE)
> + num_regs += guc_capture_get_steer_reg_num(guc_to_xe(guc)) *
> + XE_MAX_DSS_FUSE_BITS;
>
> - return match->num_regs;
> + return num_regs;
> }
>
> static int
> @@ -489,6 +654,29 @@ size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc)
> return PAGE_ALIGN(total_size);
> }
>
> +/*
> + * xe_guc_capture_steered_list_init - Init steering register list
> + * @guc: The GuC object
> + *
> + * Init steering register list for GuC register capture, alloc memory for
> + * capture data structure. Create pre-alloc node
> + *
> + * Returns: 0 if success.
> + -ENOMEM if out of memory
> + */
> +int xe_guc_capture_steered_list_init(struct xe_guc *guc)
> +{
> + /*
> + * For certain engine classes, there are slice and subslice
> + * level registers requiring steering. We allocate and populate
> + * these based on hw config and add it as an extension list at
> + * the end of the pre-populated render list.
> + */
> + guc_capture_alloc_steered_lists(guc);
> +
> + return 0;
> +}
> +
> /**
> * xe_guc_capture_init - Init for GuC register capture
> * @guc: The GuC object
> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
> index 55c1cedcb923..c2091c6ddb68 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture.h
> +++ b/drivers/gpu/drm/xe/xe_guc_capture.h
> @@ -43,6 +43,7 @@ int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
> enum guc_capture_list_class_type capture_class, size_t *size);
> int xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size);
> size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc);
> +int xe_guc_capture_steered_list_init(struct xe_guc *guc);
> int xe_guc_capture_init(struct xe_guc *guc);
>
> #endif
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v17 7/7] drm/xe/guc: Plumb GuC-capture into dev coredump
2024-08-27 21:47 ` [PATCH v17 7/7] drm/xe/guc: Plumb GuC-capture into dev coredump Zhanjun Dong
@ 2024-08-29 4:26 ` Teres Alexis, Alan Previn
2024-09-06 18:11 ` Dong, Zhanjun
0 siblings, 1 reply; 23+ messages in thread
From: Teres Alexis, Alan Previn @ 2024-08-29 4:26 UTC (permalink / raw)
To: Dong, Zhanjun, intel-xe@lists.freedesktop.org
Havent gone through everything, but looks like we have a lot to
digest, lets connect offline and go through everything. Suspect
we might need another one or two rounds.
Hmmm.. this patch is huge, we need to think about how we can break this into
2 or 3 patches but by simple trivial file-specific change like standa-alone header
modification in a single patch... but rather based on specific flows or
functionalities that can be chronlogical. For example:
patch x = only focus on searching for matching guc-pre-captured-node and printing that.
and keep the existing manual copy + printing (with the duplicate snapshot engine regs structure).
patch x+1 = Remove the manual capture + printing (and this patch can remove the duplicate
snapshot engine regs structure).
patch x+2 = add manual-capture via guc-capture so that we can use the same list
(for wedged-mode=2 and such)
I am aware this is a big ask but since patch sizes can be subjective, let's check
with one of the other committers offline to see what they think.
Either way, I do have a bunch of additional comments below. I havent gone
through everything yet - since the changes touch many different points
in the flow. but I've focused more on the new list and the printing.
On Tue, 2024-08-27 at 14:47 -0700, Zhanjun Dong wrote:
> Add pre-capture by read from hw engine if GuC capture data is not ready,
> the pre-captured data will be refereshed if GuC capture is ready at later
> time.
alan: Maybe some additional context like "
alan: i dont think the term "pre-capture" is self explanatory, since
the term "pre" means ~before but in actual fact, even when capture
comes from GuC it already happened 'before'. Can we replace all the
terms of pre-capture or pre_capture in comments and code to
"manual_capture" or "kmd_capture" or anything more self-explanatory.
> Provide xe_guc_capture_get_reg_desc_list to get the register dscriptor
> list.
> GuC support limited register ranges to be captured, add type of direct
> read to read these registers by host.
> Add function to check if capture is ready for a job.
> Print out snapshot registers by types of global, class, instance and
> direct read.
>
> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
> drivers/gpu/drm/xe/xe_devcoredump.c | 16 +-
> drivers/gpu/drm/xe/xe_devcoredump_types.h | 2 +
> drivers/gpu/drm/xe/xe_guc_capture.c | 380 +++++++++++++++++++++-
> drivers/gpu/drm/xe/xe_guc_capture.h | 26 ++
> drivers/gpu/drm/xe/xe_guc_capture_types.h | 2 +
> drivers/gpu/drm/xe/xe_guc_submit.c | 19 +-
> drivers/gpu/drm/xe/xe_hw_engine.c | 273 ++++------------
> drivers/gpu/drm/xe/xe_hw_engine.h | 2 +
> drivers/gpu/drm/xe/xe_hw_engine_types.h | 66 +---
> drivers/gpu/drm/xe/xe_lrc.h | 1 +
> 11 files changed, 504 insertions(+), 285 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 0d1a4a9f4e11..6a8dee069974 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -605,4 +605,6 @@
> #define GT_CS_MASTER_ERROR_INTERRUPT REG_BIT(3)
> #define GT_RENDER_USER_INTERRUPT REG_BIT(0)
>
> +#define SFC_DONE(n) XE_REG(0x1cc000 + (n) * 0x1000)
> +
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
> index bdb76e834e4c..783958829750 100644
> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
> @@ -16,6 +16,7 @@
> #include "xe_force_wake.h"
> #include "xe_gt.h"
> #include "xe_gt_printk.h"
> +#include "xe_guc_capture.h"
> #include "xe_guc_ct.h"
> #include "xe_guc_submit.h"
> #include "xe_hw_engine.h"
> @@ -135,6 +136,8 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss)
>
> xe_vm_snapshot_free(ss->vm);
> ss->vm = NULL;
> +
> + xe_guc_capture_free(&ss->gt->uc.guc);
alan: something wrong with this code .. see below.
> }
>
> static void xe_devcoredump_deferred_snap_work(struct work_struct *work)
> @@ -204,6 +207,7 @@ static void xe_devcoredump_free(void *data)
> /* To prevent stale data on next snapshot, clear everything */
> memset(&coredump->snapshot, 0, sizeof(coredump->snapshot));
> coredump->captured = false;
> + coredump->job = NULL;
> drm_info(&coredump_to_xe(coredump)->drm,
> "Xe device coredump has been deleted.\n");
> }
> @@ -214,8 +218,6 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> struct xe_devcoredump_snapshot *ss = &coredump->snapshot;
> struct xe_exec_queue *q = job->q;
> struct xe_guc *guc = exec_queue_to_guc(q);
> - struct xe_hw_engine *hwe;
> - enum xe_hw_engine_id id;
> u32 adj_logical_mask = q->logical_mask;
> u32 width_mask = (0x1 << q->width) - 1;
> const char *process_name = "no process";
> @@ -231,6 +233,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> strscpy(ss->process_name, process_name);
>
> ss->gt = q->gt;
> + coredump->job = job;
> INIT_WORK(&ss->work, xe_devcoredump_deferred_snap_work);
>
> cookie = dma_fence_begin_signalling();
> @@ -252,14 +255,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
> coredump->snapshot.job = xe_sched_job_snapshot_capture(job);
> coredump->snapshot.vm = xe_vm_snapshot_capture(q->vm);
>
> - for_each_hw_engine(hwe, q->gt, id) {
> - if (hwe->class != q->hwe->class ||
> - !(BIT(hwe->logical_instance) & adj_logical_mask)) {
> - coredump->snapshot.hwe[id] = NULL;
> - continue;
> - }
> - coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe);
> - }
> + xe_hw_engine_snapshot_capture_for_job(job);
>
> queue_work(system_unbound_wq, &ss->work);
>
> diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h
> index 440d05d77a5a..50165a10abdd 100644
> --- a/drivers/gpu/drm/xe/xe_devcoredump_types.h
> +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h
> @@ -69,6 +69,8 @@ struct xe_devcoredump {
> bool captured;
> /** @snapshot: Snapshot is captured at time of the first crash */
> struct xe_devcoredump_snapshot snapshot;
> + /** @job: Point to the issue job */
> + struct xe_sched_job *job;
> };
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
> index 20b38d60dca7..16f660db3231 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture.c
> +++ b/drivers/gpu/drm/xe/xe_guc_capture.c
> @@ -27,11 +27,16 @@
> #include "xe_guc_capture.h"
> #include "xe_guc_capture_types.h"
> #include "xe_guc_ct.h"
> +#include "xe_guc_exec_queue_types.h"
> #include "xe_guc_log.h"
> +#include "xe_guc_submit_types.h"
> #include "xe_guc_submit.h"
> #include "xe_hw_engine_types.h"
> +#include "xe_lrc.h"
> #include "xe_macros.h"
> #include "xe_map.h"
> +#include "xe_mmio.h"
> +#include "xe_sched_job.h"
>
> /*
> * struct __guc_capture_bufstate
> @@ -69,11 +74,13 @@ struct __guc_capture_parsed_output {
> u32 eng_inst;
> u32 guc_id;
> u32 lrca;
> + u32 type;
> + enum xe_hw_engine_snapshot_source_id source;
> struct gcap_reg_list_info {
> u32 vfid;
> u32 num_regs;
> struct guc_mmio_reg *regs;
> - } reginfo[GUC_STATE_CAPTURE_TYPE_MAX];
> + } reginfo[GUC_HOST_CAPTURE_TYPE_MAX];
alan: lets not do this - we need a different way to do this, actually, we
need to ensure ALL register dumps captured due to hanging workloads come
strictly from either the GuC ... OR ... manually read (when GuC reset is
disabled i.e. wedged mode >2 ). There should NOT be a mix. Exceptions would
only be registers that can never change at runtime based on engine-class/
engine-instance / executing-context-workloads submissions. If such a registers
exists, it should be directly tracked by and read by devcoredump, not as part
of the guc-error-capture lists. However, based on what i am seeing in this patch
you are using this new "out-of-band-guc-abi-list-type" as a hack to identifying
separating the SFC_DONE registers - but those are engine class registers so
this doesn't look right to me. We add this to the GuC register list in ADS.
> #define GCAP_PARSED_REGLIST_INDEX_GLOBAL BIT(GUC_STATE_CAPTURE_TYPE_GLOBAL)
> #define GCAP_PARSED_REGLIST_INDEX_ENGCLASS BIT(GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS)
> };
> @@ -133,6 +140,17 @@ struct __guc_capture_parsed_output {
> { SC_INSTDONE_EXTRA, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA"}, \
> { SC_INSTDONE_EXTRA2, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA2"}
>
> +/*
> + * GuC support limited registers ranges to be captured for debug
> + * purpose, for registers out of these ranges, direct read is the only
> + * way to access.
> + */
> +#define XELP_VEC_DIRECT_READ \
> + { SFC_DONE(0), 0, 0, 0, "SFC_DONE[0]"}, \
> + { SFC_DONE(1), 0, 0, 0, "SFC_DONE[1]"}, \
> + { SFC_DONE(2), 0, 0, 0, "SFC_DONE[2]"}, \
> + { SFC_DONE(3), 0, 0, 0, "SFC_DONE[3]"}
> +
alan: these are engine class registers, they should be captured by GuC since only
GuC knows what contexts are running on which engines at which point during a reset
event. If you are having issues with GuC not reporting this, we need to work
with the GuC firmware team / arch team to get this fixes. I suspect this might
end up taking more time and its important that we can get the most common ring
register dumps enabled first. I would suggest we open a public facing JIRA
that ackowledges that we need to add SFC_DONE registers into GuC error capture
ADS and proceed without it first. Unless we find that GuC does actually support
and we perhaps didnt enable it correctly. Let's discuss offline.
> /* XE_LP Global */
> static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {
> COMMON_XELP_BASE_GLOBAL,
> @@ -164,6 +182,11 @@ static const struct __guc_mmio_reg_descr xe_vec_inst_regs[] = {
> COMMON_BASE_ENGINE_INSTANCE,
> };
>
> +/* Video Enhancement direct read registers */
> +static const struct __guc_mmio_reg_descr xe_vec_direct_read_regs[] = {
> + XELP_VEC_DIRECT_READ,
> +};
> +
> /* Blitter Per-Engine-Instance */
> static const struct __guc_mmio_reg_descr xe_blt_inst_regs[] = {
> COMMON_BASE_ENGINE_INSTANCE,
> @@ -201,6 +224,8 @@ static const struct __guc_mmio_reg_descr_group xe_lp_lists[] = {
> MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
> MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
> + MAKE_REGLIST(xe_vec_direct_read_regs, PF, HOST_DIRECT_READ,
> + GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
alan: Regarding this usage of "HOST_DIRECT_READ", it appears you are trying to overload
a GUC-ABI definition for reglist type to workaround the fact that some registers are not
captured by GuC. This is incorrect, we need to work with the GuC team to ensure they
capture these registers because the SFC register state used only as part of the batch
submission thru VDBOX/VEBOX CS. That means it should be copied by GuC. If we are seeing
issues, we need to get this fixed in the firmware. I think mixing GuC capture with manual
read is the wrong thing to do.
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
> MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
> @@ -217,6 +242,8 @@ static const struct __guc_mmio_reg_descr_group xe_hpg_lists[] = {
> MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
> MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
> + MAKE_REGLIST(xe_vec_direct_read_regs, PF, HOST_DIRECT_READ,
> + GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
alan: same comment as last
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
> MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
> @@ -292,6 +319,23 @@ guc_capture_get_one_list(const struct __guc_mmio_reg_descr_group *reglists,
> return NULL;
> }
>
> +const struct __guc_mmio_reg_descr_group *
> +xe_guc_capture_get_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
> + enum guc_capture_list_class_type capture_class)
> +{
> + return guc_capture_get_one_list(guc_capture_get_device_reglist(gt_to_xe(gt)), owner, type,
> + capture_class);
> +}
> +
alan: nit: instead of two helpers above and below, u can make it one with a
param for "is_ext_list", internally if-else it - maybe few of lines of code?
> +const struct __guc_mmio_reg_descr_group *
> +xe_guc_capture_get_ext_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
> + enum guc_capture_list_class_type capture_class)
> +{
> + struct xe_guc *guc = >->uc.guc;
> +
> + return guc_capture_get_one_list(guc->capture->extlists, owner, type, capture_class);
> +}
> +
> struct __ext_steer_reg {
> const char *name;
> struct xe_reg_mcr reg;
> @@ -810,16 +854,16 @@ guc_capture_add_node_to_cachelist(struct xe_guc_state_capture *gc,
> static void
> guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *node)
> {
> - struct guc_mmio_reg *tmp[GUC_STATE_CAPTURE_TYPE_MAX];
> + struct guc_mmio_reg *tmp[GUC_HOST_CAPTURE_TYPE_MAX];
> int i;
>
> - for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
> + for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i) {
> tmp[i] = node->reginfo[i].regs;
> memset(tmp[i], 0, sizeof(struct guc_mmio_reg) *
> guc->capture->max_mmio_per_node);
> }
> memset(node, 0, sizeof(*node));
> - for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i)
> + for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i)
> node->reginfo[i].regs = tmp[i];
alan: same comments are prior - lets not overload ABI-types for a workaround.
>
> INIT_LIST_HEAD(&node->link);
> @@ -864,6 +908,7 @@ guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *no
> * L--> xe_devcoredump
> * L--> devcoredump_snapshot(..IS_GUC_CAPTURE)
> * --> xe_hw_engine_snapshot_capture(..IS_GUC_CAPTURE)
> + * --> xe_guc_capture_node_from_hw(..If no GUC CAPTURE)
> *
> * User Sysfs / Debugfs
> * --------------------
> @@ -1197,6 +1242,8 @@ guc_capture_extract_reglists(struct xe_guc *guc, struct __guc_capture_bufstate *
> }
> node->is_partial = is_partial;
> node->reginfo[datatype].vfid = FIELD_GET(GUC_STATE_CAPTURE_HEADER_VFID, hdr.owner);
> + node->source = XE_HW_ENGINE_SOURCE_GUC_CAPTURE;
> + node->type = datatype;
>
> switch (datatype) {
> case GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE:
> @@ -1363,7 +1410,7 @@ guc_capture_alloc_one_node(struct xe_guc *guc)
> if (!new)
> return NULL;
>
> - for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
> + for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i) {
> new->reginfo[i].regs = drmm_kzalloc(drm, guc->capture->max_mmio_per_node *
> sizeof(struct guc_mmio_reg), GFP_KERNEL);
> if (!new->reginfo[i].regs) {
> @@ -1401,7 +1448,7 @@ guc_get_max_reglist_count(struct xe_guc *guc)
> int i, j, k, tmp, maxregcount = 0;
>
> for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; ++i) {
> - for (j = 0; j < GUC_STATE_CAPTURE_TYPE_MAX; ++j) {
> + for (j = 0; j < GUC_HOST_CAPTURE_TYPE_MAX; ++j) {
> for (k = 0; k < GUC_MAX_ENGINE_CLASSES; ++k) {
> if (j == GUC_STATE_CAPTURE_TYPE_GLOBAL && k > 0)
> continue;
> @@ -1429,6 +1476,327 @@ guc_capture_create_prealloc_nodes(struct xe_guc *guc)
> __guc_capture_create_prealloc_nodes(guc);
> }
>
> +static void
> +read_reg_to_node(struct xe_hw_engine *hwe, const struct __guc_mmio_reg_descr_group *list,
> + struct __guc_capture_parsed_output *node)
> +{
> + struct gcap_reg_list_info *reginfo = &node->reginfo[list->type];
> + struct guc_mmio_reg *regs = reginfo->regs;
> + int i;
> +
> + if (!regs)
> + return;
> +
> + for (i = 0; i < list->num_regs; i++) {
> + struct __guc_mmio_reg_descr desc = list->list[i];
> + u32 value;
> +
> + if (!list->list)
> + return;
> +
> + value = (list->type == GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE) ?
> + xe_hw_engine_mmio_read32(hwe, desc.reg) :
> + xe_mmio_read32(hwe->gt, desc.reg);
alan: i see you are using this for the manual read. I also believe you are
also using this for reading steering registers, but method is not going to work
for steering registers. Please see the correct method in function
"xe_hw_engine_snapshot_instdone_capture" and how it calls xe_gt_mcr_unicast_read
in baseline codebase.
Actually, to be honest, i dont see why you needed to move the manual register
capture into guc-capture. We have been driving to ensure we have a single
register list is shared across both devcoredump and guc-error-capture.
I'm not sure why you also needed to move the manual-register-reading
over to guc-err-capture. I don't see a motivation for that.
I think keeping the manual register reads in devcoredump subsystem is fine.
We can keep xe_hw_engine_snapshot_capture but only used when doing manual
capture as long as we use the shared register list, i.e. use the list
from xe_guc_capture_get_reg_desc_list / xe_guc_capture_get_ext_reg_desc_list.
> +
> + regs[i].value = value;
> + regs[i].offset = desc.reg.addr;
> + regs[i].flags = desc.flags;
> + regs[i].mask = desc.mask;
> + }
> +}
> +
> +/**
> + * xe_guc_capture_node_from_hw - Take a engine snapshot from GuC capture.
> + * @hwe: Xe HW Engine.
> + * @type: GuC capture register type
> + * @list: The register list
> + *
> + * This can be printed out in a later stage like during dev_coredump
> + * analysis.
> + *
> + * Returns: None
> + */
> +void xe_guc_capture_node_from_hw(struct xe_hw_engine *hwe, u32 type,
> + const struct __guc_mmio_reg_descr_group *list)
> +{
> + struct xe_gt *gt = hwe->gt;
> + struct xe_device *xe = gt_to_xe(gt);
> + struct xe_guc *guc = >->uc.guc;
> + struct xe_devcoredump *devcoredump = &xe->devcoredump;
> + struct __guc_capture_parsed_output *new = NULL;
> + struct gcap_reg_list_info *reginfo;
> + u16 guc_id = 0;
> + u32 lrca = 0;
> +
> + if (!list || list->num_regs == 0)
> + return;
> + XE_WARN_ON(list->num_regs > guc->capture->max_mmio_per_node);
> +
> + new = guc_capture_get_prealloc_node(guc);
> + if (!new)
> + return;
> +
> + new->is_partial = false;
> + reginfo = &new->reginfo[type];
> +
> + read_reg_to_node(hwe, list, new);
> +
> + reginfo->num_regs = list->num_regs;
> +
> + if (devcoredump->captured) {
> + struct xe_guc_submit_exec_queue_snapshot *ge = devcoredump->snapshot.ge;
> +
> + guc_id = ge->guc.id;
> + lrca = ge->lrc[0]->context_desc & LRC_GTT_ADDRESS_MASK;
> + }
> +
> + new->eng_class = hwe->class;
> + new->eng_inst = hwe->instance;
alan: as mentioned previously, i think we should not move manual register
reads from devcoredump over to guc, only ensure the list is the shared list.
Putting that point aside, above code may not work correctly. IIRC,
node->eng_class and node->eng_inst are both GUC specific identifiers and
we have to make some kind of conversion from hwe-class to guc-class and
maybe hwe-instance to guc-instance.. (i am sure about the former, but not
sure on up on the latter). So when its time to print, if we look at
> + new->guc_id = guc_id;
> + new->lrca = lrca;
> + new->source = XE_HW_ENGINE_SOURCE_HW_ENGINE;
> + new->type = type;
> + guc_capture_add_node_to_outlist(guc->capture, new);
> +}
> +
> +static struct guc_mmio_reg *
> +guc_capture_find_reg(struct gcap_reg_list_info *reginfo, u32 addr, u32 flags)
> +{
> + int i;
> +
> + if (reginfo && reginfo->num_regs > 0) {
> + struct guc_mmio_reg *regs = reginfo->regs;
> +
> + if (regs)
> + for (i = 0; i < reginfo->num_regs; i++)
> + if (regs[i].offset == addr && regs[i].flags == flags)
> + return ®s[i];
> + }
> +
> + return NULL;
> +}
> +
> +static void
> +snapshot_print_by_list(struct xe_hw_engine_snapshot *snapshot, struct drm_printer *p, u32 type,
> + const struct __guc_mmio_reg_descr_group *list)
> +{
> + struct xe_gt *gt = snapshot->hwe->gt;
> + struct xe_device *xe = gt_to_xe(gt);
> + struct xe_guc *guc = >->uc.guc;
> + struct xe_devcoredump *devcoredump = &xe->devcoredump;
> + u16 guc_id = 0;
> + u32 last_value, lrca = 0;
> + struct list_head *node;
> + int i, guc_class;
> + bool is_ext;
> +
> + if (!list)
> + return;
> +
> + is_ext = list == guc->capture->extlists;
> +
> + if (devcoredump->captured) {
> + struct xe_guc_submit_exec_queue_snapshot *ge = devcoredump->snapshot.ge;
> +
> + guc_id = ge->guc.id;
> + lrca = ge->lrc[0]->context_desc;
> + }
> +
> + guc_class = xe_engine_class_to_guc_class(snapshot->hwe->class);
> +
> + node = &guc->capture->outlist;
> + for (i = 0; i < list->num_regs; i++) {
> + struct __guc_capture_parsed_output *n, *ntmp;
> + const struct __guc_mmio_reg_descr *sub_list = &list->list[i];
alan: I'm a little bit lost right here. The param "list" coming into this
function is the list registers that we use for registering into ADS (not
the output capture node list). Then the idea we have is to format the printing
of the registers that was captured from a matching outlist. to do that
we grab the next register from outlost and then look for the matching
register description from list.
That said i would have expected the flow of this function to look like this:
Step1: find the mathing output node.
struct __guc_capture_parsed_output *matchnode = NULL;
list_for_each_entry_safe(n, ntmp, node, link) {
if (n->eng_class == guc_class && n->eng_inst == snapshot->hwe->instance &&
n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca) {
matchnode = n;
}
if (!matchnode) {
print_error - cannot find matching register dumps
return (error?)
}
struct gcap_reg_list_info *reginfo = &matchnode->reginfo[type];
struct guc_mmio_reg *reg;
const struct __guc_mmio_reg_descr *reg_descr;
u32 value;
for (i = 0; i < reginfo->num_regs; ++i) {
reg = reginfo->regs[i]
reg_descr = guc_capture_find_reg_descr(reg, list);
// in this function, loop thru list->list and find matching address / steering-info
if (!reg_descr) {
continue;
print warning
}
//the rest of the print formatting code...
value = reg->value;
if (sub_list->data_type == REG_64BIT_LOW_DW) {
last_value = value;
continue;
} else if (sub_list->data_type == REG_64BIT_HI_DW) {
u64 value_qw = ((u64)value << 32) | last_value;
if (sub_list->regname)
drm_printf(p, "\t%s: 0x%016llx\n",
sub_list->regname, value_qw);
continue; // <--- alan: i think break was wrong here
}
if (!sub_list->regname)
break;
if (is_ext) {
...
...
}
// dont need that last break;
}
> +
> + list_for_each_entry_safe(n, ntmp, node, link) {
> + if (n->eng_class == guc_class && n->eng_inst == snapshot->hwe->instance &&
alan: does hwe->instance match the guc's engine-instance? need to check with the folks familiar
with the guc mapping table we setup in ads - maybe not an issue.
> + n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca) {
> + struct gcap_reg_list_info *reginfo = &n->reginfo[type];
> + struct guc_mmio_reg *reg;
> + u32 value;
> +
> + reg = guc_capture_find_reg(reginfo, sub_list->reg.addr,
> + sub_list->flags);
> + if (!reg)
> + continue;
> +
> + value = reg->value;
> + if (sub_list->data_type == REG_64BIT_LOW_DW) {
> + last_value = value;
> + continue;
> + } else if (sub_list->data_type == REG_64BIT_HI_DW) {
> + u64 value_qw = ((u64)value << 32) | last_value;
> +
> + if (sub_list->regname)
> + drm_printf(p, "\t%s: 0x%016llx\n",
> + sub_list->regname, value_qw);
> + break;
> + }
> +
> + if (!sub_list->regname)
> + break;
> +
> + if (is_ext) {
> + int dss, group, instance;
> +
> + group = FIELD_GET(GUC_REGSET_STEERING_GROUP,
> + sub_list->flags);
> + instance = FIELD_GET(GUC_REGSET_STEERING_INSTANCE,
> + sub_list->flags);
> + dss = xe_gt_mcr_steering_info_to_dss_id(gt,
> + group, instance);
> +
> + drm_printf(p, "\t%s[%u]: 0x%08x\n", sub_list->regname, dss,
> + value);
> + } else {
> + drm_printf(p, "\t%s: 0x%08x\n", sub_list->regname,
> + value);
> + }
> + break;
> + }
> + }
> + }
> +}
> +
> +/**
> + * xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot.
> + * @snapshot: Xe HW Engine snapshot object.
> + * @p: drm_printer where it will be printed out.
> + *
> + * This function prints out a given Xe HW Engine snapshot object.
> + */
> +void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
> + struct drm_printer *p)
> +{
> + int type;
> + const struct __guc_mmio_reg_descr_group *list;
> + enum guc_capture_list_class_type capture_class;
> +
> + if (!snapshot)
> + return;
> +
> + xe_gt_assert(snapshot->hwe->gt, snapshot->source <= XE_HW_ENGINE_SOURCE_GUC_CAPTURE);
> + xe_gt_assert(snapshot->hwe->gt, snapshot->hwe);
> +
> + capture_class = xe_engine_class_to_guc_capture_class(snapshot->hwe->class);
> +
> + drm_printf(p, "%s (physical), logical instance=%d\n",
> + snapshot->name ? snapshot->name : "",
> + snapshot->logical_instance);
> + drm_printf(p, "\tCapture source: %s\n",
> + snapshot->source == XE_HW_ENGINE_SOURCE_GUC_CAPTURE ? "GuC" : "Engine");
> + drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n",
> + snapshot->forcewake.domain, snapshot->forcewake.ref);
> +
> + for (type = GUC_STATE_CAPTURE_TYPE_GLOBAL; type < GUC_HOST_CAPTURE_TYPE_MAX; type++) {
> + list = xe_guc_capture_get_reg_desc_list(snapshot->hwe->gt,
> + GUC_CAPTURE_LIST_INDEX_PF, type,
> + capture_class);
> + snapshot_print_by_list(snapshot, p, type, list);
> + }
> +
> + if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
> + list = xe_guc_capture_get_ext_reg_desc_list(snapshot->hwe->gt,
> + GUC_CAPTURE_LIST_INDEX_PF,
> + GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
> + capture_class);
> + snapshot_print_by_list(snapshot, p, GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS, list);
> + }
> +
> + drm_puts(p, "\n");
> +}
> +
> +/**
> + * xe_guc_capture_is_ready_for - Check if capture is ready for the job.
> + * @job: The job object.
> + *
> + * Search within the capture outlist for the job.
> + *
> + * Returns: True if found a node for the job
> + */
> +bool xe_guc_capture_is_ready_for(struct xe_sched_job *job)
> +{
> + struct xe_hw_engine *hwe;
> + enum xe_hw_engine_id id;
> + struct xe_exec_queue *q = job->q;
> + u16 guc_class = GUC_LAST_ENGINE_CLASS + 1;
> +
> + if (!q || !q->gt)
> + return false;
> +
> + /* Find hwe for the job */
> + for_each_hw_engine(hwe, q->gt, id) {
> + if (hwe != q->hwe)
> + continue;
> + guc_class = xe_engine_class_to_guc_class(hwe->class);
> + break;
> + }
> +
> + if (guc_class <= GUC_LAST_ENGINE_CLASS) {
> + struct __guc_capture_parsed_output *n, *ntmp;
> + struct xe_guc *guc = &q->gt->uc.guc;
> + struct list_head *list = &guc->capture->outlist;
> + u16 guc_id = q->guc->id;
> + u32 lrca = xe_lrc_ggtt_addr(job->q->lrc[0]) & LRC_GTT_ADDRESS_MASK;
> +
> + /*
> + * Look for a matching GuC reported error capture node from
> + * the internal output link-list based on engine, guc id and
> + * lrca info.
> + */
> + list_for_each_entry_safe(n, ntmp, list, link) {
> + if (n->eng_class == guc_class && n->eng_inst == hwe->instance &&
> + n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca &&
> + n->source == XE_HW_ENGINE_SOURCE_GUC_CAPTURE)
> + return true;
> + }
> + }
> + return false;
> +}
> +
> +/*
> + * xe_guc_capture_free_pre_capture - Free the pre captured register list
> + * @guc: The GuC object
> + *
> + * Free the pre captured register list
> + */
> +void xe_guc_capture_free_pre_capture(struct xe_guc *guc)
> +{
> + if (guc->capture && !list_empty(&guc->capture->outlist)) {
> + struct __guc_capture_parsed_output *n, *ntmp;
> +
> + list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) {
> + if (n->source == XE_HW_ENGINE_SOURCE_HW_ENGINE &&
> + /* Direct read is for host only, no need to refresh */
> + n->type != GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ) {
> + list_del(&n->link);
> + /* put node back to cache list */
> + guc_capture_add_node_to_cachelist(guc->capture, n);
> + }
> + }
> + }
> +}
> +
> +/*
> + * xe_guc_capture_free - Free the GuC captured register list
> + * @guc: The GuC object
> + *
> + * Free the GuC captured register list
> + */
> +void xe_guc_capture_free(struct xe_guc *guc)
> +{
> + if (guc->capture && !list_empty(&guc->capture->outlist)) {
> + struct __guc_capture_parsed_output *n, *ntmp;
> +
> + list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) {
> + list_del(&n->link);
> + /* put node back to cache list */
> + guc_capture_add_node_to_cachelist(guc->capture, n);
alan: this is incorrect... if dev_coredump has been freed for one specific capture event,
i dont think we want to free al capture nodes. Don't forget we can have multiple engines
be hanging and resetting in quick succession (which is actually the case for some of
our more intense igt tests, also if we have dependent engine resets, we can also see
this). That said, we have to think of two things:
1. only free the ouput node that was directly servicing the xe_devcoredump_snapshot
structure that is getting freed, this means, we might wanna take in the guc structure
as well as the struct xe_devcoredump_snapshot structure so that we can find the
matching node (by way of engine, guc-id, lrc, etc).
2. we don't want to leak capture->outlist: in the event we have multiple
guc error capture IRQs and we parse and extract multiple output nodes from
guc-capture-ring-buffer is but only one devcore-dumps get generated and
freed (see function guc_capture_get_prealloc_node where it bails if there
already is a devcoredump struct waiting to be collected), we have to ensure
we don't leak those nodes in outlist. However, we dont have to worry about
this since in patch #4, function guc_capture_get_prealloc_node will always
steal back LRU node from outlist if required.
That said, we do want to fix this function for #1.
> + }
> + }
> +}
> +
> /*
> * xe_guc_capture_steered_list_init - Init steering register list
> * @guc: The GuC object
> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
> index 3a690e8b714a..bcda17ef9eb9 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture.h
> +++ b/drivers/gpu/drm/xe/xe_guc_capture.h
> @@ -12,6 +12,21 @@
> #include "xe_guc_fwif.h"
>
> struct xe_guc;
> +struct xe_hw_engine;
> +struct xe_hw_engine_snapshot;
> +struct xe_sched_job;
> +
> +/* Register-types of GuC capture register lists for host side process */
> +enum guc_capture_host_type {
> + /*
> + * GuC support limited registers ranges to be captured for debug
> + * purpose, for registers out of these ranges, direct read is the only
> + * way to access.
> + */
> + GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ = GUC_STATE_CAPTURE_TYPE_MAX,
> +};
> +
> +#define GUC_HOST_CAPTURE_TYPE_MAX (GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ + 1)
>
> static inline enum guc_capture_list_class_type xe_guc_class_to_capture_class(u16 class)
> {
> @@ -44,6 +59,17 @@ int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
> enum guc_capture_list_class_type capture_class, size_t *size);
> int xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size);
> size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc);
> +const struct __guc_mmio_reg_descr_group *
> +xe_guc_capture_get_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
> + enum guc_capture_list_class_type capture_class);
> +const struct __guc_mmio_reg_descr_group *
> +xe_guc_capture_get_ext_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
> + enum guc_capture_list_class_type capture_class);
> +bool xe_guc_capture_is_ready_for(struct xe_sched_job *job);
> +void xe_guc_capture_node_from_hw(struct xe_hw_engine *hwe, u32 type,
> + const struct __guc_mmio_reg_descr_group *list);
> +void xe_guc_capture_free_pre_capture(struct xe_guc *guc);
> +void xe_guc_capture_free(struct xe_guc *guc);
> int xe_guc_capture_steered_list_init(struct xe_guc *guc);
> int xe_guc_capture_init(struct xe_guc *guc);
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_capture_types.h b/drivers/gpu/drm/xe/xe_guc_capture_types.h
> index 2057125b1bfa..857ad10bb8f3 100644
> --- a/drivers/gpu/drm/xe/xe_guc_capture_types.h
> +++ b/drivers/gpu/drm/xe/xe_guc_capture_types.h
> @@ -41,6 +41,8 @@ struct __guc_mmio_reg_descr {
> u32 mask;
> /** @regname: Name of the register */
> const char *regname;
> + /** @position_in_snapshot: The offset position in snapshot structure */
> + u32 position_in_snapshot;
> };
>
> /**
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 381be84740cf..44353e323f24 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -1073,6 +1073,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> struct xe_gpu_scheduler *sched = &q->guc->sched;
> struct xe_guc *guc = exec_queue_to_guc(q);
> const char *process_name = "no process";
> + struct xe_device *xe = guc_to_xe(guc);
> int err = -ETIME;
> pid_t pid = -1;
> int i = 0;
> @@ -1100,6 +1101,18 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> if (!skip_timeout_check && !xe_sched_job_started(job))
> goto rearm;
>
> + /* Pre-capture register snapshot, if devcoredump not captured and GuC capture not ready */
> + if (!exec_queue_killed(q) && !xe->devcoredump.captured && xe_device_uc_enabled(xe) &&
> + xe->wedged.mode >= 1 && !xe_guc_capture_is_ready_for(job)) {
> + /* take force wake before engine register pre-capture */
> + if (xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL))
> + xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
> +
> + xe_hw_engine_snapshot_capture_for_job(job);
> +
> + xe_force_wake_put(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
> + }
> +
> /*
> * XXX: Sampling timeout doesn't work in wedged mode as we have to
> * modify scheduling state to read timestamp. We could read the
> @@ -1182,7 +1195,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> trace_xe_sched_job_timedout(job);
>
> if (!exec_queue_killed(q))
> - xe_devcoredump(job);
> + xe_devcoredump(job); /* pre-captured data will be refreshed by GuC capture */
alan: comment description is not accurate. I think "refreshed" is the wrong term,
i think it should be "manual capture data will be replaced by GuC capture if
GuC succeeds on upcoming or already-completed engine reset, reported via G2H."
>
> /*
> * Kernel jobs should never fail, nor should VM jobs if they do
> @@ -1979,8 +1992,6 @@ int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
> xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
> xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
>
> - /* FIXME: Do error capture, most likely async */
> -
> trace_xe_exec_queue_reset(q);
>
> /*
> @@ -2006,7 +2017,7 @@ int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
> * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
> * called 1st to check status before process the data comes with the message.
> *
> - * Returns: None
> + * Returns: error code. 0 if success
> */
> int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
> {
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
> index 18980238a2ea..ad3a108a2491 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
> @@ -23,6 +23,8 @@
> #include "xe_gt_printk.h"
> #include "xe_gt_mcr.h"
> #include "xe_gt_topology.h"
> +#include "xe_guc_capture.h"
> +#include "xe_guc_capture_types.h"
> #include "xe_hw_engine_group.h"
> #include "xe_hw_fence.h"
> #include "xe_irq.h"
> @@ -312,6 +314,7 @@ void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe,
> u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg)
> {
> xe_gt_assert(hwe->gt, !(reg.addr & hwe->mmio_base));
> +
> xe_force_wake_assert_held(gt_to_fw(hwe->gt), hwe->domain);
>
> reg.addr += hwe->mmio_base;
> @@ -809,54 +812,26 @@ void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec)
> xe_hw_fence_irq_run(hwe->fence_irq);
> }
>
> -static bool
> -is_slice_common_per_gslice(struct xe_device *xe)
> -{
> - return GRAPHICS_VERx100(xe) >= 1255;
> -}
> -
> static void
> -xe_hw_engine_snapshot_instdone_capture(struct xe_hw_engine *hwe,
> - struct xe_hw_engine_snapshot *snapshot)
> +xe_hw_engine_snapshot_from_hw(struct xe_hw_engine *hwe, struct xe_hw_engine_snapshot *snapshot,
> + u32 type)
> {
> struct xe_gt *gt = hwe->gt;
> - struct xe_device *xe = gt_to_xe(gt);
> - unsigned int dss;
> - u16 group, instance;
> -
> - snapshot->reg.instdone.ring = xe_hw_engine_mmio_read32(hwe, RING_INSTDONE(0));
> + enum guc_capture_list_class_type capture_class;
> + const struct __guc_mmio_reg_descr_group *list;
>
> - if (snapshot->hwe->class != XE_ENGINE_CLASS_RENDER)
> - return;
> + capture_class = xe_engine_class_to_guc_capture_class(hwe->class);
>
> - if (is_slice_common_per_gslice(xe) == false) {
> - snapshot->reg.instdone.slice_common[0] =
> - xe_mmio_read32(gt, SC_INSTDONE);
> - snapshot->reg.instdone.slice_common_extra[0] =
> - xe_mmio_read32(gt, SC_INSTDONE_EXTRA);
> - snapshot->reg.instdone.slice_common_extra2[0] =
> - xe_mmio_read32(gt, SC_INSTDONE_EXTRA2);
> - } else {
> - for_each_geometry_dss(dss, gt, group, instance) {
> - snapshot->reg.instdone.slice_common[dss] =
> - xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE, group, instance);
> - snapshot->reg.instdone.slice_common_extra[dss] =
> - xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE_EXTRA, group, instance);
> - snapshot->reg.instdone.slice_common_extra2[dss] =
> - xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE_EXTRA2, group, instance);
> - }
> - }
> + /* Get register list for the type/class */
> + list = xe_guc_capture_get_reg_desc_list(gt, GUC_CAPTURE_LIST_INDEX_PF, type, capture_class);
>
> - for_each_geometry_dss(dss, gt, group, instance) {
> - snapshot->reg.instdone.sampler[dss] =
> - xe_gt_mcr_unicast_read(gt, SAMPLER_INSTDONE, group, instance);
> - snapshot->reg.instdone.row[dss] =
> - xe_gt_mcr_unicast_read(gt, ROW_INSTDONE, group, instance);
> + xe_guc_capture_node_from_hw(hwe, type, list);
>
> - if (GRAPHICS_VERx100(xe) >= 1255)
> - snapshot->reg.instdone.geom_svg[dss] =
> - xe_gt_mcr_unicast_read(gt, XEHPG_INSTDONE_GEOM_SVGUNIT,
> - group, instance);
> + /* Capture steering registers for rcs/ccs */
> + if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
> + list = xe_guc_capture_get_ext_reg_desc_list(gt, GUC_CAPTURE_LIST_INDEX_PF, type,
> + capture_class);
> + xe_guc_capture_node_from_hw(hwe, type, list);
> }
> }
>
> @@ -874,8 +849,9 @@ struct xe_hw_engine_snapshot *
> xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
> {
> struct xe_hw_engine_snapshot *snapshot;
> - size_t len;
> - u64 val;
> + struct xe_gt *gt = hwe->gt;
> + struct xe_device *xe = gt_to_xe(gt);
> + u32 type;
>
> if (!xe_hw_engine_is_valid(hwe))
> return NULL;
> @@ -885,28 +861,6 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
> if (!snapshot)
> return NULL;
>
> - /* Because XE_MAX_DSS_FUSE_BITS is defined in xe_gt_types.h and it
> - * includes xe_hw_engine_types.h the length of this 3 registers can't be
> - * set in struct xe_hw_engine_snapshot, so here doing additional
> - * allocations.
> - */
> - len = (XE_MAX_DSS_FUSE_BITS * sizeof(u32));
> - snapshot->reg.instdone.slice_common = kzalloc(len, GFP_ATOMIC);
> - snapshot->reg.instdone.slice_common_extra = kzalloc(len, GFP_ATOMIC);
> - snapshot->reg.instdone.slice_common_extra2 = kzalloc(len, GFP_ATOMIC);
> - snapshot->reg.instdone.sampler = kzalloc(len, GFP_ATOMIC);
> - snapshot->reg.instdone.row = kzalloc(len, GFP_ATOMIC);
> - snapshot->reg.instdone.geom_svg = kzalloc(len, GFP_ATOMIC);
> - if (!snapshot->reg.instdone.slice_common ||
> - !snapshot->reg.instdone.slice_common_extra ||
> - !snapshot->reg.instdone.slice_common_extra2 ||
> - !snapshot->reg.instdone.sampler ||
> - !snapshot->reg.instdone.row ||
> - !snapshot->reg.instdone.geom_svg) {
> - xe_hw_engine_snapshot_free(snapshot);
> - return NULL;
> - }
> -
> snapshot->name = kstrdup(hwe->name, GFP_ATOMIC);
> snapshot->hwe = hwe;
> snapshot->logical_instance = hwe->logical_instance;
> @@ -916,156 +870,69 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
> snapshot->mmio_base = hwe->mmio_base;
>
> /* no more VF accessible data below this point */
> - if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
> + if (IS_SRIOV_VF(xe))
> return snapshot;
>
> - snapshot->reg.ring_execlist_status =
> - xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_LO(0));
> - val = xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0));
> - snapshot->reg.ring_execlist_status |= val << 32;
> -
> - snapshot->reg.ring_execlist_sq_contents =
> - xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_SQ_CONTENTS_LO(0));
> - val = xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_SQ_CONTENTS_HI(0));
> - snapshot->reg.ring_execlist_sq_contents |= val << 32;
> -
> - snapshot->reg.ring_acthd = xe_hw_engine_mmio_read32(hwe, RING_ACTHD(0));
> - val = xe_hw_engine_mmio_read32(hwe, RING_ACTHD_UDW(0));
> - snapshot->reg.ring_acthd |= val << 32;
> -
> - snapshot->reg.ring_bbaddr = xe_hw_engine_mmio_read32(hwe, RING_BBADDR(0));
> - val = xe_hw_engine_mmio_read32(hwe, RING_BBADDR_UDW(0));
> - snapshot->reg.ring_bbaddr |= val << 32;
> -
> - snapshot->reg.ring_dma_fadd =
> - xe_hw_engine_mmio_read32(hwe, RING_DMA_FADD(0));
> - val = xe_hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0));
> - snapshot->reg.ring_dma_fadd |= val << 32;
> -
> - snapshot->reg.ring_hwstam = xe_hw_engine_mmio_read32(hwe, RING_HWSTAM(0));
> - snapshot->reg.ring_hws_pga = xe_hw_engine_mmio_read32(hwe, RING_HWS_PGA(0));
> - snapshot->reg.ring_start = xe_hw_engine_mmio_read32(hwe, RING_START(0));
> - if (GRAPHICS_VERx100(hwe->gt->tile->xe) >= 2000) {
> - val = xe_hw_engine_mmio_read32(hwe, RING_START_UDW(0));
> - snapshot->reg.ring_start |= val << 32;
> - }
> - if (xe_gt_has_indirect_ring_state(hwe->gt)) {
> - snapshot->reg.indirect_ring_state =
> - xe_hw_engine_mmio_read32(hwe, INDIRECT_RING_STATE(0));
> + /* If GuC not enabled, and capture outlist has no job data, take it from engine */
> + if (xe_device_uc_enabled(xe) && xe->wedged.mode >= 1 && xe->devcoredump.job &&
> + xe_guc_capture_is_ready_for(xe->devcoredump.job)) {
> + snapshot->source = XE_HW_ENGINE_SOURCE_GUC_CAPTURE;
> + /* GuC won't report direct read registers, read here */
> + xe_hw_engine_snapshot_from_hw(hwe, snapshot,
> + GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ);
> + } else {
> + snapshot->source = XE_HW_ENGINE_SOURCE_HW_ENGINE;
> + for (type = GUC_STATE_CAPTURE_TYPE_GLOBAL; type < GUC_HOST_CAPTURE_TYPE_MAX;
> + type++)
> + xe_hw_engine_snapshot_from_hw(hwe, snapshot, type);
> }
>
> - snapshot->reg.ring_head =
> - xe_hw_engine_mmio_read32(hwe, RING_HEAD(0)) & HEAD_ADDR;
> - snapshot->reg.ring_tail =
> - xe_hw_engine_mmio_read32(hwe, RING_TAIL(0)) & TAIL_ADDR;
> - snapshot->reg.ring_ctl = xe_hw_engine_mmio_read32(hwe, RING_CTL(0));
> - snapshot->reg.ring_mi_mode =
> - xe_hw_engine_mmio_read32(hwe, RING_MI_MODE(0));
> - snapshot->reg.ring_mode = xe_hw_engine_mmio_read32(hwe, RING_MODE(0));
> - snapshot->reg.ring_imr = xe_hw_engine_mmio_read32(hwe, RING_IMR(0));
> - snapshot->reg.ring_esr = xe_hw_engine_mmio_read32(hwe, RING_ESR(0));
> - snapshot->reg.ring_emr = xe_hw_engine_mmio_read32(hwe, RING_EMR(0));
> - snapshot->reg.ring_eir = xe_hw_engine_mmio_read32(hwe, RING_EIR(0));
> - snapshot->reg.ipehr = xe_hw_engine_mmio_read32(hwe, RING_IPEHR(0));
> - xe_hw_engine_snapshot_instdone_capture(hwe, snapshot);
> -
> - if (snapshot->hwe->class == XE_ENGINE_CLASS_COMPUTE)
> - snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, RCU_MODE);
> -
> return snapshot;
> }
>
> -static void
> -xe_hw_engine_snapshot_instdone_print(struct xe_hw_engine_snapshot *snapshot, struct drm_printer *p)
> +/**
> + * xe_hw_engine_snapshot_capture_for_job - Take snapshot of associated engine
> + * @job: The job object
> + *
> + * Take snapshot of associated HW Engine
> + *
> + * Returns: None.
> + */
> +void
> +xe_hw_engine_snapshot_capture_for_job(struct xe_sched_job *job)
> {
> - struct xe_gt *gt = snapshot->hwe->gt;
> - struct xe_device *xe = gt_to_xe(gt);
> - u16 group, instance;
> - unsigned int dss;
> -
> - drm_printf(p, "\tRING_INSTDONE: 0x%08x\n", snapshot->reg.instdone.ring);
> + struct xe_exec_queue *q = job->q;
> + struct xe_device *xe = gt_to_xe(q->gt);
> + struct xe_devcoredump *coredump = &xe->devcoredump;
> + struct xe_hw_engine *hwe;
> + enum xe_hw_engine_id id;
> + u32 adj_logical_mask = q->logical_mask;
>
> - if (snapshot->hwe->class != XE_ENGINE_CLASS_RENDER)
> - return;
> + for_each_hw_engine(hwe, q->gt, id) {
> + if (hwe->class != q->hwe->class ||
> + !(BIT(hwe->logical_instance) & adj_logical_mask))
> + continue;
>
> - if (is_slice_common_per_gslice(xe) == false) {
> - drm_printf(p, "\tSC_INSTDONE[0]: 0x%08x\n",
> - snapshot->reg.instdone.slice_common[0]);
> - drm_printf(p, "\tSC_INSTDONE_EXTRA[0]: 0x%08x\n",
> - snapshot->reg.instdone.slice_common_extra[0]);
> - drm_printf(p, "\tSC_INSTDONE_EXTRA2[0]: 0x%08x\n",
> - snapshot->reg.instdone.slice_common_extra2[0]);
> - } else {
> - for_each_geometry_dss(dss, gt, group, instance) {
> - drm_printf(p, "\tSC_INSTDONE[%u]: 0x%08x\n", dss,
> - snapshot->reg.instdone.slice_common[dss]);
> - drm_printf(p, "\tSC_INSTDONE_EXTRA[%u]: 0x%08x\n", dss,
> - snapshot->reg.instdone.slice_common_extra[dss]);
> - drm_printf(p, "\tSC_INSTDONE_EXTRA2[%u]: 0x%08x\n", dss,
> - snapshot->reg.instdone.slice_common_extra2[dss]);
> + if (!coredump->snapshot.hwe[id]) {
> + coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe);
> + } else {
> + /* If pre-captured and Guc capture ready now */
> + if (xe_device_uc_enabled(xe) && xe->wedged.mode >= 1 &&
> + xe_guc_capture_is_ready_for(job)) {
> + /*
> + * Remove the pre-captured nodes from outlist,
> + * only keep the GuC reported data.
> + * Except direct read registers, which is read
> + * by host only.
> + */
> + xe_guc_capture_free_pre_capture(&q->gt->uc.guc);
> + }
> }
> - }
> -
> - for_each_geometry_dss(dss, gt, group, instance) {
> - drm_printf(p, "\tSAMPLER_INSTDONE[%u]: 0x%08x\n", dss,
> - snapshot->reg.instdone.sampler[dss]);
> - drm_printf(p, "\tROW_INSTDONE[%u]: 0x%08x\n", dss,
> - snapshot->reg.instdone.row[dss]);
> -
> - if (GRAPHICS_VERx100(xe) >= 1255)
> - drm_printf(p, "\tINSTDONE_GEOM_SVGUNIT[%u]: 0x%08x\n",
> - dss, snapshot->reg.instdone.geom_svg[dss]);
> + break;
> }
> }
>
> -/**
> - * xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot.
> - * @snapshot: Xe HW Engine snapshot object.
> - * @p: drm_printer where it will be printed out.
> - *
> - * This function prints out a given Xe HW Engine snapshot object.
> - */
> -void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
> - struct drm_printer *p)
> -{
> - if (!snapshot)
> - return;
>
> - drm_printf(p, "%s (physical), logical instance=%d\n",
> - snapshot->name ? snapshot->name : "",
> - snapshot->logical_instance);
> - drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n",
> - snapshot->forcewake.domain, snapshot->forcewake.ref);
alan:snip
> - drm_puts(p, "\n");
> -}
>
> /**
> * xe_hw_engine_snapshot_free - Free all allocated objects for a given snapshot.
> @@ -1079,12 +946,6 @@ void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot)
> if (!snapshot)
> return;
>
> - kfree(snapshot->reg.instdone.slice_common);
> - kfree(snapshot->reg.instdone.slice_common_extra);
> - kfree(snapshot->reg.instdone.slice_common_extra2);
> - kfree(snapshot->reg.instdone.sampler);
> - kfree(snapshot->reg.instdone.row);
> - kfree(snapshot->reg.instdone.geom_svg);
> kfree(snapshot->name);
> kfree(snapshot);
> }
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
> index 022819a4a8eb..1df6a082487c 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine.h
> @@ -11,6 +11,7 @@
> struct drm_printer;
> struct drm_xe_engine_class_instance;
> struct xe_device;
> +struct xe_sched_job;
>
> #ifdef CONFIG_DRM_XE_JOB_TIMEOUT_MIN
> #define XE_HW_ENGINE_JOB_TIMEOUT_MIN CONFIG_DRM_XE_JOB_TIMEOUT_MIN
> @@ -57,6 +58,7 @@ u32 xe_hw_engine_mask_per_class(struct xe_gt *gt,
>
> struct xe_hw_engine_snapshot *
> xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe);
> +void xe_hw_engine_snapshot_capture_for_job(struct xe_sched_job *job);
> void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
> void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
> struct drm_printer *p);
> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
> index 39f24012d0f4..4e3e9ddf5f5a 100644
> --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
> +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
> @@ -154,6 +154,11 @@ struct xe_hw_engine {
> struct xe_hw_engine_group *hw_engine_group;
> };
>
> +enum xe_hw_engine_snapshot_source_id {
> + XE_HW_ENGINE_SOURCE_HW_ENGINE,
> + XE_HW_ENGINE_SOURCE_GUC_CAPTURE
alan: mentioned above in one or more places but the first names
is repetitive but more importantly, not self-explanatory.
Perhaps a simpler, more readable option is:
"XE_ENGINE_DUMP_MANUAL vs XE_ENGINE_DUMP_GUC"
> +};
> +
> /**
> * struct xe_hw_engine_snapshot - Hardware engine snapshot
> *
> @@ -162,6 +167,8 @@ struct xe_hw_engine {
> struct xe_hw_engine_snapshot {
> /** @name: name of the hw engine */
> char *name;
> + /** @source: Data source, either hw_engine or GuC capture */
> + enum xe_hw_engine_snapshot_source_id source;
> /** @hwe: hw engine */
> struct xe_hw_engine *hwe;
> /** @logical_instance: logical instance of this hw engine */
> @@ -175,65 +182,6 @@ struct xe_hw_engine_snapshot {
> } forcewake;
> /** @mmio_base: MMIO base address of this hw engine*/
> u32 mmio_base;
> - /** @reg: Useful MMIO register snapshot */
> - struct {
> - /** @reg.ring_execlist_status: RING_EXECLIST_STATUS */
> - u64 ring_execlist_status;
>
alan:snip
> - } instdone;
> - } reg;
> };
>
> #endif
> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
> index c24542e89318..cc00fa878d3c 100644
> --- a/drivers/gpu/drm/xe/xe_lrc.h
> +++ b/drivers/gpu/drm/xe/xe_lrc.h
> @@ -21,6 +21,7 @@ struct xe_lrc_snapshot;
> struct xe_vm;
>
> #define LRC_PPHWSP_SCRATCH_ADDR (0x34 * 4)
> +#define LRC_GTT_ADDRESS_MASK GENMASK(31, 12)
>
> struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
> u32 ring_size);
^ permalink raw reply [flat|nested] 23+ messages in thread
* Re: [PATCH v17 7/7] drm/xe/guc: Plumb GuC-capture into dev coredump
2024-08-29 4:26 ` Teres Alexis, Alan Previn
@ 2024-09-06 18:11 ` Dong, Zhanjun
0 siblings, 0 replies; 23+ messages in thread
From: Dong, Zhanjun @ 2024-09-06 18:11 UTC (permalink / raw)
To: Teres Alexis, Alan Previn, intel-xe@lists.freedesktop.org
Please see my comments inline below.
Regards,
Zhanjun Dong
On 2024-08-29 12:26 a.m., Teres Alexis, Alan Previn wrote:
>
> Havent gone through everything, but looks like we have a lot to
> digest, lets connect offline and go through everything. Suspect
> we might need another one or two rounds.
>
> Hmmm.. this patch is huge, we need to think about how we can break this into
> 2 or 3 patches but by simple trivial file-specific change like standa-alone header
> modification in a single patch... but rather based on specific flows or
> functionalities that can be chronlogical. For example:
>
> patch x = only focus on searching for matching guc-pre-captured-node and printing that.
> and keep the existing manual copy + printing (with the duplicate snapshot engine regs structure).
> patch x+1 = Remove the manual capture + printing (and this patch can remove the duplicate
> snapshot engine regs structure).
> patch x+2 = add manual-capture via guc-capture so that we can use the same list
> (for wedged-mode=2 and such)
>
> I am aware this is a big ask but since patch sizes can be subjective, let's check
> with one of the other committers offline to see what they think.
>
> Either way, I do have a bunch of additional comments below. I havent gone
> through everything yet - since the changes touch many different points
> in the flow. but I've focused more on the new list and the printing.
This patch will be split into 2 in next rev.
>
> On Tue, 2024-08-27 at 14:47 -0700, Zhanjun Dong wrote:
>> Add pre-capture by read from hw engine if GuC capture data is not ready,
>> the pre-captured data will be refereshed if GuC capture is ready at later
>> time.
> alan: Maybe some additional context like "
> alan: i dont think the term "pre-capture" is self explanatory, since
> the term "pre" means ~before but in actual fact, even when capture
> comes from GuC it already happened 'before'. Can we replace all the
> terms of pre-capture or pre_capture in comments and code to
> "manual_capture" or "kmd_capture" or anything more self-explanatory.
Sure, will use "manual" in next rev.
>
>> Provide xe_guc_capture_get_reg_desc_list to get the register dscriptor
>> list.
>> GuC support limited register ranges to be captured, add type of direct
>> read to read these registers by host.
>> Add function to check if capture is ready for a job.
>> Print out snapshot registers by types of global, class, instance and
>> direct read.
>>
>> Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
>> ---
>> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +
>> drivers/gpu/drm/xe/xe_devcoredump.c | 16 +-
>> drivers/gpu/drm/xe/xe_devcoredump_types.h | 2 +
>> drivers/gpu/drm/xe/xe_guc_capture.c | 380 +++++++++++++++++++++-
>> drivers/gpu/drm/xe/xe_guc_capture.h | 26 ++
>> drivers/gpu/drm/xe/xe_guc_capture_types.h | 2 +
>> drivers/gpu/drm/xe/xe_guc_submit.c | 19 +-
>> drivers/gpu/drm/xe/xe_hw_engine.c | 273 ++++------------
>> drivers/gpu/drm/xe/xe_hw_engine.h | 2 +
>> drivers/gpu/drm/xe/xe_hw_engine_types.h | 66 +---
>> drivers/gpu/drm/xe/xe_lrc.h | 1 +
>> 11 files changed, 504 insertions(+), 285 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> index 0d1a4a9f4e11..6a8dee069974 100644
>> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
>> @@ -605,4 +605,6 @@
>> #define GT_CS_MASTER_ERROR_INTERRUPT REG_BIT(3)
>> #define GT_RENDER_USER_INTERRUPT REG_BIT(0)
>>
>> +#define SFC_DONE(n) XE_REG(0x1cc000 + (n) * 0x1000)
>> +
>> #endif
>> diff --git a/drivers/gpu/drm/xe/xe_devcoredump.c b/drivers/gpu/drm/xe/xe_devcoredump.c
>> index bdb76e834e4c..783958829750 100644
>> --- a/drivers/gpu/drm/xe/xe_devcoredump.c
>> +++ b/drivers/gpu/drm/xe/xe_devcoredump.c
>> @@ -16,6 +16,7 @@
>> #include "xe_force_wake.h"
>> #include "xe_gt.h"
>> #include "xe_gt_printk.h"
>> +#include "xe_guc_capture.h"
>> #include "xe_guc_ct.h"
>> #include "xe_guc_submit.h"
>> #include "xe_hw_engine.h"
>> @@ -135,6 +136,8 @@ static void xe_devcoredump_snapshot_free(struct xe_devcoredump_snapshot *ss)
>>
>> xe_vm_snapshot_free(ss->vm);
>> ss->vm = NULL;
>> +
>> + xe_guc_capture_free(&ss->gt->uc.guc);
> alan: something wrong with this code .. see below.
>> }
>>
>> static void xe_devcoredump_deferred_snap_work(struct work_struct *work)
>> @@ -204,6 +207,7 @@ static void xe_devcoredump_free(void *data)
>> /* To prevent stale data on next snapshot, clear everything */
>> memset(&coredump->snapshot, 0, sizeof(coredump->snapshot));
>> coredump->captured = false;
>> + coredump->job = NULL;
>> drm_info(&coredump_to_xe(coredump)->drm,
>> "Xe device coredump has been deleted.\n");
>> }
>> @@ -214,8 +218,6 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
>> struct xe_devcoredump_snapshot *ss = &coredump->snapshot;
>> struct xe_exec_queue *q = job->q;
>> struct xe_guc *guc = exec_queue_to_guc(q);
>> - struct xe_hw_engine *hwe;
>> - enum xe_hw_engine_id id;
>> u32 adj_logical_mask = q->logical_mask;
>> u32 width_mask = (0x1 << q->width) - 1;
>> const char *process_name = "no process";
>> @@ -231,6 +233,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
>> strscpy(ss->process_name, process_name);
>>
>> ss->gt = q->gt;
>> + coredump->job = job;
>> INIT_WORK(&ss->work, xe_devcoredump_deferred_snap_work);
>>
>> cookie = dma_fence_begin_signalling();
>> @@ -252,14 +255,7 @@ static void devcoredump_snapshot(struct xe_devcoredump *coredump,
>> coredump->snapshot.job = xe_sched_job_snapshot_capture(job);
>> coredump->snapshot.vm = xe_vm_snapshot_capture(q->vm);
>>
>> - for_each_hw_engine(hwe, q->gt, id) {
>> - if (hwe->class != q->hwe->class ||
>> - !(BIT(hwe->logical_instance) & adj_logical_mask)) {
>> - coredump->snapshot.hwe[id] = NULL;
>> - continue;
>> - }
>> - coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe);
>> - }
>> + xe_hw_engine_snapshot_capture_for_job(job);
>>
>> queue_work(system_unbound_wq, &ss->work);
>>
>> diff --git a/drivers/gpu/drm/xe/xe_devcoredump_types.h b/drivers/gpu/drm/xe/xe_devcoredump_types.h
>> index 440d05d77a5a..50165a10abdd 100644
>> --- a/drivers/gpu/drm/xe/xe_devcoredump_types.h
>> +++ b/drivers/gpu/drm/xe/xe_devcoredump_types.h
>> @@ -69,6 +69,8 @@ struct xe_devcoredump {
>> bool captured;
>> /** @snapshot: Snapshot is captured at time of the first crash */
>> struct xe_devcoredump_snapshot snapshot;
>> + /** @job: Point to the issue job */
>> + struct xe_sched_job *job;
>> };
>>
>> #endif
>> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.c b/drivers/gpu/drm/xe/xe_guc_capture.c
>> index 20b38d60dca7..16f660db3231 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_capture.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_capture.c
>> @@ -27,11 +27,16 @@
>> #include "xe_guc_capture.h"
>> #include "xe_guc_capture_types.h"
>> #include "xe_guc_ct.h"
>> +#include "xe_guc_exec_queue_types.h"
>> #include "xe_guc_log.h"
>> +#include "xe_guc_submit_types.h"
>> #include "xe_guc_submit.h"
>> #include "xe_hw_engine_types.h"
>> +#include "xe_lrc.h"
>> #include "xe_macros.h"
>> #include "xe_map.h"
>> +#include "xe_mmio.h"
>> +#include "xe_sched_job.h"
>>
>> /*
>> * struct __guc_capture_bufstate
>> @@ -69,11 +74,13 @@ struct __guc_capture_parsed_output {
>> u32 eng_inst;
>> u32 guc_id;
>> u32 lrca;
>> + u32 type;
>> + enum xe_hw_engine_snapshot_source_id source;
>> struct gcap_reg_list_info {
>> u32 vfid;
>> u32 num_regs;
>> struct guc_mmio_reg *regs;
>> - } reginfo[GUC_STATE_CAPTURE_TYPE_MAX];
>> + } reginfo[GUC_HOST_CAPTURE_TYPE_MAX];
> alan: lets not do this - we need a different way to do this, actually, we
> need to ensure ALL register dumps captured due to hanging workloads come
> strictly from either the GuC ... OR ... manually read (when GuC reset is
> disabled i.e. wedged mode >2 ). There should NOT be a mix. Exceptions would
> only be registers that can never change at runtime based on engine-class/
> engine-instance / executing-context-workloads submissions. If such a registers
> exists, it should be directly tracked by and read by devcoredump, not as part
> of the guc-error-capture lists. However, based on what i am seeing in this patch
> you are using this new "out-of-band-guc-abi-list-type" as a hack to identifying
> separating the SFC_DONE registers - but those are engine class registers so
> this doesn't look right to me. We add this to the GuC register list in ADS.
After further discuss, the SFC_DONE should be supported by GuC, so no
need for the direct read anymore, make no longer need this.
To be removed in next rev.
>
>
>> #define GCAP_PARSED_REGLIST_INDEX_GLOBAL BIT(GUC_STATE_CAPTURE_TYPE_GLOBAL)
>> #define GCAP_PARSED_REGLIST_INDEX_ENGCLASS BIT(GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS)
>> };
>> @@ -133,6 +140,17 @@ struct __guc_capture_parsed_output {
>> { SC_INSTDONE_EXTRA, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA"}, \
>> { SC_INSTDONE_EXTRA2, REG_32BIT, 0, 0, "SC_INSTDONE_EXTRA2"}
>>
>> +/*
>> + * GuC support limited registers ranges to be captured for debug
>> + * purpose, for registers out of these ranges, direct read is the only
>> + * way to access.
>> + */
>> +#define XELP_VEC_DIRECT_READ \
>> + { SFC_DONE(0), 0, 0, 0, "SFC_DONE[0]"}, \
>> + { SFC_DONE(1), 0, 0, 0, "SFC_DONE[1]"}, \
>> + { SFC_DONE(2), 0, 0, 0, "SFC_DONE[2]"}, \
>> + { SFC_DONE(3), 0, 0, 0, "SFC_DONE[3]"}
>> +
> alan: these are engine class registers, they should be captured by GuC since only
> GuC knows what contexts are running on which engines at which point during a reset
> event. If you are having issues with GuC not reporting this, we need to work
> with the GuC firmware team / arch team to get this fixes. I suspect this might
> end up taking more time and its important that we can get the most common ring
> register dumps enabled first. I would suggest we open a public facing JIRA
> that ackowledges that we need to add SFC_DONE registers into GuC error capture
> ADS and proceed without it first. Unless we find that GuC does actually support
> and we perhaps didnt enable it correctly. Let's discuss offline.
Agreed, GuC capture is the best way to read it
>
>> /* XE_LP Global */
>> static const struct __guc_mmio_reg_descr xe_lp_global_regs[] = {
>> COMMON_XELP_BASE_GLOBAL,
>> @@ -164,6 +182,11 @@ static const struct __guc_mmio_reg_descr xe_vec_inst_regs[] = {
>> COMMON_BASE_ENGINE_INSTANCE,
>> };
>>
>> +/* Video Enhancement direct read registers */
>> +static const struct __guc_mmio_reg_descr xe_vec_direct_read_regs[] = {
>> + XELP_VEC_DIRECT_READ,
>> +};
>> +
>> /* Blitter Per-Engine-Instance */
>> static const struct __guc_mmio_reg_descr xe_blt_inst_regs[] = {
>> COMMON_BASE_ENGINE_INSTANCE,
>> @@ -201,6 +224,8 @@ static const struct __guc_mmio_reg_descr_group xe_lp_lists[] = {
>> MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
>> MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
>> + MAKE_REGLIST(xe_vec_direct_read_regs, PF, HOST_DIRECT_READ,
>> + GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
> alan: Regarding this usage of "HOST_DIRECT_READ", it appears you are trying to overload
> a GUC-ABI definition for reglist type to workaround the fact that some registers are not
> captured by GuC. This is incorrect, we need to work with the GuC team to ensure they
> capture these registers because the SFC register state used only as part of the batch
> submission thru VDBOX/VEBOX CS. That means it should be copied by GuC. If we are seeing
> issues, we need to get this fixed in the firmware. I think mixing GuC capture with manual
> read is the wrong thing to do.
>
>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
>> MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
>> @@ -217,6 +242,8 @@ static const struct __guc_mmio_reg_descr_group xe_hpg_lists[] = {
>> MAKE_REGLIST(xe_vd_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEO),
>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
>> MAKE_REGLIST(xe_vec_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
>> + MAKE_REGLIST(xe_vec_direct_read_regs, PF, HOST_DIRECT_READ,
>> + GUC_CAPTURE_LIST_CLASS_VIDEOENHANCE),
> alan: same comment as last
>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_BLITTER),
>> MAKE_REGLIST(xe_blt_inst_regs, PF, ENGINE_INSTANCE, GUC_CAPTURE_LIST_CLASS_BLITTER),
>> MAKE_REGLIST(empty_regs_list, PF, ENGINE_CLASS, GUC_CAPTURE_LIST_CLASS_GSC_OTHER),
>> @@ -292,6 +319,23 @@ guc_capture_get_one_list(const struct __guc_mmio_reg_descr_group *reglists,
>> return NULL;
>> }
>>
>> +const struct __guc_mmio_reg_descr_group *
>> +xe_guc_capture_get_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
>> + enum guc_capture_list_class_type capture_class)
>> +{
>> + return guc_capture_get_one_list(guc_capture_get_device_reglist(gt_to_xe(gt)), owner, type,
>> + capture_class);
>> +}
>> +
> alan: nit: instead of two helpers above and below, u can make it one with a
> param for "is_ext_list", internally if-else it - maybe few of lines of code?
Good idea
>> +const struct __guc_mmio_reg_descr_group *
>> +xe_guc_capture_get_ext_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
>> + enum guc_capture_list_class_type capture_class)
>> +{
>> + struct xe_guc *guc = >->uc.guc;
>> +
>> + return guc_capture_get_one_list(guc->capture->extlists, owner, type, capture_class);
>> +}
>> +
>> struct __ext_steer_reg {
>> const char *name;
>> struct xe_reg_mcr reg;
>> @@ -810,16 +854,16 @@ guc_capture_add_node_to_cachelist(struct xe_guc_state_capture *gc,
>> static void
>> guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *node)
>> {
>> - struct guc_mmio_reg *tmp[GUC_STATE_CAPTURE_TYPE_MAX];
>> + struct guc_mmio_reg *tmp[GUC_HOST_CAPTURE_TYPE_MAX];
>> int i;
>>
>> - for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
>> + for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i) {
>> tmp[i] = node->reginfo[i].regs;
>> memset(tmp[i], 0, sizeof(struct guc_mmio_reg) *
>> guc->capture->max_mmio_per_node);
>> }
>> memset(node, 0, sizeof(*node));
>> - for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i)
>> + for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i)
>> node->reginfo[i].regs = tmp[i];
> alan: same comments are prior - lets not overload ABI-types for a workaround.
>>
>> INIT_LIST_HEAD(&node->link);
>> @@ -864,6 +908,7 @@ guc_capture_init_node(struct xe_guc *guc, struct __guc_capture_parsed_output *no
>> * L--> xe_devcoredump
>> * L--> devcoredump_snapshot(..IS_GUC_CAPTURE)
>> * --> xe_hw_engine_snapshot_capture(..IS_GUC_CAPTURE)
>> + * --> xe_guc_capture_node_from_hw(..If no GUC CAPTURE)
>> *
>> * User Sysfs / Debugfs
>> * --------------------
>> @@ -1197,6 +1242,8 @@ guc_capture_extract_reglists(struct xe_guc *guc, struct __guc_capture_bufstate *
>> }
>> node->is_partial = is_partial;
>> node->reginfo[datatype].vfid = FIELD_GET(GUC_STATE_CAPTURE_HEADER_VFID, hdr.owner);
>> + node->source = XE_HW_ENGINE_SOURCE_GUC_CAPTURE;
>> + node->type = datatype;
>>
>> switch (datatype) {
>> case GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE:
>> @@ -1363,7 +1410,7 @@ guc_capture_alloc_one_node(struct xe_guc *guc)
>> if (!new)
>> return NULL;
>>
>> - for (i = 0; i < GUC_STATE_CAPTURE_TYPE_MAX; ++i) {
>> + for (i = 0; i < GUC_HOST_CAPTURE_TYPE_MAX; ++i) {
>> new->reginfo[i].regs = drmm_kzalloc(drm, guc->capture->max_mmio_per_node *
>> sizeof(struct guc_mmio_reg), GFP_KERNEL);
>> if (!new->reginfo[i].regs) {
>> @@ -1401,7 +1448,7 @@ guc_get_max_reglist_count(struct xe_guc *guc)
>> int i, j, k, tmp, maxregcount = 0;
>>
>> for (i = 0; i < GUC_CAPTURE_LIST_INDEX_MAX; ++i) {
>> - for (j = 0; j < GUC_STATE_CAPTURE_TYPE_MAX; ++j) {
>> + for (j = 0; j < GUC_HOST_CAPTURE_TYPE_MAX; ++j) {
>> for (k = 0; k < GUC_MAX_ENGINE_CLASSES; ++k) {
>> if (j == GUC_STATE_CAPTURE_TYPE_GLOBAL && k > 0)
>> continue;
>> @@ -1429,6 +1476,327 @@ guc_capture_create_prealloc_nodes(struct xe_guc *guc)
>> __guc_capture_create_prealloc_nodes(guc);
>> }
>>
>> +static void
>> +read_reg_to_node(struct xe_hw_engine *hwe, const struct __guc_mmio_reg_descr_group *list,
>> + struct __guc_capture_parsed_output *node)
>> +{
>> + struct gcap_reg_list_info *reginfo = &node->reginfo[list->type];
>> + struct guc_mmio_reg *regs = reginfo->regs;
>> + int i;
>> +
>> + if (!regs)
>> + return;
>> +
>> + for (i = 0; i < list->num_regs; i++) {
>> + struct __guc_mmio_reg_descr desc = list->list[i];
>> + u32 value;
>> +
>> + if (!list->list)
>> + return;
>> +
>> + value = (list->type == GUC_STATE_CAPTURE_TYPE_ENGINE_INSTANCE) ?
>> + xe_hw_engine_mmio_read32(hwe, desc.reg) :
>> + xe_mmio_read32(hwe->gt, desc.reg);
> alan: i see you are using this for the manual read. I also believe you are
> also using this for reading steering registers, but method is not going to work
> for steering registers. Please see the correct method in function
> "xe_hw_engine_snapshot_instdone_capture" and how it calls xe_gt_mcr_unicast_read
> in baseline codebase.
Oh, that seems a bug, to be fixed in next rev.
>
> Actually, to be honest, i dont see why you needed to move the manual register
> capture into guc-capture. We have been driving to ensure we have a single
> register list is shared across both devcoredump and guc-error-capture.
> I'm not sure why you also needed to move the manual-register-reading
> over to guc-err-capture. I don't see a motivation for that.
>
> I think keeping the manual register reads in devcoredump subsystem is fine.
> We can keep xe_hw_engine_snapshot_capture but only used when doing manual
> capture as long as we use the shared register list, i.e. use the list
> from xe_guc_capture_get_reg_desc_list / xe_guc_capture_get_ext_reg_desc_list.
The reason is to use a single register list in capture.c, this
read_reg_to_node will read into outlist, and the print_by_list will make
the print out order follows register order in reg_desc_list.
>
>> +
>> + regs[i].value = value;
>> + regs[i].offset = desc.reg.addr;
>> + regs[i].flags = desc.flags;
>> + regs[i].mask = desc.mask;
>> + }
>> +}
>> +
>> +/**
>> + * xe_guc_capture_node_from_hw - Take a engine snapshot from GuC capture.
>> + * @hwe: Xe HW Engine.
>> + * @type: GuC capture register type
>> + * @list: The register list
>> + *
>> + * This can be printed out in a later stage like during dev_coredump
>> + * analysis.
>> + *
>> + * Returns: None
>> + */
>> +void xe_guc_capture_node_from_hw(struct xe_hw_engine *hwe, u32 type,
>> + const struct __guc_mmio_reg_descr_group *list)
>> +{
>> + struct xe_gt *gt = hwe->gt;
>> + struct xe_device *xe = gt_to_xe(gt);
>> + struct xe_guc *guc = >->uc.guc;
>> + struct xe_devcoredump *devcoredump = &xe->devcoredump;
>> + struct __guc_capture_parsed_output *new = NULL;
>> + struct gcap_reg_list_info *reginfo;
>> + u16 guc_id = 0;
>> + u32 lrca = 0;
>> +
>> + if (!list || list->num_regs == 0)
>> + return;
>> + XE_WARN_ON(list->num_regs > guc->capture->max_mmio_per_node);
>> +
>> + new = guc_capture_get_prealloc_node(guc);
>> + if (!new)
>> + return;
>> +
>> + new->is_partial = false;
>> + reginfo = &new->reginfo[type];
>> +
>> + read_reg_to_node(hwe, list, new);
>> +
>> + reginfo->num_regs = list->num_regs;
>> +
>> + if (devcoredump->captured) {
>> + struct xe_guc_submit_exec_queue_snapshot *ge = devcoredump->snapshot.ge;
>> +
>> + guc_id = ge->guc.id;
>> + lrca = ge->lrc[0]->context_desc & LRC_GTT_ADDRESS_MASK;
>> + }
>> +
>> + new->eng_class = hwe->class;
>> + new->eng_inst = hwe->instance;
> alan: as mentioned previously, i think we should not move manual register
> reads from devcoredump over to guc, only ensure the list is the shared list.
> Putting that point aside, above code may not work correctly. IIRC,
> node->eng_class and node->eng_inst are both GUC specific identifiers and
> we have to make some kind of conversion from hwe-class to guc-class and
> maybe hwe-instance to guc-instance.. (i am sure about the former, but not
> sure on up on the latter). So when its time to print, if we look at
Oh, class conversion is missing here, to be fixed in next rev.
Conversion is not needed for engine instance.
>
>> + new->guc_id = guc_id;
>> + new->lrca = lrca;
>> + new->source = XE_HW_ENGINE_SOURCE_HW_ENGINE;
>> + new->type = type;
>> + guc_capture_add_node_to_outlist(guc->capture, new);
>> +}
>> +
>> +static struct guc_mmio_reg *
>> +guc_capture_find_reg(struct gcap_reg_list_info *reginfo, u32 addr, u32 flags)
>> +{
>> + int i;
>> +
>> + if (reginfo && reginfo->num_regs > 0) {
>> + struct guc_mmio_reg *regs = reginfo->regs;
>> +
>> + if (regs)
>> + for (i = 0; i < reginfo->num_regs; i++)
>> + if (regs[i].offset == addr && regs[i].flags == flags)
>> + return ®s[i];
>> + }
>> +
>> + return NULL;
>> +}
>> +
>> +static void
>> +snapshot_print_by_list(struct xe_hw_engine_snapshot *snapshot, struct drm_printer *p, u32 type,
>> + const struct __guc_mmio_reg_descr_group *list)
>> +{
>> + struct xe_gt *gt = snapshot->hwe->gt;
>> + struct xe_device *xe = gt_to_xe(gt);
>> + struct xe_guc *guc = >->uc.guc;
>> + struct xe_devcoredump *devcoredump = &xe->devcoredump;
>> + u16 guc_id = 0;
>> + u32 last_value, lrca = 0;
>> + struct list_head *node;
>> + int i, guc_class;
>> + bool is_ext;
>> +
>> + if (!list)
>> + return;
>> +
>> + is_ext = list == guc->capture->extlists;
>> +
>> + if (devcoredump->captured) {
>> + struct xe_guc_submit_exec_queue_snapshot *ge = devcoredump->snapshot.ge;
>> +
>> + guc_id = ge->guc.id;
>> + lrca = ge->lrc[0]->context_desc;
>> + }
>> +
>> + guc_class = xe_engine_class_to_guc_class(snapshot->hwe->class);
>> +
>> + node = &guc->capture->outlist;
>> + for (i = 0; i < list->num_regs; i++) {
>> + struct __guc_capture_parsed_output *n, *ntmp;
>> + const struct __guc_mmio_reg_descr *sub_list = &list->list[i];
>
> alan: I'm a little bit lost right here. The param "list" coming into this
> function is the list registers that we use for registering into ADS (not
> the output capture node list). Then the idea we have is to format the printing
> of the registers that was captured from a matching outlist. to do that
> we grab the next register from outlost and then look for the matching
> register description from list.
>
>
> That said i would have expected the flow of this function to look like this:
> Step1: find the mathing output node.
>
>
> struct __guc_capture_parsed_output *matchnode = NULL;
> list_for_each_entry_safe(n, ntmp, node, link) {
> if (n->eng_class == guc_class && n->eng_inst == snapshot->hwe->instance &&
> n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca) {
> matchnode = n;
> }
I like the idea here to get node 1st
>
> if (!matchnode) {
> print_error - cannot find matching register dumps
> return (error?)
> }
>
> struct gcap_reg_list_info *reginfo = &matchnode->reginfo[type];
>
> struct guc_mmio_reg *reg;
> const struct __guc_mmio_reg_descr *reg_descr;
> u32 value;
> for (i = 0; i < reginfo->num_regs; ++i) {
> reg = reginfo->regs[i]
> reg_descr = guc_capture_find_reg_descr(reg, list);
> // in this function, loop thru list->list and find matching address / steering-info
> if (!reg_descr) {
> continue;
> print warning
> }
>
> //the rest of the print formatting code...
> value = reg->value;
> if (sub_list->data_type == REG_64BIT_LOW_DW) {
> last_value = value;
> continue;
> } else if (sub_list->data_type == REG_64BIT_HI_DW) {
> u64 value_qw = ((u64)value << 32) | last_value;
> if (sub_list->regname)
> drm_printf(p, "\t%s: 0x%016llx\n",
> sub_list->regname, value_qw);
> continue; // <--- alan: i think break was wrong here
> }
> if (!sub_list->regname)
> break;
> if (is_ext) {
> ...
> ...
> }
> // dont need that last break;
> }
Looks good, will be updated in next rev.
>
>> +
>> + list_for_each_entry_safe(n, ntmp, node, link) {
>> + if (n->eng_class == guc_class && n->eng_inst == snapshot->hwe->instance &&
> alan: does hwe->instance match the guc's engine-instance? need to check with the folks familiar
> with the guc mapping table we setup in ads - maybe not an issue.
No instance conversion code exist in Xe. Test shows it matches
>> + n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca) {
>> + struct gcap_reg_list_info *reginfo = &n->reginfo[type];
>> + struct guc_mmio_reg *reg;
>> + u32 value;
>> +
>> + reg = guc_capture_find_reg(reginfo, sub_list->reg.addr,
>> + sub_list->flags);
>> + if (!reg)
>> + continue;
>> +
>> + value = reg->value;
>> + if (sub_list->data_type == REG_64BIT_LOW_DW) {
>> + last_value = value;
>> + continue;
>> + } else if (sub_list->data_type == REG_64BIT_HI_DW) {
>> + u64 value_qw = ((u64)value << 32) | last_value;
>> +
>> + if (sub_list->regname)
>> + drm_printf(p, "\t%s: 0x%016llx\n",
>> + sub_list->regname, value_qw);
>> + break;
>> + }
>> +
>> + if (!sub_list->regname)
>> + break;
>> +
>> + if (is_ext) {
>> + int dss, group, instance;
>> +
>> + group = FIELD_GET(GUC_REGSET_STEERING_GROUP,
>> + sub_list->flags);
>> + instance = FIELD_GET(GUC_REGSET_STEERING_INSTANCE,
>> + sub_list->flags);
>> + dss = xe_gt_mcr_steering_info_to_dss_id(gt,
>> + group, instance);
>> +
>> + drm_printf(p, "\t%s[%u]: 0x%08x\n", sub_list->regname, dss,
>> + value);
>> + } else {
>> + drm_printf(p, "\t%s: 0x%08x\n", sub_list->regname,
>> + value);
>> + }
>> + break;
>> + }
>> + }
>> + }
>> +}
>> +
>> +/**
>> + * xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot.
>> + * @snapshot: Xe HW Engine snapshot object.
>> + * @p: drm_printer where it will be printed out.
>> + *
>> + * This function prints out a given Xe HW Engine snapshot object.
>> + */
>> +void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
>> + struct drm_printer *p)
>> +{
>> + int type;
>> + const struct __guc_mmio_reg_descr_group *list;
>> + enum guc_capture_list_class_type capture_class;
>> +
>> + if (!snapshot)
>> + return;
>> +
>> + xe_gt_assert(snapshot->hwe->gt, snapshot->source <= XE_HW_ENGINE_SOURCE_GUC_CAPTURE);
>> + xe_gt_assert(snapshot->hwe->gt, snapshot->hwe);
>> +
>> + capture_class = xe_engine_class_to_guc_capture_class(snapshot->hwe->class);
>> +
>> + drm_printf(p, "%s (physical), logical instance=%d\n",
>> + snapshot->name ? snapshot->name : "",
>> + snapshot->logical_instance);
>> + drm_printf(p, "\tCapture source: %s\n",
>> + snapshot->source == XE_HW_ENGINE_SOURCE_GUC_CAPTURE ? "GuC" : "Engine");
>> + drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n",
>> + snapshot->forcewake.domain, snapshot->forcewake.ref);
>> +
>> + for (type = GUC_STATE_CAPTURE_TYPE_GLOBAL; type < GUC_HOST_CAPTURE_TYPE_MAX; type++) {
>> + list = xe_guc_capture_get_reg_desc_list(snapshot->hwe->gt,
>> + GUC_CAPTURE_LIST_INDEX_PF, type,
>> + capture_class);
>> + snapshot_print_by_list(snapshot, p, type, list);
>> + }
>> +
>> + if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
>> + list = xe_guc_capture_get_ext_reg_desc_list(snapshot->hwe->gt,
>> + GUC_CAPTURE_LIST_INDEX_PF,
>> + GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS,
>> + capture_class);
>> + snapshot_print_by_list(snapshot, p, GUC_STATE_CAPTURE_TYPE_ENGINE_CLASS, list);
>> + }
>> +
>> + drm_puts(p, "\n");
>> +}
>> +
>> +/**
>> + * xe_guc_capture_is_ready_for - Check if capture is ready for the job.
>> + * @job: The job object.
>> + *
>> + * Search within the capture outlist for the job.
>> + *
>> + * Returns: True if found a node for the job
>> + */
>> +bool xe_guc_capture_is_ready_for(struct xe_sched_job *job)
>> +{
>> + struct xe_hw_engine *hwe;
>> + enum xe_hw_engine_id id;
>> + struct xe_exec_queue *q = job->q;
>> + u16 guc_class = GUC_LAST_ENGINE_CLASS + 1;
>> +
>> + if (!q || !q->gt)
>> + return false;
>> +
>> + /* Find hwe for the job */
>> + for_each_hw_engine(hwe, q->gt, id) {
>> + if (hwe != q->hwe)
>> + continue;
>> + guc_class = xe_engine_class_to_guc_class(hwe->class);
>> + break;
>> + }
>> +
>> + if (guc_class <= GUC_LAST_ENGINE_CLASS) {
>> + struct __guc_capture_parsed_output *n, *ntmp;
>> + struct xe_guc *guc = &q->gt->uc.guc;
>> + struct list_head *list = &guc->capture->outlist;
>> + u16 guc_id = q->guc->id;
>> + u32 lrca = xe_lrc_ggtt_addr(job->q->lrc[0]) & LRC_GTT_ADDRESS_MASK;
>> +
>> + /*
>> + * Look for a matching GuC reported error capture node from
>> + * the internal output link-list based on engine, guc id and
>> + * lrca info.
>> + */
>> + list_for_each_entry_safe(n, ntmp, list, link) {
>> + if (n->eng_class == guc_class && n->eng_inst == hwe->instance &&
>> + n->guc_id == guc_id && (n->lrca & LRC_GTT_ADDRESS_MASK) == lrca &&
>> + n->source == XE_HW_ENGINE_SOURCE_GUC_CAPTURE)
>> + return true;
>> + }
>> + }
>> + return false;
>> +}
>> +
>> +/*
>> + * xe_guc_capture_free_pre_capture - Free the pre captured register list
>> + * @guc: The GuC object
>> + *
>> + * Free the pre captured register list
>> + */
>> +void xe_guc_capture_free_pre_capture(struct xe_guc *guc)
>> +{
>> + if (guc->capture && !list_empty(&guc->capture->outlist)) {
>> + struct __guc_capture_parsed_output *n, *ntmp;
>> +
>> + list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) {
>> + if (n->source == XE_HW_ENGINE_SOURCE_HW_ENGINE &&
>> + /* Direct read is for host only, no need to refresh */
>> + n->type != GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ) {
>> + list_del(&n->link);
>> + /* put node back to cache list */
>> + guc_capture_add_node_to_cachelist(guc->capture, n);
>> + }
>> + }
>> + }
>> +}
>> +
>> +/*
>> + * xe_guc_capture_free - Free the GuC captured register list
>> + * @guc: The GuC object
>> + *
>> + * Free the GuC captured register list
>> + */
>> +void xe_guc_capture_free(struct xe_guc *guc)
>> +{
>> + if (guc->capture && !list_empty(&guc->capture->outlist)) {
>> + struct __guc_capture_parsed_output *n, *ntmp;
>> +
>> + list_for_each_entry_safe(n, ntmp, &guc->capture->outlist, link) {
>> + list_del(&n->link);
>> + /* put node back to cache list */
>> + guc_capture_add_node_to_cachelist(guc->capture, n);
> alan: this is incorrect... if dev_coredump has been freed for one specific capture event,
> i dont think we want to free al capture nodes. Don't forget we can have multiple engines
> be hanging and resetting in quick succession (which is actually the case for some of
> our more intense igt tests, also if we have dependent engine resets, we can also see
> this). That said, we have to think of two things:
>
> 1. only free the ouput node that was directly servicing the xe_devcoredump_snapshot
> structure that is getting freed, this means, we might wanna take in the guc structure
> as well as the struct xe_devcoredump_snapshot structure so that we can find the
> matching node (by way of engine, guc-id, lrc, etc).
>
> 2. we don't want to leak capture->outlist: in the event we have multiple
> guc error capture IRQs and we parse and extract multiple output nodes from
> guc-capture-ring-buffer is but only one devcore-dumps get generated and
> freed (see function guc_capture_get_prealloc_node where it bails if there
> already is a devcoredump struct waiting to be collected), we have to ensure
> we don't leak those nodes in outlist. However, we dont have to worry about
> this since in patch #4, function guc_capture_get_prealloc_node will always
> steal back LRU node from outlist if required.
>
> That said, we do want to fix this function for #1.
I see, your concerns covers possible further multiple hang support.
To make future life easier, we might want to only free the matched node
and nodes with the same guc id.
Yes, we never leak outlist, our code will reuse the oldest node if out
of node space, so this is safe.
>> + }
>> + }
>> +}
>> +
>> /*
>> * xe_guc_capture_steered_list_init - Init steering register list
>> * @guc: The GuC object
>> diff --git a/drivers/gpu/drm/xe/xe_guc_capture.h b/drivers/gpu/drm/xe/xe_guc_capture.h
>> index 3a690e8b714a..bcda17ef9eb9 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_capture.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_capture.h
>> @@ -12,6 +12,21 @@
>> #include "xe_guc_fwif.h"
>>
>> struct xe_guc;
>> +struct xe_hw_engine;
>> +struct xe_hw_engine_snapshot;
>> +struct xe_sched_job;
>> +
>> +/* Register-types of GuC capture register lists for host side process */
>> +enum guc_capture_host_type {
>> + /*
>> + * GuC support limited registers ranges to be captured for debug
>> + * purpose, for registers out of these ranges, direct read is the only
>> + * way to access.
>> + */
>> + GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ = GUC_STATE_CAPTURE_TYPE_MAX,
>> +};
>> +
>> +#define GUC_HOST_CAPTURE_TYPE_MAX (GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ + 1)
>>
>> static inline enum guc_capture_list_class_type xe_guc_class_to_capture_class(u16 class)
>> {
>> @@ -44,6 +59,17 @@ int xe_guc_capture_getlistsize(struct xe_guc *guc, u32 owner, u32 type,
>> enum guc_capture_list_class_type capture_class, size_t *size);
>> int xe_guc_capture_getnullheader(struct xe_guc *guc, void **outptr, size_t *size);
>> size_t xe_guc_capture_ads_input_worst_size(struct xe_guc *guc);
>> +const struct __guc_mmio_reg_descr_group *
>> +xe_guc_capture_get_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
>> + enum guc_capture_list_class_type capture_class);
>> +const struct __guc_mmio_reg_descr_group *
>> +xe_guc_capture_get_ext_reg_desc_list(struct xe_gt *gt, u32 owner, u32 type,
>> + enum guc_capture_list_class_type capture_class);
>> +bool xe_guc_capture_is_ready_for(struct xe_sched_job *job);
>> +void xe_guc_capture_node_from_hw(struct xe_hw_engine *hwe, u32 type,
>> + const struct __guc_mmio_reg_descr_group *list);
>> +void xe_guc_capture_free_pre_capture(struct xe_guc *guc);
>> +void xe_guc_capture_free(struct xe_guc *guc);
>> int xe_guc_capture_steered_list_init(struct xe_guc *guc);
>> int xe_guc_capture_init(struct xe_guc *guc);
>>
>> diff --git a/drivers/gpu/drm/xe/xe_guc_capture_types.h b/drivers/gpu/drm/xe/xe_guc_capture_types.h
>> index 2057125b1bfa..857ad10bb8f3 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_capture_types.h
>> +++ b/drivers/gpu/drm/xe/xe_guc_capture_types.h
>> @@ -41,6 +41,8 @@ struct __guc_mmio_reg_descr {
>> u32 mask;
>> /** @regname: Name of the register */
>> const char *regname;
>> + /** @position_in_snapshot: The offset position in snapshot structure */
>> + u32 position_in_snapshot;
>> };
>>
>> /**
>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
>> index 381be84740cf..44353e323f24 100644
>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>> @@ -1073,6 +1073,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
>> struct xe_gpu_scheduler *sched = &q->guc->sched;
>> struct xe_guc *guc = exec_queue_to_guc(q);
>> const char *process_name = "no process";
>> + struct xe_device *xe = guc_to_xe(guc);
>> int err = -ETIME;
>> pid_t pid = -1;
>> int i = 0;
>> @@ -1100,6 +1101,18 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
>> if (!skip_timeout_check && !xe_sched_job_started(job))
>> goto rearm;
>>
>> + /* Pre-capture register snapshot, if devcoredump not captured and GuC capture not ready */
>> + if (!exec_queue_killed(q) && !xe->devcoredump.captured && xe_device_uc_enabled(xe) &&
>> + xe->wedged.mode >= 1 && !xe_guc_capture_is_ready_for(job)) {
>> + /* take force wake before engine register pre-capture */
>> + if (xe_force_wake_get(gt_to_fw(q->gt), XE_FORCEWAKE_ALL))
>> + xe_gt_info(q->gt, "failed to get forcewake for coredump capture\n");
>> +
>> + xe_hw_engine_snapshot_capture_for_job(job);
>> +
>> + xe_force_wake_put(gt_to_fw(q->gt), XE_FORCEWAKE_ALL);
>> + }
>> +
>> /*
>> * XXX: Sampling timeout doesn't work in wedged mode as we have to
>> * modify scheduling state to read timestamp. We could read the
>> @@ -1182,7 +1195,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
>> trace_xe_sched_job_timedout(job);
>>
>> if (!exec_queue_killed(q))
>> - xe_devcoredump(job);
>> + xe_devcoredump(job); /* pre-captured data will be refreshed by GuC capture */
> alan: comment description is not accurate. I think "refreshed" is the wrong term,
> i think it should be "manual capture data will be replaced by GuC capture if
> GuC succeeds on upcoming or already-completed engine reset, reported via G2H."
>>
>> /*
>> * Kernel jobs should never fail, nor should VM jobs if they do
>> @@ -1979,8 +1992,6 @@ int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
>> xe_gt_info(gt, "Engine reset: engine_class=%s, logical_mask: 0x%x, guc_id=%d",
>> xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id);
>>
>> - /* FIXME: Do error capture, most likely async */
>> -
>> trace_xe_exec_queue_reset(q);
>>
>> /*
>> @@ -2006,7 +2017,7 @@ int xe_guc_exec_queue_reset_handler(struct xe_guc *guc, u32 *msg, u32 len)
>> * XE_GUC_ACTION_STATE_CAPTURE_NOTIFICATION to host, this function will be
>> * called 1st to check status before process the data comes with the message.
>> *
>> - * Returns: None
>> + * Returns: error code. 0 if success
>> */
>> int xe_guc_error_capture_handler(struct xe_guc *guc, u32 *msg, u32 len)
>> {
>> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.c b/drivers/gpu/drm/xe/xe_hw_engine.c
>> index 18980238a2ea..ad3a108a2491 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_engine.c
>> +++ b/drivers/gpu/drm/xe/xe_hw_engine.c
>> @@ -23,6 +23,8 @@
>> #include "xe_gt_printk.h"
>> #include "xe_gt_mcr.h"
>> #include "xe_gt_topology.h"
>> +#include "xe_guc_capture.h"
>> +#include "xe_guc_capture_types.h"
>> #include "xe_hw_engine_group.h"
>> #include "xe_hw_fence.h"
>> #include "xe_irq.h"
>> @@ -312,6 +314,7 @@ void xe_hw_engine_mmio_write32(struct xe_hw_engine *hwe,
>> u32 xe_hw_engine_mmio_read32(struct xe_hw_engine *hwe, struct xe_reg reg)
>> {
>> xe_gt_assert(hwe->gt, !(reg.addr & hwe->mmio_base));
>> +
>> xe_force_wake_assert_held(gt_to_fw(hwe->gt), hwe->domain);
>>
>> reg.addr += hwe->mmio_base;
>> @@ -809,54 +812,26 @@ void xe_hw_engine_handle_irq(struct xe_hw_engine *hwe, u16 intr_vec)
>> xe_hw_fence_irq_run(hwe->fence_irq);
>> }
>>
>> -static bool
>> -is_slice_common_per_gslice(struct xe_device *xe)
>> -{
>> - return GRAPHICS_VERx100(xe) >= 1255;
>> -}
>> -
>> static void
>> -xe_hw_engine_snapshot_instdone_capture(struct xe_hw_engine *hwe,
>> - struct xe_hw_engine_snapshot *snapshot)
>> +xe_hw_engine_snapshot_from_hw(struct xe_hw_engine *hwe, struct xe_hw_engine_snapshot *snapshot,
>> + u32 type)
>> {
>> struct xe_gt *gt = hwe->gt;
>> - struct xe_device *xe = gt_to_xe(gt);
>> - unsigned int dss;
>> - u16 group, instance;
>> -
>> - snapshot->reg.instdone.ring = xe_hw_engine_mmio_read32(hwe, RING_INSTDONE(0));
>> + enum guc_capture_list_class_type capture_class;
>> + const struct __guc_mmio_reg_descr_group *list;
>>
>> - if (snapshot->hwe->class != XE_ENGINE_CLASS_RENDER)
>> - return;
>> + capture_class = xe_engine_class_to_guc_capture_class(hwe->class);
>>
>> - if (is_slice_common_per_gslice(xe) == false) {
>> - snapshot->reg.instdone.slice_common[0] =
>> - xe_mmio_read32(gt, SC_INSTDONE);
>> - snapshot->reg.instdone.slice_common_extra[0] =
>> - xe_mmio_read32(gt, SC_INSTDONE_EXTRA);
>> - snapshot->reg.instdone.slice_common_extra2[0] =
>> - xe_mmio_read32(gt, SC_INSTDONE_EXTRA2);
>> - } else {
>> - for_each_geometry_dss(dss, gt, group, instance) {
>> - snapshot->reg.instdone.slice_common[dss] =
>> - xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE, group, instance);
>> - snapshot->reg.instdone.slice_common_extra[dss] =
>> - xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE_EXTRA, group, instance);
>> - snapshot->reg.instdone.slice_common_extra2[dss] =
>> - xe_gt_mcr_unicast_read(gt, XEHPG_SC_INSTDONE_EXTRA2, group, instance);
>> - }
>> - }
>> + /* Get register list for the type/class */
>> + list = xe_guc_capture_get_reg_desc_list(gt, GUC_CAPTURE_LIST_INDEX_PF, type, capture_class);
>>
>> - for_each_geometry_dss(dss, gt, group, instance) {
>> - snapshot->reg.instdone.sampler[dss] =
>> - xe_gt_mcr_unicast_read(gt, SAMPLER_INSTDONE, group, instance);
>> - snapshot->reg.instdone.row[dss] =
>> - xe_gt_mcr_unicast_read(gt, ROW_INSTDONE, group, instance);
>> + xe_guc_capture_node_from_hw(hwe, type, list);
>>
>> - if (GRAPHICS_VERx100(xe) >= 1255)
>> - snapshot->reg.instdone.geom_svg[dss] =
>> - xe_gt_mcr_unicast_read(gt, XEHPG_INSTDONE_GEOM_SVGUNIT,
>> - group, instance);
>> + /* Capture steering registers for rcs/ccs */
>> + if (capture_class == GUC_CAPTURE_LIST_CLASS_RENDER_COMPUTE) {
>> + list = xe_guc_capture_get_ext_reg_desc_list(gt, GUC_CAPTURE_LIST_INDEX_PF, type,
>> + capture_class);
>> + xe_guc_capture_node_from_hw(hwe, type, list);
>> }
>> }
>>
>> @@ -874,8 +849,9 @@ struct xe_hw_engine_snapshot *
>> xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
>> {
>> struct xe_hw_engine_snapshot *snapshot;
>> - size_t len;
>> - u64 val;
>> + struct xe_gt *gt = hwe->gt;
>> + struct xe_device *xe = gt_to_xe(gt);
>> + u32 type;
>>
>> if (!xe_hw_engine_is_valid(hwe))
>> return NULL;
>> @@ -885,28 +861,6 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
>> if (!snapshot)
>> return NULL;
>>
>> - /* Because XE_MAX_DSS_FUSE_BITS is defined in xe_gt_types.h and it
>> - * includes xe_hw_engine_types.h the length of this 3 registers can't be
>> - * set in struct xe_hw_engine_snapshot, so here doing additional
>> - * allocations.
>> - */
>> - len = (XE_MAX_DSS_FUSE_BITS * sizeof(u32));
>> - snapshot->reg.instdone.slice_common = kzalloc(len, GFP_ATOMIC);
>> - snapshot->reg.instdone.slice_common_extra = kzalloc(len, GFP_ATOMIC);
>> - snapshot->reg.instdone.slice_common_extra2 = kzalloc(len, GFP_ATOMIC);
>> - snapshot->reg.instdone.sampler = kzalloc(len, GFP_ATOMIC);
>> - snapshot->reg.instdone.row = kzalloc(len, GFP_ATOMIC);
>> - snapshot->reg.instdone.geom_svg = kzalloc(len, GFP_ATOMIC);
>> - if (!snapshot->reg.instdone.slice_common ||
>> - !snapshot->reg.instdone.slice_common_extra ||
>> - !snapshot->reg.instdone.slice_common_extra2 ||
>> - !snapshot->reg.instdone.sampler ||
>> - !snapshot->reg.instdone.row ||
>> - !snapshot->reg.instdone.geom_svg) {
>> - xe_hw_engine_snapshot_free(snapshot);
>> - return NULL;
>> - }
>> -
>> snapshot->name = kstrdup(hwe->name, GFP_ATOMIC);
>> snapshot->hwe = hwe;
>> snapshot->logical_instance = hwe->logical_instance;
>> @@ -916,156 +870,69 @@ xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe)
>> snapshot->mmio_base = hwe->mmio_base;
>>
>> /* no more VF accessible data below this point */
>> - if (IS_SRIOV_VF(gt_to_xe(hwe->gt)))
>> + if (IS_SRIOV_VF(xe))
>> return snapshot;
>>
>> - snapshot->reg.ring_execlist_status =
>> - xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_LO(0));
>> - val = xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_STATUS_HI(0));
>> - snapshot->reg.ring_execlist_status |= val << 32;
>> -
>> - snapshot->reg.ring_execlist_sq_contents =
>> - xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_SQ_CONTENTS_LO(0));
>> - val = xe_hw_engine_mmio_read32(hwe, RING_EXECLIST_SQ_CONTENTS_HI(0));
>> - snapshot->reg.ring_execlist_sq_contents |= val << 32;
>> -
>> - snapshot->reg.ring_acthd = xe_hw_engine_mmio_read32(hwe, RING_ACTHD(0));
>> - val = xe_hw_engine_mmio_read32(hwe, RING_ACTHD_UDW(0));
>> - snapshot->reg.ring_acthd |= val << 32;
>> -
>> - snapshot->reg.ring_bbaddr = xe_hw_engine_mmio_read32(hwe, RING_BBADDR(0));
>> - val = xe_hw_engine_mmio_read32(hwe, RING_BBADDR_UDW(0));
>> - snapshot->reg.ring_bbaddr |= val << 32;
>> -
>> - snapshot->reg.ring_dma_fadd =
>> - xe_hw_engine_mmio_read32(hwe, RING_DMA_FADD(0));
>> - val = xe_hw_engine_mmio_read32(hwe, RING_DMA_FADD_UDW(0));
>> - snapshot->reg.ring_dma_fadd |= val << 32;
>> -
>> - snapshot->reg.ring_hwstam = xe_hw_engine_mmio_read32(hwe, RING_HWSTAM(0));
>> - snapshot->reg.ring_hws_pga = xe_hw_engine_mmio_read32(hwe, RING_HWS_PGA(0));
>> - snapshot->reg.ring_start = xe_hw_engine_mmio_read32(hwe, RING_START(0));
>> - if (GRAPHICS_VERx100(hwe->gt->tile->xe) >= 2000) {
>> - val = xe_hw_engine_mmio_read32(hwe, RING_START_UDW(0));
>> - snapshot->reg.ring_start |= val << 32;
>> - }
>> - if (xe_gt_has_indirect_ring_state(hwe->gt)) {
>> - snapshot->reg.indirect_ring_state =
>> - xe_hw_engine_mmio_read32(hwe, INDIRECT_RING_STATE(0));
>> + /* If GuC not enabled, and capture outlist has no job data, take it from engine */
>> + if (xe_device_uc_enabled(xe) && xe->wedged.mode >= 1 && xe->devcoredump.job &&
>> + xe_guc_capture_is_ready_for(xe->devcoredump.job)) {
>> + snapshot->source = XE_HW_ENGINE_SOURCE_GUC_CAPTURE;
>> + /* GuC won't report direct read registers, read here */
>> + xe_hw_engine_snapshot_from_hw(hwe, snapshot,
>> + GUC_STATE_CAPTURE_TYPE_HOST_DIRECT_READ);
>> + } else {
>> + snapshot->source = XE_HW_ENGINE_SOURCE_HW_ENGINE;
>> + for (type = GUC_STATE_CAPTURE_TYPE_GLOBAL; type < GUC_HOST_CAPTURE_TYPE_MAX;
>> + type++)
>> + xe_hw_engine_snapshot_from_hw(hwe, snapshot, type);
>> }
>>
>> - snapshot->reg.ring_head =
>> - xe_hw_engine_mmio_read32(hwe, RING_HEAD(0)) & HEAD_ADDR;
>> - snapshot->reg.ring_tail =
>> - xe_hw_engine_mmio_read32(hwe, RING_TAIL(0)) & TAIL_ADDR;
>> - snapshot->reg.ring_ctl = xe_hw_engine_mmio_read32(hwe, RING_CTL(0));
>> - snapshot->reg.ring_mi_mode =
>> - xe_hw_engine_mmio_read32(hwe, RING_MI_MODE(0));
>> - snapshot->reg.ring_mode = xe_hw_engine_mmio_read32(hwe, RING_MODE(0));
>> - snapshot->reg.ring_imr = xe_hw_engine_mmio_read32(hwe, RING_IMR(0));
>> - snapshot->reg.ring_esr = xe_hw_engine_mmio_read32(hwe, RING_ESR(0));
>> - snapshot->reg.ring_emr = xe_hw_engine_mmio_read32(hwe, RING_EMR(0));
>> - snapshot->reg.ring_eir = xe_hw_engine_mmio_read32(hwe, RING_EIR(0));
>> - snapshot->reg.ipehr = xe_hw_engine_mmio_read32(hwe, RING_IPEHR(0));
>> - xe_hw_engine_snapshot_instdone_capture(hwe, snapshot);
>> -
>> - if (snapshot->hwe->class == XE_ENGINE_CLASS_COMPUTE)
>> - snapshot->reg.rcu_mode = xe_mmio_read32(hwe->gt, RCU_MODE);
>> -
>> return snapshot;
>> }
>>
>> -static void
>> -xe_hw_engine_snapshot_instdone_print(struct xe_hw_engine_snapshot *snapshot, struct drm_printer *p)
>> +/**
>> + * xe_hw_engine_snapshot_capture_for_job - Take snapshot of associated engine
>> + * @job: The job object
>> + *
>> + * Take snapshot of associated HW Engine
>> + *
>> + * Returns: None.
>> + */
>> +void
>> +xe_hw_engine_snapshot_capture_for_job(struct xe_sched_job *job)
>> {
>> - struct xe_gt *gt = snapshot->hwe->gt;
>> - struct xe_device *xe = gt_to_xe(gt);
>> - u16 group, instance;
>> - unsigned int dss;
>> -
>> - drm_printf(p, "\tRING_INSTDONE: 0x%08x\n", snapshot->reg.instdone.ring);
>> + struct xe_exec_queue *q = job->q;
>> + struct xe_device *xe = gt_to_xe(q->gt);
>> + struct xe_devcoredump *coredump = &xe->devcoredump;
>> + struct xe_hw_engine *hwe;
>> + enum xe_hw_engine_id id;
>> + u32 adj_logical_mask = q->logical_mask;
>>
>> - if (snapshot->hwe->class != XE_ENGINE_CLASS_RENDER)
>> - return;
>> + for_each_hw_engine(hwe, q->gt, id) {
>> + if (hwe->class != q->hwe->class ||
>> + !(BIT(hwe->logical_instance) & adj_logical_mask))
>> + continue;
>>
>> - if (is_slice_common_per_gslice(xe) == false) {
>> - drm_printf(p, "\tSC_INSTDONE[0]: 0x%08x\n",
>> - snapshot->reg.instdone.slice_common[0]);
>> - drm_printf(p, "\tSC_INSTDONE_EXTRA[0]: 0x%08x\n",
>> - snapshot->reg.instdone.slice_common_extra[0]);
>> - drm_printf(p, "\tSC_INSTDONE_EXTRA2[0]: 0x%08x\n",
>> - snapshot->reg.instdone.slice_common_extra2[0]);
>> - } else {
>> - for_each_geometry_dss(dss, gt, group, instance) {
>> - drm_printf(p, "\tSC_INSTDONE[%u]: 0x%08x\n", dss,
>> - snapshot->reg.instdone.slice_common[dss]);
>> - drm_printf(p, "\tSC_INSTDONE_EXTRA[%u]: 0x%08x\n", dss,
>> - snapshot->reg.instdone.slice_common_extra[dss]);
>> - drm_printf(p, "\tSC_INSTDONE_EXTRA2[%u]: 0x%08x\n", dss,
>> - snapshot->reg.instdone.slice_common_extra2[dss]);
>> + if (!coredump->snapshot.hwe[id]) {
>> + coredump->snapshot.hwe[id] = xe_hw_engine_snapshot_capture(hwe);
>> + } else {
>> + /* If pre-captured and Guc capture ready now */
>> + if (xe_device_uc_enabled(xe) && xe->wedged.mode >= 1 &&
>> + xe_guc_capture_is_ready_for(job)) {
>> + /*
>> + * Remove the pre-captured nodes from outlist,
>> + * only keep the GuC reported data.
>> + * Except direct read registers, which is read
>> + * by host only.
>> + */
>> + xe_guc_capture_free_pre_capture(&q->gt->uc.guc);
>> + }
>> }
>> - }
>> -
>> - for_each_geometry_dss(dss, gt, group, instance) {
>> - drm_printf(p, "\tSAMPLER_INSTDONE[%u]: 0x%08x\n", dss,
>> - snapshot->reg.instdone.sampler[dss]);
>> - drm_printf(p, "\tROW_INSTDONE[%u]: 0x%08x\n", dss,
>> - snapshot->reg.instdone.row[dss]);
>> -
>> - if (GRAPHICS_VERx100(xe) >= 1255)
>> - drm_printf(p, "\tINSTDONE_GEOM_SVGUNIT[%u]: 0x%08x\n",
>> - dss, snapshot->reg.instdone.geom_svg[dss]);
>> + break;
>> }
>> }
>>
>> -/**
>> - * xe_hw_engine_snapshot_print - Print out a given Xe HW Engine snapshot.
>> - * @snapshot: Xe HW Engine snapshot object.
>> - * @p: drm_printer where it will be printed out.
>> - *
>> - * This function prints out a given Xe HW Engine snapshot object.
>> - */
>> -void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
>> - struct drm_printer *p)
>> -{
>> - if (!snapshot)
>> - return;
>>
>> - drm_printf(p, "%s (physical), logical instance=%d\n",
>> - snapshot->name ? snapshot->name : "",
>> - snapshot->logical_instance);
>> - drm_printf(p, "\tForcewake: domain 0x%x, ref %d\n",
>> - snapshot->forcewake.domain, snapshot->forcewake.ref);
> alan:snip
>> - drm_puts(p, "\n");
>> -}
>>
>> /**
>> * xe_hw_engine_snapshot_free - Free all allocated objects for a given snapshot.
>> @@ -1079,12 +946,6 @@ void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot)
>> if (!snapshot)
>> return;
>>
>> - kfree(snapshot->reg.instdone.slice_common);
>> - kfree(snapshot->reg.instdone.slice_common_extra);
>> - kfree(snapshot->reg.instdone.slice_common_extra2);
>> - kfree(snapshot->reg.instdone.sampler);
>> - kfree(snapshot->reg.instdone.row);
>> - kfree(snapshot->reg.instdone.geom_svg);
>> kfree(snapshot->name);
>> kfree(snapshot);
>> }
>> diff --git a/drivers/gpu/drm/xe/xe_hw_engine.h b/drivers/gpu/drm/xe/xe_hw_engine.h
>> index 022819a4a8eb..1df6a082487c 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_engine.h
>> +++ b/drivers/gpu/drm/xe/xe_hw_engine.h
>> @@ -11,6 +11,7 @@
>> struct drm_printer;
>> struct drm_xe_engine_class_instance;
>> struct xe_device;
>> +struct xe_sched_job;
>>
>> #ifdef CONFIG_DRM_XE_JOB_TIMEOUT_MIN
>> #define XE_HW_ENGINE_JOB_TIMEOUT_MIN CONFIG_DRM_XE_JOB_TIMEOUT_MIN
>> @@ -57,6 +58,7 @@ u32 xe_hw_engine_mask_per_class(struct xe_gt *gt,
>>
>> struct xe_hw_engine_snapshot *
>> xe_hw_engine_snapshot_capture(struct xe_hw_engine *hwe);
>> +void xe_hw_engine_snapshot_capture_for_job(struct xe_sched_job *job);
>> void xe_hw_engine_snapshot_free(struct xe_hw_engine_snapshot *snapshot);
>> void xe_hw_engine_snapshot_print(struct xe_hw_engine_snapshot *snapshot,
>> struct drm_printer *p);
>> diff --git a/drivers/gpu/drm/xe/xe_hw_engine_types.h b/drivers/gpu/drm/xe/xe_hw_engine_types.h
>> index 39f24012d0f4..4e3e9ddf5f5a 100644
>> --- a/drivers/gpu/drm/xe/xe_hw_engine_types.h
>> +++ b/drivers/gpu/drm/xe/xe_hw_engine_types.h
>> @@ -154,6 +154,11 @@ struct xe_hw_engine {
>> struct xe_hw_engine_group *hw_engine_group;
>> };
>>
>> +enum xe_hw_engine_snapshot_source_id {
>> + XE_HW_ENGINE_SOURCE_HW_ENGINE,
>> + XE_HW_ENGINE_SOURCE_GUC_CAPTURE
> alan: mentioned above in one or more places but the first names
> is repetitive but more importantly, not self-explanatory.
> Perhaps a simpler, more readable option is:
> "XE_ENGINE_DUMP_MANUAL vs XE_ENGINE_DUMP_GUC"
>
>> +};
>> +
>> /**
>> * struct xe_hw_engine_snapshot - Hardware engine snapshot
>> *
>> @@ -162,6 +167,8 @@ struct xe_hw_engine {
>> struct xe_hw_engine_snapshot {
>> /** @name: name of the hw engine */
>> char *name;
>> + /** @source: Data source, either hw_engine or GuC capture */
>> + enum xe_hw_engine_snapshot_source_id source;
>> /** @hwe: hw engine */
>> struct xe_hw_engine *hwe;
>> /** @logical_instance: logical instance of this hw engine */
>> @@ -175,65 +182,6 @@ struct xe_hw_engine_snapshot {
>> } forcewake;
>> /** @mmio_base: MMIO base address of this hw engine*/
>> u32 mmio_base;
>> - /** @reg: Useful MMIO register snapshot */
>> - struct {
>> - /** @reg.ring_execlist_status: RING_EXECLIST_STATUS */
>> - u64 ring_execlist_status;
>>
> alan:snip
>> - } instdone;
>> - } reg;
>> };
>>
>> #endif
>> diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h
>> index c24542e89318..cc00fa878d3c 100644
>> --- a/drivers/gpu/drm/xe/xe_lrc.h
>> +++ b/drivers/gpu/drm/xe/xe_lrc.h
>> @@ -21,6 +21,7 @@ struct xe_lrc_snapshot;
>> struct xe_vm;
>>
>> #define LRC_PPHWSP_SCRATCH_ADDR (0x34 * 4)
>> +#define LRC_GTT_ADDRESS_MASK GENMASK(31, 12)
>>
>> struct xe_lrc *xe_lrc_create(struct xe_hw_engine *hwe, struct xe_vm *vm,
>> u32 ring_size);
>
^ permalink raw reply [flat|nested] 23+ messages in thread
end of thread, other threads:[~2024-09-06 18:11 UTC | newest]
Thread overview: 23+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-08-27 21:47 [PATCH v17 0/7] drm/xe/guc: Add GuC based register capture for error capture Zhanjun Dong
2024-08-27 21:47 ` [PATCH v17 1/7] drm/xe/guc: Prepare GuC register list and update ADS size " Zhanjun Dong
2024-08-27 23:05 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 2/7] drm/xe/guc: Add XE_LP steered register lists Zhanjun Dong
2024-08-28 22:12 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 3/7] drm/xe/guc: Add capture size check in GuC log buffer Zhanjun Dong
2024-08-27 21:47 ` [PATCH v17 4/7] drm/xe/guc: Extract GuC error capture lists Zhanjun Dong
2024-08-28 0:22 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 5/7] drm/xe/guc: Move xe_lrc_snapshot to header file Zhanjun Dong
2024-08-27 22:32 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 6/7] drm/xe/guc: Add dss conversion from group/instance ID Zhanjun Dong
2024-08-27 23:15 ` Teres Alexis, Alan Previn
2024-08-27 21:47 ` [PATCH v17 7/7] drm/xe/guc: Plumb GuC-capture into dev coredump Zhanjun Dong
2024-08-29 4:26 ` Teres Alexis, Alan Previn
2024-09-06 18:11 ` Dong, Zhanjun
2024-08-27 21:53 ` ✓ CI.Patch_applied: success for drm/xe/guc: Add GuC based register capture for error capture (rev17) Patchwork
2024-08-27 21:53 ` ✗ CI.checkpatch: warning " Patchwork
2024-08-27 21:54 ` ✓ CI.KUnit: success " Patchwork
2024-08-27 22:09 ` ✓ CI.Build: " Patchwork
2024-08-27 22:12 ` ✓ CI.Hooks: " Patchwork
2024-08-27 22:14 ` ✓ CI.checksparse: " Patchwork
2024-08-27 22:35 ` ✓ CI.BAT: " Patchwork
2024-08-28 7:41 ` ✗ CI.FULL: failure " Patchwork
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