From: Matt Roper <matthew.d.roper@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: matthew.d.roper@intel.com
Subject: [PATCH v2 33/43] drm/xe/execlist: Convert register access to use xe_mmio
Date: Fri, 6 Sep 2024 17:08:22 -0700 [thread overview]
Message-ID: <20240907000748.2614020-78-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20240907000748.2614020-45-matthew.d.roper@intel.com>
Stop using GT pointers for register access.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/xe/xe_execlist.c | 19 ++++++++++---------
1 file changed, 10 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_execlist.c b/drivers/gpu/drm/xe/xe_execlist.c
index 6a59165b9569..f3b71fe7a96d 100644
--- a/drivers/gpu/drm/xe/xe_execlist.c
+++ b/drivers/gpu/drm/xe/xe_execlist.c
@@ -44,6 +44,7 @@ static void __start_lrc(struct xe_hw_engine *hwe, struct xe_lrc *lrc,
u32 ctx_id)
{
struct xe_gt *gt = hwe->gt;
+ struct xe_mmio *mmio = >->mmio;
struct xe_device *xe = gt_to_xe(gt);
u64 lrc_desc;
@@ -58,7 +59,7 @@ static void __start_lrc(struct xe_hw_engine *hwe, struct xe_lrc *lrc,
}
if (hwe->class == XE_ENGINE_CLASS_COMPUTE)
- xe_mmio_write32(hwe->gt, RCU_MODE,
+ xe_mmio_write32(mmio, RCU_MODE,
_MASKED_BIT_ENABLE(RCU_MODE_CCS_ENABLE));
xe_lrc_write_ctx_reg(lrc, CTX_RING_TAIL, lrc->ring.tail);
@@ -76,17 +77,17 @@ static void __start_lrc(struct xe_hw_engine *hwe, struct xe_lrc *lrc,
*/
wmb();
- xe_mmio_write32(gt, RING_HWS_PGA(hwe->mmio_base),
+ xe_mmio_write32(mmio, RING_HWS_PGA(hwe->mmio_base),
xe_bo_ggtt_addr(hwe->hwsp));
- xe_mmio_read32(gt, RING_HWS_PGA(hwe->mmio_base));
- xe_mmio_write32(gt, RING_MODE(hwe->mmio_base),
+ xe_mmio_read32(mmio, RING_HWS_PGA(hwe->mmio_base));
+ xe_mmio_write32(mmio, RING_MODE(hwe->mmio_base),
_MASKED_BIT_ENABLE(GFX_DISABLE_LEGACY_MODE));
- xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS_LO(hwe->mmio_base),
+ xe_mmio_write32(mmio, RING_EXECLIST_SQ_CONTENTS_LO(hwe->mmio_base),
lower_32_bits(lrc_desc));
- xe_mmio_write32(gt, RING_EXECLIST_SQ_CONTENTS_HI(hwe->mmio_base),
+ xe_mmio_write32(mmio, RING_EXECLIST_SQ_CONTENTS_HI(hwe->mmio_base),
upper_32_bits(lrc_desc));
- xe_mmio_write32(gt, RING_EXECLIST_CONTROL(hwe->mmio_base),
+ xe_mmio_write32(mmio, RING_EXECLIST_CONTROL(hwe->mmio_base),
EL_CTRL_LOAD);
}
@@ -168,8 +169,8 @@ static u64 read_execlist_status(struct xe_hw_engine *hwe)
struct xe_gt *gt = hwe->gt;
u32 hi, lo;
- lo = xe_mmio_read32(gt, RING_EXECLIST_STATUS_LO(hwe->mmio_base));
- hi = xe_mmio_read32(gt, RING_EXECLIST_STATUS_HI(hwe->mmio_base));
+ lo = xe_mmio_read32(>->mmio, RING_EXECLIST_STATUS_LO(hwe->mmio_base));
+ hi = xe_mmio_read32(>->mmio, RING_EXECLIST_STATUS_HI(hwe->mmio_base));
return lo | (u64)hi << 32;
}
--
2.45.2
next prev parent reply other threads:[~2024-09-07 0:08 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-07 0:07 [PATCH v2 00/43] Stop using xe_gt as a register MMIO target Matt Roper
2024-09-07 0:07 ` [PATCH v2 01/43] drm/xe: Move forcewake to 'gt.pm' substructure Matt Roper
2024-09-07 0:07 ` [PATCH v2 02/43] drm/xe: Create dedicated xe_mmio structure Matt Roper
2024-09-07 0:07 ` [PATCH v2 03/43] drm/xe: Clarify size of MMIO region Matt Roper
2024-09-07 0:07 ` [PATCH v2 04/43] drm/xe: Move GSI offset adjustment fields into 'struct xe_mmio' Matt Roper
2024-09-10 18:02 ` Rodrigo Vivi
2024-09-12 13:30 ` Jani Nikula
2024-09-07 0:07 ` [PATCH v2 05/43] drm/xe: Populate GT's mmio iomap from tile during init Matt Roper
2024-09-07 0:07 ` [PATCH v2 06/43] drm/xe: Switch mmio_ext to use 'struct xe_mmio' Matt Roper
2024-09-07 0:07 ` [PATCH v2 07/43] drm/xe: Add xe_tile backpointer to xe_mmio Matt Roper
2024-09-07 0:07 ` [PATCH v2 08/43] drm/xe: Adjust mmio code to pass VF substructure to SRIOV code Matt Roper
2024-09-07 0:07 ` [PATCH v2 09/43] drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt Matt Roper
2024-09-07 0:07 ` [PATCH v2 10/43] drm/xe/irq: Convert register access to use xe_mmio Matt Roper
2024-09-07 0:08 ` [PATCH v2 11/43] drm/xe/pcode: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 12/43] drm/xe/hwmon: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 13/43] drm/xe/vram: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 14/43] drm/xe/compat-i915: " Matt Roper
2024-09-10 18:15 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 15/43] drm/xe/lmtt: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 16/43] drm/xe/stolen: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 17/43] drm/xe/device: " Matt Roper
2024-09-10 18:05 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 18/43] drm/xe/pci: " Matt Roper
2024-09-10 18:40 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 19/43] drm/xe/wa: " Matt Roper
2024-09-10 18:07 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 20/43] drm/xe/uc: " Matt Roper
2024-09-10 18:42 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 21/43] drm/xe/guc: " Matt Roper
2024-09-10 18:48 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 22/43] drm/xe/huc: " Matt Roper
2024-09-10 18:44 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 23/43] drm/xe/gsc: " Matt Roper
2024-09-10 18:08 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 24/43] drm/xe/query: " Matt Roper
2024-09-10 18:44 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 25/43] drm/xe/mcr: " Matt Roper
2024-09-10 18:11 ` Rodrigo Vivi
2024-09-10 18:49 ` Matt Roper
2024-09-07 0:08 ` [PATCH v2 26/43] drm/xe/mocs: " Matt Roper
2024-09-10 18:41 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 27/43] drm/xe/hw_engine: " Matt Roper
2024-09-10 18:42 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 28/43] drm/xe/gt_throttle: " Matt Roper
2024-09-10 18:07 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 29/43] drm/xe/pat: " Matt Roper
2024-09-10 18:12 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 30/43] drm/xe/wopcm: " Matt Roper
2024-09-10 18:12 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 31/43] drm/xe/oa: " Matt Roper
2024-09-10 18:34 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 32/43] drm/xe/topology: " Matt Roper
2024-09-10 18:11 ` Rodrigo Vivi
2024-09-07 0:08 ` Matt Roper [this message]
2024-09-10 18:13 ` [PATCH v2 33/43] drm/xe/execlist: " Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 34/43] drm/xe/gt_clock: " Matt Roper
2024-09-10 18:44 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 35/43] drm/xe/reg_sr: " Matt Roper
2024-09-10 18:15 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 36/43] drm/xe/gt: " Matt Roper
2024-09-10 18:11 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 37/43] drm/xe/sriov: " Matt Roper
2024-09-10 18:47 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 38/43] drm/xe/tlb: " Matt Roper
2024-09-10 18:45 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 39/43] drm/xe/gt_idle: " Matt Roper
2024-09-10 18:12 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 40/43] drm/xe/forcewake: " Matt Roper
2024-09-10 18:42 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 41/43] drm/xe/ggtt: " Matt Roper
2024-09-10 18:09 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 42/43] drm/xe/ccs_mode: " Matt Roper
2024-09-10 18:46 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 43/43] drm/xe/mmio: Drop compatibility macros Matt Roper
2024-09-07 3:10 ` ✓ CI.Patch_applied: success for Stop using xe_gt as a register MMIO target (rev2) Patchwork
2024-09-07 3:11 ` ✗ CI.checkpatch: warning " Patchwork
2024-09-07 3:12 ` ✓ CI.KUnit: success " Patchwork
2024-09-07 3:26 ` ✓ CI.Build: " Patchwork
2024-09-07 3:31 ` ✗ CI.Hooks: failure " Patchwork
2024-09-07 3:34 ` ✓ CI.checksparse: success " Patchwork
2024-09-07 4:22 ` ✗ CI.BAT: failure " Patchwork
2024-09-09 17:04 ` Matt Roper
2024-09-09 16:59 ` ✓ CI.FULL: success " Patchwork
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