From: Matt Roper <matthew.d.roper@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: matthew.d.roper@intel.com
Subject: [PATCH v2 37/43] drm/xe/sriov: Convert register access to use xe_mmio
Date: Fri, 6 Sep 2024 17:08:26 -0700 [thread overview]
Message-ID: <20240907000748.2614020-82-matthew.d.roper@intel.com> (raw)
In-Reply-To: <20240907000748.2614020-45-matthew.d.roper@intel.com>
Stop using GT pointers for register access.
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/xe/xe_gt_sriov_pf.c | 6 +++---
drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c | 6 +++---
drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 4 ++--
drivers/gpu/drm/xe/xe_sriov.c | 2 +-
4 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf.c
index 919d960165d5..065a9878f8e9 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf.c
@@ -74,7 +74,7 @@ static bool pf_needs_enable_ggtt_guest_update(struct xe_device *xe)
static void pf_enable_ggtt_guest_update(struct xe_gt *gt)
{
- xe_mmio_write32(gt, VIRTUAL_CTRL_REG, GUEST_GTT_UPDATE_EN);
+ xe_mmio_write32(>->mmio, VIRTUAL_CTRL_REG, GUEST_GTT_UPDATE_EN);
}
/**
@@ -116,13 +116,13 @@ static void pf_clear_vf_scratch_regs(struct xe_gt *gt, unsigned int vfid)
count = MED_VF_SW_FLAG_COUNT;
for (n = 0; n < count; n++) {
scratch = xe_reg_vf_to_pf(MED_VF_SW_FLAG(n), vfid, stride);
- xe_mmio_write32(gt, scratch, 0);
+ xe_mmio_write32(>->mmio, scratch, 0);
}
} else {
count = VF_SW_FLAG_COUNT;
for (n = 0; n < count; n++) {
scratch = xe_reg_vf_to_pf(VF_SW_FLAG(n), vfid, stride);
- xe_mmio_write32(gt, scratch, 0);
+ xe_mmio_write32(>->mmio, scratch, 0);
}
}
}
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c b/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
index 0e23b7ea4f3e..924e75b94aec 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_service.c
@@ -237,7 +237,7 @@ static void read_many(struct xe_gt *gt, unsigned int count,
const struct xe_reg *regs, u32 *values)
{
while (count--)
- *values++ = xe_mmio_read32(gt, *regs++);
+ *values++ = xe_mmio_read32(>->mmio, *regs++);
}
static void pf_prepare_runtime_info(struct xe_gt *gt)
@@ -402,7 +402,7 @@ static int pf_service_runtime_query(struct xe_gt *gt, u32 start, u32 limit,
for (i = 0; i < count; ++i, ++data) {
addr = runtime->regs[start + i].addr;
- data->offset = xe_mmio_adjusted_addr(gt, addr);
+ data->offset = xe_mmio_adjusted_addr(>->mmio, addr);
data->value = runtime->values[start + i];
}
@@ -513,7 +513,7 @@ int xe_gt_sriov_pf_service_print_runtime(struct xe_gt *gt, struct drm_printer *p
for (; size--; regs++, values++) {
drm_printf(p, "reg[%#x] = %#x\n",
- xe_mmio_adjusted_addr(gt, regs->addr), *values);
+ xe_mmio_adjusted_addr(>->mmio, regs->addr), *values);
}
return 0;
diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
index 4ebc82e607af..d3baba50f085 100644
--- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
+++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
@@ -881,7 +881,7 @@ static struct vf_runtime_reg *vf_lookup_reg(struct xe_gt *gt, u32 addr)
*/
u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg)
{
- u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
+ u32 addr = xe_mmio_adjusted_addr(>->mmio, reg.addr);
struct vf_runtime_reg *rr;
xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
@@ -917,7 +917,7 @@ u32 xe_gt_sriov_vf_read32(struct xe_gt *gt, struct xe_reg reg)
*/
void xe_gt_sriov_vf_write32(struct xe_gt *gt, struct xe_reg reg, u32 val)
{
- u32 addr = xe_mmio_adjusted_addr(gt, reg.addr);
+ u32 addr = xe_mmio_adjusted_addr(>->mmio, reg.addr);
xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
xe_gt_assert(gt, !reg.vf);
diff --git a/drivers/gpu/drm/xe/xe_sriov.c b/drivers/gpu/drm/xe/xe_sriov.c
index 5a1d65e4f19f..69a066ef20c0 100644
--- a/drivers/gpu/drm/xe/xe_sriov.c
+++ b/drivers/gpu/drm/xe/xe_sriov.c
@@ -35,7 +35,7 @@ const char *xe_sriov_mode_to_string(enum xe_sriov_mode mode)
static bool test_is_vf(struct xe_device *xe)
{
- u32 value = xe_mmio_read32(xe_root_mmio_gt(xe), VF_CAP_REG);
+ u32 value = xe_mmio_read32(xe_root_tile_mmio(xe), VF_CAP_REG);
return value & VF_CAP;
}
--
2.45.2
next prev parent reply other threads:[~2024-09-07 0:08 UTC|newest]
Thread overview: 83+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-07 0:07 [PATCH v2 00/43] Stop using xe_gt as a register MMIO target Matt Roper
2024-09-07 0:07 ` [PATCH v2 01/43] drm/xe: Move forcewake to 'gt.pm' substructure Matt Roper
2024-09-07 0:07 ` [PATCH v2 02/43] drm/xe: Create dedicated xe_mmio structure Matt Roper
2024-09-07 0:07 ` [PATCH v2 03/43] drm/xe: Clarify size of MMIO region Matt Roper
2024-09-07 0:07 ` [PATCH v2 04/43] drm/xe: Move GSI offset adjustment fields into 'struct xe_mmio' Matt Roper
2024-09-10 18:02 ` Rodrigo Vivi
2024-09-12 13:30 ` Jani Nikula
2024-09-07 0:07 ` [PATCH v2 05/43] drm/xe: Populate GT's mmio iomap from tile during init Matt Roper
2024-09-07 0:07 ` [PATCH v2 06/43] drm/xe: Switch mmio_ext to use 'struct xe_mmio' Matt Roper
2024-09-07 0:07 ` [PATCH v2 07/43] drm/xe: Add xe_tile backpointer to xe_mmio Matt Roper
2024-09-07 0:07 ` [PATCH v2 08/43] drm/xe: Adjust mmio code to pass VF substructure to SRIOV code Matt Roper
2024-09-07 0:07 ` [PATCH v2 09/43] drm/xe: Switch MMIO interface to take xe_mmio instead of xe_gt Matt Roper
2024-09-07 0:07 ` [PATCH v2 10/43] drm/xe/irq: Convert register access to use xe_mmio Matt Roper
2024-09-07 0:08 ` [PATCH v2 11/43] drm/xe/pcode: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 12/43] drm/xe/hwmon: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 13/43] drm/xe/vram: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 14/43] drm/xe/compat-i915: " Matt Roper
2024-09-10 18:15 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 15/43] drm/xe/lmtt: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 16/43] drm/xe/stolen: " Matt Roper
2024-09-07 0:08 ` [PATCH v2 17/43] drm/xe/device: " Matt Roper
2024-09-10 18:05 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 18/43] drm/xe/pci: " Matt Roper
2024-09-10 18:40 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 19/43] drm/xe/wa: " Matt Roper
2024-09-10 18:07 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 20/43] drm/xe/uc: " Matt Roper
2024-09-10 18:42 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 21/43] drm/xe/guc: " Matt Roper
2024-09-10 18:48 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 22/43] drm/xe/huc: " Matt Roper
2024-09-10 18:44 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 23/43] drm/xe/gsc: " Matt Roper
2024-09-10 18:08 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 24/43] drm/xe/query: " Matt Roper
2024-09-10 18:44 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 25/43] drm/xe/mcr: " Matt Roper
2024-09-10 18:11 ` Rodrigo Vivi
2024-09-10 18:49 ` Matt Roper
2024-09-07 0:08 ` [PATCH v2 26/43] drm/xe/mocs: " Matt Roper
2024-09-10 18:41 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 27/43] drm/xe/hw_engine: " Matt Roper
2024-09-10 18:42 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 28/43] drm/xe/gt_throttle: " Matt Roper
2024-09-10 18:07 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 29/43] drm/xe/pat: " Matt Roper
2024-09-10 18:12 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 30/43] drm/xe/wopcm: " Matt Roper
2024-09-10 18:12 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 31/43] drm/xe/oa: " Matt Roper
2024-09-10 18:34 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 32/43] drm/xe/topology: " Matt Roper
2024-09-10 18:11 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 33/43] drm/xe/execlist: " Matt Roper
2024-09-10 18:13 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 34/43] drm/xe/gt_clock: " Matt Roper
2024-09-10 18:44 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 35/43] drm/xe/reg_sr: " Matt Roper
2024-09-10 18:15 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 36/43] drm/xe/gt: " Matt Roper
2024-09-10 18:11 ` Rodrigo Vivi
2024-09-07 0:08 ` Matt Roper [this message]
2024-09-10 18:47 ` [PATCH v2 37/43] drm/xe/sriov: " Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 38/43] drm/xe/tlb: " Matt Roper
2024-09-10 18:45 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 39/43] drm/xe/gt_idle: " Matt Roper
2024-09-10 18:12 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 40/43] drm/xe/forcewake: " Matt Roper
2024-09-10 18:42 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 41/43] drm/xe/ggtt: " Matt Roper
2024-09-10 18:09 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 42/43] drm/xe/ccs_mode: " Matt Roper
2024-09-10 18:46 ` Rodrigo Vivi
2024-09-07 0:08 ` [PATCH v2 43/43] drm/xe/mmio: Drop compatibility macros Matt Roper
2024-09-07 3:10 ` ✓ CI.Patch_applied: success for Stop using xe_gt as a register MMIO target (rev2) Patchwork
2024-09-07 3:11 ` ✗ CI.checkpatch: warning " Patchwork
2024-09-07 3:12 ` ✓ CI.KUnit: success " Patchwork
2024-09-07 3:26 ` ✓ CI.Build: " Patchwork
2024-09-07 3:31 ` ✗ CI.Hooks: failure " Patchwork
2024-09-07 3:34 ` ✓ CI.checksparse: success " Patchwork
2024-09-07 4:22 ` ✗ CI.BAT: failure " Patchwork
2024-09-09 17:04 ` Matt Roper
2024-09-09 16:59 ` ✓ CI.FULL: success " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20240907000748.2614020-82-matthew.d.roper@intel.com \
--to=matthew.d.roper@intel.com \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox