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From: Clint Taylor <clinton.a.taylor@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: [PATCH v5 02/11] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3
Date: Fri, 25 Oct 2024 13:47:34 -0700	[thread overview]
Message-ID: <20241025204743.211510-3-clinton.a.taylor@intel.com> (raw)
In-Reply-To: <20241025204743.211510-1-clinton.a.taylor@intel.com>

From: Suraj Kandpal <suraj.kandpal@intel.com>

We need to disable HDCP Line Rekeying for Xe3 when we are using an HDMI
encoder. Also remove the Wa comment tag as this follows the bspec and
does not implement the wa.

v2: add additional definition instead of function, commit message typo
fix and update.
v3: restore lost conditional from v2.
v4: subject line and subject message updated, fix the if ladder order,
fix the bit definition order.
v5: Add the bspec link and remove the Wa comment tag

Bspec: 68933
Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com>
---
 drivers/gpu/drm/i915/display/intel_hdcp.c | 11 +++++++----
 drivers/gpu/drm/i915/i915_reg.h           |  1 +
 2 files changed, 8 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c b/drivers/gpu/drm/i915/display/intel_hdcp.c
index ed6aa87403e2..7a32bfef8d87 100644
--- a/drivers/gpu/drm/i915/display/intel_hdcp.c
+++ b/drivers/gpu/drm/i915/display/intel_hdcp.c
@@ -31,7 +31,6 @@
 #define KEY_LOAD_TRIES	5
 #define HDCP2_LC_RETRY_CNT			3
 
-/* WA: 16022217614 */
 static void
 intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
 				      struct intel_hdcp *hdcp)
@@ -43,14 +42,18 @@ intel_hdcp_disable_hdcp_line_rekeying(struct intel_encoder *encoder,
 		return;
 
 	if (DISPLAY_VER(display) >= 14) {
-		if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0, STEP_FOREVER))
-			intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp->cpu_transcoder),
-				     0, HDCP_LINE_REKEY_DISABLE);
+		if (DISPLAY_VER(display) >= 30)
+			intel_de_rmw(display,
+				     TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder),
+				     0, XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
 		else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 1), STEP_B0, STEP_FOREVER) ||
 			 IS_DISPLAY_VER_STEP(display, IP_VER(20, 0), STEP_B0, STEP_FOREVER))
 			intel_de_rmw(display,
 				     TRANS_DDI_FUNC_CTL(display, hdcp->cpu_transcoder),
 				     0, TRANS_DDI_HDCP_LINE_REKEY_DISABLE);
+		else if (IS_DISPLAY_VER_STEP(display, IP_VER(14, 0), STEP_D0, STEP_FOREVER))
+			intel_de_rmw(display, MTL_CHICKEN_TRANS(hdcp->cpu_transcoder),
+				     0, HDCP_LINE_REKEY_DISABLE);
 	}
 }
 
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 89e4381f8baa..8d758947f301 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3817,6 +3817,7 @@ enum skl_power_gate {
 #define  TRANS_DDI_PVSYNC		(1 << 17)
 #define  TRANS_DDI_PHSYNC		(1 << 16)
 #define  TRANS_DDI_PORT_SYNC_ENABLE	REG_BIT(15)
+#define  XE3_TRANS_DDI_HDCP_LINE_REKEY_DISABLE	REG_BIT(15)
 #define  TRANS_DDI_EDP_INPUT_MASK	(7 << 12)
 #define  TRANS_DDI_EDP_INPUT_A_ON	(0 << 12)
 #define  TRANS_DDI_EDP_INPUT_A_ONOFF	(4 << 12)
-- 
2.25.1


  parent reply	other threads:[~2024-10-25 20:47 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-25 20:47 [PATCH v5 00/11] drm/i915/xe3lpd: ptl display patches Clint Taylor
2024-10-25 20:47 ` [PATCH v5 01/11] drm/i915/xe3lpd: Update pmdemand programming Clint Taylor
2024-10-28 15:19   ` Govindapillai, Vinod
2024-10-28 16:25     ` Gustavo Sousa
2024-10-25 20:47 ` Clint Taylor [this message]
2024-10-25 23:13   ` [PATCH v5 02/11] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3 Matt Roper
2024-10-25 20:47 ` [PATCH v5 03/11] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Clint Taylor
2024-10-25 20:47 ` [PATCH v5 04/11] drm/i915/ptl: Define IS_PANTHERLAKE macro Clint Taylor
2024-10-25 20:47 ` [PATCH v5 05/11] drm/i915/cx0: Extend C10 check to PTL Clint Taylor
2024-10-25 20:47 ` [PATCH v5 06/11] drm/i915/cx0: Remove bus reset after every c10 transaction Clint Taylor
2024-10-28 16:30   ` Gustavo Sousa
2024-10-25 20:47 ` [PATCH v5 07/11] drm/i915/xe3lpd: Move async flip bit to PLANE_SURF register Clint Taylor
2024-10-25 20:47 ` [PATCH v5 08/11] drm/i915/xe3: Underrun recovery does not exist post Xe2 Clint Taylor
2024-10-25 20:47 ` [PATCH v5 09/11] drm/i915/display/xe3: disable x-tiled framebuffers Clint Taylor
2024-10-25 20:47 ` [PATCH v5 10/11] drm/i915/xe3lpd: Power request asserting/deasserting Clint Taylor
2024-10-28 16:39   ` Gustavo Sousa
2024-10-25 20:47 ` [PATCH v5 11/11] drm/xe/ptl: Enable PTL display Clint Taylor
2024-10-28 18:45   ` Saarinen, Jani
2024-10-28 19:12   ` Rodrigo Vivi
2024-10-28 19:17   ` Matt Roper
2024-10-25 20:53 ` ✓ CI.Patch_applied: success for drm/i915/xe3lpd: ptl display patches (rev5) Patchwork
2024-10-25 20:54 ` ✗ CI.checkpatch: warning " Patchwork
2024-10-25 20:55 ` ✓ CI.KUnit: success " Patchwork
2024-10-25 21:12 ` ✓ CI.Build: " Patchwork
2024-10-25 21:16 ` ✓ CI.Hooks: " Patchwork
2024-10-25 21:18 ` ✗ CI.checksparse: warning " Patchwork
2024-10-25 22:09 ` ✗ CI.BAT: failure " Patchwork
2024-10-27 12:20 ` ✗ CI.FULL: " Patchwork

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