From: Clint Taylor <clinton.a.taylor@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Subject: [PATCH v5 04/11] drm/i915/ptl: Define IS_PANTHERLAKE macro
Date: Fri, 25 Oct 2024 13:47:36 -0700 [thread overview]
Message-ID: <20241025204743.211510-5-clinton.a.taylor@intel.com> (raw)
In-Reply-To: <20241025204743.211510-1-clinton.a.taylor@intel.com>
From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Common display code requires IS_PANTHERLAKE macro.
Define the macro and set 0 as PTL is no longer support for i915.
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index de73b348b8cf..0f19cbd36829 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -536,6 +536,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
*/
#define IS_LUNARLAKE(i915) (0 && i915)
#define IS_BATTLEMAGE(i915) (0 && i915)
+#define IS_PANTHERLAKE(i915) (0 && i915)
#define IS_ARROWLAKE(i915) \
IS_SUBPLATFORM(i915, INTEL_METEORLAKE, INTEL_SUBPLATFORM_ARL)
--
2.25.1
next prev parent reply other threads:[~2024-10-25 20:47 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-25 20:47 [PATCH v5 00/11] drm/i915/xe3lpd: ptl display patches Clint Taylor
2024-10-25 20:47 ` [PATCH v5 01/11] drm/i915/xe3lpd: Update pmdemand programming Clint Taylor
2024-10-28 15:19 ` Govindapillai, Vinod
2024-10-28 16:25 ` Gustavo Sousa
2024-10-25 20:47 ` [PATCH v5 02/11] drm/i915/xe3lpd: Disable HDCP Line Rekeying for Xe3 Clint Taylor
2024-10-25 23:13 ` Matt Roper
2024-10-25 20:47 ` [PATCH v5 03/11] drm/i915/xe3lpd: Add check to see if edp over type c is allowed Clint Taylor
2024-10-25 20:47 ` Clint Taylor [this message]
2024-10-25 20:47 ` [PATCH v5 05/11] drm/i915/cx0: Extend C10 check to PTL Clint Taylor
2024-10-25 20:47 ` [PATCH v5 06/11] drm/i915/cx0: Remove bus reset after every c10 transaction Clint Taylor
2024-10-28 16:30 ` Gustavo Sousa
2024-10-25 20:47 ` [PATCH v5 07/11] drm/i915/xe3lpd: Move async flip bit to PLANE_SURF register Clint Taylor
2024-10-25 20:47 ` [PATCH v5 08/11] drm/i915/xe3: Underrun recovery does not exist post Xe2 Clint Taylor
2024-10-25 20:47 ` [PATCH v5 09/11] drm/i915/display/xe3: disable x-tiled framebuffers Clint Taylor
2024-10-25 20:47 ` [PATCH v5 10/11] drm/i915/xe3lpd: Power request asserting/deasserting Clint Taylor
2024-10-28 16:39 ` Gustavo Sousa
2024-10-25 20:47 ` [PATCH v5 11/11] drm/xe/ptl: Enable PTL display Clint Taylor
2024-10-28 18:45 ` Saarinen, Jani
2024-10-28 19:12 ` Rodrigo Vivi
2024-10-28 19:17 ` Matt Roper
2024-10-25 20:53 ` ✓ CI.Patch_applied: success for drm/i915/xe3lpd: ptl display patches (rev5) Patchwork
2024-10-25 20:54 ` ✗ CI.checkpatch: warning " Patchwork
2024-10-25 20:55 ` ✓ CI.KUnit: success " Patchwork
2024-10-25 21:12 ` ✓ CI.Build: " Patchwork
2024-10-25 21:16 ` ✓ CI.Hooks: " Patchwork
2024-10-25 21:18 ` ✗ CI.checksparse: warning " Patchwork
2024-10-25 22:09 ` ✗ CI.BAT: failure " Patchwork
2024-10-27 12:20 ` ✗ CI.FULL: " Patchwork
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