* [v2 00/25] Plane Color Pipeline support for Intel platforms
@ 2024-11-26 13:27 Uma Shankar
2024-11-26 13:27 ` [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
` (32 more replies)
0 siblings, 33 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar, Pekka Paalanen,
Shashank Sharma, Alexander Goins, Joshua Ashton,
Michel Dänzer, Aleix Pol, Xaver Hugl, Victoria Brekenfeld,
Sima, Naseer Ahmed, Christopher Braga, Abhinav Kumar,
Arthur Grillo, Hector Martin, Liviu Dudau, Sasha McIntosh,
Chaitanya Kumar Borah
This series intends to add support for Plane Color Management for
Intel platforms. This is based on the design which has been agreed
upon by the community. Series implementing the design for generic
DRM core has been sent out by Harry Wentland and is under review
below:
https://patchwork.freedesktop.org/series/123446/
The base work of above series is squashed under 1 patch and support
for Intel platform is added on top of it.
Any reviews on the original core design is expected to be done in
Harry's series to avoid any forking of the discussion.
Changes added on core design:
1. Implemented a HW capability property to expose segmented luts.
drm: Add Color lut range attributes
drm: Add Color ops capability property
drm: Define helper to create color ops capability property
drm: Define helper for adding capability property for 1D LUT MULTSEG
This helps in generically defining the hardware lut capabilities,
lut distribution, precision, segmented or PWL LUTS.
2. Added support for enhanced prescision, 3x3 matrix and 1d LUT:
drm: Add Enhanced LUT precision structure
drm: Add support for 3x3 CTM
drm: Add 1D LUT color op
On top of this base work for DRM core plane color pipeline design,
implementation is done for Intel hardware platforms. Below patches
include the same:
drm/i915: Add identifiers for intel color blocks
drm/i915: Add intel_color_op
drm/i915/color: Add helper to allocate intel colorop
drm/i915/color: Add helper to create intel colorop
drm/i915/color: Create a transfer function color pipeline
drm/i915/color: Add and attach COLORPIPELINE plane property
drm/i915/color: Add framework to set colorop
drm/i915/color: Add callbacks to set plane CTM
drm/i915/color: Add framework to program PRE/POST CSC LUT
drm/i915/color: Enable Plane Color Pipelines
drm/i915: Define segmented Lut and add capabilities to colorop
drm/i915/color: Add plane CTM callback for TGL and beyond
drm/i915: Add register definitions for Plane Degamma
drm/i915: Add register definitions for Plane Post CSC
drm/i915/color: Program Pre-CSC registers
drm/i915/xelpd: Program Plane Post CSC Registers
IGT Changes to validate the same have been implemented and can be found
in the below github repository:
https://github.com/ckborah/igt-sandbox/tree/amd-intel-color-pipeline-v5-new_seg
Changes in v2:
- Added documentation for hardware capability detection for segmented luts
- Added documentation for lut computation in userspace based on
hardware caps
- Updated drm_color_lut_range data structure and handling
- Enhanced the structure to avoid ambiguity and cater to varying
hardware implementations of 1D Lut blocks
- replaced drm_color_lut_ext with drm_color_lut32
- Changed namespace for drm_color_lut_range flags (Sebastien)
- Program super fine post csc gamma lut segment for Intel hardware
ToDo:
- Implement Checks for sanity of hardware capability structure
- Implement and Enhance Checks for user data for Lut Blob
- Implement post blending color API's
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Pekka Paalanen <pekka.paalanen@collabora.com>
Cc: Simon Ser <contact@emersion.fr>
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Melissa Wen <mwen@igalia.com>
Cc: Jonas Ådahl <jadahl@redhat.com>
Cc: Sebastian Wick <sebastian.wick@redhat.com>
Cc: Shashank Sharma <shashank.sharma@amd.com>
Cc: Alexander Goins <agoins@nvidia.com>
Cc: Joshua Ashton <joshua@froggi.es>
Cc: Michel Dänzer <mdaenzer@redhat.com>
Cc: Aleix Pol <aleixpol@kde.org>
Cc: Xaver Hugl <xaver.hugl@gmail.com>
Cc: Victoria Brekenfeld <victoria@system76.com>
Cc: Sima <daniel@ffwll.ch>
Cc: Naseer Ahmed <quic_naseer@quicinc.com>
Cc: Christopher Braga <quic_cbraga@quicinc.com>
Cc: Abhinav Kumar <quic_abhinavk@quicinc.com>
Cc: Arthur Grillo <arthurgrillo@riseup.net>
Cc: Hector Martin <marcan@marcan.st>
Cc: Liviu Dudau <Liviu.Dudau@arm.com>
Cc: Sasha McIntosh <sashamcintosh@google.com>
Cc: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Chaitanya Kumar Borah (13):
drm: Add support for 3x3 CTM
drm: Add 1D LUT multi-segmented color op
drm: Add helper to initialize segmented 1D LUT
drm/i915: Add identifiers for intel color blocks
drm/i915: Add intel_color_op
drm/i915/color: Add helper to create intel colorop
drm/i915/color: Create a transfer function color pipeline
drm/i915/color: Add and attach COLORPIPELINE plane property
drm/i915/color: Add framework to set colorop
drm/i915/color: Add callbacks to set plane CTM
drm/i915/color: Add new color callbacks for Xelpd
drm/i915/color: Add framework to program PRE/POST CSC LUT
drm/i915/color: Enable Plane Color Pipelines
Harry Wentland (1):
[NOT FOR REVIEW] drm: color pipeline base work
Uma Shankar (11):
drm: Add Enhanced LUT precision structure
drm: Add Color lut range attributes
drm: Add Color ops capability property
drm: Define helper to create color ops capability property
drm: Define helper for adding capability property for 1D LUT MULTSEG
drm/i915/color: Add plane CTM callback for D13 and beyond
drm/i915: Add register definitions for Plane Degamma
drm/i915: Add register definitions for Plane Post CSC
drm/i915/color: Program Pre-CSC registers
drm/i915/xelpd: Program Plane Post CSC Registers
drm/doc/rfc: Add documentation for multi-segmented 1D LUT
Documentation/gpu/drm-kms.rst | 15 +
Documentation/gpu/rfc/color_pipeline.rst | 516 +++++++++++
Documentation/gpu/rfc/index.rst | 3 +
drivers/gpu/drm/Makefile | 1 +
.../gpu/drm/amd/display/amdgpu_dm/Makefile | 3 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 581 ++++++++++++-
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 216 +++++
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.h | 36 +
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 32 +
drivers/gpu/drm/drm_atomic.c | 191 ++++-
drivers/gpu/drm/drm_atomic_helper.c | 12 +
drivers/gpu/drm/drm_atomic_state_helper.c | 5 +
drivers/gpu/drm/drm_atomic_uapi.c | 184 ++++
drivers/gpu/drm/drm_color_mgmt.c | 43 +
drivers/gpu/drm/drm_colorop.c | 662 +++++++++++++++
drivers/gpu/drm/drm_ioctl.c | 7 +
drivers/gpu/drm/drm_mode_config.c | 7 +
drivers/gpu/drm/drm_plane.c | 52 ++
drivers/gpu/drm/i915/display/intel_color.c | 628 +++++++++++++-
drivers/gpu/drm/i915/display/intel_color.h | 16 +
.../drm/i915/display/intel_display_limits.h | 13 +
.../drm/i915/display/intel_display_types.h | 19 +
.../drm/i915/display/skl_universal_plane.c | 5 +
.../i915/display/skl_universal_plane_regs.h | 126 +++
drivers/gpu/drm/tests/Makefile | 3 +-
drivers/gpu/drm/tests/drm_fixp_test.c | 70 ++
drivers/gpu/drm/vkms/Kconfig | 15 +
drivers/gpu/drm/vkms/Makefile | 5 +-
drivers/gpu/drm/vkms/tests/.kunitconfig | 4 +
drivers/gpu/drm/vkms/tests/Makefile | 3 +
drivers/gpu/drm/vkms/tests/vkms_color_test.c | 454 ++++++++++
drivers/gpu/drm/vkms/vkms_colorop.c | 113 +++
drivers/gpu/drm/vkms/vkms_composer.c | 128 ++-
drivers/gpu/drm/vkms/vkms_composer.h | 27 +
drivers/gpu/drm/vkms/vkms_drv.h | 8 +
drivers/gpu/drm/vkms/vkms_luts.c | 802 ++++++++++++++++++
drivers/gpu/drm/vkms/vkms_luts.h | 12 +
drivers/gpu/drm/vkms/vkms_plane.c | 2 +
include/drm/drm_atomic.h | 130 +++
include/drm/drm_atomic_uapi.h | 3 +
include/drm/drm_color_mgmt.h | 13 +
include/drm/drm_colorop.h | 459 ++++++++++
include/drm/drm_file.h | 7 +
include/drm/drm_fixed.h | 18 +
include/drm/drm_mode_config.h | 18 +
include/drm/drm_plane.h | 19 +
include/uapi/drm/amdgpu_drm.h | 9 -
include/uapi/drm/drm.h | 16 +
include/uapi/drm/drm_mode.h | 253 ++++++
50 files changed, 5919 insertions(+), 49 deletions(-)
create mode 100644 Documentation/gpu/rfc/color_pipeline.rst
create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h
create mode 100644 drivers/gpu/drm/drm_colorop.c
create mode 100644 drivers/gpu/drm/tests/drm_fixp_test.c
create mode 100644 drivers/gpu/drm/vkms/tests/.kunitconfig
create mode 100644 drivers/gpu/drm/vkms/tests/Makefile
create mode 100644 drivers/gpu/drm/vkms/tests/vkms_color_test.c
create mode 100644 drivers/gpu/drm/vkms/vkms_colorop.c
create mode 100644 drivers/gpu/drm/vkms/vkms_composer.h
create mode 100644 drivers/gpu/drm/vkms/vkms_luts.c
create mode 100644 drivers/gpu/drm/vkms/vkms_luts.h
create mode 100644 include/drm/drm_colorop.h
--
2.42.0
^ permalink raw reply [flat|nested] 43+ messages in thread
* [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 02/25] drm: Add support for 3x3 CTM Uma Shankar
` (31 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar
From: Harry Wentland <harry.wentland@amd.com>
This is a squashed patch based on a series sent out by Harry wentland.
It contains all the changes in the series(v6) currently under review
below.
https://patchwork.freedesktop.org/series/123446/#rev6
This patch lays the ground work for incremental changes and Intel
specific pipeline changes.
NOTE: This patch is not meant for review. Any review related to this
patch should be done on the original series. In order not to diverge
the discussion from the main series.
---
Documentation/gpu/drm-kms.rst | 15 +
Documentation/gpu/rfc/color_pipeline.rst | 376 ++++++++
Documentation/gpu/rfc/index.rst | 3 +
drivers/gpu/drm/Makefile | 1 +
.../gpu/drm/amd/display/amdgpu_dm/Makefile | 3 +-
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 4 +
.../amd/display/amdgpu_dm/amdgpu_dm_color.c | 581 ++++++++++++-
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.c | 216 +++++
.../amd/display/amdgpu_dm/amdgpu_dm_colorop.h | 36 +
.../amd/display/amdgpu_dm/amdgpu_dm_plane.c | 32 +
drivers/gpu/drm/drm_atomic.c | 184 +++-
drivers/gpu/drm/drm_atomic_helper.c | 12 +
drivers/gpu/drm/drm_atomic_state_helper.c | 5 +
drivers/gpu/drm/drm_atomic_uapi.c | 175 ++++
drivers/gpu/drm/drm_colorop.c | 565 ++++++++++++
drivers/gpu/drm/drm_ioctl.c | 7 +
drivers/gpu/drm/drm_mode_config.c | 7 +
drivers/gpu/drm/drm_plane.c | 52 ++
drivers/gpu/drm/tests/Makefile | 3 +-
drivers/gpu/drm/tests/drm_fixp_test.c | 70 ++
drivers/gpu/drm/vkms/Kconfig | 15 +
drivers/gpu/drm/vkms/Makefile | 5 +-
drivers/gpu/drm/vkms/tests/.kunitconfig | 4 +
drivers/gpu/drm/vkms/tests/Makefile | 3 +
drivers/gpu/drm/vkms/tests/vkms_color_test.c | 454 ++++++++++
drivers/gpu/drm/vkms/vkms_colorop.c | 113 +++
drivers/gpu/drm/vkms/vkms_composer.c | 128 ++-
drivers/gpu/drm/vkms/vkms_composer.h | 27 +
drivers/gpu/drm/vkms/vkms_drv.h | 8 +
drivers/gpu/drm/vkms/vkms_luts.c | 802 ++++++++++++++++++
drivers/gpu/drm/vkms/vkms_luts.h | 12 +
drivers/gpu/drm/vkms/vkms_plane.c | 2 +
include/drm/drm_atomic.h | 130 +++
include/drm/drm_atomic_uapi.h | 3 +
include/drm/drm_colorop.h | 441 ++++++++++
include/drm/drm_file.h | 7 +
include/drm/drm_fixed.h | 18 +
include/drm/drm_mode_config.h | 18 +
include/drm/drm_plane.h | 19 +
include/uapi/drm/amdgpu_drm.h | 9 -
include/uapi/drm/drm.h | 16 +
include/uapi/drm/drm_mode.h | 155 ++++
42 files changed, 4688 insertions(+), 48 deletions(-)
create mode 100644 Documentation/gpu/rfc/color_pipeline.rst
create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
create mode 100644 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h
create mode 100644 drivers/gpu/drm/drm_colorop.c
create mode 100644 drivers/gpu/drm/tests/drm_fixp_test.c
create mode 100644 drivers/gpu/drm/vkms/tests/.kunitconfig
create mode 100644 drivers/gpu/drm/vkms/tests/Makefile
create mode 100644 drivers/gpu/drm/vkms/tests/vkms_color_test.c
create mode 100644 drivers/gpu/drm/vkms/vkms_colorop.c
create mode 100644 drivers/gpu/drm/vkms/vkms_composer.h
create mode 100644 drivers/gpu/drm/vkms/vkms_luts.c
create mode 100644 drivers/gpu/drm/vkms/vkms_luts.h
create mode 100644 include/drm/drm_colorop.h
diff --git a/Documentation/gpu/drm-kms.rst b/Documentation/gpu/drm-kms.rst
index abfe220764e1..2292e65f044c 100644
--- a/Documentation/gpu/drm-kms.rst
+++ b/Documentation/gpu/drm-kms.rst
@@ -413,6 +413,21 @@ Plane Panic Functions Reference
.. kernel-doc:: drivers/gpu/drm/drm_panic.c
:export:
+Colorop Abstraction
+===================
+
+.. kernel-doc:: drivers/gpu/drm/drm_colorop.c
+ :doc: overview
+
+Colorop Functions Reference
+---------------------------
+
+.. kernel-doc:: include/drm/drm_colorop.h
+ :internal:
+
+.. kernel-doc:: drivers/gpu/drm/drm_colorop.c
+ :export:
+
Display Modes Function Reference
================================
diff --git a/Documentation/gpu/rfc/color_pipeline.rst b/Documentation/gpu/rfc/color_pipeline.rst
new file mode 100644
index 000000000000..4135f07b85a7
--- /dev/null
+++ b/Documentation/gpu/rfc/color_pipeline.rst
@@ -0,0 +1,376 @@
+========================
+Linux Color Pipeline API
+========================
+
+What problem are we solving?
+============================
+
+We would like to support pre-, and post-blending complex color
+transformations in display controller hardware in order to allow for
+HW-supported HDR use-cases, as well as to provide support to
+color-managed applications, such as video or image editors.
+
+It is possible to support an HDR output on HW supporting the Colorspace
+and HDR Metadata drm_connector properties, but that requires the
+compositor or application to render and compose the content into one
+final buffer intended for display. Doing so is costly.
+
+Most modern display HW offers various 1D LUTs, 3D LUTs, matrices, and other
+operations to support color transformations. These operations are often
+implemented in fixed-function HW and therefore much more power efficient than
+performing similar operations via shaders or CPU.
+
+We would like to make use of this HW functionality to support complex color
+transformations with no, or minimal CPU or shader load.
+
+
+How are other OSes solving this problem?
+========================================
+
+The most widely supported use-cases regard HDR content, whether video or
+gaming.
+
+Most OSes will specify the source content format (color gamut, encoding transfer
+function, and other metadata, such as max and average light levels) to a driver.
+Drivers will then program their fixed-function HW accordingly to map from a
+source content buffer's space to a display's space.
+
+When fixed-function HW is not available the compositor will assemble a shader to
+ask the GPU to perform the transformation from the source content format to the
+display's format.
+
+A compositor's mapping function and a driver's mapping function are usually
+entirely separate concepts. On OSes where a HW vendor has no insight into
+closed-source compositor code such a vendor will tune their color management
+code to visually match the compositor's. On other OSes, where both mapping
+functions are open to an implementer they will ensure both mappings match.
+
+This results in mapping algorithm lock-in, meaning that no-one alone can
+experiment with or introduce new mapping algorithms and achieve
+consistent results regardless of which implementation path is taken.
+
+Why is Linux different?
+=======================
+
+Unlike other OSes, where there is one compositor for one or more drivers, on
+Linux we have a many-to-many relationship. Many compositors; many drivers.
+In addition each compositor vendor or community has their own view of how
+color management should be done. This is what makes Linux so beautiful.
+
+This means that a HW vendor can now no longer tune their driver to one
+compositor, as tuning it to one could make it look fairly different from
+another compositor's color mapping.
+
+We need a better solution.
+
+
+Descriptive API
+===============
+
+An API that describes the source and destination colorspaces is a descriptive
+API. It describes the input and output color spaces but does not describe
+how precisely they should be mapped. Such a mapping includes many minute
+design decision that can greatly affect the look of the final result.
+
+It is not feasible to describe such mapping with enough detail to ensure the
+same result from each implementation. In fact, these mappings are a very active
+research area.
+
+
+Prescriptive API
+================
+
+A prescriptive API describes not the source and destination colorspaces. It
+instead prescribes a recipe for how to manipulate pixel values to arrive at the
+desired outcome.
+
+This recipe is generally an ordered list of straight-forward operations,
+with clear mathematical definitions, such as 1D LUTs, 3D LUTs, matrices,
+or other operations that can be described in a precise manner.
+
+
+The Color Pipeline API
+======================
+
+HW color management pipelines can significantly differ between HW
+vendors in terms of availability, ordering, and capabilities of HW
+blocks. This makes a common definition of color management blocks and
+their ordering nigh impossible. Instead we are defining an API that
+allows user space to discover the HW capabilities in a generic manner,
+agnostic of specific drivers and hardware.
+
+
+drm_colorop Object
+==================
+
+To support the definition of color pipelines we define the DRM core
+object type drm_colorop. Individual drm_colorop objects will be chained
+via the NEXT property of a drm_colorop to constitute a color pipeline.
+Each drm_colorop object is unique, i.e., even if multiple color
+pipelines have the same operation they won't share the same drm_colorop
+object to describe that operation.
+
+Note that drivers are not expected to map drm_colorop objects statically
+to specific HW blocks. The mapping of drm_colorop objects is entirely a
+driver-internal detail and can be as dynamic or static as a driver needs
+it to be. See more in the Driver Implementation Guide section below.
+
+Each drm_colorop has three core properties:
+
+TYPE: An enumeration property, definint the type of transformation, such as
+* enumerated curve
+* custom (uniform) 1D LUT
+* 3x3 matrix
+* 3x4 matrix
+* 3D LUT
+* etc.
+
+Depending on the type of transformation other properties will describe
+more details.
+
+BYPASS: A boolean property that can be used to easily put a block into
+bypass mode. The BYPASS property is not mandatory for a colorop, as long
+as the entire pipeline can get bypassed by setting the COLOR_PIPELINE on
+a plane to '0'.
+
+NEXT: The ID of the next drm_colorop in a color pipeline, or 0 if this
+drm_colorop is the last in the chain.
+
+An example of a drm_colorop object might look like one of these::
+
+ /* 1D enumerated curve */
+ Color operation 42
+ ├─ "TYPE": immutable enum {1D enumerated curve, 1D LUT, 3x3 matrix, 3x4 matrix, 3D LUT, etc.} = 1D enumerated curve
+ ├─ "BYPASS": bool {true, false}
+ ├─ "CURVE_1D_TYPE": enum {sRGB EOTF, sRGB inverse EOTF, PQ EOTF, PQ inverse EOTF, …}
+ └─ "NEXT": immutable color operation ID = 43
+
+ /* custom 4k entry 1D LUT */
+ Color operation 52
+ ├─ "TYPE": immutable enum {1D enumerated curve, 1D LUT, 3x3 matrix, 3x4 matrix, 3D LUT, etc.} = 1D LUT
+ ├─ "BYPASS": bool {true, false}
+ ├─ "SIZE": immutable range = 4096
+ ├─ "DATA": blob
+ └─ "NEXT": immutable color operation ID = 0
+
+ /* 17^3 3D LUT */
+ Color operation 72
+ ├─ "TYPE": immutable enum {1D enumerated curve, 1D LUT, 3x3 matrix, 3x4 matrix, 3D LUT, etc.} = 3D LUT
+ ├─ "BYPASS": bool {true, false}
+ ├─ "3DLUT_MODES": read-only blob of supported 3DLUT modes
+ ├─ "3DLUT_MODE_INDEX": index of selected 3DLUT mode
+ ├─ "DATA": blob
+ └─ "NEXT": immutable color operation ID = 73
+
+drm_colorop extensibility
+-------------------------
+
+Unlike existing DRM core objects, like &drm_plane, drm_colorop is not
+extensible. This simplifies implementations and keeps all functionality
+for managing &drm_colorop objects in the DRM core.
+
+If there is a need one may introduce a simple &drm_colorop_funcs
+function table in the future, for example to support an IN_FORMATS
+property on a &drm_colorop.
+
+If a driver requires the ability to create a driver-specific colorop
+object they will need to add &drm_colorop func table support with
+support for the usual functions, like destroy, atomic_duplicate_state,
+and atomic_destroy_state.
+
+
+COLOR_PIPELINE Plane Property
+=============================
+
+Color Pipelines are created by a driver and advertised via a new
+COLOR_PIPELINE enum property on each plane. Values of the property
+always include object id 0, which is the default and means all color
+processing is disabled. Additional values will be the object IDs of the
+first drm_colorop in a pipeline. A driver can create and advertise none,
+one, or more possible color pipelines. A DRM client will select a color
+pipeline by setting the COLOR PIPELINE to the respective value.
+
+NOTE: Many DRM clients will set enumeration properties via the string
+value, often hard-coding it. Since this enumeration is generated based
+on the colorop object IDs it is important to perform the Color Pipeline
+Discovery, described below, instead of hard-coding color pipeline
+assignment. Drivers might generate the enum strings dynamically.
+Hard-coded strings might only work for specific drivers on a specific
+pieces of HW. Color Pipeline Discovery can work universally, as long as
+drivers implement the required color operations.
+
+The COLOR_PIPELINE property is only exposed when the
+DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set. Drivers shall ignore any
+existing pre-blend color operations when this cap is set, such as
+COLOR_RANGE and COLOR_ENCODING. If drivers want to support COLOR_RANGE
+or COLOR_ENCODING functionality when the color pipeline client cap is
+set, they are expected to expose colorops in the pipeline to allow for
+the appropriate color transformation.
+
+Setting of the COLOR_PIPELINE plane property or drm_colorop properties
+is only allowed for userspace that sets this client cap.
+
+An example of a COLOR_PIPELINE property on a plane might look like this::
+
+ Plane 10
+ ├─ "TYPE": immutable enum {Overlay, Primary, Cursor} = Primary
+ ├─ …
+ └─ "COLOR_PIPELINE": enum {0, 42, 52} = 0
+
+
+Color Pipeline Discovery
+========================
+
+A DRM client wanting color management on a drm_plane will:
+
+1. Get the COLOR_PIPELINE property of the plane
+2. iterate all COLOR_PIPELINE enum values
+3. for each enum value walk the color pipeline (via the NEXT pointers)
+ and see if the available color operations are suitable for the
+ desired color management operations
+
+If userspace encounters an unknown or unsuitable color operation during
+discovery it does not need to reject the entire color pipeline outright,
+as long as the unknown or unsuitable colorop has a "BYPASS" property.
+Drivers will ensure that a bypassed block does not have any effect.
+
+An example of chained properties to define an AMD pre-blending color
+pipeline might look like this::
+
+ Plane 10
+ ├─ "TYPE" (immutable) = Primary
+ └─ "COLOR_PIPELINE": enum {0, 44} = 0
+
+ Color operation 44
+ ├─ "TYPE" (immutable) = 1D enumerated curve
+ ├─ "BYPASS": bool
+ ├─ "CURVE_1D_TYPE": enum {sRGB EOTF, PQ EOTF} = sRGB EOTF
+ └─ "NEXT" (immutable) = 45
+
+ Color operation 45
+ ├─ "TYPE" (immutable) = 3x4 Matrix
+ ├─ "BYPASS": bool
+ ├─ "DATA": blob
+ └─ "NEXT" (immutable) = 46
+
+ Color operation 46
+ ├─ "TYPE" (immutable) = 1D enumerated curve
+ ├─ "BYPASS": bool
+ ├─ "CURVE_1D_TYPE": enum {sRGB Inverse EOTF, PQ Inverse EOTF} = sRGB EOTF
+ └─ "NEXT" (immutable) = 47
+
+ Color operation 47
+ ├─ "TYPE" (immutable) = 1D LUT
+ ├─ "SIZE": immutable range = 4096
+ ├─ "DATA": blob
+ └─ "NEXT" (immutable) = 48
+
+ Color operation 48
+ ├─ "TYPE" (immutable) = 3D LUT
+ ├─ "3DLUT_MODE_INDEX": 0
+ ├─ "DATA": blob
+ └─ "NEXT" (immutable) = 49
+
+ Color operation 49
+ ├─ "TYPE" (immutable) = 1D enumerated curve
+ ├─ "BYPASS": bool
+ ├─ "CURVE_1D_TYPE": enum {sRGB EOTF, PQ EOTF} = sRGB EOTF
+ └─ "NEXT" (immutable) = 0
+
+
+Color Pipeline Programming
+==========================
+
+Once a DRM client has found a suitable pipeline it will:
+
+1. Set the COLOR_PIPELINE enum value to the one pointing at the first
+ drm_colorop object of the desired pipeline
+2. Set the properties for all drm_colorop objects in the pipeline to the
+ desired values, setting BYPASS to true for unused drm_colorop blocks,
+ and false for enabled drm_colorop blocks
+3. Perform (TEST_ONLY or not) atomic commit with all the other KMS
+ states it wishes to change
+
+To configure the pipeline for an HDR10 PQ plane and blending in linear
+space, a compositor might perform an atomic commit with the following
+property values::
+
+ Plane 10
+ └─ "COLOR_PIPELINE" = 42
+
+ Color operation 42
+ └─ "BYPASS" = true
+
+ Color operation 44
+ └─ "BYPASS" = true
+
+ Color operation 45
+ └─ "BYPASS" = true
+
+ Color operation 46
+ └─ "BYPASS" = true
+
+ Color operation 47
+ ├─ "LUT_3D_DATA" = Gamut mapping + tone mapping + night mode
+ └─ "BYPASS" = false
+
+ Color operation 48
+ ├─ "CURVE_1D_TYPE" = PQ EOTF
+ └─ "BYPASS" = false
+
+
+Driver Implementer's Guide
+==========================
+
+What does this all mean for driver implementations? As noted above the
+colorops can map to HW directly but don't need to do so. Here are some
+suggestions on how to think about creating your color pipelines:
+
+- Try to expose pipelines that use already defined colorops, even if
+ your hardware pipeline is split differently. This allows existing
+ userspace to immediately take advantage of the hardware.
+
+- Additionally, try to expose your actual hardware blocks as colorops.
+ Define new colorop types where you believe it can offer significant
+ benefits if userspace learns to program them.
+
+- Avoid defining new colorops for compound operations with very narrow
+ scope. If you have a hardware block for a special operation that
+ cannot be split further, you can expose that as a new colorop type.
+ However, try to not define colorops for "use cases", especially if
+ they require you to combine multiple hardware blocks.
+
+- Design new colorops as prescriptive, not descriptive; by the
+ mathematical formula, not by the assumed input and output.
+
+A defined colorop type must be deterministic. The exact behavior of the
+colorop must be documented entirely, whether via a mathematical formula
+or some other description. Its operation can depend only on its
+properties and input and nothing else, allowed error tolerance
+notwithstanding.
+
+
+Driver Forward/Backward Compatibility
+=====================================
+
+As this is uAPI drivers can't regress color pipelines that have been
+introduced for a given HW generation. New HW generations are free to
+abandon color pipelines advertised for previous generations.
+Nevertheless, it can be beneficial to carry support for existing color
+pipelines forward as those will likely already have support in DRM
+clients.
+
+Introducing new colorops to a pipeline is fine, as long as they can be
+bypassed or are purely informational. DRM clients implementing support
+for the pipeline can always skip unknown properties as long as they can
+be confident that doing so will not cause unexpected results.
+
+If a new colorop doesn't fall into one of the above categories
+(bypassable or informational) the modified pipeline would be unusable
+for user space. In this case a new pipeline should be defined.
+
+
+References
+==========
+
+1. https://lore.kernel.org/dri-devel/QMers3awXvNCQlyhWdTtsPwkp5ie9bze_hD5nAccFW7a_RXlWjYB7MoUW_8CKLT2bSQwIXVi5H6VULYIxCdgvryZoAoJnC5lZgyK1QWn488=@emersion.fr/
\ No newline at end of file
diff --git a/Documentation/gpu/rfc/index.rst b/Documentation/gpu/rfc/index.rst
index 476719771eef..d3726adeca6a 100644
--- a/Documentation/gpu/rfc/index.rst
+++ b/Documentation/gpu/rfc/index.rst
@@ -31,3 +31,6 @@ host such documentation:
.. toctree::
i915_vm_bind.rst
+
+.. toctree::
+ color_pipeline.rst
\ No newline at end of file
diff --git a/drivers/gpu/drm/Makefile b/drivers/gpu/drm/Makefile
index 1677c1f335fb..f37f372a7d4f 100644
--- a/drivers/gpu/drm/Makefile
+++ b/drivers/gpu/drm/Makefile
@@ -41,6 +41,7 @@ drm-y := \
drm_bridge.o \
drm_cache.o \
drm_color_mgmt.o \
+ drm_colorop.o \
drm_connector.o \
drm_crtc.o \
drm_displayid.o \
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile b/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile
index ab2a97e354da..46158d67ab12 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/Makefile
@@ -38,7 +38,8 @@ AMDGPUDM = \
amdgpu_dm_pp_smu.o \
amdgpu_dm_psr.o \
amdgpu_dm_replay.o \
- amdgpu_dm_wb.o
+ amdgpu_dm_wb.o \
+ amdgpu_dm_colorop.o
ifdef CONFIG_DRM_AMD_DC_FP
AMDGPUDM += dc_fpu.o
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 19a58630e774..aaa277954b25 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -5485,6 +5485,10 @@ fill_plane_color_attributes(const struct drm_plane_state *plane_state,
*color_space = COLOR_SPACE_SRGB;
+ /* Ignore properties when DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set */
+ if (plane_state->state && plane_state->state->plane_color_pipeline)
+ return 0;
+
/* DRM color properties only affect non-RGB formats. */
if (format < SURFACE_PIXEL_FORMAT_VIDEO_BEGIN)
return 0;
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index ebabfe3a512f..8c5d91556462 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -25,6 +25,7 @@
#include "amdgpu.h"
#include "amdgpu_mode.h"
#include "amdgpu_dm.h"
+#include "amdgpu_dm_colorop.h"
#include "dc.h"
#include "modules/color/color_gamma.h"
#include "basics/conversion.h"
@@ -32,6 +33,32 @@
/**
* DOC: overview
*
+ * We have three types of color management in the AMD display driver.
+ * 1. the legacy &drm_crtc DEGAMMA, CTM, and GAMMA properties
+ * 2. AMD driver private color management on &drm_plane and &drm_crtc
+ * 3. AMD plane color pipeline
+ *
+ * The CRTC properties are the original color management. When they were
+ * implemented per-plane color management was not a thing yet. Because
+ * of that we could get away with plumbing the DEGAMMA and CTM
+ * properties to pre-blending HW functions. This is incompatible with
+ * per-plane color management, such as via the AMD private properties or
+ * the new drm_plane color pipeline. The only compatible CRTC property
+ * with per-plane color management is the GAMMA property as it is
+ * applied post-blending.
+ *
+ * The AMD driver private color management properties are only exposed
+ * when the kernel is built explicitly with -DAMD_PRIVATE_COLOR. They
+ * are temporary building blocks on the path to full-fledged &drm_plane
+ * and &drm_crtc color pipelines and lay the driver's groundwork for the
+ * color pipelines.
+ *
+ * The AMD plane color pipeline describes AMD's &drm_colorops via the
+ * &drm_plane's COLOR_PIPELINE property.
+ *
+ * drm_crtc Properties
+ * -------------------
+ *
* The DC interface to HW gives us the following color management blocks
* per pipe (surface):
*
@@ -42,33 +69,89 @@
* - Surface regamma LUT (normalized)
* - Output CSC (normalized)
*
- * But these aren't a direct mapping to DRM color properties. The current DRM
- * interface exposes CRTC degamma, CRTC CTM and CRTC regamma while our hardware
- * is essentially giving:
+ * But these aren't a direct mapping to DRM color properties. The
+ * current DRM interface exposes CRTC degamma, CRTC CTM and CRTC regamma
+ * while our hardware is essentially giving:
*
* Plane CTM -> Plane degamma -> Plane CTM -> Plane regamma -> Plane CTM
*
- * The input gamma LUT block isn't really applicable here since it operates
- * on the actual input data itself rather than the HW fp representation. The
- * input and output CSC blocks are technically available to use as part of
- * the DC interface but are typically used internally by DC for conversions
- * between color spaces. These could be blended together with user
- * adjustments in the future but for now these should remain untouched.
+ * The input gamma LUT block isn't really applicable here since it
+ * operates on the actual input data itself rather than the HW fp
+ * representation. The input and output CSC blocks are technically
+ * available to use as part of the DC interface but are typically used
+ * internally by DC for conversions between color spaces. These could be
+ * blended together with user adjustments in the future but for now
+ * these should remain untouched.
+ *
+ * The pipe blending also happens after these blocks so we don't
+ * actually support any CRTC props with correct blending with multiple
+ * planes - but we can still support CRTC color management properties in
+ * DM in most single plane cases correctly with clever management of the
+ * DC interface in DM.
+ *
+ * As per DRM documentation, blocks should be in hardware bypass when
+ * their respective property is set to NULL. A linear DGM/RGM LUT should
+ * also considered as putting the respective block into bypass mode.
+ *
+ * This means that the following configuration is assumed to be the
+ * default:
+ *
+ * Plane DGM Bypass -> Plane CTM Bypass -> Plane RGM Bypass -> ... CRTC
+ * DGM Bypass -> CRTC CTM Bypass -> CRTC RGM Bypass
+ *
+ * AMD Private Color Management on drm_plane
+ * -----------------------------------------
+ *
+ * The AMD private color management properties on a &drm_plane are:
+ *
+ * - AMD_PLANE_DEGAMMA_LUT
+ * - AMD_PLANE_DEGAMMA_LUT_SIZE
+ * - AMD_PLANE_DEGAMMA_TF
+ * - AMD_PLANE_HDR_MULT
+ * - AMD_PLANE_CTM
+ * - AMD_PLANE_SHAPER_LUT
+ * - AMD_PLANE_SHAPER_LUT_SIZE
+ * - AMD_PLANE_SHAPER_TF
+ * - AMD_PLANE_LUT3D
+ * - AMD_PLANE_LUT3D_SIZE
+ * - AMD_PLANE_BLEND_LUT
+ * - AMD_PLANE_BLEND_LUT_SIZE
+ * - AMD_PLANE_BLEND_TF
*
- * The pipe blending also happens after these blocks so we don't actually
- * support any CRTC props with correct blending with multiple planes - but we
- * can still support CRTC color management properties in DM in most single
- * plane cases correctly with clever management of the DC interface in DM.
+ * The AMD private color management property on a &drm_crtc is:
*
- * As per DRM documentation, blocks should be in hardware bypass when their
- * respective property is set to NULL. A linear DGM/RGM LUT should also
- * considered as putting the respective block into bypass mode.
+ * - AMD_CRTC_REGAMMA_TF
*
- * This means that the following
- * configuration is assumed to be the default:
+ * Use of these properties is discouraged.
+ *
+ * AMD plane color pipeline
+ * ------------------------
+ *
+ * The AMD &drm_plane color pipeline is advertised for DCN generations
+ * 3.0 and newer. It exposes these elements in this order:
+ *
+ * 1. 1D curve colorop
+ * 2. Multiplier
+ * 3. 3x4 CTM
+ * 4. 1D curve colorop
+ * 5. 1D LUT
+ * 6. 3D LUT
+ * 7. 1D curve colorop
+ * 8. 1D LUT
+ *
+ * The multiplier (#2) is a simple multiplier that is applied to all
+ * channels.
+ *
+ * The 3x4 CTM (#3) is a simple 3x4 matrix.
+ *
+ * #1, and #7 are non-linear to linear curves. #4 is a linear to
+ * non-linear curve. They support sRGB, PQ, and BT.709/BT.2020 EOTFs or
+ * their inverse.
+ *
+ * The 1D LUTs (#5 and #8) are plain 4096 entry LUTs.
+ *
+ * The 3DLUT (#6) is a tetrahedrally interpolated 17 cube LUT.
*
- * Plane DGM Bypass -> Plane CTM Bypass -> Plane RGM Bypass -> ...
- * CRTC DGM Bypass -> CRTC CTM Bypass -> CRTC RGM Bypass
*/
#define MAX_DRM_LUT_VALUE 0xFFFF
@@ -668,6 +751,25 @@ amdgpu_tf_to_dc_tf(enum amdgpu_transfer_function tf)
}
}
+static enum dc_transfer_func_predefined
+amdgpu_colorop_tf_to_dc_tf(enum drm_colorop_curve_1d_type tf)
+{
+ switch (tf)
+ {
+ case DRM_COLOROP_1D_CURVE_SRGB_EOTF:
+ case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF:
+ return TRANSFER_FUNCTION_SRGB;
+ case DRM_COLOROP_1D_CURVE_BT2020_INV_OETF:
+ case DRM_COLOROP_1D_CURVE_BT2020_OETF:
+ return TRANSFER_FUNCTION_BT709;
+ case DRM_COLOROP_1D_CURVE_PQ_125_EOTF:
+ case DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF:
+ return TRANSFER_FUNCTION_PQ;
+ default:
+ return TRANSFER_FUNCTION_LINEAR;;
+ }
+}
+
static void __to_dc_lut3d_color(struct dc_rgb *rgb,
const struct drm_color_lut lut,
int bit_precision)
@@ -1137,6 +1239,356 @@ __set_dm_plane_degamma(struct drm_plane_state *plane_state,
return 0;
}
+static int
+__set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state,
+ struct drm_colorop_state *colorop_state)
+{
+ struct dc_transfer_func *tf = &dc_plane_state->in_transfer_func;
+ struct drm_colorop *colorop = colorop_state->colorop;
+ struct drm_device *drm = colorop->dev;
+
+ if (colorop->type != DRM_COLOROP_1D_CURVE)
+ return -EINVAL;
+
+ if (!(BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs))
+ return -EINVAL;
+
+ if (colorop_state->bypass) {
+ tf->type = TF_TYPE_BYPASS;
+ tf->tf = TRANSFER_FUNCTION_LINEAR;
+ return 0;
+ }
+
+ drm_dbg(drm, "Degamma colorop with ID: %d\n", colorop->base.id);
+
+ tf->type = TF_TYPE_PREDEFINED;
+ tf->tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
+
+ return 0;
+}
+
+static int
+__set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state,
+ struct drm_colorop *colorop)
+{
+ struct drm_colorop *old_colorop;
+ struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+ struct drm_atomic_state *state = plane_state->state;
+ int i = 0;
+
+ old_colorop = colorop;
+
+ /* 1st op: 1d curve - degamma */
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs)) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (!colorop_state)
+ return -EINVAL;
+
+ return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state);
+}
+
+static int
+__set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state,
+ struct drm_colorop *colorop)
+{
+ struct drm_colorop *old_colorop;
+ struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+ struct drm_atomic_state *state = plane_state->state;
+ const struct drm_device *dev = colorop->dev;
+ const struct drm_property_blob *blob;
+ struct drm_color_ctm_3x4 *ctm = NULL;
+ int i = 0;
+
+ /* 3x4 matrix */
+ old_colorop = colorop;
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ new_colorop_state->colorop->type == DRM_COLOROP_CTM_3X4) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_CTM_3X4) {
+ drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id);
+ blob = colorop_state->data;
+ if (blob->length == sizeof(struct drm_color_ctm_3x4)) {
+ ctm = blob ? (struct drm_color_ctm_3x4 *) blob->data : NULL;
+ __drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
+ dc_plane_state->gamut_remap_matrix.enable_remap = true;
+ dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
+ } else
+ drm_warn(dev, "blob->length (%lu) isn't equal to drm_color_ctm_3x4 (%lu)\n",
+ blob->length, sizeof(struct drm_color_ctm_3x4));
+ }
+
+ return 0;
+}
+
+static int
+__set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state,
+ struct drm_colorop *colorop)
+{
+ struct drm_colorop *old_colorop;
+ struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+ struct drm_atomic_state *state = plane_state->state;
+ const struct drm_device *dev = colorop->dev;
+ int i = 0;
+
+ /* Multiplier */
+ old_colorop = colorop;
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ new_colorop_state->colorop->type == DRM_COLOROP_MULTIPLIER) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_MULTIPLIER) {
+ drm_dbg(dev, "Multiplier colorop with ID: %d\n", colorop->base.id);
+ dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier);
+ }
+
+ return 0;
+}
+
+static int
+__set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state,
+ struct drm_colorop *colorop,
+ bool *enabled)
+{
+ struct drm_colorop *old_colorop;
+ struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+ struct drm_atomic_state *state = plane_state->state;
+ enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR;
+ struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
+ const struct drm_color_lut *shaper_lut;
+ struct drm_device *dev = colorop->dev;
+ uint32_t shaper_size;
+ int i = 0;
+
+ /* 1D Curve - SHAPER TF */
+ old_colorop = colorop;
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE) {
+ drm_dbg(dev, "Shaper TF colorop with ID: %d\n", colorop->base.id);
+ tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+ tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
+ tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+ __set_output_tf(tf, 0, 0, false);
+ *enabled = true;
+ }
+
+ /* 1D LUT - SHAPER LUT */
+ colorop = old_colorop->next;
+ if (!colorop) {
+ drm_dbg(dev, "no Shaper LUT colorop found\n");
+ return -EINVAL;
+ }
+
+ old_colorop = colorop;
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT) {
+ drm_dbg(dev, "Shaper LUT colorop with ID: %d\n", colorop->base.id);
+ tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+ tf->tf = default_tf;
+ tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+ shaper_lut = __extract_blob_lut(colorop_state->data, &shaper_size);
+ shaper_size = shaper_lut != NULL ? shaper_size : 0;
+
+ /* Custom LUT size must be the same as supported size */
+ if (shaper_size == colorop_state->size) {
+ __set_output_tf(tf, shaper_lut, shaper_size, false);
+ *enabled = true;
+ }
+ }
+
+ return 0;
+}
+
+/* __set_colorop_3dlut - set DRM 3D LUT to DC stream
+ * @drm_lut3d: user 3D LUT
+ * @drm_lut3d_size: size of 3D LUT
+ * @drm_mode_3dlut: drm_mode selected by userspace
+ * @lut3d: DC 3D LUT
+ *
+ * Map user 3D LUT data to DC 3D LUT and all necessary bits to program it
+ * on DCN accordingly.
+ */
+static void __set_colorop_3dlut(const struct drm_color_lut *drm_lut3d,
+ uint32_t drm_lut3d_size,
+ struct drm_mode_3dlut_mode *drm_mode_3dlut,
+ struct dc_3dlut *lut)
+{
+ if (!drm_lut3d_size)
+ return;
+
+ lut->state.bits.initialized = 0;
+
+ /* Only supports 17x17x17 3D LUT (12-bit) now */
+ if (drm_mode_3dlut->color_depth == 12)
+ lut->lut_3d.use_12bits = true;
+ else
+ return;
+
+ if (drm_mode_3dlut->lut_size == 17)
+ lut->lut_3d.use_tetrahedral_9 = false;
+ else
+ return;
+
+ lut->state.bits.initialized = 1;
+ __drm_3dlut_to_dc_3dlut(drm_lut3d, drm_lut3d_size, &lut->lut_3d,
+ lut->lut_3d.use_tetrahedral_9,
+ drm_mode_3dlut->color_depth);
+
+}
+
+static int
+__set_dm_plane_colorop_3dlut(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state,
+ struct drm_colorop *colorop,
+ bool shaper_enabled)
+{
+ struct drm_colorop *old_colorop;
+ struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+ struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
+ struct drm_atomic_state *state = plane_state->state;
+ const struct amdgpu_device *adev = drm_to_adev(colorop->dev);
+ const struct drm_device *dev = colorop->dev;
+ struct drm_mode_3dlut_mode *mode;
+ const struct drm_color_lut *lut3d;
+ uint32_t lut3d_size, index;
+ int i = 0;
+
+ /* 3D LUT */
+ old_colorop = colorop;
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ new_colorop_state->colorop->type == DRM_COLOROP_3D_LUT) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_3D_LUT) {
+ if (!adev->dm.dc->caps.color.dpp.hw_3d_lut) {
+ drm_dbg(dev, "3D LUT is not supported by hardware\n");
+ return 0;
+ }
+
+ drm_dbg(dev, "3D LUT colorop with ID: %d\n", colorop->base.id);
+ mode = (struct drm_mode_3dlut_mode *) colorop_state->lut_3d_modes->data;
+ index = colorop_state->lut_3d_mode_index;
+ lut3d = __extract_blob_lut(colorop_state->data, &lut3d_size);
+ lut3d_size = lut3d != NULL ? lut3d_size : 0;
+ __set_colorop_3dlut(lut3d, lut3d_size, &mode[index], &dc_plane_state->lut3d_func);
+
+ /* 3D LUT requires shaper. If shaper colorop is bypassed, enable shaper curve
+ * with TRANSFER_FUNCTION_LINEAR
+ */
+ if (!shaper_enabled) {
+ tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+ tf->tf = TRANSFER_FUNCTION_LINEAR;
+ tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+ __set_output_tf(tf, NULL, 0, false);
+ }
+ }
+
+ return 0;
+}
+
+static int
+__set_dm_plane_colorop_blend(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state,
+ struct drm_colorop *colorop)
+{
+ struct drm_colorop *old_colorop;
+ struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+ struct drm_atomic_state *state = plane_state->state;
+ enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR;
+ struct dc_transfer_func *tf = &dc_plane_state->blend_tf;
+ const struct drm_color_lut *blend_lut;
+ struct drm_device *dev = colorop->dev;
+ uint32_t blend_size;
+ int i = 0;
+
+ /* 1D Curve - BLND TF */
+ old_colorop = colorop;
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE &&
+ (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
+ drm_dbg(dev, "Blend TF colorop with ID: %d\n", colorop->base.id);
+ tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+ tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
+ tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+ __set_input_tf(NULL, tf, blend_lut, blend_size);
+ }
+
+ /* 1D Curve - BLND LUT */
+ colorop = old_colorop->next;
+ if (!colorop) {
+ drm_dbg(dev, "no Blend LUT colorop found\n");
+ return -EINVAL;
+ }
+
+ old_colorop = colorop;
+ for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+ if (new_colorop_state->colorop == old_colorop &&
+ new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) {
+ colorop_state = new_colorop_state;
+ break;
+ }
+ }
+
+ if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT &&
+ (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
+ drm_dbg(dev, "Blend LUT colorop with ID: %d\n", colorop->base.id);
+ tf->type = TF_TYPE_DISTRIBUTED_POINTS;
+ tf->tf = default_tf;
+ tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
+ blend_lut = __extract_blob_lut(colorop_state->data, &blend_size);
+ blend_size = blend_lut != NULL ? blend_size : 0;
+
+ /* Custom LUT size must be the same as supported size */
+ if (blend_size == colorop_state->size)
+ __set_input_tf(NULL, tf, blend_lut, blend_size);
+ }
+
+ return 0;
+}
+
static int
amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,
struct dc_plane_state *dc_plane_state)
@@ -1187,6 +1639,92 @@ amdgpu_dm_plane_set_color_properties(struct drm_plane_state *plane_state,
return 0;
}
+static int
+amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state)
+{
+ struct drm_colorop *colorop = plane_state->color_pipeline;
+ struct drm_device *dev = plane_state->plane->dev;
+ bool shaper_enabled = false;
+ int ret;
+
+ /* 1D Curve - DEGAM TF */
+ if (!colorop) {
+ return -EINVAL;
+ }
+
+ ret = __set_dm_plane_colorop_degamma(plane_state, dc_plane_state, colorop);
+ if (ret)
+ return ret;
+
+ /* Multiplier */
+ colorop = colorop->next;
+ if (!colorop) {
+ drm_dbg(dev, "no multiplier colorop found\n");
+ return -EINVAL;
+ }
+
+ ret = __set_dm_plane_colorop_multiplier(plane_state, dc_plane_state, colorop);
+ if (ret)
+ return ret;
+
+ /* 3x4 matrix */
+ colorop = colorop->next;
+ if (!colorop) {
+ drm_dbg(dev, "no 3x4 matrix colorop found\n");
+ return -EINVAL;
+ }
+
+ ret = __set_dm_plane_colorop_3x4_matrix(plane_state, dc_plane_state, colorop);
+ if (ret)
+ return ret;
+
+ /* 1D Curve & LUT - SHAPER TF & LUT */
+ colorop = colorop->next;
+ if (!colorop) {
+ drm_dbg(dev, "no Shaper TF colorop found\n");
+ return -EINVAL;
+ }
+
+ ret = __set_dm_plane_colorop_shaper(plane_state, dc_plane_state, colorop, &shaper_enabled);
+ if (ret)
+ return ret;
+
+ /* Shaper LUT colorop is already handled, just skip here */
+ colorop = colorop->next;
+ if (!colorop)
+ return -EINVAL;
+
+ /* 3D LUT */
+ colorop = colorop->next;
+ if (!colorop) {
+ drm_dbg(dev, "no 3D LUT colorop found\n");
+ return -EINVAL;
+ }
+
+ ret = __set_dm_plane_colorop_3dlut(plane_state, dc_plane_state, colorop, shaper_enabled);
+ if (ret)
+ return ret;
+
+ /* 1D Curve & LUT - BLND TF & LUT */
+ colorop = colorop->next;
+ if (!colorop) {
+ drm_dbg(dev, "no Blend TF colorop found\n");
+ return -EINVAL;
+ }
+
+ ret = __set_dm_plane_colorop_blend(plane_state, dc_plane_state, colorop);
+ if (ret)
+ return ret;
+
+ /* BLND LUT colorop is already handled, just skip here */
+ colorop = colorop->next;
+ if (!colorop)
+ return -EINVAL;
+
+ return 0;
+}
+
/**
* amdgpu_dm_update_plane_color_mgmt: Maps DRM color management to DC plane.
* @crtc: amdgpu_dm crtc state
@@ -1283,5 +1821,8 @@ int amdgpu_dm_update_plane_color_mgmt(struct dm_crtc_state *crtc,
dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
}
+ if (!amdgpu_dm_plane_set_colorop_properties(plane_state, dc_plane_state))
+ return 0;
+
return amdgpu_dm_plane_set_color_properties(plane_state, dc_plane_state);
}
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
new file mode 100644
index 000000000000..645b7a28445e
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c
@@ -0,0 +1,216 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2023 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#include <drm/drm_print.h>
+#include <drm/drm_plane.h>
+#include <drm/drm_property.h>
+#include <drm/drm_colorop.h>
+
+#include "amdgpu.h"
+#include "amdgpu_dm_colorop.h"
+
+const u64 amdgpu_dm_supported_degam_tfs =
+ BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
+ BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
+ BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF);
+
+const u64 amdgpu_dm_supported_shaper_tfs =
+ BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF) |
+ BIT(DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF) |
+ BIT(DRM_COLOROP_1D_CURVE_BT2020_OETF);
+
+const u64 amdgpu_dm_supported_blnd_tfs =
+ BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
+ BIT(DRM_COLOROP_1D_CURVE_PQ_125_EOTF) |
+ BIT(DRM_COLOROP_1D_CURVE_BT2020_INV_OETF);
+
+struct drm_mode_3dlut_mode lut3d_modes[] = {
+ {
+ .lut_size = 17,
+ .lut_stride = {17, 17, 17},
+ .interpolation = DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL,
+ .color_depth = 12,
+ .color_format = DRM_FORMAT_XRGB16161616,
+ .traversal_order = DRM_COLOROP_LUT3D_TRAVERSAL_RGB,
+ },
+};
+
+#define MAX_COLOR_PIPELINE_OPS 10
+
+int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)
+{
+ struct drm_colorop *ops[MAX_COLOR_PIPELINE_OPS];
+ struct drm_device *dev = plane->dev;
+ int ret;
+ int i = 0;
+
+ memset(ops, 0, sizeof(ops));
+
+ /* 1D curve - DEGAM TF */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_curve_1d_init(dev, ops[i], plane,
+ amdgpu_dm_supported_degam_tfs,
+ true);
+ if (ret)
+ goto cleanup;
+
+ list->type = ops[i]->base.id;
+ list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ops[i]->base.id);
+
+ i++;
+
+ /* Multiplier */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_mult_init(dev, ops[i], plane, true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 3x4 matrix */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_ctm_3x4_init(dev, ops[i], plane, true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 1D curve - SHAPER TF */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_curve_1d_init(dev, ops[i], plane,
+ amdgpu_dm_supported_shaper_tfs,
+ true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 1D LUT - SHAPER LUT */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES,
+ DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
+ true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 3D LUT */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_3dlut_init(dev, ops[i], plane, lut3d_modes, ARRAY_SIZE(lut3d_modes), true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 1D curve - BLND TF */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_curve_1d_init(dev, ops[i], plane,
+ amdgpu_dm_supported_blnd_tfs,
+ true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 1D LUT - BLND LUT */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_curve_1d_lut_init(dev, ops[i], plane, MAX_COLOR_LUT_ENTRIES,
+ DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
+ true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+ return 0;
+
+cleanup:
+ for (; i >= 0; i--)
+ if (ops[i])
+ kfree(ops[i]);
+
+ return ret;
+}
\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h
new file mode 100644
index 000000000000..a342c096f406
--- /dev/null
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h
@@ -0,0 +1,36 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2023 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __AMDGPU_DM_COLOROP_H__
+#define __AMDGPU_DM_COLOROP_H__
+
+extern const u64 amdgpu_dm_supported_degam_tfs;
+extern const u64 amdgpu_dm_supported_shaper_tfs;
+extern const u64 amdgpu_dm_supported_blnd_tfs;
+
+int amdgpu_dm_initialize_default_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list);
+
+#endif /* __AMDGPU_DM_COLOROP_H__*/
\ No newline at end of file
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
index 495e3cd70426..78c749ce1bd0 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c
@@ -36,6 +36,7 @@
#include "amdgpu_display.h"
#include "amdgpu_dm_trace.h"
#include "amdgpu_dm_plane.h"
+#include "amdgpu_dm_colorop.h"
#include "gc/gc_11_0_0_offset.h"
#include "gc/gc_11_0_0_sh_mask.h"
@@ -1756,6 +1757,32 @@ dm_atomic_plane_get_property(struct drm_plane *plane,
}
#endif
+#define MAX_COLOR_PIPELINES 5
+
+static int
+dm_plane_init_colorops(struct drm_plane *plane)
+{
+ struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES];
+ int len = 0;
+ int ret;
+
+ if (plane->type == DRM_PLANE_TYPE_CURSOR)
+ return 0;
+
+ /* initialize default pipeline */
+ ret = amdgpu_dm_initialize_default_pipeline(plane, &(pipelines[len]));
+ if (ret) {
+ DRM_ERROR("Failed to create color pipeline for plane %d: %d\n", plane->base.id, ret);
+ return ret;
+ }
+ len++;
+
+ /* Create COLOR_PIPELINE property and attach */
+ drm_plane_create_color_pipeline_property(plane, pipelines, len);
+
+ return 0;
+}
+
static const struct drm_plane_funcs dm_plane_funcs = {
.update_plane = drm_atomic_helper_update_plane,
.disable_plane = drm_atomic_helper_disable_plane,
@@ -1859,7 +1886,12 @@ int amdgpu_dm_plane_init(struct amdgpu_display_manager *dm,
#ifdef AMD_PRIVATE_COLOR
dm_atomic_plane_attach_color_mgmt_properties(dm, plane);
+#else
+ res = dm_plane_init_colorops(plane);
+ if (res)
+ return res;
#endif
+
/* Create (reset) the plane state */
if (plane->funcs->reset)
plane->funcs->reset(plane);
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 9ea2611770f4..3161e2ab4efc 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -42,6 +42,7 @@
#include <drm/drm_mode.h>
#include <drm/drm_print.h>
#include <drm/drm_writeback.h>
+#include <drm/drm_colorop.h>
#include "drm_crtc_internal.h"
#include "drm_internal.h"
@@ -107,6 +108,7 @@ void drm_atomic_state_default_release(struct drm_atomic_state *state)
kfree(state->connectors);
kfree(state->crtcs);
kfree(state->planes);
+ kfree(state->colorops);
kfree(state->private_objs);
}
EXPORT_SYMBOL(drm_atomic_state_default_release);
@@ -138,6 +140,10 @@ drm_atomic_state_init(struct drm_device *dev, struct drm_atomic_state *state)
sizeof(*state->planes), GFP_KERNEL);
if (!state->planes)
goto fail;
+ state->colorops = kcalloc(dev->mode_config.num_colorop,
+ sizeof(*state->colorops), GFP_KERNEL);
+ if (!state->colorops)
+ goto fail;
/*
* Because drm_atomic_state can be committed asynchronously we need our
@@ -249,6 +255,20 @@ void drm_atomic_state_default_clear(struct drm_atomic_state *state)
state->planes[i].new_state = NULL;
}
+ for (i = 0; i < config->num_colorop; i++) {
+ struct drm_colorop *colorop = state->colorops[i].ptr;
+
+ if (!colorop)
+ continue;
+
+ drm_colorop_atomic_destroy_state(colorop,
+ state->colorops[i].state);
+ state->colorops[i].ptr = NULL;
+ state->colorops[i].state = NULL;
+ state->colorops[i].old_state = NULL;
+ state->colorops[i].new_state = NULL;
+ }
+
for (i = 0; i < state->num_private_objs; i++) {
struct drm_private_obj *obj = state->private_objs[i].ptr;
@@ -568,6 +588,56 @@ drm_atomic_get_plane_state(struct drm_atomic_state *state,
}
EXPORT_SYMBOL(drm_atomic_get_plane_state);
+
+/**
+ * drm_atomic_get_colorop_state - get colorop state
+ * @state: global atomic state object
+ * @colorop: colorop to get state object for
+ *
+ * This function returns the colorop state for the given colorop, allocating it
+ * if needed. It will also grab the relevant plane lock to make sure that the
+ * state is consistent.
+ *
+ * Returns:
+ *
+ * Either the allocated state or the error code encoded into the pointer. When
+ * the error is EDEADLK then the w/w mutex code has detected a deadlock and the
+ * entire atomic sequence must be restarted. All other errors are fatal.
+ */
+struct drm_colorop_state *
+drm_atomic_get_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop)
+{
+ int ret, index = drm_colorop_index(colorop);
+ struct drm_colorop_state *colorop_state;
+
+ WARN_ON(!state->acquire_ctx);
+
+ colorop_state = drm_atomic_get_existing_colorop_state(state, colorop);
+ if (colorop_state)
+ return colorop_state;
+
+ ret = drm_modeset_lock(&colorop->plane->mutex, state->acquire_ctx);
+ if (ret)
+ return ERR_PTR(ret);
+
+ colorop_state = drm_atomic_helper_colorop_duplicate_state(colorop);
+ if (!colorop_state)
+ return ERR_PTR(-ENOMEM);
+
+ state->colorops[index].state = colorop_state;
+ state->colorops[index].ptr = colorop;
+ state->colorops[index].old_state = colorop->state;
+ state->colorops[index].new_state = colorop_state;
+ colorop_state->state = state;
+
+ drm_dbg_atomic(colorop->dev, "Added [COLOROP:%d:%d] %p state to %p\n",
+ colorop->base.id, colorop->type, colorop_state, state);
+
+ return colorop_state;
+}
+EXPORT_SYMBOL(drm_atomic_get_colorop_state);
+
static bool
plane_switching_crtc(const struct drm_plane_state *old_plane_state,
const struct drm_plane_state *new_plane_state)
@@ -707,6 +777,62 @@ static int drm_atomic_plane_check(const struct drm_plane_state *old_plane_state,
return 0;
}
+
+
+static void drm_atomic_colorop_print_state(struct drm_printer *p,
+ const struct drm_colorop_state *state)
+{
+ struct drm_colorop *colorop = state->colorop;
+ struct drm_property_blob *modes = state->lut_3d_modes;
+ struct drm_mode_3dlut_mode *mode_3dlut;
+ int i;
+
+ drm_printf(p, "colorop[%u]:\n", colorop->base.id);
+ drm_printf(p, "\ttype=%s\n", drm_get_colorop_type_name(colorop->type));
+ if (colorop->bypass_property)
+ drm_printf(p, "\tbypass=%u\n", state->bypass);
+
+ switch (colorop->type) {
+ case DRM_COLOROP_1D_CURVE:
+ drm_printf(p, "\tcurve_1d_type=%s\n",
+ drm_get_colorop_curve_1d_type_name(state->curve_1d_type));
+ break;
+ case DRM_COLOROP_1D_LUT:
+ drm_printf(p, "\tsize=%d\n", state->size);
+ drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
+ drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
+ break;
+ case DRM_COLOROP_CTM_3X4:
+ drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
+ break;
+ case DRM_COLOROP_MULTIPLIER:
+ drm_printf(p, "\tmultiplier=%llu\n", state->multiplier);
+ break;
+ case DRM_COLOROP_3D_LUT:
+ mode_3dlut = (struct drm_mode_3dlut_mode *) modes->data;
+
+ drm_printf(p, "\tlut_3d_modes blob id=%d\n", modes ? modes->base.id : 0);
+ for (i = 0; i < modes->length / sizeof(struct drm_mode_3dlut_mode); i++) {
+ drm_printf(p, "\t lut_size=%d\n", mode_3dlut[i].lut_size);
+ drm_printf(p, "\t lut_strides=%d %d %d\n", mode_3dlut[i].lut_stride[0],
+ mode_3dlut[i].lut_stride[1],
+ mode_3dlut[i].lut_stride[2]);
+ drm_printf(p, "\t interpolation=%s\n",
+ drm_get_colorop_lut3d_interpolation_name(mode_3dlut[i].interpolation));
+ drm_printf(p, "\t color_depth=%d\n", mode_3dlut[i].color_depth);
+ drm_printf(p, "\t color_format=%X\n", mode_3dlut[i].color_format);
+ drm_printf(p, "\t traversal_order=%X\n", mode_3dlut[i].traversal_order);
+ }
+ drm_printf(p, "\tlut_3d_mode_index=%d\n", state->lut_3d_mode_index);
+ drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
+ break;
+ default:
+ break;
+ }
+
+ drm_printf(p, "\tnext=%d\n", colorop->next ? colorop->next->base.id : 0);
+}
+
static void drm_atomic_plane_print_state(struct drm_printer *p,
const struct drm_plane_state *state)
{
@@ -728,7 +854,8 @@ static void drm_atomic_plane_print_state(struct drm_printer *p,
drm_printf(p, "\tcolor-range=%s\n",
drm_get_color_range_name(state->color_range));
drm_printf(p, "\tcolor_mgmt_changed=%d\n", state->color_mgmt_changed);
-
+ drm_printf(p, "\tcolor-pipeline=%d\n",
+ state->color_pipeline ? state->color_pipeline->base.id : 0);
if (plane->funcs->atomic_print_state)
plane->funcs->atomic_print_state(p, state);
}
@@ -1378,6 +1505,52 @@ drm_atomic_add_affected_planes(struct drm_atomic_state *state,
}
EXPORT_SYMBOL(drm_atomic_add_affected_planes);
+/**
+ * drm_atomic_add_affected_colorops - add colorops for plane
+ * @state: atomic state
+ * @plane: DRM plane
+ *
+ * This function walks the current configuration and adds all colorops
+ * currently used by @plane to the atomic configuration @state. This is useful
+ * when an atomic commit also needs to check all currently enabled colorop on
+ * @plane, e.g. when changing the mode. It's also useful when re-enabling a plane
+ * to avoid special code to force-enable all colorops.
+ *
+ * Since acquiring a colorop state will always also acquire the w/w mutex of the
+ * current plane for that colorop (if there is any) adding all the colorop states for
+ * a plane will not reduce parallelism of atomic updates.
+ *
+ * Returns:
+ * 0 on success or can fail with -EDEADLK or -ENOMEM. When the error is EDEADLK
+ * then the w/w mutex code has detected a deadlock and the entire atomic
+ * sequence must be restarted. All other errors are fatal.
+ */
+int
+drm_atomic_add_affected_colorops(struct drm_atomic_state *state,
+ struct drm_plane *plane)
+{
+ struct drm_colorop *colorop;
+ struct drm_colorop_state *colorop_state;
+
+ WARN_ON(!drm_atomic_get_new_plane_state(state, plane));
+
+ drm_dbg_atomic(plane->dev,
+ "Adding all current colorops for [plane:%d:%s] to %p\n",
+ plane->base.id, plane->name, state);
+
+ drm_for_each_colorop(colorop, plane->dev) {
+ if (colorop->plane != plane)
+ continue;
+
+ colorop_state = drm_atomic_get_colorop_state(state, colorop);
+ if (IS_ERR(colorop_state))
+ return PTR_ERR(colorop_state);
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_atomic_add_affected_colorops);
+
/**
* drm_atomic_check_only - check whether a given config would work
* @state: atomic configuration to check
@@ -1774,6 +1947,7 @@ static void __drm_state_dump(struct drm_device *dev, struct drm_printer *p,
bool take_locks)
{
struct drm_mode_config *config = &dev->mode_config;
+ struct drm_colorop *colorop;
struct drm_plane *plane;
struct drm_crtc *crtc;
struct drm_connector *connector;
@@ -1783,6 +1957,14 @@ static void __drm_state_dump(struct drm_device *dev, struct drm_printer *p,
if (!drm_drv_uses_atomic_modeset(dev))
return;
+ list_for_each_entry(colorop, &config->colorop_list, head) {
+ if (take_locks)
+ drm_modeset_lock(&colorop->plane->mutex, NULL);
+ drm_atomic_colorop_print_state(p, colorop->state);
+ if (take_locks)
+ drm_modeset_unlock(&colorop->plane->mutex);
+ }
+
list_for_each_entry(plane, &config->plane_list, head) {
if (take_locks)
drm_modeset_lock(&plane->mutex, NULL);
diff --git a/drivers/gpu/drm/drm_atomic_helper.c b/drivers/gpu/drm/drm_atomic_helper.c
index 5186d2114a50..d472c14511f4 100644
--- a/drivers/gpu/drm/drm_atomic_helper.c
+++ b/drivers/gpu/drm/drm_atomic_helper.c
@@ -3022,6 +3022,8 @@ int drm_atomic_helper_swap_state(struct drm_atomic_state *state,
struct drm_crtc_state *old_crtc_state, *new_crtc_state;
struct drm_plane *plane;
struct drm_plane_state *old_plane_state, *new_plane_state;
+ struct drm_colorop *colorop;
+ struct drm_colorop_state *old_colorop_state, *new_colorop_state;
struct drm_crtc_commit *commit;
struct drm_private_obj *obj;
struct drm_private_state *old_obj_state, *new_obj_state;
@@ -3099,6 +3101,16 @@ int drm_atomic_helper_swap_state(struct drm_atomic_state *state,
}
}
+ for_each_oldnew_colorop_in_state(state, colorop, old_colorop_state, new_colorop_state, i) {
+ WARN_ON(colorop->state != old_colorop_state);
+
+ old_colorop_state->state = state;
+ new_colorop_state->state = NULL;
+
+ state->colorops[i].state = old_colorop_state;
+ colorop->state = new_colorop_state;
+ }
+
drm_panic_lock(state->dev, flags);
for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {
WARN_ON(plane->state != old_plane_state);
diff --git a/drivers/gpu/drm/drm_atomic_state_helper.c b/drivers/gpu/drm/drm_atomic_state_helper.c
index 519228eb1095..d1dd082b1286 100644
--- a/drivers/gpu/drm/drm_atomic_state_helper.c
+++ b/drivers/gpu/drm/drm_atomic_state_helper.c
@@ -267,6 +267,11 @@ void __drm_atomic_helper_plane_state_reset(struct drm_plane_state *plane_state,
plane_state->color_range = val;
}
+ if (plane->color_pipeline_property) {
+ /* default is always NULL, i.e., bypass */
+ plane_state->color_pipeline = NULL;
+ }
+
if (plane->zpos_property) {
if (!drm_object_property_get_default_value(&plane->base,
plane->zpos_property,
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 370dc676e3aa..d6c71135f290 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -34,6 +34,7 @@
#include <drm/drm_drv.h>
#include <drm/drm_writeback.h>
#include <drm/drm_vblank.h>
+#include <drm/drm_colorop.h>
#include <linux/dma-fence.h>
#include <linux/uaccess.h>
@@ -255,6 +256,36 @@ drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state,
}
EXPORT_SYMBOL(drm_atomic_set_fb_for_plane);
+
+/**
+ * drm_atomic_set_colorop_for_plane - set colorop for plane
+ * @plane_state: atomic state object for the plane
+ * @colorop: colorop to use for the plane
+ *
+ * Helper function to select the color pipeline on a plane by setting
+ * it to the first drm_colorop element of the pipeline.
+ */
+void
+drm_atomic_set_colorop_for_plane(struct drm_plane_state *plane_state,
+ struct drm_colorop *colorop)
+{
+ struct drm_plane *plane = plane_state->plane;
+
+ if (colorop)
+ drm_dbg_atomic(plane->dev,
+ "Set [COLOROP:%d] for [PLANE:%d:%s] state %p\n",
+ colorop->base.id, plane->base.id, plane->name,
+ plane_state);
+ else
+ drm_dbg_atomic(plane->dev,
+ "Set [NOCOLOROP] for [PLANE:%d:%s] state %p\n",
+ plane->base.id, plane->name, plane_state);
+
+ plane_state->color_pipeline = colorop;
+}
+EXPORT_SYMBOL(drm_atomic_set_colorop_for_plane);
+
+
/**
* drm_atomic_set_crtc_for_connector - set CRTC for connector
* @conn_state: atomic state object for the connector
@@ -538,6 +569,22 @@ static int drm_atomic_plane_set_property(struct drm_plane *plane,
state->color_encoding = val;
} else if (property == plane->color_range_property) {
state->color_range = val;
+ } else if (property == plane->color_pipeline_property) {
+ if (!file_priv->plane_color_pipeline) {
+ drm_dbg_atomic(dev,
+ "Setting COLOR_PIPELINE plane property not permitted unless DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE is set\n");
+ return -EINVAL;
+ }
+
+ /* find DRM colorop object */
+ struct drm_colorop *colorop = NULL;
+ colorop = drm_colorop_find(dev, file_priv, val);
+
+ if (val && !colorop)
+ return -EACCES;
+
+ /* set it on drm_plane_state */
+ drm_atomic_set_colorop_for_plane(state, colorop);
} else if (property == config->prop_fb_damage_clips) {
ret = drm_property_replace_blob_from_id(dev,
&state->fb_damage_clips,
@@ -620,6 +667,8 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
*val = state->color_encoding;
} else if (property == plane->color_range_property) {
*val = state->color_range;
+ } else if (property == plane->color_pipeline_property) {
+ *val = (state->color_pipeline) ? state->color_pipeline->base.id : 0;
} else if (property == config->prop_fb_damage_clips) {
*val = (state->fb_damage_clips) ?
state->fb_damage_clips->base.id : 0;
@@ -642,6 +691,99 @@ drm_atomic_plane_get_property(struct drm_plane *plane,
return 0;
}
+static int drm_atomic_color_set_data_property(struct drm_colorop *colorop,
+ struct drm_colorop_state *state,
+ struct drm_property *property, uint64_t val)
+{
+ struct drm_mode_3dlut_mode *modes;
+ ssize_t elem_size = -1;
+ ssize_t size = -1;
+ bool replaced = false;
+ uint32_t index;
+
+ switch (colorop->type) {
+ case DRM_COLOROP_1D_LUT:
+ size = state->size * sizeof(struct drm_color_lut);
+ break;
+ case DRM_COLOROP_CTM_3X4:
+ size = sizeof(struct drm_color_ctm_3x4);
+ break;
+ case DRM_COLOROP_3D_LUT:
+ index = state->lut_3d_mode_index;
+ if (index >= (state->lut_3d_modes->length / sizeof(struct drm_mode_3dlut_mode)))
+ return -EINVAL;
+
+ modes = (struct drm_mode_3dlut_mode *) state->lut_3d_modes->data;
+ size = modes[index].lut_stride[0] * modes[index].lut_stride[1] * modes[index].lut_stride[2] *
+ sizeof(struct drm_color_lut);
+ break;
+ default:
+ /* should never get here */
+ return -EINVAL;
+ }
+
+ return drm_property_replace_blob_from_id(colorop->dev,
+ &state->data,
+ val,
+ size,
+ elem_size,
+ &replaced);
+}
+
+static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
+ struct drm_colorop_state *state, struct drm_file *file_priv,
+ struct drm_property *property, uint64_t val)
+{
+ if (property == colorop->bypass_property) {
+ state->bypass = val;
+ } else if (property == colorop->curve_1d_type_property) {
+ state->curve_1d_type = val;
+ } else if (property == colorop->multiplier_property) {
+ state->multiplier = val;
+ } else if (property == colorop->lut_3d_mode_index_property) {
+ state->lut_3d_mode_index = val;
+ } else if (property == colorop->data_property) {
+ return drm_atomic_color_set_data_property(colorop,
+ state, property, val);
+ } else {
+ drm_dbg_atomic(colorop->dev,
+ "[COLOROP:%d:%d] unknown property [PROP:%d:%s]]\n",
+ colorop->base.id, colorop->type,
+ property->base.id, property->name);
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
+static int
+drm_atomic_colorop_get_property(struct drm_colorop *colorop,
+ const struct drm_colorop_state *state,
+ struct drm_property *property, uint64_t *val)
+{
+ if (property == colorop->type_property) {
+ *val = colorop->type;
+ } else if (property == colorop->bypass_property) {
+ *val = state->bypass;
+ } else if (property == colorop->curve_1d_type_property) {
+ *val = state->curve_1d_type;
+ } else if (property == colorop->multiplier_property) {
+ *val = state->multiplier;
+ } else if (property == colorop->lut_3d_modes_property) {
+ *val = (state->lut_3d_modes) ? state->lut_3d_modes->base.id : 0;
+ } else if (property == colorop->lut_3d_mode_index_property) {
+ *val = state->lut_3d_mode_index;
+ } else if (property == colorop->size_property) {
+ *val = state->size;
+ } else if (property == colorop->data_property) {
+ *val = (state->data) ? state->data->base.id : 0;
+ } else {
+ return -EINVAL;
+ }
+
+ return 0;
+}
+
static int drm_atomic_set_writeback_fb_for_connector(
struct drm_connector_state *conn_state,
struct drm_framebuffer *fb)
@@ -908,6 +1050,16 @@ int drm_atomic_get_property(struct drm_mode_object *obj,
plane->state, property, val);
break;
}
+ case DRM_MODE_OBJECT_COLOROP: {
+ struct drm_colorop *colorop = obj_to_colorop(obj);
+
+ if (colorop->plane)
+ WARN_ON(!drm_modeset_is_locked(&colorop->plane->mutex));
+
+ ret = drm_atomic_colorop_get_property(colorop,
+ colorop->state, property, val);
+ break;
+ }
default:
drm_dbg_atomic(dev, "[OBJECT:%d] has no properties\n", obj->id);
ret = -EINVAL;
@@ -1084,6 +1236,28 @@ int drm_atomic_set_property(struct drm_atomic_state *state,
ret = drm_atomic_plane_set_property(plane,
plane_state, file_priv,
prop, prop_value);
+
+ break;
+ }
+ case DRM_MODE_OBJECT_COLOROP: {
+ if (!file_priv->plane_color_pipeline) {
+ drm_dbg_atomic(prop->dev,
+ "[OBJECT:%d] is a colorop but DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE not set\n",
+ obj->id);
+ ret = -EINVAL;
+ }
+ struct drm_colorop *colorop = obj_to_colorop(obj);
+ struct drm_colorop_state *colorop_state;
+
+ colorop_state = drm_atomic_get_colorop_state(state, colorop);
+ if (IS_ERR(colorop_state)) {
+ ret = PTR_ERR(colorop_state);
+ break;
+ }
+
+ ret = drm_atomic_colorop_set_property(colorop,
+ colorop_state, file_priv,
+ prop, prop_value);
break;
}
default:
@@ -1423,6 +1597,7 @@ int drm_mode_atomic_ioctl(struct drm_device *dev,
drm_modeset_acquire_init(&ctx, DRM_MODESET_ACQUIRE_INTERRUPTIBLE);
state->acquire_ctx = &ctx;
state->allow_modeset = !!(arg->flags & DRM_MODE_ATOMIC_ALLOW_MODESET);
+ state->plane_color_pipeline = file_priv->plane_color_pipeline;
retry:
copied_objs = 0;
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
new file mode 100644
index 000000000000..fd1cd934df48
--- /dev/null
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -0,0 +1,565 @@
+/*
+ * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#include <drm/drm_colorop.h>
+#include <drm/drm_print.h>
+#include <drm/drm_drv.h>
+#include <drm/drm_plane.h>
+
+#include "drm_crtc_internal.h"
+
+/**
+ * DOC: overview
+ *
+ * A colorop represents a single color operation. Colorops are chained
+ * via the NEXT property and make up color pipelines. Color pipelines
+ * are advertised and selected via the COLOR_PIPELINE &drm_plane
+ * property.
+ *
+ * A colorop will be of a certain type, advertised by the read-only TYPE
+ * property. Each type of colorop will advertise a different set of
+ * properties and is programmed in a different manner. Types can be
+ * enumerated 1D curves, 1D LUTs, 3D LUTs, matrices, etc. See the
+ * &drm_colorop_type documentation for information on each type.
+ *
+ * If a colorop advertises the BYPASS property it can be bypassed.
+ *
+ * Since colorops cannot stand-alone and are used to describe colorop
+ * operations on a plane they don't have their own locking mechanism but
+ * are locked and programmed along with their associated &drm_plane.
+ *
+ * Colorops are only advertised and valid for atomic drivers and atomic
+ * userspace that signals the DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE client
+ * cap. When a driver advertises the COLOR_PIPELINE property on a
+ * &drm_plane and userspace signals the
+ * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE the driver shall ignore all other
+ * plane color properties, such as COLOR_ENCODING and COLOR_RANGE.
+ *
+ * More information about colorops and color pipelines can be found at
+ * rfc/color_pipeline.rst.
+ */
+
+static const struct drm_prop_enum_list drm_colorop_type_enum_list[] = {
+ { DRM_COLOROP_1D_CURVE, "1D Curve" },
+ { DRM_COLOROP_1D_LUT, "1D Curve Custom LUT" },
+ { DRM_COLOROP_CTM_3X4, "3x4 Matrix"},
+ { DRM_COLOROP_MULTIPLIER, "Multiplier"},
+ { DRM_COLOROP_3D_LUT, "3D LUT"},
+};
+
+static const char * const colorop_curve_1d_type_names[] = {
+ [DRM_COLOROP_1D_CURVE_SRGB_EOTF] = "sRGB EOTF",
+ [DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF] = "sRGB Inverse EOTF",
+ [DRM_COLOROP_1D_CURVE_BT2020_INV_OETF] = "BT.2020 Inverse OETF",
+ [DRM_COLOROP_1D_CURVE_BT2020_OETF] = "BT.2020 OETF",
+ [DRM_COLOROP_1D_CURVE_PQ_125_EOTF] = "PQ 125 EOTF",
+ [DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF] = "PQ 125 Inverse EOTF",
+};
+
+static const struct drm_prop_enum_list drm_colorop_lut1d_interpolation_list[] = {
+ { DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR, "Linear" },
+};
+
+/* Init Helpers */
+
+static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, enum drm_colorop_type type,
+ bool allow_bypass)
+{
+ struct drm_mode_config *config = &dev->mode_config;
+ struct drm_property *prop;
+ int ret = 0;
+
+ ret = drm_mode_object_add(dev, &colorop->base, DRM_MODE_OBJECT_COLOROP);
+ if (ret)
+ return ret;
+
+ colorop->base.properties = &colorop->properties;
+ colorop->dev = dev;
+ colorop->type = type;
+ colorop->plane = plane;
+ colorop->next = NULL;
+
+ list_add_tail(&colorop->head, &config->colorop_list);
+ colorop->index = config->num_colorop++;
+
+ /* add properties */
+
+ /* type */
+ prop = drm_property_create_enum(dev,
+ DRM_MODE_PROP_IMMUTABLE,
+ "TYPE", drm_colorop_type_enum_list,
+ ARRAY_SIZE(drm_colorop_type_enum_list));
+
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->type_property = prop;
+
+ drm_object_attach_property(&colorop->base,
+ colorop->type_property,
+ colorop->type);
+
+ if (allow_bypass) {
+ /* bypass */
+ prop = drm_property_create_bool(dev, DRM_MODE_PROP_ATOMIC,
+ "BYPASS");
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->bypass_property = prop;
+ drm_object_attach_property(&colorop->base,
+ colorop->bypass_property,
+ 1);
+ }
+
+ /* next */
+ prop = drm_property_create_object(dev, DRM_MODE_PROP_IMMUTABLE | DRM_MODE_PROP_ATOMIC,
+ "NEXT", DRM_MODE_OBJECT_COLOROP);
+ if (!prop)
+ return -ENOMEM;
+ colorop->next_property = prop;
+ drm_object_attach_property(&colorop->base,
+ colorop->next_property,
+ 0);
+
+ return ret;
+}
+
+/**
+ * drm_colorop_curve_1d_init - Initialize a DRM_COLOROP_1D_CURVE
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @supported_tfs: A bitfield of supported drm_colorop_curve_1d_init enum values,
+ * created using BIT(curve_type) and combined with the OR '|'
+ * operator.
+ * @allow_bypass: true if BYPASS property should be created, false if bypass of
+ * this colorop is not possible
+ * @return zero on success, -E value on failure
+ */
+int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, u64 supported_tfs,
+ bool allow_bypass)
+{
+ struct drm_prop_enum_list enum_list[DRM_COLOROP_1D_CURVE_COUNT];
+ int i, len;
+
+ struct drm_property *prop;
+ int ret;
+
+ if (!supported_tfs) {
+ drm_err(dev,
+ "No supported TFs for new 1D curve colorop on [PLANE:%d:%s]\n",
+ plane->base.id, plane->name);
+ return -EINVAL;
+ }
+
+ if ((supported_tfs & -BIT(DRM_COLOROP_1D_CURVE_COUNT)) != 0) {
+ drm_err(dev, "Unknown TF provided on [PLANE:%d:%s]\n",
+ plane->base.id, plane->name);
+ return -EINVAL;
+ }
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_CURVE,
+ allow_bypass);
+ if (ret)
+ return ret;
+
+ len = 0;
+ for (i = 0; i < DRM_COLOROP_1D_CURVE_COUNT; i++) {
+ if ((supported_tfs & BIT(i)) == 0)
+ continue;
+
+ enum_list[len].type = i;
+ enum_list[len].name = colorop_curve_1d_type_names[i];
+ len++;
+ }
+
+ if (WARN_ON(len <= 0))
+ return -EINVAL;
+
+
+ /* initialize 1D curve only attribute */
+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC, "CURVE_1D_TYPE",
+ enum_list, len);
+
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->curve_1d_type_property = prop;
+ drm_object_attach_property(&colorop->base, colorop->curve_1d_type_property,
+ enum_list[0].type);
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_curve_1d_init);
+
+static int drm_colorop_create_data_prop(struct drm_device *dev, struct drm_colorop *colorop)
+{
+ struct drm_property *prop;
+
+ /* data */
+ prop = drm_property_create(dev, DRM_MODE_PROP_ATOMIC | DRM_MODE_PROP_BLOB,
+ "DATA", 0);
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->data_property = prop;
+ drm_object_attach_property(&colorop->base,
+ colorop->data_property,
+ 0);
+
+ return 0;
+}
+
+/**
+ * drm_colorop_curve_1d_lut_init - Initialize a DRM_COLOROP_1D_LUT
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @lut_size: LUT size supported by driver
+ * @lut1d_interpolation: 1D LUT interpolation type
+ * @allow_bypass: true if BYPASS property should be created, false if bypass of
+ * this colorop is not possible
+ * @return zero on success, -E value on failure
+ */
+int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, uint32_t lut_size,
+ enum drm_colorop_lut1d_interpolation_type lut1d_interpolation,
+ bool allow_bypass)
+{
+ struct drm_property *prop;
+ int ret;
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_LUT,
+ allow_bypass);
+ if (ret)
+ return ret;
+
+ /* initialize 1D LUT only attribute */
+ /* LUT size */
+ prop = drm_property_create_range(dev, DRM_MODE_PROP_IMMUTABLE, "SIZE",
+ 0, UINT_MAX);
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->size_property = prop;
+ drm_object_attach_property(&colorop->base, colorop->size_property, lut_size);
+
+ /* Interpolation */
+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_IMMUTABLE, "LUT1D_INTERPOLATION",
+ drm_colorop_lut1d_interpolation_list,
+ ARRAY_SIZE(drm_colorop_lut1d_interpolation_list));
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->lut1d_interpolation_property = prop;
+ drm_object_attach_property(&colorop->base, prop, lut1d_interpolation);
+ colorop->lut1d_interpolation = lut1d_interpolation;
+
+ /* data */
+ ret = drm_colorop_create_data_prop(dev, colorop);
+ if (ret)
+ return ret;
+
+ drm_colorop_reset(colorop);
+ colorop->state->size = lut_size;
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_curve_1d_lut_init);
+
+int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass)
+{
+ int ret;
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X4,
+ allow_bypass);
+ if (ret)
+ return ret;
+
+ ret = drm_colorop_create_data_prop(dev, colorop);
+ if (ret)
+ return ret;
+
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_ctm_3x4_init);
+
+/**
+ * drm_colorop_mult_init - Initialize a DRM_COLOROP_MULTIPLIER
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @allow_bypass: true if BYPASS property should be created, false if bypass of
+ * this colorop is not possible
+ * @return zero on success, -E value on failure
+ */
+int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass)
+{
+ struct drm_property *prop;
+ int ret;
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_MULTIPLIER,
+ allow_bypass);
+ if (ret)
+ return ret;
+
+ prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, "MULTIPLIER", 0, U64_MAX);
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->multiplier_property = prop;
+ drm_object_attach_property(&colorop->base, colorop->multiplier_property, 0);
+
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_mult_init);
+
+int drm_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, struct drm_mode_3dlut_mode *mode_3dlut,
+ size_t num, bool allow_bypass)
+{
+ struct drm_property_blob *blob;
+ struct drm_property *prop;
+ int ret;
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_3D_LUT, allow_bypass);
+ if (ret)
+ return ret;
+
+ /* lut_3d_modes */
+ prop = drm_property_create(dev, DRM_MODE_PROP_BLOB | DRM_MODE_PROP_IMMUTABLE, "3DLUT_MODES", 0);
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->lut_3d_modes_property = prop;
+
+
+ blob = drm_property_create_blob(colorop->dev, num * sizeof(struct drm_mode_3dlut_mode),
+ mode_3dlut);
+ if (IS_ERR(blob))
+ return PTR_ERR(blob);
+
+ drm_object_attach_property(&colorop->base, colorop->lut_3d_modes_property, blob ? blob->base.id : 0);
+ drm_colorop_reset(colorop);
+
+ drm_property_replace_blob(&colorop->state->lut_3d_modes, blob);
+
+ /* lut_3d_modes index */
+ prop = drm_property_create_range(dev, DRM_MODE_PROP_ATOMIC, "3DLUT_MODE_INDEX", 0, num - 1);
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->lut_3d_mode_index_property = prop;
+ drm_object_attach_property(&colorop->base, colorop->lut_3d_mode_index_property, 0);
+
+ /* data */
+ ret = drm_colorop_create_data_prop(dev, colorop);
+ if (ret)
+ return ret;
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_3dlut_init);
+
+static void __drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop,
+ struct drm_colorop_state *state)
+{
+ memcpy(state, colorop->state, sizeof(*state));
+
+ if (state->data)
+ drm_property_blob_get(state->data);
+
+ state->bypass = true;
+}
+
+struct drm_colorop_state *
+drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop)
+{
+ struct drm_colorop_state *state;
+
+ if (WARN_ON(!colorop->state))
+ return NULL;
+
+ state = kmalloc(sizeof(*state), GFP_KERNEL);
+ if (state)
+ __drm_atomic_helper_colorop_duplicate_state(colorop, state);
+
+ return state;
+}
+
+
+void drm_colorop_atomic_destroy_state(struct drm_colorop *colorop,
+ struct drm_colorop_state *state)
+{
+ kfree(state);
+}
+
+/**
+ * __drm_colorop_state_reset - resets colorop state to default values
+ * @colorop_state: atomic colorop state, must not be NULL
+ * @colorop: colorop object, must not be NULL
+ *
+ * Initializes the newly allocated @colorop_state with default
+ * values. This is useful for drivers that subclass the CRTC state.
+ */
+static void __drm_colorop_state_reset(struct drm_colorop_state *colorop_state,
+ struct drm_colorop *colorop)
+{
+ u64 val;
+
+ colorop_state->colorop = colorop;
+ colorop_state->bypass = true;
+
+ if (colorop->curve_1d_type_property) {
+ drm_object_property_get_default_value(&colorop->base,
+ colorop->curve_1d_type_property,
+ &val);
+ colorop_state->curve_1d_type = val;
+ }
+}
+
+/**
+ * __drm_colorop_reset - reset state on colorop
+ * @colorop: drm colorop
+ * @colorop_state: colorop state to assign
+ *
+ * Initializes the newly allocated @colorop_state and assigns it to
+ * the &drm_crtc->state pointer of @colorop, usually required when
+ * initializing the drivers or when called from the &drm_colorop_funcs.reset
+ * hook.
+ *
+ * This is useful for drivers that subclass the colorop state.
+ */
+static void __drm_colorop_reset(struct drm_colorop *colorop,
+ struct drm_colorop_state *colorop_state)
+{
+ if (colorop_state)
+ __drm_colorop_state_reset(colorop_state, colorop);
+
+ colorop->state = colorop_state;
+}
+
+void drm_colorop_reset(struct drm_colorop *colorop)
+{
+ kfree(colorop->state);
+ colorop->state = kzalloc(sizeof(*colorop->state), GFP_KERNEL);
+
+ if (colorop->state)
+ __drm_colorop_reset(colorop, colorop->state);
+}
+
+static const char * const colorop_type_name[] = {
+ [DRM_COLOROP_1D_CURVE] = "1D Curve",
+ [DRM_COLOROP_1D_LUT] = "1D Curve Custom LUT",
+ [DRM_COLOROP_CTM_3X4] = "3x4 Matrix",
+ [DRM_COLOROP_MULTIPLIER] = "Multiplier",
+ [DRM_COLOROP_3D_LUT] = "3D LUT",
+};
+
+static const char * const colorop_lu3d_interpolation_name[] = {
+ [DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL] = "Tetrahedral",
+};
+
+static const char * const colorop_lut1d_interpolation_name[] = {
+ [DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR] = "Linear",
+};
+
+const char *drm_get_colorop_type_name(enum drm_colorop_type type)
+{
+ if (WARN_ON(type >= ARRAY_SIZE(colorop_type_name)))
+ return "unknown";
+
+ return colorop_type_name[type];
+}
+
+const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type type)
+{
+ if (WARN_ON(type >= ARRAY_SIZE(colorop_curve_1d_type_names)))
+ return "unknown";
+
+ return colorop_curve_1d_type_names[type];
+}
+
+/**
+ * drm_get_colorop_lut1d_interpolation_name: return a string for interpolation type
+ * @type: interpolation type to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_type type)
+{
+ if (WARN_ON(type >= ARRAY_SIZE(colorop_lut1d_interpolation_name)))
+ return "unknown";
+
+ return colorop_lut1d_interpolation_name[type];
+}
+
+/**
+ * drm_get_colorop_lut3d_interpolation_name - return a string for interpolation type
+ * @type: interpolation type to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type)
+{
+ if (WARN_ON(type >= ARRAY_SIZE(colorop_lu3d_interpolation_name)))
+ return "unknown";
+
+ return colorop_lu3d_interpolation_name[type];
+}
+
+/**
+ * drm_colorop_set_next_property - sets the next pointer
+ * @colorop: drm colorop
+ * @next: next colorop
+ *
+ * Should be used when constructing the color pipeline
+ */
+void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next)
+{
+ if (!colorop->next_property)
+ return;
+
+ drm_object_property_set_value(&colorop->base,
+ colorop->next_property,
+ next ? next->base.id : 0);
+ colorop->next = next;
+}
+EXPORT_SYMBOL(drm_colorop_set_next_property);
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index f593dc569d31..5c89c586da7c 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -373,6 +373,13 @@ drm_setclientcap(struct drm_device *dev, void *data, struct drm_file *file_priv)
return -EINVAL;
file_priv->supports_virtualized_cursor_plane = req->value;
break;
+ case DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE:
+ if (!file_priv->atomic)
+ return -EINVAL;
+ if (req->value > 1)
+ return -EINVAL;
+ file_priv->plane_color_pipeline = req->value;
+ break;
default:
return -EINVAL;
}
diff --git a/drivers/gpu/drm/drm_mode_config.c b/drivers/gpu/drm/drm_mode_config.c
index 37d2e0a4ef4b..f238a2f049b0 100644
--- a/drivers/gpu/drm/drm_mode_config.c
+++ b/drivers/gpu/drm/drm_mode_config.c
@@ -29,6 +29,7 @@
#include <drm/drm_managed.h>
#include <drm/drm_mode_config.h>
#include <drm/drm_print.h>
+#include <drm/drm_colorop.h>
#include <linux/dma-resv.h>
#include "drm_crtc_internal.h"
@@ -182,11 +183,15 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
void drm_mode_config_reset(struct drm_device *dev)
{
struct drm_crtc *crtc;
+ struct drm_colorop *colorop;
struct drm_plane *plane;
struct drm_encoder *encoder;
struct drm_connector *connector;
struct drm_connector_list_iter conn_iter;
+ drm_for_each_colorop(colorop, dev)
+ drm_colorop_reset(colorop);
+
drm_for_each_plane(plane, dev)
if (plane->funcs->reset)
plane->funcs->reset(plane);
@@ -420,6 +425,7 @@ int drmm_mode_config_init(struct drm_device *dev)
INIT_LIST_HEAD(&dev->mode_config.property_list);
INIT_LIST_HEAD(&dev->mode_config.property_blob_list);
INIT_LIST_HEAD(&dev->mode_config.plane_list);
+ INIT_LIST_HEAD(&dev->mode_config.colorop_list);
INIT_LIST_HEAD(&dev->mode_config.privobj_list);
idr_init_base(&dev->mode_config.object_idr, 1);
idr_init_base(&dev->mode_config.tile_idr, 1);
@@ -441,6 +447,7 @@ int drmm_mode_config_init(struct drm_device *dev)
dev->mode_config.num_crtc = 0;
dev->mode_config.num_encoder = 0;
dev->mode_config.num_total_plane = 0;
+ dev->mode_config.num_colorop = 0;
if (IS_ENABLED(CONFIG_LOCKDEP)) {
struct drm_modeset_acquire_ctx modeset_ctx;
diff --git a/drivers/gpu/drm/drm_plane.c b/drivers/gpu/drm/drm_plane.c
index a28b22fdd7a4..e3a85a27fa7a 100644
--- a/drivers/gpu/drm/drm_plane.c
+++ b/drivers/gpu/drm/drm_plane.c
@@ -1793,3 +1793,55 @@ int drm_plane_add_size_hints_property(struct drm_plane *plane,
return 0;
}
EXPORT_SYMBOL(drm_plane_add_size_hints_property);
+
+#define MAX_COLOR_PIPELINES 5
+
+/**
+ * drm_plane_create_color_pipeline_property - create a new color pipeline
+ * property
+ *
+ * @plane: drm plane
+ * @pipelines: list of pipelines
+ * @num_pipelines: number of pipelines
+ *
+ * Create the COLOR_PIPELINE plane property to specific color pipelines on
+ * the plane.
+ *
+ * RETURNS:
+ * Zero for success or -errno
+ */
+int drm_plane_create_color_pipeline_property(struct drm_plane *plane,
+ struct drm_prop_enum_list *pipelines,
+ int num_pipelines)
+{
+ struct drm_prop_enum_list all_pipelines[MAX_COLOR_PIPELINES];
+ int len = 0;
+ int i;
+ struct drm_property *prop;
+
+ if (num_pipelines > (MAX_COLOR_PIPELINES - 1))
+ return -EINVAL;
+
+ /* Create default Bypass color pipeline */
+ all_pipelines[len].type = 0;
+ all_pipelines[len].name = "Bypass";
+ len++;
+
+ /* Add all other color pipelines */
+ for (i = 0; i < num_pipelines; i++, len++) {
+ all_pipelines[len].type = pipelines[i].type;
+ all_pipelines[len].name = pipelines[i].name;
+ }
+
+ prop = drm_property_create_enum(plane->dev, DRM_MODE_PROP_ATOMIC,
+ "COLOR_PIPELINE",
+ all_pipelines, len);
+ if (IS_ERR(prop))
+ return PTR_ERR(prop);
+
+ drm_object_attach_property(&plane->base, prop, 0);
+ plane->color_pipeline_property = prop;
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_plane_create_color_pipeline_property);
diff --git a/drivers/gpu/drm/tests/Makefile b/drivers/gpu/drm/tests/Makefile
index 56dab563abd7..bd69df0eee33 100644
--- a/drivers/gpu/drm/tests/Makefile
+++ b/drivers/gpu/drm/tests/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_DRM_KUNIT_TEST) += \
drm_modes_test.o \
drm_plane_helper_test.o \
drm_probe_helper_test.o \
- drm_rect_test.o
+ drm_rect_test.o \
+ drm_fixp_test.o
CFLAGS_drm_mm_test.o := $(DISABLE_STRUCTLEAK_PLUGIN)
diff --git a/drivers/gpu/drm/tests/drm_fixp_test.c b/drivers/gpu/drm/tests/drm_fixp_test.c
new file mode 100644
index 000000000000..24a801cf38be
--- /dev/null
+++ b/drivers/gpu/drm/tests/drm_fixp_test.c
@@ -0,0 +1,70 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright 2022 Advanced Micro Devices, Inc.
+ */
+
+#include <kunit/test.h>
+#include <drm/drm_fixed.h>
+
+static void drm_test_sm2fixp(struct kunit *test)
+{
+ KUNIT_EXPECT_EQ(test, 0x7fffffffffffffffll, ((1ull << 63) - 1));
+
+ /* 1 */
+ KUNIT_EXPECT_EQ(test, drm_int2fixp(1), drm_sm2fixp(1ull << DRM_FIXED_POINT));
+
+ /* -1 */
+ KUNIT_EXPECT_EQ(test, drm_int2fixp(-1), drm_sm2fixp((1ull << 63) | (1ull << DRM_FIXED_POINT)));
+
+ /* 0.5 */
+ KUNIT_EXPECT_EQ(test, drm_fixp_from_fraction(1, 2), drm_sm2fixp(1ull << (DRM_FIXED_POINT - 1)));
+
+ /* -0.5 */
+ KUNIT_EXPECT_EQ(test, drm_fixp_from_fraction(-1, 2), drm_sm2fixp((1ull << 63) | (1ull << (DRM_FIXED_POINT - 1))));
+
+}
+
+static void drm_test_int2fixp(struct kunit *test)
+{
+ /* 1 */
+ KUNIT_EXPECT_EQ(test, 1ll << 32, drm_int2fixp(1));
+
+ /* -1 */
+ KUNIT_EXPECT_EQ(test, -(1ll << 32), drm_int2fixp(-1));
+
+ /* 1 + (-1) = 0 */
+ KUNIT_EXPECT_EQ(test, 0, drm_int2fixp(1) + drm_int2fixp(-1));
+
+ /* 1 / 2 */
+ KUNIT_EXPECT_EQ(test, 1ll << 31, drm_fixp_from_fraction(1, 2));
+
+ /* -0.5 */
+ KUNIT_EXPECT_EQ(test, -(1ll << 31), drm_fixp_from_fraction(-1, 2));
+
+ /* (1 / 2) + (-1) = 0.5 */
+ KUNIT_EXPECT_EQ(test, 1ll << 31, drm_fixp_from_fraction(-1, 2) + drm_int2fixp(1));
+
+ /* (1 / 2) - 1) = 0.5 */
+ KUNIT_EXPECT_EQ(test, -(1ll << 31), drm_fixp_from_fraction(1, 2) + drm_int2fixp(-1));
+
+ /* (1 / 2) - 1) = 0.5 */
+ KUNIT_EXPECT_EQ(test, -(1ll << 31), drm_fixp_from_fraction(1, 2) - drm_int2fixp(1));
+
+}
+
+static struct kunit_case drm_fixp_tests[] = {
+ KUNIT_CASE(drm_test_int2fixp),
+ KUNIT_CASE(drm_test_sm2fixp),
+ { }
+};
+
+static struct kunit_suite drm_rect_test_suite = {
+ .name = "drm_fixp",
+ .test_cases = drm_fixp_tests,
+};
+
+kunit_test_suite(drm_rect_test_suite);
+
+MODULE_AUTHOR("AMD");
+MODULE_LICENSE("GPL and additional rights");
+MODULE_DESCRIPTION("Unit tests for drm_fixed.h");
\ No newline at end of file
diff --git a/drivers/gpu/drm/vkms/Kconfig b/drivers/gpu/drm/vkms/Kconfig
index 9def079f685b..98ecfce929f3 100644
--- a/drivers/gpu/drm/vkms/Kconfig
+++ b/drivers/gpu/drm/vkms/Kconfig
@@ -14,3 +14,18 @@ config DRM_VKMS
a VKMS.
If M is selected the module will be called vkms.
+
+config DRM_VKMS_KUNIT_TESTS
+ tristate "KUnit tests for VKMS." if !KUNIT_ALL_TESTS
+ depends on DRM_VKMS=y && KUNIT
+ default KUNIT_ALL_TESTS
+ help
+ This builds unit tests for VKMS. This option is not useful for
+ distributions or general kernels, but only for kernel
+ developers working on VKMS.
+
+ For more information on KUnit and unit tests in general,
+ please refer to the KUnit documentation in
+ Documentation/dev-tools/kunit/.
+
+ If in doubt, say "N".
diff --git a/drivers/gpu/drm/vkms/Makefile b/drivers/gpu/drm/vkms/Makefile
index 1b28a6a32948..0bf3c116f1ae 100644
--- a/drivers/gpu/drm/vkms/Makefile
+++ b/drivers/gpu/drm/vkms/Makefile
@@ -6,6 +6,9 @@ vkms-y := \
vkms_formats.o \
vkms_crtc.o \
vkms_composer.o \
- vkms_writeback.o
+ vkms_writeback.o \
+ vkms_colorop.o \
+ vkms_luts.o
obj-$(CONFIG_DRM_VKMS) += vkms.o
+obj-$(CONFIG_DRM_VKMS_KUNIT_TESTS) += tests/
diff --git a/drivers/gpu/drm/vkms/tests/.kunitconfig b/drivers/gpu/drm/vkms/tests/.kunitconfig
new file mode 100644
index 000000000000..70e378228cbd
--- /dev/null
+++ b/drivers/gpu/drm/vkms/tests/.kunitconfig
@@ -0,0 +1,4 @@
+CONFIG_KUNIT=y
+CONFIG_DRM=y
+CONFIG_DRM_VKMS=y
+CONFIG_DRM_VKMS_KUNIT_TESTS=y
diff --git a/drivers/gpu/drm/vkms/tests/Makefile b/drivers/gpu/drm/vkms/tests/Makefile
new file mode 100644
index 000000000000..7876ca7a3c42
--- /dev/null
+++ b/drivers/gpu/drm/vkms/tests/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+obj-$(CONFIG_DRM_VKMS_KUNIT_TESTS) += vkms_color_test.o
\ No newline at end of file
diff --git a/drivers/gpu/drm/vkms/tests/vkms_color_test.c b/drivers/gpu/drm/vkms/tests/vkms_color_test.c
new file mode 100644
index 000000000000..d5eb1e4e9b67
--- /dev/null
+++ b/drivers/gpu/drm/vkms/tests/vkms_color_test.c
@@ -0,0 +1,454 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#include <kunit/test.h>
+
+#include <drm/drm_fixed.h>
+#include <drm/drm_mode.h>
+#include "../vkms_drv.h"
+#include "../vkms_composer.h"
+#include "../vkms_luts.h"
+
+#define TEST_LUT_SIZE 16
+
+MODULE_IMPORT_NS(EXPORTED_FOR_KUNIT_TESTING);
+
+static struct drm_color_lut test_linear_array[TEST_LUT_SIZE] = {
+ { 0x0, 0x0, 0x0, 0 },
+ { 0x1111, 0x1111, 0x1111, 0 },
+ { 0x2222, 0x2222, 0x2222, 0 },
+ { 0x3333, 0x3333, 0x3333, 0 },
+ { 0x4444, 0x4444, 0x4444, 0 },
+ { 0x5555, 0x5555, 0x5555, 0 },
+ { 0x6666, 0x6666, 0x6666, 0 },
+ { 0x7777, 0x7777, 0x7777, 0 },
+ { 0x8888, 0x8888, 0x8888, 0 },
+ { 0x9999, 0x9999, 0x9999, 0 },
+ { 0xaaaa, 0xaaaa, 0xaaaa, 0 },
+ { 0xbbbb, 0xbbbb, 0xbbbb, 0 },
+ { 0xcccc, 0xcccc, 0xcccc, 0 },
+ { 0xdddd, 0xdddd, 0xdddd, 0 },
+ { 0xeeee, 0xeeee, 0xeeee, 0 },
+ { 0xffff, 0xffff, 0xffff, 0 },
+};
+
+const struct vkms_color_lut test_linear_lut = {
+ .base = test_linear_array,
+ .lut_length = TEST_LUT_SIZE,
+ .channel_value2index_ratio = 0xf000fll
+};
+
+static void vkms_color_test_get_lut_index(struct kunit *test)
+{
+ int i;
+
+ KUNIT_EXPECT_EQ(test, drm_fixp2int(get_lut_index(&test_linear_lut, test_linear_array[0].red)), 0);
+
+ for (i = 0; i < TEST_LUT_SIZE; i++)
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&test_linear_lut, test_linear_array[i].red)), i);
+
+ KUNIT_EXPECT_EQ(test, drm_fixp2int(get_lut_index(&srgb_eotf, 0x0)), 0x0);
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0x0)), 0x0);
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0x101)), 0x1);
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0x202)), 0x2);
+
+ KUNIT_EXPECT_EQ(test, drm_fixp2int(get_lut_index(&srgb_inv_eotf, 0x0)), 0x0);
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_inv_eotf, 0x0)), 0x0);
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_inv_eotf, 0x101)), 0x1);
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_inv_eotf, 0x202)), 0x2);
+
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0xfefe)), 0xfe);
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&srgb_eotf, 0xffff)), 0xff);
+}
+
+static void vkms_color_test_lerp(struct kunit *test)
+{
+ /*** half-way round down ***/
+ s64 t = 0x80000000 - 1;
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x8);
+
+ /* odd a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x8);
+
+ /* odd b */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x8);
+
+ /* b = a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10);
+
+ /* b = a + 1 */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x10);
+
+
+ /*** half-way round up ***/
+ t = 0x80000000;
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x8);
+
+ /* odd a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x9);
+
+ /* odd b */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x8);
+
+ /* b = a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10);
+
+ /* b = a + 1 */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x11);
+
+ /*** t = 0.0 ***/
+ t = 0x0;
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x0);
+
+ /* odd a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x1);
+
+ /* odd b */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x1);
+
+ /* b = a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10);
+
+ /* b = a + 1 */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x10);
+
+ /*** t = 1.0 ***/
+ t = 0x100000000;
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x10);
+
+ /* odd a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x10);
+
+ /* odd b */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0xf);
+
+ /* b = a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10);
+
+ /* b = a + 1 */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x11);
+
+
+ /*** t = 0.0 + 1 ***/
+ t = 0x0 + 1;
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x0);
+
+ /* odd a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x1);
+
+ /* odd b */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0x1);
+
+ /* b = a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10);
+
+ /* b = a + 1 */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x10);
+
+ /*** t = 1.0 - 1 ***/
+ t = 0x100000000 - 1;
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x10);
+
+ /* odd a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0x10, t), 0x10);
+
+ /* odd b */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x1, 0xf, t), 0xf);
+
+ /* b = a */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x10, t), 0x10);
+
+ /* b = a + 1 */
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x10, 0x11, t), 0x11);
+
+
+ /*** t chosen to verify the flipping point of result a (or b) to a+1 (or b-1) ***/
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x1, 0x80000000 - 1), 0x0);
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x1, 0x80000000), 0x1);
+}
+
+static void vkms_color_test_linear(struct kunit *test)
+{
+ for (int i = 0; i < LUT_SIZE; i++) {
+ int linear = apply_lut_to_channel_value(&linear_eotf, i * 0x101, LUT_RED);
+ KUNIT_EXPECT_EQ(test, DIV_ROUND_CLOSEST(linear, 0x101), i);
+ }
+}
+
+static void vkms_color_srgb_inv_srgb(struct kunit *test)
+{
+ u16 srgb, final;
+
+ for (int i = 0; i < LUT_SIZE; i++) {
+ srgb = apply_lut_to_channel_value(&srgb_eotf, i * 0x101, LUT_RED);
+ final = apply_lut_to_channel_value(&srgb_inv_eotf, srgb, LUT_RED);
+
+ KUNIT_EXPECT_GE(test, final / 0x101, i-1);
+ KUNIT_EXPECT_LE(test, final / 0x101, i+1);
+ }
+}
+
+#define FIXPT_HALF (DRM_FIXED_ONE >> 1)
+#define FIXPT_QUARTER (DRM_FIXED_ONE >> 2)
+
+const struct drm_color_ctm_3x4 test_matrix_3x4_50_desat = { {
+ FIXPT_HALF, FIXPT_QUARTER, FIXPT_QUARTER, 0,
+ FIXPT_QUARTER, FIXPT_HALF, FIXPT_QUARTER, 0,
+ FIXPT_QUARTER, FIXPT_QUARTER, FIXPT_HALF, 0
+} };
+
+static void vkms_color_ctm_3x4_50_desat(struct kunit *test)
+{
+ struct pixel_argb_s32 ref, out;
+
+ /* full white */
+ ref.a = 0xffff;
+ ref.r = 0xffff;
+ ref.g = 0xffff;
+ ref.b = 0xffff;
+
+ memcpy(&out, &ref, sizeof(out));
+ apply_3x4_matrix(&out, &test_matrix_3x4_50_desat);
+
+ KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out));
+
+ /* full black */
+ ref.a = 0xffff;
+ ref.r = 0x0;
+ ref.g = 0x0;
+ ref.b = 0x0;
+
+ memcpy(&out, &ref, sizeof(out));
+ apply_3x4_matrix(&out, &test_matrix_3x4_50_desat);
+
+ KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out));
+
+ /* 50% grey */
+ ref.a = 0xffff;
+ ref.r = 0x8000;
+ ref.g = 0x8000;
+ ref.b = 0x8000;
+
+ memcpy(&out, &ref, sizeof(out));
+ apply_3x4_matrix(&out, &test_matrix_3x4_50_desat);
+
+ KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out));
+
+ /* full red to 50% desat */
+ ref.a = 0xffff;
+ ref.r = 0x8000;
+ ref.g = 0x4000;
+ ref.b = 0x4000;
+
+ out.a = 0xffff;
+ out.r = 0xffff;
+ out.g = 0x0;
+ out.b = 0x0;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_50_desat);
+
+ KUNIT_EXPECT_MEMEQ(test, &ref, &out, sizeof(out));
+}
+
+/*
+ * BT.709 encoding matrix
+ *
+ * Values printed from within IGT when converting
+ * igt_matrix_3x4_bt709_enc to the fixed-point format expected
+ * by DRM/KMS.
+ */
+const struct drm_color_ctm_3x4 test_matrix_3x4_bt709_enc = { {
+ 0x00000000366cf400ull, 0x00000000b7175900ull, 0x0000000127bb300ull, 0,
+ 0x800000001993b3a0ull, 0x800000005609fe80ull, 0x000000006f9db200ull, 0,
+ 0x000000009d70a400ull, 0x800000008f011100ull, 0x800000000e6f9330ull, 0
+} };
+
+static void vkms_color_ctm_3x4_bt709(struct kunit *test)
+{
+ struct pixel_argb_s32 out;
+
+ /* full white to bt709 */
+ out.a = 0xffff;
+ out.r = 0xffff;
+ out.g = 0xffff;
+ out.b = 0xffff;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 255 */
+ KUNIT_EXPECT_GT(test, out.r, 0xfe00);
+ KUNIT_EXPECT_LT(test, out.r, 0x10000);
+
+ /* U 0 */
+ KUNIT_EXPECT_LT(test, out.g, 0x0100);
+
+ /* V 0 */
+ KUNIT_EXPECT_LT(test, out.b, 0x0100);
+
+ /* full black to bt709 */
+ out.a = 0xffff;
+ out.r = 0x0;
+ out.g = 0x0;
+ out.b = 0x0;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 0 */
+ KUNIT_EXPECT_LT(test, out.r, 0x100);
+
+ /* U 0 */
+ KUNIT_EXPECT_LT(test, out.g, 0x0100);
+
+ /* V 0 */
+ KUNIT_EXPECT_LT(test, out.b, 0x0100);
+
+ /* gray to bt709 */
+ out.a = 0xffff;
+ out.r = 0x7fff;
+ out.g = 0x7fff;
+ out.b = 0x7fff;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 127 */
+ KUNIT_EXPECT_GT(test, out.r, 0x7e00);
+ KUNIT_EXPECT_LT(test, out.r, 0x8000);
+
+ /* U 0 */
+ KUNIT_EXPECT_LT(test, out.g, 0x0100);
+
+ /* V 0 */
+ KUNIT_EXPECT_LT(test, out.b, 0x0100);
+
+ /* == red 255 - bt709 enc == */
+ out.a = 0xffff;
+ out.r = 0xffff;
+ out.g = 0x0;
+ out.b = 0x0;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 54 */
+ KUNIT_EXPECT_GT(test, out.r, 0x3500);
+ KUNIT_EXPECT_LT(test, out.r, 0x3700);
+
+ /* U 0 */
+ KUNIT_EXPECT_LT(test, out.g, 0x0100);
+
+ /* V 157 */
+ KUNIT_EXPECT_GT(test, out.b, 0x9C00);
+ KUNIT_EXPECT_LT(test, out.b, 0x9E00);
+
+
+ /* == green 255 - bt709 enc == */
+ out.a = 0xffff;
+ out.r = 0x0;
+ out.g = 0xffff;
+ out.b = 0x0;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 182 */
+ KUNIT_EXPECT_GT(test, out.r, 0xB500);
+ KUNIT_EXPECT_LT(test, out.r, 0xB780); /* laxed by half*/
+
+ /* U 0 */
+ KUNIT_EXPECT_LT(test, out.g, 0x0100);
+
+ /* V 0 */
+ KUNIT_EXPECT_LT(test, out.b, 0x0100);
+
+ /* == blue 255 - bt709 enc == */
+ out.a = 0xffff;
+ out.r = 0x0;
+ out.g = 0x0;
+ out.b = 0xffff;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 18 */
+ KUNIT_EXPECT_GT(test, out.r, 0x1100);
+ KUNIT_EXPECT_LT(test, out.r, 0x1300);
+
+ /* U 111 */
+ KUNIT_EXPECT_GT(test, out.g, 0x6E00);
+ KUNIT_EXPECT_LT(test, out.g, 0x7000);
+
+ /* V 0 */
+ KUNIT_EXPECT_LT(test, out.b, 0x0100);
+
+ /* == red 140 - bt709 enc == */
+ out.a = 0xffff;
+ out.r = 0x8c8c;
+ out.g = 0x0;
+ out.b = 0x0;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 30 */
+ KUNIT_EXPECT_GT(test, out.r, 0x1D00);
+ KUNIT_EXPECT_LT(test, out.r, 0x1F00);
+
+ /* U 0 */
+ KUNIT_EXPECT_LT(test, out.g, 0x100);
+
+ /* V 87 */
+ KUNIT_EXPECT_GT(test, out.b, 0x5600);
+ KUNIT_EXPECT_LT(test, out.b, 0x5800);
+
+ /* == green 140 - bt709 enc == */
+ out.a = 0xffff;
+ out.r = 0x0;
+ out.g = 0x8c8c;
+ out.b = 0x0;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 30 */
+ KUNIT_EXPECT_GT(test, out.r, 0x6400);
+ KUNIT_EXPECT_LT(test, out.r, 0x6600);
+
+ /* U 0 */
+ KUNIT_EXPECT_LT(test, out.g, 0x100);
+
+ /* V 0 */
+ KUNIT_EXPECT_LT(test, out.b, 0x100);
+
+
+ /* == blue 140 - bt709 enc == */
+ out.a = 0xffff;
+ out.r = 0x0;
+ out.g = 0x0;
+ out.b = 0x8c8c;
+
+ apply_3x4_matrix(&out, &test_matrix_3x4_bt709_enc);
+
+ /* Y 30 */
+ KUNIT_EXPECT_GT(test, out.r, 0x900);
+ KUNIT_EXPECT_LT(test, out.r, 0xB00);
+
+ /* U 61 */
+ KUNIT_EXPECT_GT(test, out.g, 0x3C00);
+ KUNIT_EXPECT_LT(test, out.g, 0x3E00);
+
+ /* V 0 */
+ KUNIT_EXPECT_LT(test, out.b, 0x100);
+
+}
+
+static struct kunit_case vkms_color_test_cases[] = {
+ KUNIT_CASE(vkms_color_test_get_lut_index),
+ KUNIT_CASE(vkms_color_test_lerp),
+ KUNIT_CASE(vkms_color_test_linear),
+ KUNIT_CASE(vkms_color_srgb_inv_srgb),
+ KUNIT_CASE(vkms_color_ctm_3x4_50_desat),
+ KUNIT_CASE(vkms_color_ctm_3x4_bt709),
+ {}
+};
+
+static struct kunit_suite vkms_color_test_suite = {
+ .name = "vkms-color",
+ .test_cases = vkms_color_test_cases,
+};
+kunit_test_suite(vkms_color_test_suite);
+
+MODULE_LICENSE("GPL");
\ No newline at end of file
diff --git a/drivers/gpu/drm/vkms/vkms_colorop.c b/drivers/gpu/drm/vkms/vkms_colorop.c
new file mode 100644
index 000000000000..519521e9b908
--- /dev/null
+++ b/drivers/gpu/drm/vkms/vkms_colorop.c
@@ -0,0 +1,113 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#include <linux/slab.h>
+#include <drm/drm_colorop.h>
+#include <drm/drm_print.h>
+#include <drm/drm_property.h>
+#include <drm/drm_plane.h>
+
+#include "vkms_drv.h"
+
+static const u64 supported_tfs =
+ BIT(DRM_COLOROP_1D_CURVE_SRGB_EOTF) |
+ BIT(DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF);
+
+#define MAX_COLOR_PIPELINE_OPS 4
+
+static int vkms_initialize_color_pipeline(struct drm_plane *plane, struct drm_prop_enum_list *list)
+{
+ struct drm_colorop *ops[MAX_COLOR_PIPELINE_OPS];
+ struct drm_device *dev = plane->dev;
+ int ret;
+ int i = 0;
+
+ memset(ops, 0, sizeof(ops));
+
+ /* 1st op: 1d curve */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_curve_1d_init(dev, ops[i], plane, supported_tfs, true);
+ if (ret)
+ goto cleanup;
+
+ list->type = ops[i]->base.id;
+ list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", ops[i]->base.id);
+
+ i++;
+
+ /* 2nd op: 1d curve */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_ctm_3x4_init(dev, ops[i], plane, true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 3rd op: 3x4 matrix */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_ctm_3x4_init(dev, ops[i], plane, true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ i++;
+
+ /* 4th op: 1d curve */
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
+ if (!ops[i]) {
+ DRM_ERROR("KMS: Failed to allocate colorop\n");
+ ret = -ENOMEM;
+ goto cleanup;
+ }
+
+ ret = drm_colorop_curve_1d_init(dev, ops[i], plane, supported_tfs, true);
+ if (ret)
+ goto cleanup;
+
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
+
+ return 0;
+
+cleanup:
+ for (; i >= 0; i--)
+ if (ops[i])
+ kfree(ops[i]);
+
+ return ret;
+}
+
+int vkms_initialize_colorops(struct drm_plane *plane)
+{
+ struct drm_prop_enum_list pipeline;
+ int ret;
+
+ /* Add color pipeline */
+ ret = vkms_initialize_color_pipeline(plane, &pipeline);
+ if (ret)
+ return ret;
+
+ /* Create COLOR_PIPELINE property and attach */
+ drm_plane_create_color_pipeline_property(plane, &pipeline, 1);
+
+ return 0;
+}
diff --git a/drivers/gpu/drm/vkms/vkms_composer.c b/drivers/gpu/drm/vkms/vkms_composer.c
index b20ac1705726..cbb864b2b16c 100644
--- a/drivers/gpu/drm/vkms/vkms_composer.c
+++ b/drivers/gpu/drm/vkms/vkms_composer.c
@@ -12,6 +12,9 @@
#include <linux/minmax.h>
#include "vkms_drv.h"
+#include <kunit/visibility.h>
+#include "vkms_composer.h"
+#include "vkms_luts.h"
static u16 pre_mul_blend_channel(u16 src, u16 dst, u16 alpha)
{
@@ -60,35 +63,26 @@ static void fill_background(const struct pixel_argb_u16 *background_color,
}
// lerp(a, b, t) = a + (b - a) * t
-static u16 lerp_u16(u16 a, u16 b, s64 t)
+VISIBLE_IF_KUNIT u16 lerp_u16(u16 a, u16 b, s64 t)
{
s64 a_fp = drm_int2fixp(a);
s64 b_fp = drm_int2fixp(b);
s64 delta = drm_fixp_mul(b_fp - a_fp, t);
- return drm_fixp2int(a_fp + delta);
+ return drm_fixp2int_round(a_fp + delta);
}
+EXPORT_SYMBOL_IF_KUNIT(lerp_u16);
-static s64 get_lut_index(const struct vkms_color_lut *lut, u16 channel_value)
+VISIBLE_IF_KUNIT s64 get_lut_index(const struct vkms_color_lut *lut, u16 channel_value)
{
s64 color_channel_fp = drm_int2fixp(channel_value);
return drm_fixp_mul(color_channel_fp, lut->channel_value2index_ratio);
}
+EXPORT_SYMBOL_IF_KUNIT(get_lut_index);
-/*
- * This enum is related to the positions of the variables inside
- * `struct drm_color_lut`, so the order of both needs to be the same.
- */
-enum lut_channel {
- LUT_RED = 0,
- LUT_GREEN,
- LUT_BLUE,
- LUT_RESERVED
-};
-
-static u16 apply_lut_to_channel_value(const struct vkms_color_lut *lut, u16 channel_value,
+VISIBLE_IF_KUNIT u16 apply_lut_to_channel_value(const struct vkms_color_lut *lut, u16 channel_value,
enum lut_channel channel)
{
s64 lut_index = get_lut_index(lut, channel_value);
@@ -114,6 +108,8 @@ static u16 apply_lut_to_channel_value(const struct vkms_color_lut *lut, u16 chan
return lerp_u16(floor_channel_value, ceil_channel_value,
lut_index & DRM_FIXED_DECIMAL_MASK);
}
+EXPORT_SYMBOL_IF_KUNIT(apply_lut_to_channel_value);
+
static void apply_lut(const struct vkms_crtc_state *crtc_state, struct line_buffer *output_buffer)
{
@@ -132,6 +128,107 @@ static void apply_lut(const struct vkms_crtc_state *crtc_state, struct line_buff
}
}
+VISIBLE_IF_KUNIT void apply_3x4_matrix(struct pixel_argb_s32 *pixel, const struct drm_color_ctm_3x4 *matrix)
+{
+ s64 rf, gf, bf;
+ s64 r, g, b;
+
+ r = drm_int2fixp(pixel->r);
+ g = drm_int2fixp(pixel->g);
+ b = drm_int2fixp(pixel->b);
+
+ rf = drm_fixp_mul(drm_sm2fixp(matrix->matrix[0]), r) +
+ drm_fixp_mul(drm_sm2fixp(matrix->matrix[1]), g) +
+ drm_fixp_mul(drm_sm2fixp(matrix->matrix[2]), b) +
+ drm_sm2fixp(matrix->matrix[3]);
+
+ gf = drm_fixp_mul(drm_sm2fixp(matrix->matrix[4]), r) +
+ drm_fixp_mul(drm_sm2fixp(matrix->matrix[5]), g) +
+ drm_fixp_mul(drm_sm2fixp(matrix->matrix[6]), b) +
+ drm_sm2fixp(matrix->matrix[7]);
+
+ bf = drm_fixp_mul(drm_sm2fixp(matrix->matrix[8]), r) +
+ drm_fixp_mul(drm_sm2fixp(matrix->matrix[9]), g) +
+ drm_fixp_mul(drm_sm2fixp(matrix->matrix[10]), b) +
+ drm_sm2fixp(matrix->matrix[11]);
+
+ pixel->r = drm_fixp2int_round(rf);
+ pixel->g = drm_fixp2int_round(gf);
+ pixel->b = drm_fixp2int_round(bf);
+}
+EXPORT_SYMBOL_IF_KUNIT(apply_3x4_matrix);
+
+static void apply_colorop(struct pixel_argb_s32 *pixel, struct drm_colorop *colorop)
+{
+ struct drm_colorop_state *colorop_state = colorop->state;
+
+ if (colorop->type == DRM_COLOROP_1D_CURVE) {
+ switch (colorop_state->curve_1d_type) {
+ case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF:
+ pixel->r = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->r, LUT_RED);
+ pixel->g = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->g, LUT_GREEN);
+ pixel->b = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->b, LUT_BLUE);
+ break;
+ case DRM_COLOROP_1D_CURVE_SRGB_EOTF:
+ pixel->r = apply_lut_to_channel_value(&srgb_eotf, pixel->r, LUT_RED);
+ pixel->g = apply_lut_to_channel_value(&srgb_eotf, pixel->g, LUT_GREEN);
+ pixel->b = apply_lut_to_channel_value(&srgb_eotf, pixel->b, LUT_BLUE);
+ break;
+ default:
+ DRM_DEBUG_DRIVER("unkown colorop 1D curve type %d\n", colorop_state->curve_1d_type);
+ break;
+ }
+ } else if (colorop->type == DRM_COLOROP_CTM_3X4) {
+ if (colorop_state->data)
+ apply_3x4_matrix(pixel, (struct drm_color_ctm_3x4 *) colorop_state->data->data);
+ }
+
+}
+
+static void pre_blend_color_transform(const struct vkms_plane_state *plane_state, struct line_buffer *output_buffer)
+{
+ struct pixel_argb_s32 pixel;
+
+ for (size_t x = 0; x < output_buffer->n_pixels; x++) {
+ struct drm_colorop *colorop = plane_state->base.base.color_pipeline;
+
+ /*
+ * Some operations, such as applying a BT709 encoding matrix,
+ * followed by a decoding matrix, require that we preserve
+ * values above 1.0 and below 0.0 until the end of the pipeline.
+ *
+ * Pack the 16-bit UNORM values into s32 to give us head-room to
+ * avoid clipping until we're at the end of the pipeline. Clip
+ * intentionally at the end of the pipeline before packing
+ * UNORM values back into u16.
+ */
+ pixel.a = output_buffer->pixels[x].a;
+ pixel.r = output_buffer->pixels[x].r;
+ pixel.g = output_buffer->pixels[x].g;
+ pixel.b = output_buffer->pixels[x].b;
+
+ while (colorop) {
+ struct drm_colorop_state *colorop_state;
+
+ colorop_state = colorop->state;
+
+ if (!colorop_state)
+ return;
+
+ if (!colorop_state->bypass)
+ apply_colorop(&pixel, colorop);
+
+ colorop = colorop->next;
+ }
+
+ /* clamp values */
+ output_buffer->pixels[x].a = clamp_val(pixel.a, 0, 0xffff);
+ output_buffer->pixels[x].r = clamp_val(pixel.r, 0, 0xffff);
+ output_buffer->pixels[x].g = clamp_val(pixel.g, 0, 0xffff);
+ output_buffer->pixels[x].b = clamp_val(pixel.b, 0, 0xffff);
+ }
+}
+
/**
* direction_for_rotation() - Get the correct reading direction for a given rotation
*
@@ -390,6 +487,7 @@ static void blend(struct vkms_writeback_job *wb,
/* The active planes are composed associatively in z-order. */
for (size_t i = 0; i < n_active_planes; i++) {
+ /* FIXME: Check if merge conflict is resolved correcty */
blend_line(plane[i], y, crtc_x_limit, stage_buffer, output_buffer);
}
diff --git a/drivers/gpu/drm/vkms/vkms_composer.h b/drivers/gpu/drm/vkms/vkms_composer.h
new file mode 100644
index 000000000000..afef65a5c3ba
--- /dev/null
+++ b/drivers/gpu/drm/vkms/vkms_composer.h
@@ -0,0 +1,27 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef _VKMS_COMPOSER_H_
+#define _VKMS_COMPOSER_H_
+
+#include <kunit/visibility.h>
+
+/*
+ * This enum is related to the positions of the variables inside
+ * `struct drm_color_lut`, so the order of both needs to be the same.
+ */
+enum lut_channel {
+ LUT_RED = 0,
+ LUT_GREEN,
+ LUT_BLUE,
+ LUT_RESERVED
+};
+
+#if IS_ENABLED(CONFIG_KUNIT)
+u16 lerp_u16(u16 a, u16 b, s64 t);
+s64 get_lut_index(const struct vkms_color_lut *lut, u16 channel_value);
+u16 apply_lut_to_channel_value(const struct vkms_color_lut *lut, u16 channel_value,
+ enum lut_channel channel);
+void apply_3x4_matrix(struct pixel_argb_s32 *pixel, const struct drm_color_ctm_3x4 *matrix);
+#endif
+
+#endif /* _VKMS_COMPOSER_H_ */
diff --git a/drivers/gpu/drm/vkms/vkms_drv.h b/drivers/gpu/drm/vkms/vkms_drv.h
index 00541eff3d1b..495bd81c7bab 100644
--- a/drivers/gpu/drm/vkms/vkms_drv.h
+++ b/drivers/gpu/drm/vkms/vkms_drv.h
@@ -43,6 +43,10 @@ struct vkms_frame_info {
unsigned int rotation;
};
+struct pixel_argb_s32 {
+ s32 a, r, g, b;
+};
+
struct pixel_argb_u16 {
u16 a, r, g, b;
};
@@ -277,4 +281,8 @@ void vkms_writeback_row(struct vkms_writeback_job *wb, const struct line_buffer
/* Writeback */
int vkms_enable_writeback_connector(struct vkms_device *vkmsdev);
+/* Colorops */
+int vkms_initialize_colorops(struct drm_plane *plane);
+
+
#endif /* _VKMS_DRV_H_ */
diff --git a/drivers/gpu/drm/vkms/vkms_luts.c b/drivers/gpu/drm/vkms/vkms_luts.c
new file mode 100644
index 000000000000..6553d6d442b4
--- /dev/null
+++ b/drivers/gpu/drm/vkms/vkms_luts.c
@@ -0,0 +1,802 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#include <drm/drm_mode.h>
+
+#include "vkms_drv.h"
+#include "vkms_luts.h"
+
+static struct drm_color_lut linear_array[LUT_SIZE] = {
+ { 0x0, 0x0, 0x0, 0 },
+ { 0x101, 0x101, 0x101, 0 },
+ { 0x202, 0x202, 0x202, 0 },
+ { 0x303, 0x303, 0x303, 0 },
+ { 0x404, 0x404, 0x404, 0 },
+ { 0x505, 0x505, 0x505, 0 },
+ { 0x606, 0x606, 0x606, 0 },
+ { 0x707, 0x707, 0x707, 0 },
+ { 0x808, 0x808, 0x808, 0 },
+ { 0x909, 0x909, 0x909, 0 },
+ { 0xa0a, 0xa0a, 0xa0a, 0 },
+ { 0xb0b, 0xb0b, 0xb0b, 0 },
+ { 0xc0c, 0xc0c, 0xc0c, 0 },
+ { 0xd0d, 0xd0d, 0xd0d, 0 },
+ { 0xe0e, 0xe0e, 0xe0e, 0 },
+ { 0xf0f, 0xf0f, 0xf0f, 0 },
+ { 0x1010, 0x1010, 0x1010, 0 },
+ { 0x1111, 0x1111, 0x1111, 0 },
+ { 0x1212, 0x1212, 0x1212, 0 },
+ { 0x1313, 0x1313, 0x1313, 0 },
+ { 0x1414, 0x1414, 0x1414, 0 },
+ { 0x1515, 0x1515, 0x1515, 0 },
+ { 0x1616, 0x1616, 0x1616, 0 },
+ { 0x1717, 0x1717, 0x1717, 0 },
+ { 0x1818, 0x1818, 0x1818, 0 },
+ { 0x1919, 0x1919, 0x1919, 0 },
+ { 0x1a1a, 0x1a1a, 0x1a1a, 0 },
+ { 0x1b1b, 0x1b1b, 0x1b1b, 0 },
+ { 0x1c1c, 0x1c1c, 0x1c1c, 0 },
+ { 0x1d1d, 0x1d1d, 0x1d1d, 0 },
+ { 0x1e1e, 0x1e1e, 0x1e1e, 0 },
+ { 0x1f1f, 0x1f1f, 0x1f1f, 0 },
+ { 0x2020, 0x2020, 0x2020, 0 },
+ { 0x2121, 0x2121, 0x2121, 0 },
+ { 0x2222, 0x2222, 0x2222, 0 },
+ { 0x2323, 0x2323, 0x2323, 0 },
+ { 0x2424, 0x2424, 0x2424, 0 },
+ { 0x2525, 0x2525, 0x2525, 0 },
+ { 0x2626, 0x2626, 0x2626, 0 },
+ { 0x2727, 0x2727, 0x2727, 0 },
+ { 0x2828, 0x2828, 0x2828, 0 },
+ { 0x2929, 0x2929, 0x2929, 0 },
+ { 0x2a2a, 0x2a2a, 0x2a2a, 0 },
+ { 0x2b2b, 0x2b2b, 0x2b2b, 0 },
+ { 0x2c2c, 0x2c2c, 0x2c2c, 0 },
+ { 0x2d2d, 0x2d2d, 0x2d2d, 0 },
+ { 0x2e2e, 0x2e2e, 0x2e2e, 0 },
+ { 0x2f2f, 0x2f2f, 0x2f2f, 0 },
+ { 0x3030, 0x3030, 0x3030, 0 },
+ { 0x3131, 0x3131, 0x3131, 0 },
+ { 0x3232, 0x3232, 0x3232, 0 },
+ { 0x3333, 0x3333, 0x3333, 0 },
+ { 0x3434, 0x3434, 0x3434, 0 },
+ { 0x3535, 0x3535, 0x3535, 0 },
+ { 0x3636, 0x3636, 0x3636, 0 },
+ { 0x3737, 0x3737, 0x3737, 0 },
+ { 0x3838, 0x3838, 0x3838, 0 },
+ { 0x3939, 0x3939, 0x3939, 0 },
+ { 0x3a3a, 0x3a3a, 0x3a3a, 0 },
+ { 0x3b3b, 0x3b3b, 0x3b3b, 0 },
+ { 0x3c3c, 0x3c3c, 0x3c3c, 0 },
+ { 0x3d3d, 0x3d3d, 0x3d3d, 0 },
+ { 0x3e3e, 0x3e3e, 0x3e3e, 0 },
+ { 0x3f3f, 0x3f3f, 0x3f3f, 0 },
+ { 0x4040, 0x4040, 0x4040, 0 },
+ { 0x4141, 0x4141, 0x4141, 0 },
+ { 0x4242, 0x4242, 0x4242, 0 },
+ { 0x4343, 0x4343, 0x4343, 0 },
+ { 0x4444, 0x4444, 0x4444, 0 },
+ { 0x4545, 0x4545, 0x4545, 0 },
+ { 0x4646, 0x4646, 0x4646, 0 },
+ { 0x4747, 0x4747, 0x4747, 0 },
+ { 0x4848, 0x4848, 0x4848, 0 },
+ { 0x4949, 0x4949, 0x4949, 0 },
+ { 0x4a4a, 0x4a4a, 0x4a4a, 0 },
+ { 0x4b4b, 0x4b4b, 0x4b4b, 0 },
+ { 0x4c4c, 0x4c4c, 0x4c4c, 0 },
+ { 0x4d4d, 0x4d4d, 0x4d4d, 0 },
+ { 0x4e4e, 0x4e4e, 0x4e4e, 0 },
+ { 0x4f4f, 0x4f4f, 0x4f4f, 0 },
+ { 0x5050, 0x5050, 0x5050, 0 },
+ { 0x5151, 0x5151, 0x5151, 0 },
+ { 0x5252, 0x5252, 0x5252, 0 },
+ { 0x5353, 0x5353, 0x5353, 0 },
+ { 0x5454, 0x5454, 0x5454, 0 },
+ { 0x5555, 0x5555, 0x5555, 0 },
+ { 0x5656, 0x5656, 0x5656, 0 },
+ { 0x5757, 0x5757, 0x5757, 0 },
+ { 0x5858, 0x5858, 0x5858, 0 },
+ { 0x5959, 0x5959, 0x5959, 0 },
+ { 0x5a5a, 0x5a5a, 0x5a5a, 0 },
+ { 0x5b5b, 0x5b5b, 0x5b5b, 0 },
+ { 0x5c5c, 0x5c5c, 0x5c5c, 0 },
+ { 0x5d5d, 0x5d5d, 0x5d5d, 0 },
+ { 0x5e5e, 0x5e5e, 0x5e5e, 0 },
+ { 0x5f5f, 0x5f5f, 0x5f5f, 0 },
+ { 0x6060, 0x6060, 0x6060, 0 },
+ { 0x6161, 0x6161, 0x6161, 0 },
+ { 0x6262, 0x6262, 0x6262, 0 },
+ { 0x6363, 0x6363, 0x6363, 0 },
+ { 0x6464, 0x6464, 0x6464, 0 },
+ { 0x6565, 0x6565, 0x6565, 0 },
+ { 0x6666, 0x6666, 0x6666, 0 },
+ { 0x6767, 0x6767, 0x6767, 0 },
+ { 0x6868, 0x6868, 0x6868, 0 },
+ { 0x6969, 0x6969, 0x6969, 0 },
+ { 0x6a6a, 0x6a6a, 0x6a6a, 0 },
+ { 0x6b6b, 0x6b6b, 0x6b6b, 0 },
+ { 0x6c6c, 0x6c6c, 0x6c6c, 0 },
+ { 0x6d6d, 0x6d6d, 0x6d6d, 0 },
+ { 0x6e6e, 0x6e6e, 0x6e6e, 0 },
+ { 0x6f6f, 0x6f6f, 0x6f6f, 0 },
+ { 0x7070, 0x7070, 0x7070, 0 },
+ { 0x7171, 0x7171, 0x7171, 0 },
+ { 0x7272, 0x7272, 0x7272, 0 },
+ { 0x7373, 0x7373, 0x7373, 0 },
+ { 0x7474, 0x7474, 0x7474, 0 },
+ { 0x7575, 0x7575, 0x7575, 0 },
+ { 0x7676, 0x7676, 0x7676, 0 },
+ { 0x7777, 0x7777, 0x7777, 0 },
+ { 0x7878, 0x7878, 0x7878, 0 },
+ { 0x7979, 0x7979, 0x7979, 0 },
+ { 0x7a7a, 0x7a7a, 0x7a7a, 0 },
+ { 0x7b7b, 0x7b7b, 0x7b7b, 0 },
+ { 0x7c7c, 0x7c7c, 0x7c7c, 0 },
+ { 0x7d7d, 0x7d7d, 0x7d7d, 0 },
+ { 0x7e7e, 0x7e7e, 0x7e7e, 0 },
+ { 0x7f7f, 0x7f7f, 0x7f7f, 0 },
+ { 0x8080, 0x8080, 0x8080, 0 },
+ { 0x8181, 0x8181, 0x8181, 0 },
+ { 0x8282, 0x8282, 0x8282, 0 },
+ { 0x8383, 0x8383, 0x8383, 0 },
+ { 0x8484, 0x8484, 0x8484, 0 },
+ { 0x8585, 0x8585, 0x8585, 0 },
+ { 0x8686, 0x8686, 0x8686, 0 },
+ { 0x8787, 0x8787, 0x8787, 0 },
+ { 0x8888, 0x8888, 0x8888, 0 },
+ { 0x8989, 0x8989, 0x8989, 0 },
+ { 0x8a8a, 0x8a8a, 0x8a8a, 0 },
+ { 0x8b8b, 0x8b8b, 0x8b8b, 0 },
+ { 0x8c8c, 0x8c8c, 0x8c8c, 0 },
+ { 0x8d8d, 0x8d8d, 0x8d8d, 0 },
+ { 0x8e8e, 0x8e8e, 0x8e8e, 0 },
+ { 0x8f8f, 0x8f8f, 0x8f8f, 0 },
+ { 0x9090, 0x9090, 0x9090, 0 },
+ { 0x9191, 0x9191, 0x9191, 0 },
+ { 0x9292, 0x9292, 0x9292, 0 },
+ { 0x9393, 0x9393, 0x9393, 0 },
+ { 0x9494, 0x9494, 0x9494, 0 },
+ { 0x9595, 0x9595, 0x9595, 0 },
+ { 0x9696, 0x9696, 0x9696, 0 },
+ { 0x9797, 0x9797, 0x9797, 0 },
+ { 0x9898, 0x9898, 0x9898, 0 },
+ { 0x9999, 0x9999, 0x9999, 0 },
+ { 0x9a9a, 0x9a9a, 0x9a9a, 0 },
+ { 0x9b9b, 0x9b9b, 0x9b9b, 0 },
+ { 0x9c9c, 0x9c9c, 0x9c9c, 0 },
+ { 0x9d9d, 0x9d9d, 0x9d9d, 0 },
+ { 0x9e9e, 0x9e9e, 0x9e9e, 0 },
+ { 0x9f9f, 0x9f9f, 0x9f9f, 0 },
+ { 0xa0a0, 0xa0a0, 0xa0a0, 0 },
+ { 0xa1a1, 0xa1a1, 0xa1a1, 0 },
+ { 0xa2a2, 0xa2a2, 0xa2a2, 0 },
+ { 0xa3a3, 0xa3a3, 0xa3a3, 0 },
+ { 0xa4a4, 0xa4a4, 0xa4a4, 0 },
+ { 0xa5a5, 0xa5a5, 0xa5a5, 0 },
+ { 0xa6a6, 0xa6a6, 0xa6a6, 0 },
+ { 0xa7a7, 0xa7a7, 0xa7a7, 0 },
+ { 0xa8a8, 0xa8a8, 0xa8a8, 0 },
+ { 0xa9a9, 0xa9a9, 0xa9a9, 0 },
+ { 0xaaaa, 0xaaaa, 0xaaaa, 0 },
+ { 0xabab, 0xabab, 0xabab, 0 },
+ { 0xacac, 0xacac, 0xacac, 0 },
+ { 0xadad, 0xadad, 0xadad, 0 },
+ { 0xaeae, 0xaeae, 0xaeae, 0 },
+ { 0xafaf, 0xafaf, 0xafaf, 0 },
+ { 0xb0b0, 0xb0b0, 0xb0b0, 0 },
+ { 0xb1b1, 0xb1b1, 0xb1b1, 0 },
+ { 0xb2b2, 0xb2b2, 0xb2b2, 0 },
+ { 0xb3b3, 0xb3b3, 0xb3b3, 0 },
+ { 0xb4b4, 0xb4b4, 0xb4b4, 0 },
+ { 0xb5b5, 0xb5b5, 0xb5b5, 0 },
+ { 0xb6b6, 0xb6b6, 0xb6b6, 0 },
+ { 0xb7b7, 0xb7b7, 0xb7b7, 0 },
+ { 0xb8b8, 0xb8b8, 0xb8b8, 0 },
+ { 0xb9b9, 0xb9b9, 0xb9b9, 0 },
+ { 0xbaba, 0xbaba, 0xbaba, 0 },
+ { 0xbbbb, 0xbbbb, 0xbbbb, 0 },
+ { 0xbcbc, 0xbcbc, 0xbcbc, 0 },
+ { 0xbdbd, 0xbdbd, 0xbdbd, 0 },
+ { 0xbebe, 0xbebe, 0xbebe, 0 },
+ { 0xbfbf, 0xbfbf, 0xbfbf, 0 },
+ { 0xc0c0, 0xc0c0, 0xc0c0, 0 },
+ { 0xc1c1, 0xc1c1, 0xc1c1, 0 },
+ { 0xc2c2, 0xc2c2, 0xc2c2, 0 },
+ { 0xc3c3, 0xc3c3, 0xc3c3, 0 },
+ { 0xc4c4, 0xc4c4, 0xc4c4, 0 },
+ { 0xc5c5, 0xc5c5, 0xc5c5, 0 },
+ { 0xc6c6, 0xc6c6, 0xc6c6, 0 },
+ { 0xc7c7, 0xc7c7, 0xc7c7, 0 },
+ { 0xc8c8, 0xc8c8, 0xc8c8, 0 },
+ { 0xc9c9, 0xc9c9, 0xc9c9, 0 },
+ { 0xcaca, 0xcaca, 0xcaca, 0 },
+ { 0xcbcb, 0xcbcb, 0xcbcb, 0 },
+ { 0xcccc, 0xcccc, 0xcccc, 0 },
+ { 0xcdcd, 0xcdcd, 0xcdcd, 0 },
+ { 0xcece, 0xcece, 0xcece, 0 },
+ { 0xcfcf, 0xcfcf, 0xcfcf, 0 },
+ { 0xd0d0, 0xd0d0, 0xd0d0, 0 },
+ { 0xd1d1, 0xd1d1, 0xd1d1, 0 },
+ { 0xd2d2, 0xd2d2, 0xd2d2, 0 },
+ { 0xd3d3, 0xd3d3, 0xd3d3, 0 },
+ { 0xd4d4, 0xd4d4, 0xd4d4, 0 },
+ { 0xd5d5, 0xd5d5, 0xd5d5, 0 },
+ { 0xd6d6, 0xd6d6, 0xd6d6, 0 },
+ { 0xd7d7, 0xd7d7, 0xd7d7, 0 },
+ { 0xd8d8, 0xd8d8, 0xd8d8, 0 },
+ { 0xd9d9, 0xd9d9, 0xd9d9, 0 },
+ { 0xdada, 0xdada, 0xdada, 0 },
+ { 0xdbdb, 0xdbdb, 0xdbdb, 0 },
+ { 0xdcdc, 0xdcdc, 0xdcdc, 0 },
+ { 0xdddd, 0xdddd, 0xdddd, 0 },
+ { 0xdede, 0xdede, 0xdede, 0 },
+ { 0xdfdf, 0xdfdf, 0xdfdf, 0 },
+ { 0xe0e0, 0xe0e0, 0xe0e0, 0 },
+ { 0xe1e1, 0xe1e1, 0xe1e1, 0 },
+ { 0xe2e2, 0xe2e2, 0xe2e2, 0 },
+ { 0xe3e3, 0xe3e3, 0xe3e3, 0 },
+ { 0xe4e4, 0xe4e4, 0xe4e4, 0 },
+ { 0xe5e5, 0xe5e5, 0xe5e5, 0 },
+ { 0xe6e6, 0xe6e6, 0xe6e6, 0 },
+ { 0xe7e7, 0xe7e7, 0xe7e7, 0 },
+ { 0xe8e8, 0xe8e8, 0xe8e8, 0 },
+ { 0xe9e9, 0xe9e9, 0xe9e9, 0 },
+ { 0xeaea, 0xeaea, 0xeaea, 0 },
+ { 0xebeb, 0xebeb, 0xebeb, 0 },
+ { 0xecec, 0xecec, 0xecec, 0 },
+ { 0xeded, 0xeded, 0xeded, 0 },
+ { 0xeeee, 0xeeee, 0xeeee, 0 },
+ { 0xefef, 0xefef, 0xefef, 0 },
+ { 0xf0f0, 0xf0f0, 0xf0f0, 0 },
+ { 0xf1f1, 0xf1f1, 0xf1f1, 0 },
+ { 0xf2f2, 0xf2f2, 0xf2f2, 0 },
+ { 0xf3f3, 0xf3f3, 0xf3f3, 0 },
+ { 0xf4f4, 0xf4f4, 0xf4f4, 0 },
+ { 0xf5f5, 0xf5f5, 0xf5f5, 0 },
+ { 0xf6f6, 0xf6f6, 0xf6f6, 0 },
+ { 0xf7f7, 0xf7f7, 0xf7f7, 0 },
+ { 0xf8f8, 0xf8f8, 0xf8f8, 0 },
+ { 0xf9f9, 0xf9f9, 0xf9f9, 0 },
+ { 0xfafa, 0xfafa, 0xfafa, 0 },
+ { 0xfbfb, 0xfbfb, 0xfbfb, 0 },
+ { 0xfcfc, 0xfcfc, 0xfcfc, 0 },
+ { 0xfdfd, 0xfdfd, 0xfdfd, 0 },
+ { 0xfefe, 0xfefe, 0xfefe, 0 },
+ { 0xffff, 0xffff, 0xffff, 0 },
+};
+
+const struct vkms_color_lut linear_eotf = {
+ .base = linear_array,
+ .lut_length = LUT_SIZE,
+ .channel_value2index_ratio = 0xff00ffll
+};
+
+
+static struct drm_color_lut srgb_array[LUT_SIZE] = {
+ { 0x0, 0x0, 0x0, 0 },
+ { 0x13, 0x13, 0x13, 0 },
+ { 0x27, 0x27, 0x27, 0 },
+ { 0x3b, 0x3b, 0x3b, 0 },
+ { 0x4f, 0x4f, 0x4f, 0 },
+ { 0x63, 0x63, 0x63, 0 },
+ { 0x77, 0x77, 0x77, 0 },
+ { 0x8b, 0x8b, 0x8b, 0 },
+ { 0x9f, 0x9f, 0x9f, 0 },
+ { 0xb3, 0xb3, 0xb3, 0 },
+ { 0xc6, 0xc6, 0xc6, 0 },
+ { 0xdb, 0xdb, 0xdb, 0 },
+ { 0xf0, 0xf0, 0xf0, 0 },
+ { 0x107, 0x107, 0x107, 0 },
+ { 0x11f, 0x11f, 0x11f, 0 },
+ { 0x139, 0x139, 0x139, 0 },
+ { 0x153, 0x153, 0x153, 0 },
+ { 0x16f, 0x16f, 0x16f, 0 },
+ { 0x18c, 0x18c, 0x18c, 0 },
+ { 0x1aa, 0x1aa, 0x1aa, 0 },
+ { 0x1ca, 0x1ca, 0x1ca, 0 },
+ { 0x1eb, 0x1eb, 0x1eb, 0 },
+ { 0x20d, 0x20d, 0x20d, 0 },
+ { 0x231, 0x231, 0x231, 0 },
+ { 0x256, 0x256, 0x256, 0 },
+ { 0x27d, 0x27d, 0x27d, 0 },
+ { 0x2a4, 0x2a4, 0x2a4, 0 },
+ { 0x2ce, 0x2ce, 0x2ce, 0 },
+ { 0x2f9, 0x2f9, 0x2f9, 0 },
+ { 0x325, 0x325, 0x325, 0 },
+ { 0x352, 0x352, 0x352, 0 },
+ { 0x381, 0x381, 0x381, 0 },
+ { 0x3b2, 0x3b2, 0x3b2, 0 },
+ { 0x3e4, 0x3e4, 0x3e4, 0 },
+ { 0x418, 0x418, 0x418, 0 },
+ { 0x44d, 0x44d, 0x44d, 0 },
+ { 0x484, 0x484, 0x484, 0 },
+ { 0x4bc, 0x4bc, 0x4bc, 0 },
+ { 0x4f6, 0x4f6, 0x4f6, 0 },
+ { 0x531, 0x531, 0x531, 0 },
+ { 0x56e, 0x56e, 0x56e, 0 },
+ { 0x5ad, 0x5ad, 0x5ad, 0 },
+ { 0x5ed, 0x5ed, 0x5ed, 0 },
+ { 0x62f, 0x62f, 0x62f, 0 },
+ { 0x672, 0x672, 0x672, 0 },
+ { 0x6b7, 0x6b7, 0x6b7, 0 },
+ { 0x6fe, 0x6fe, 0x6fe, 0 },
+ { 0x746, 0x746, 0x746, 0 },
+ { 0x791, 0x791, 0x791, 0 },
+ { 0x7dc, 0x7dc, 0x7dc, 0 },
+ { 0x82a, 0x82a, 0x82a, 0 },
+ { 0x879, 0x879, 0x879, 0 },
+ { 0x8ca, 0x8ca, 0x8ca, 0 },
+ { 0x91d, 0x91d, 0x91d, 0 },
+ { 0x971, 0x971, 0x971, 0 },
+ { 0x9c7, 0x9c7, 0x9c7, 0 },
+ { 0xa1f, 0xa1f, 0xa1f, 0 },
+ { 0xa79, 0xa79, 0xa79, 0 },
+ { 0xad4, 0xad4, 0xad4, 0 },
+ { 0xb32, 0xb32, 0xb32, 0 },
+ { 0xb91, 0xb91, 0xb91, 0 },
+ { 0xbf2, 0xbf2, 0xbf2, 0 },
+ { 0xc54, 0xc54, 0xc54, 0 },
+ { 0xcb9, 0xcb9, 0xcb9, 0 },
+ { 0xd1f, 0xd1f, 0xd1f, 0 },
+ { 0xd88, 0xd88, 0xd88, 0 },
+ { 0xdf2, 0xdf2, 0xdf2, 0 },
+ { 0xe5e, 0xe5e, 0xe5e, 0 },
+ { 0xecc, 0xecc, 0xecc, 0 },
+ { 0xf3c, 0xf3c, 0xf3c, 0 },
+ { 0xfad, 0xfad, 0xfad, 0 },
+ { 0x1021, 0x1021, 0x1021, 0 },
+ { 0x1096, 0x1096, 0x1096, 0 },
+ { 0x110e, 0x110e, 0x110e, 0 },
+ { 0x1187, 0x1187, 0x1187, 0 },
+ { 0x1203, 0x1203, 0x1203, 0 },
+ { 0x1280, 0x1280, 0x1280, 0 },
+ { 0x12ff, 0x12ff, 0x12ff, 0 },
+ { 0x1380, 0x1380, 0x1380, 0 },
+ { 0x1404, 0x1404, 0x1404, 0 },
+ { 0x1489, 0x1489, 0x1489, 0 },
+ { 0x1510, 0x1510, 0x1510, 0 },
+ { 0x1599, 0x1599, 0x1599, 0 },
+ { 0x1624, 0x1624, 0x1624, 0 },
+ { 0x16b2, 0x16b2, 0x16b2, 0 },
+ { 0x1741, 0x1741, 0x1741, 0 },
+ { 0x17d2, 0x17d2, 0x17d2, 0 },
+ { 0x1865, 0x1865, 0x1865, 0 },
+ { 0x18fb, 0x18fb, 0x18fb, 0 },
+ { 0x1992, 0x1992, 0x1992, 0 },
+ { 0x1a2c, 0x1a2c, 0x1a2c, 0 },
+ { 0x1ac8, 0x1ac8, 0x1ac8, 0 },
+ { 0x1b65, 0x1b65, 0x1b65, 0 },
+ { 0x1c05, 0x1c05, 0x1c05, 0 },
+ { 0x1ca7, 0x1ca7, 0x1ca7, 0 },
+ { 0x1d4b, 0x1d4b, 0x1d4b, 0 },
+ { 0x1df1, 0x1df1, 0x1df1, 0 },
+ { 0x1e99, 0x1e99, 0x1e99, 0 },
+ { 0x1f44, 0x1f44, 0x1f44, 0 },
+ { 0x1ff0, 0x1ff0, 0x1ff0, 0 },
+ { 0x209f, 0x209f, 0x209f, 0 },
+ { 0x2150, 0x2150, 0x2150, 0 },
+ { 0x2203, 0x2203, 0x2203, 0 },
+ { 0x22b8, 0x22b8, 0x22b8, 0 },
+ { 0x2370, 0x2370, 0x2370, 0 },
+ { 0x2429, 0x2429, 0x2429, 0 },
+ { 0x24e5, 0x24e5, 0x24e5, 0 },
+ { 0x25a3, 0x25a3, 0x25a3, 0 },
+ { 0x2663, 0x2663, 0x2663, 0 },
+ { 0x2726, 0x2726, 0x2726, 0 },
+ { 0x27ea, 0x27ea, 0x27ea, 0 },
+ { 0x28b1, 0x28b1, 0x28b1, 0 },
+ { 0x297a, 0x297a, 0x297a, 0 },
+ { 0x2a45, 0x2a45, 0x2a45, 0 },
+ { 0x2b13, 0x2b13, 0x2b13, 0 },
+ { 0x2be3, 0x2be3, 0x2be3, 0 },
+ { 0x2cb5, 0x2cb5, 0x2cb5, 0 },
+ { 0x2d89, 0x2d89, 0x2d89, 0 },
+ { 0x2e60, 0x2e60, 0x2e60, 0 },
+ { 0x2f39, 0x2f39, 0x2f39, 0 },
+ { 0x3014, 0x3014, 0x3014, 0 },
+ { 0x30f2, 0x30f2, 0x30f2, 0 },
+ { 0x31d2, 0x31d2, 0x31d2, 0 },
+ { 0x32b4, 0x32b4, 0x32b4, 0 },
+ { 0x3398, 0x3398, 0x3398, 0 },
+ { 0x347f, 0x347f, 0x347f, 0 },
+ { 0x3569, 0x3569, 0x3569, 0 },
+ { 0x3654, 0x3654, 0x3654, 0 },
+ { 0x3742, 0x3742, 0x3742, 0 },
+ { 0x3832, 0x3832, 0x3832, 0 },
+ { 0x3925, 0x3925, 0x3925, 0 },
+ { 0x3a1a, 0x3a1a, 0x3a1a, 0 },
+ { 0x3b11, 0x3b11, 0x3b11, 0 },
+ { 0x3c0b, 0x3c0b, 0x3c0b, 0 },
+ { 0x3d07, 0x3d07, 0x3d07, 0 },
+ { 0x3e05, 0x3e05, 0x3e05, 0 },
+ { 0x3f06, 0x3f06, 0x3f06, 0 },
+ { 0x400a, 0x400a, 0x400a, 0 },
+ { 0x410f, 0x410f, 0x410f, 0 },
+ { 0x4218, 0x4218, 0x4218, 0 },
+ { 0x4322, 0x4322, 0x4322, 0 },
+ { 0x442f, 0x442f, 0x442f, 0 },
+ { 0x453f, 0x453f, 0x453f, 0 },
+ { 0x4650, 0x4650, 0x4650, 0 },
+ { 0x4765, 0x4765, 0x4765, 0 },
+ { 0x487c, 0x487c, 0x487c, 0 },
+ { 0x4995, 0x4995, 0x4995, 0 },
+ { 0x4ab1, 0x4ab1, 0x4ab1, 0 },
+ { 0x4bcf, 0x4bcf, 0x4bcf, 0 },
+ { 0x4cf0, 0x4cf0, 0x4cf0, 0 },
+ { 0x4e13, 0x4e13, 0x4e13, 0 },
+ { 0x4f39, 0x4f39, 0x4f39, 0 },
+ { 0x5061, 0x5061, 0x5061, 0 },
+ { 0x518b, 0x518b, 0x518b, 0 },
+ { 0x52b9, 0x52b9, 0x52b9, 0 },
+ { 0x53e8, 0x53e8, 0x53e8, 0 },
+ { 0x551b, 0x551b, 0x551b, 0 },
+ { 0x5650, 0x5650, 0x5650, 0 },
+ { 0x5787, 0x5787, 0x5787, 0 },
+ { 0x58c1, 0x58c1, 0x58c1, 0 },
+ { 0x59fd, 0x59fd, 0x59fd, 0 },
+ { 0x5b3c, 0x5b3c, 0x5b3c, 0 },
+ { 0x5c7e, 0x5c7e, 0x5c7e, 0 },
+ { 0x5dc2, 0x5dc2, 0x5dc2, 0 },
+ { 0x5f09, 0x5f09, 0x5f09, 0 },
+ { 0x6052, 0x6052, 0x6052, 0 },
+ { 0x619e, 0x619e, 0x619e, 0 },
+ { 0x62ec, 0x62ec, 0x62ec, 0 },
+ { 0x643d, 0x643d, 0x643d, 0 },
+ { 0x6591, 0x6591, 0x6591, 0 },
+ { 0x66e7, 0x66e7, 0x66e7, 0 },
+ { 0x6840, 0x6840, 0x6840, 0 },
+ { 0x699b, 0x699b, 0x699b, 0 },
+ { 0x6afa, 0x6afa, 0x6afa, 0 },
+ { 0x6c5a, 0x6c5a, 0x6c5a, 0 },
+ { 0x6dbe, 0x6dbe, 0x6dbe, 0 },
+ { 0x6f24, 0x6f24, 0x6f24, 0 },
+ { 0x708c, 0x708c, 0x708c, 0 },
+ { 0x71f8, 0x71f8, 0x71f8, 0 },
+ { 0x7366, 0x7366, 0x7366, 0 },
+ { 0x74d6, 0x74d6, 0x74d6, 0 },
+ { 0x764a, 0x764a, 0x764a, 0 },
+ { 0x77c0, 0x77c0, 0x77c0, 0 },
+ { 0x7938, 0x7938, 0x7938, 0 },
+ { 0x7ab4, 0x7ab4, 0x7ab4, 0 },
+ { 0x7c32, 0x7c32, 0x7c32, 0 },
+ { 0x7db3, 0x7db3, 0x7db3, 0 },
+ { 0x7f36, 0x7f36, 0x7f36, 0 },
+ { 0x80bc, 0x80bc, 0x80bc, 0 },
+ { 0x8245, 0x8245, 0x8245, 0 },
+ { 0x83d1, 0x83d1, 0x83d1, 0 },
+ { 0x855f, 0x855f, 0x855f, 0 },
+ { 0x86f0, 0x86f0, 0x86f0, 0 },
+ { 0x8884, 0x8884, 0x8884, 0 },
+ { 0x8a1a, 0x8a1a, 0x8a1a, 0 },
+ { 0x8bb4, 0x8bb4, 0x8bb4, 0 },
+ { 0x8d50, 0x8d50, 0x8d50, 0 },
+ { 0x8eee, 0x8eee, 0x8eee, 0 },
+ { 0x9090, 0x9090, 0x9090, 0 },
+ { 0x9234, 0x9234, 0x9234, 0 },
+ { 0x93db, 0x93db, 0x93db, 0 },
+ { 0x9585, 0x9585, 0x9585, 0 },
+ { 0x9732, 0x9732, 0x9732, 0 },
+ { 0x98e1, 0x98e1, 0x98e1, 0 },
+ { 0x9a93, 0x9a93, 0x9a93, 0 },
+ { 0x9c48, 0x9c48, 0x9c48, 0 },
+ { 0x9e00, 0x9e00, 0x9e00, 0 },
+ { 0x9fbb, 0x9fbb, 0x9fbb, 0 },
+ { 0xa178, 0xa178, 0xa178, 0 },
+ { 0xa338, 0xa338, 0xa338, 0 },
+ { 0xa4fb, 0xa4fb, 0xa4fb, 0 },
+ { 0xa6c1, 0xa6c1, 0xa6c1, 0 },
+ { 0xa88a, 0xa88a, 0xa88a, 0 },
+ { 0xaa56, 0xaa56, 0xaa56, 0 },
+ { 0xac24, 0xac24, 0xac24, 0 },
+ { 0xadf5, 0xadf5, 0xadf5, 0 },
+ { 0xafc9, 0xafc9, 0xafc9, 0 },
+ { 0xb1a0, 0xb1a0, 0xb1a0, 0 },
+ { 0xb37a, 0xb37a, 0xb37a, 0 },
+ { 0xb557, 0xb557, 0xb557, 0 },
+ { 0xb736, 0xb736, 0xb736, 0 },
+ { 0xb919, 0xb919, 0xb919, 0 },
+ { 0xbafe, 0xbafe, 0xbafe, 0 },
+ { 0xbce6, 0xbce6, 0xbce6, 0 },
+ { 0xbed2, 0xbed2, 0xbed2, 0 },
+ { 0xc0c0, 0xc0c0, 0xc0c0, 0 },
+ { 0xc2b0, 0xc2b0, 0xc2b0, 0 },
+ { 0xc4a4, 0xc4a4, 0xc4a4, 0 },
+ { 0xc69b, 0xc69b, 0xc69b, 0 },
+ { 0xc895, 0xc895, 0xc895, 0 },
+ { 0xca91, 0xca91, 0xca91, 0 },
+ { 0xcc91, 0xcc91, 0xcc91, 0 },
+ { 0xce93, 0xce93, 0xce93, 0 },
+ { 0xd098, 0xd098, 0xd098, 0 },
+ { 0xd2a1, 0xd2a1, 0xd2a1, 0 },
+ { 0xd4ac, 0xd4ac, 0xd4ac, 0 },
+ { 0xd6ba, 0xd6ba, 0xd6ba, 0 },
+ { 0xd8cb, 0xd8cb, 0xd8cb, 0 },
+ { 0xdadf, 0xdadf, 0xdadf, 0 },
+ { 0xdcf7, 0xdcf7, 0xdcf7, 0 },
+ { 0xdf11, 0xdf11, 0xdf11, 0 },
+ { 0xe12e, 0xe12e, 0xe12e, 0 },
+ { 0xe34e, 0xe34e, 0xe34e, 0 },
+ { 0xe571, 0xe571, 0xe571, 0 },
+ { 0xe796, 0xe796, 0xe796, 0 },
+ { 0xe9bf, 0xe9bf, 0xe9bf, 0 },
+ { 0xebeb, 0xebeb, 0xebeb, 0 },
+ { 0xee1a, 0xee1a, 0xee1a, 0 },
+ { 0xf04c, 0xf04c, 0xf04c, 0 },
+ { 0xf281, 0xf281, 0xf281, 0 },
+ { 0xf4b9, 0xf4b9, 0xf4b9, 0 },
+ { 0xf6f4, 0xf6f4, 0xf6f4, 0 },
+ { 0xf932, 0xf932, 0xf932, 0 },
+ { 0xfb73, 0xfb73, 0xfb73, 0 },
+ { 0xfdb7, 0xfdb7, 0xfdb7, 0 },
+ { 0xffff, 0xffff, 0xffff, 0 },
+};
+
+const struct vkms_color_lut srgb_eotf = {
+ .base = srgb_array,
+ .lut_length = LUT_SIZE,
+ .channel_value2index_ratio = 0xff00ffll
+};
+
+static struct drm_color_lut srgb_inv_array[LUT_SIZE] = {
+ { 0x0, 0x0, 0x0, 0 },
+ { 0xcc2, 0xcc2, 0xcc2, 0 },
+ { 0x15be, 0x15be, 0x15be, 0 },
+ { 0x1c56, 0x1c56, 0x1c56, 0 },
+ { 0x21bd, 0x21bd, 0x21bd, 0 },
+ { 0x2666, 0x2666, 0x2666, 0 },
+ { 0x2a8a, 0x2a8a, 0x2a8a, 0 },
+ { 0x2e4c, 0x2e4c, 0x2e4c, 0 },
+ { 0x31c0, 0x31c0, 0x31c0, 0 },
+ { 0x34f6, 0x34f6, 0x34f6, 0 },
+ { 0x37f9, 0x37f9, 0x37f9, 0 },
+ { 0x3acf, 0x3acf, 0x3acf, 0 },
+ { 0x3d80, 0x3d80, 0x3d80, 0 },
+ { 0x4010, 0x4010, 0x4010, 0 },
+ { 0x4284, 0x4284, 0x4284, 0 },
+ { 0x44dd, 0x44dd, 0x44dd, 0 },
+ { 0x4720, 0x4720, 0x4720, 0 },
+ { 0x494e, 0x494e, 0x494e, 0 },
+ { 0x4b69, 0x4b69, 0x4b69, 0 },
+ { 0x4d73, 0x4d73, 0x4d73, 0 },
+ { 0x4f6e, 0x4f6e, 0x4f6e, 0 },
+ { 0x5159, 0x5159, 0x5159, 0 },
+ { 0x5337, 0x5337, 0x5337, 0 },
+ { 0x5509, 0x5509, 0x5509, 0 },
+ { 0x56cf, 0x56cf, 0x56cf, 0 },
+ { 0x588a, 0x588a, 0x588a, 0 },
+ { 0x5a3b, 0x5a3b, 0x5a3b, 0 },
+ { 0x5be2, 0x5be2, 0x5be2, 0 },
+ { 0x5d80, 0x5d80, 0x5d80, 0 },
+ { 0x5f16, 0x5f16, 0x5f16, 0 },
+ { 0x60a4, 0x60a4, 0x60a4, 0 },
+ { 0x6229, 0x6229, 0x6229, 0 },
+ { 0x63a8, 0x63a8, 0x63a8, 0 },
+ { 0x6520, 0x6520, 0x6520, 0 },
+ { 0x6691, 0x6691, 0x6691, 0 },
+ { 0x67fc, 0x67fc, 0x67fc, 0 },
+ { 0x6961, 0x6961, 0x6961, 0 },
+ { 0x6ac0, 0x6ac0, 0x6ac0, 0 },
+ { 0x6c19, 0x6c19, 0x6c19, 0 },
+ { 0x6d6e, 0x6d6e, 0x6d6e, 0 },
+ { 0x6ebd, 0x6ebd, 0x6ebd, 0 },
+ { 0x7008, 0x7008, 0x7008, 0 },
+ { 0x714d, 0x714d, 0x714d, 0 },
+ { 0x728f, 0x728f, 0x728f, 0 },
+ { 0x73cc, 0x73cc, 0x73cc, 0 },
+ { 0x7504, 0x7504, 0x7504, 0 },
+ { 0x7639, 0x7639, 0x7639, 0 },
+ { 0x776a, 0x776a, 0x776a, 0 },
+ { 0x7897, 0x7897, 0x7897, 0 },
+ { 0x79c1, 0x79c1, 0x79c1, 0 },
+ { 0x7ae7, 0x7ae7, 0x7ae7, 0 },
+ { 0x7c09, 0x7c09, 0x7c09, 0 },
+ { 0x7d28, 0x7d28, 0x7d28, 0 },
+ { 0x7e44, 0x7e44, 0x7e44, 0 },
+ { 0x7f5d, 0x7f5d, 0x7f5d, 0 },
+ { 0x8073, 0x8073, 0x8073, 0 },
+ { 0x8186, 0x8186, 0x8186, 0 },
+ { 0x8296, 0x8296, 0x8296, 0 },
+ { 0x83a4, 0x83a4, 0x83a4, 0 },
+ { 0x84ae, 0x84ae, 0x84ae, 0 },
+ { 0x85b6, 0x85b6, 0x85b6, 0 },
+ { 0x86bc, 0x86bc, 0x86bc, 0 },
+ { 0x87bf, 0x87bf, 0x87bf, 0 },
+ { 0x88bf, 0x88bf, 0x88bf, 0 },
+ { 0x89be, 0x89be, 0x89be, 0 },
+ { 0x8ab9, 0x8ab9, 0x8ab9, 0 },
+ { 0x8bb3, 0x8bb3, 0x8bb3, 0 },
+ { 0x8cab, 0x8cab, 0x8cab, 0 },
+ { 0x8da0, 0x8da0, 0x8da0, 0 },
+ { 0x8e93, 0x8e93, 0x8e93, 0 },
+ { 0x8f84, 0x8f84, 0x8f84, 0 },
+ { 0x9073, 0x9073, 0x9073, 0 },
+ { 0x9161, 0x9161, 0x9161, 0 },
+ { 0x924c, 0x924c, 0x924c, 0 },
+ { 0x9335, 0x9335, 0x9335, 0 },
+ { 0x941d, 0x941d, 0x941d, 0 },
+ { 0x9503, 0x9503, 0x9503, 0 },
+ { 0x95e7, 0x95e7, 0x95e7, 0 },
+ { 0x96c9, 0x96c9, 0x96c9, 0 },
+ { 0x97aa, 0x97aa, 0x97aa, 0 },
+ { 0x9889, 0x9889, 0x9889, 0 },
+ { 0x9966, 0x9966, 0x9966, 0 },
+ { 0x9a42, 0x9a42, 0x9a42, 0 },
+ { 0x9b1c, 0x9b1c, 0x9b1c, 0 },
+ { 0x9bf5, 0x9bf5, 0x9bf5, 0 },
+ { 0x9ccc, 0x9ccc, 0x9ccc, 0 },
+ { 0x9da1, 0x9da1, 0x9da1, 0 },
+ { 0x9e76, 0x9e76, 0x9e76, 0 },
+ { 0x9f49, 0x9f49, 0x9f49, 0 },
+ { 0xa01a, 0xa01a, 0xa01a, 0 },
+ { 0xa0ea, 0xa0ea, 0xa0ea, 0 },
+ { 0xa1b9, 0xa1b9, 0xa1b9, 0 },
+ { 0xa286, 0xa286, 0xa286, 0 },
+ { 0xa352, 0xa352, 0xa352, 0 },
+ { 0xa41d, 0xa41d, 0xa41d, 0 },
+ { 0xa4e7, 0xa4e7, 0xa4e7, 0 },
+ { 0xa5af, 0xa5af, 0xa5af, 0 },
+ { 0xa676, 0xa676, 0xa676, 0 },
+ { 0xa73c, 0xa73c, 0xa73c, 0 },
+ { 0xa801, 0xa801, 0xa801, 0 },
+ { 0xa8c5, 0xa8c5, 0xa8c5, 0 },
+ { 0xa987, 0xa987, 0xa987, 0 },
+ { 0xaa48, 0xaa48, 0xaa48, 0 },
+ { 0xab09, 0xab09, 0xab09, 0 },
+ { 0xabc8, 0xabc8, 0xabc8, 0 },
+ { 0xac86, 0xac86, 0xac86, 0 },
+ { 0xad43, 0xad43, 0xad43, 0 },
+ { 0xadff, 0xadff, 0xadff, 0 },
+ { 0xaeba, 0xaeba, 0xaeba, 0 },
+ { 0xaf74, 0xaf74, 0xaf74, 0 },
+ { 0xb02d, 0xb02d, 0xb02d, 0 },
+ { 0xb0e5, 0xb0e5, 0xb0e5, 0 },
+ { 0xb19c, 0xb19c, 0xb19c, 0 },
+ { 0xb252, 0xb252, 0xb252, 0 },
+ { 0xb307, 0xb307, 0xb307, 0 },
+ { 0xb3bb, 0xb3bb, 0xb3bb, 0 },
+ { 0xb46f, 0xb46f, 0xb46f, 0 },
+ { 0xb521, 0xb521, 0xb521, 0 },
+ { 0xb5d3, 0xb5d3, 0xb5d3, 0 },
+ { 0xb683, 0xb683, 0xb683, 0 },
+ { 0xb733, 0xb733, 0xb733, 0 },
+ { 0xb7e2, 0xb7e2, 0xb7e2, 0 },
+ { 0xb890, 0xb890, 0xb890, 0 },
+ { 0xb93d, 0xb93d, 0xb93d, 0 },
+ { 0xb9ea, 0xb9ea, 0xb9ea, 0 },
+ { 0xba96, 0xba96, 0xba96, 0 },
+ { 0xbb40, 0xbb40, 0xbb40, 0 },
+ { 0xbbea, 0xbbea, 0xbbea, 0 },
+ { 0xbc94, 0xbc94, 0xbc94, 0 },
+ { 0xbd3c, 0xbd3c, 0xbd3c, 0 },
+ { 0xbde4, 0xbde4, 0xbde4, 0 },
+ { 0xbe8b, 0xbe8b, 0xbe8b, 0 },
+ { 0xbf31, 0xbf31, 0xbf31, 0 },
+ { 0xbfd7, 0xbfd7, 0xbfd7, 0 },
+ { 0xc07b, 0xc07b, 0xc07b, 0 },
+ { 0xc120, 0xc120, 0xc120, 0 },
+ { 0xc1c3, 0xc1c3, 0xc1c3, 0 },
+ { 0xc266, 0xc266, 0xc266, 0 },
+ { 0xc308, 0xc308, 0xc308, 0 },
+ { 0xc3a9, 0xc3a9, 0xc3a9, 0 },
+ { 0xc449, 0xc449, 0xc449, 0 },
+ { 0xc4e9, 0xc4e9, 0xc4e9, 0 },
+ { 0xc589, 0xc589, 0xc589, 0 },
+ { 0xc627, 0xc627, 0xc627, 0 },
+ { 0xc6c5, 0xc6c5, 0xc6c5, 0 },
+ { 0xc763, 0xc763, 0xc763, 0 },
+ { 0xc7ff, 0xc7ff, 0xc7ff, 0 },
+ { 0xc89b, 0xc89b, 0xc89b, 0 },
+ { 0xc937, 0xc937, 0xc937, 0 },
+ { 0xc9d2, 0xc9d2, 0xc9d2, 0 },
+ { 0xca6c, 0xca6c, 0xca6c, 0 },
+ { 0xcb06, 0xcb06, 0xcb06, 0 },
+ { 0xcb9f, 0xcb9f, 0xcb9f, 0 },
+ { 0xcc37, 0xcc37, 0xcc37, 0 },
+ { 0xcccf, 0xcccf, 0xcccf, 0 },
+ { 0xcd66, 0xcd66, 0xcd66, 0 },
+ { 0xcdfd, 0xcdfd, 0xcdfd, 0 },
+ { 0xce93, 0xce93, 0xce93, 0 },
+ { 0xcf29, 0xcf29, 0xcf29, 0 },
+ { 0xcfbe, 0xcfbe, 0xcfbe, 0 },
+ { 0xd053, 0xd053, 0xd053, 0 },
+ { 0xd0e7, 0xd0e7, 0xd0e7, 0 },
+ { 0xd17a, 0xd17a, 0xd17a, 0 },
+ { 0xd20d, 0xd20d, 0xd20d, 0 },
+ { 0xd2a0, 0xd2a0, 0xd2a0, 0 },
+ { 0xd331, 0xd331, 0xd331, 0 },
+ { 0xd3c3, 0xd3c3, 0xd3c3, 0 },
+ { 0xd454, 0xd454, 0xd454, 0 },
+ { 0xd4e4, 0xd4e4, 0xd4e4, 0 },
+ { 0xd574, 0xd574, 0xd574, 0 },
+ { 0xd603, 0xd603, 0xd603, 0 },
+ { 0xd692, 0xd692, 0xd692, 0 },
+ { 0xd720, 0xd720, 0xd720, 0 },
+ { 0xd7ae, 0xd7ae, 0xd7ae, 0 },
+ { 0xd83c, 0xd83c, 0xd83c, 0 },
+ { 0xd8c9, 0xd8c9, 0xd8c9, 0 },
+ { 0xd955, 0xd955, 0xd955, 0 },
+ { 0xd9e1, 0xd9e1, 0xd9e1, 0 },
+ { 0xda6d, 0xda6d, 0xda6d, 0 },
+ { 0xdaf8, 0xdaf8, 0xdaf8, 0 },
+ { 0xdb83, 0xdb83, 0xdb83, 0 },
+ { 0xdc0d, 0xdc0d, 0xdc0d, 0 },
+ { 0xdc97, 0xdc97, 0xdc97, 0 },
+ { 0xdd20, 0xdd20, 0xdd20, 0 },
+ { 0xdda9, 0xdda9, 0xdda9, 0 },
+ { 0xde31, 0xde31, 0xde31, 0 },
+ { 0xdeb9, 0xdeb9, 0xdeb9, 0 },
+ { 0xdf41, 0xdf41, 0xdf41, 0 },
+ { 0xdfc8, 0xdfc8, 0xdfc8, 0 },
+ { 0xe04f, 0xe04f, 0xe04f, 0 },
+ { 0xe0d5, 0xe0d5, 0xe0d5, 0 },
+ { 0xe15b, 0xe15b, 0xe15b, 0 },
+ { 0xe1e0, 0xe1e0, 0xe1e0, 0 },
+ { 0xe266, 0xe266, 0xe266, 0 },
+ { 0xe2ea, 0xe2ea, 0xe2ea, 0 },
+ { 0xe36f, 0xe36f, 0xe36f, 0 },
+ { 0xe3f3, 0xe3f3, 0xe3f3, 0 },
+ { 0xe476, 0xe476, 0xe476, 0 },
+ { 0xe4f9, 0xe4f9, 0xe4f9, 0 },
+ { 0xe57c, 0xe57c, 0xe57c, 0 },
+ { 0xe5fe, 0xe5fe, 0xe5fe, 0 },
+ { 0xe680, 0xe680, 0xe680, 0 },
+ { 0xe702, 0xe702, 0xe702, 0 },
+ { 0xe783, 0xe783, 0xe783, 0 },
+ { 0xe804, 0xe804, 0xe804, 0 },
+ { 0xe884, 0xe884, 0xe884, 0 },
+ { 0xe905, 0xe905, 0xe905, 0 },
+ { 0xe984, 0xe984, 0xe984, 0 },
+ { 0xea04, 0xea04, 0xea04, 0 },
+ { 0xea83, 0xea83, 0xea83, 0 },
+ { 0xeb02, 0xeb02, 0xeb02, 0 },
+ { 0xeb80, 0xeb80, 0xeb80, 0 },
+ { 0xebfe, 0xebfe, 0xebfe, 0 },
+ { 0xec7b, 0xec7b, 0xec7b, 0 },
+ { 0xecf9, 0xecf9, 0xecf9, 0 },
+ { 0xed76, 0xed76, 0xed76, 0 },
+ { 0xedf2, 0xedf2, 0xedf2, 0 },
+ { 0xee6f, 0xee6f, 0xee6f, 0 },
+ { 0xeeeb, 0xeeeb, 0xeeeb, 0 },
+ { 0xef66, 0xef66, 0xef66, 0 },
+ { 0xefe2, 0xefe2, 0xefe2, 0 },
+ { 0xf05d, 0xf05d, 0xf05d, 0 },
+ { 0xf0d7, 0xf0d7, 0xf0d7, 0 },
+ { 0xf152, 0xf152, 0xf152, 0 },
+ { 0xf1cc, 0xf1cc, 0xf1cc, 0 },
+ { 0xf245, 0xf245, 0xf245, 0 },
+ { 0xf2bf, 0xf2bf, 0xf2bf, 0 },
+ { 0xf338, 0xf338, 0xf338, 0 },
+ { 0xf3b0, 0xf3b0, 0xf3b0, 0 },
+ { 0xf429, 0xf429, 0xf429, 0 },
+ { 0xf4a1, 0xf4a1, 0xf4a1, 0 },
+ { 0xf519, 0xf519, 0xf519, 0 },
+ { 0xf590, 0xf590, 0xf590, 0 },
+ { 0xf608, 0xf608, 0xf608, 0 },
+ { 0xf67e, 0xf67e, 0xf67e, 0 },
+ { 0xf6f5, 0xf6f5, 0xf6f5, 0 },
+ { 0xf76b, 0xf76b, 0xf76b, 0 },
+ { 0xf7e1, 0xf7e1, 0xf7e1, 0 },
+ { 0xf857, 0xf857, 0xf857, 0 },
+ { 0xf8cd, 0xf8cd, 0xf8cd, 0 },
+ { 0xf942, 0xf942, 0xf942, 0 },
+ { 0xf9b7, 0xf9b7, 0xf9b7, 0 },
+ { 0xfa2b, 0xfa2b, 0xfa2b, 0 },
+ { 0xfaa0, 0xfaa0, 0xfaa0, 0 },
+ { 0xfb14, 0xfb14, 0xfb14, 0 },
+ { 0xfb88, 0xfb88, 0xfb88, 0 },
+ { 0xfbfb, 0xfbfb, 0xfbfb, 0 },
+ { 0xfc6e, 0xfc6e, 0xfc6e, 0 },
+ { 0xfce1, 0xfce1, 0xfce1, 0 },
+ { 0xfd54, 0xfd54, 0xfd54, 0 },
+ { 0xfdc6, 0xfdc6, 0xfdc6, 0 },
+ { 0xfe39, 0xfe39, 0xfe39, 0 },
+ { 0xfeaa, 0xfeaa, 0xfeaa, 0 },
+ { 0xff1c, 0xff1c, 0xff1c, 0 },
+ { 0xff8d, 0xff8d, 0xff8d, 0 },
+ { 0xffff, 0xffff, 0xffff, 0 },
+};
+
+const struct vkms_color_lut srgb_inv_eotf = {
+ .base = srgb_inv_array,
+ .lut_length = LUT_SIZE,
+ .channel_value2index_ratio = 0xff00ffll
+};
diff --git a/drivers/gpu/drm/vkms/vkms_luts.h b/drivers/gpu/drm/vkms/vkms_luts.h
new file mode 100644
index 000000000000..053512a643f7
--- /dev/null
+++ b/drivers/gpu/drm/vkms/vkms_luts.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef _VKMS_LUTS_H_
+#define _VKMS_LUTS_H_
+
+#define LUT_SIZE 256
+
+extern const struct vkms_color_lut linear_eotf;
+extern const struct vkms_color_lut srgb_eotf;
+extern const struct vkms_color_lut srgb_inv_eotf;
+
+#endif /* _VKMS_LUTS_H_ */
\ No newline at end of file
diff --git a/drivers/gpu/drm/vkms/vkms_plane.c b/drivers/gpu/drm/vkms/vkms_plane.c
index e2fce471870f..5017ccee0c86 100644
--- a/drivers/gpu/drm/vkms/vkms_plane.c
+++ b/drivers/gpu/drm/vkms/vkms_plane.c
@@ -204,5 +204,7 @@ struct vkms_plane *vkms_plane_init(struct vkms_device *vkmsdev,
drm_plane_create_rotation_property(&plane->base, DRM_MODE_ROTATE_0,
DRM_MODE_ROTATE_MASK | DRM_MODE_REFLECT_MASK);
+ vkms_initialize_colorops(&plane->base);
+
return plane;
}
diff --git a/include/drm/drm_atomic.h b/include/drm/drm_atomic.h
index 31ca88deb10d..8b0c90d1d7be 100644
--- a/include/drm/drm_atomic.h
+++ b/include/drm/drm_atomic.h
@@ -30,6 +30,7 @@
#include <drm/drm_crtc.h>
#include <drm/drm_util.h>
+#include <drm/drm_colorop.h>
/**
* struct drm_crtc_commit - track modeset commits on a CRTC
@@ -157,6 +158,11 @@ struct drm_crtc_commit {
bool abort_completion;
};
+struct __drm_colorops_state {
+ struct drm_colorop *ptr;
+ struct drm_colorop_state *state, *old_state, *new_state;
+};
+
struct __drm_planes_state {
struct drm_plane *ptr;
struct drm_plane_state *state, *old_state, *new_state;
@@ -408,6 +414,32 @@ struct drm_atomic_state {
*/
bool duplicated : 1;
+ /**
+ * @plane_color_pipeline:
+ *
+ * Indicates whether this atomic state originated with a client that
+ * set the DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE.
+ *
+ * Drivers and helper functions should use this to ignore legacy
+ * properties that are incompatible with the drm_plane COLOR_PIPELINE
+ * behavior, such as:
+ *
+ * - COLOR_RANGE
+ * - COLOR_ENCODING
+ *
+ * or any other driver-specific properties that might affect pixel
+ * values.
+ */
+ bool plane_color_pipeline : 1;
+
+ /**
+ * @colorops:
+ *
+ * Pointer to array of @drm_colorop and @drm_colorop_state part of this
+ * update.
+ */
+ struct __drm_colorops_state *colorops;
+
/**
* @planes:
*
@@ -549,6 +581,9 @@ drm_atomic_get_crtc_state(struct drm_atomic_state *state,
struct drm_plane_state * __must_check
drm_atomic_get_plane_state(struct drm_atomic_state *state,
struct drm_plane *plane);
+struct drm_colorop_state *
+drm_atomic_get_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop);
struct drm_connector_state * __must_check
drm_atomic_get_connector_state(struct drm_atomic_state *state,
struct drm_connector *connector);
@@ -678,6 +713,55 @@ drm_atomic_get_new_plane_state(const struct drm_atomic_state *state,
return state->planes[drm_plane_index(plane)].new_state;
}
+
+/**
+ * drm_atomic_get_existing_colorop_state - get colorop state, if it exists
+ * @state: global atomic state object
+ * @colorop: colorop to grab
+ *
+ * This function returns the colorop state for the given colorop, or NULL
+ * if the colorop is not part of the global atomic state.
+ *
+ * This function is deprecated, @drm_atomic_get_old_colorop_state or
+ * @drm_atomic_get_new_colorop_state should be used instead.
+ */
+static inline struct drm_colorop_state *
+drm_atomic_get_existing_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop)
+{
+ return state->colorops[drm_colorop_index(colorop)].state;
+}
+
+/**
+ * drm_atomic_get_old_colorop_state - get colorop state, if it exists
+ * @state: global atomic state object
+ * @colorop: colorop to grab
+ *
+ * This function returns the old colorop state for the given colorop, or
+ * NULL if the colorop is not part of the global atomic state.
+ */
+static inline struct drm_colorop_state *
+drm_atomic_get_old_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop)
+{
+ return state->colorops[drm_colorop_index(colorop)].old_state;
+}
+
+/**
+ * drm_atomic_get_new_colorop_state - get colorop state, if it exists
+ * @state: global atomic state object
+ * @colorop: colorop to grab
+ *
+ * This function returns the new colorop state for the given colorop, or
+ * NULL if the colorop is not part of the global atomic state.
+ */
+static inline struct drm_colorop_state *
+drm_atomic_get_new_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop)
+{
+ return state->colorops[drm_colorop_index(colorop)].new_state;
+}
+
/**
* drm_atomic_get_existing_connector_state - get connector state, if it exists
* @state: global atomic state object
@@ -786,6 +870,9 @@ drm_atomic_add_affected_connectors(struct drm_atomic_state *state,
int __must_check
drm_atomic_add_affected_planes(struct drm_atomic_state *state,
struct drm_crtc *crtc);
+int __must_check
+drm_atomic_add_affected_colorops(struct drm_atomic_state *state,
+ struct drm_plane *plane);
int __must_check drm_atomic_check_only(struct drm_atomic_state *state);
int __must_check drm_atomic_commit(struct drm_atomic_state *state);
@@ -925,6 +1012,49 @@ void drm_state_dump(struct drm_device *dev, struct drm_printer *p);
(new_crtc_state) = (__state)->crtcs[__i].new_state, \
(void)(new_crtc_state) /* Only to avoid unused-but-set-variable warning */, 1))
+/**
+ * for_each_oldnew_colorop_in_state - iterate over all colorops in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @colorop: &struct drm_colorop iteration cursor
+ * @old_colorop_state: &struct drm_colorop_state iteration cursor for the old state
+ * @new_colorop_state: &struct drm_colorop_state iteration cursor for the new state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all colorops in an atomic update, tracking both old and
+ * new state. This is useful in places where the state delta needs to be
+ * considered, for example in atomic check functions.
+ */
+#define for_each_oldnew_colorop_in_state(__state, colorop, old_colorop_state, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (old_colorop_state) = (__state)->colorops[__i].old_state,\
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
+
+
+/**
+ * for_each_new_colorop_in_state - iterate over all colorops in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @colorop: &struct drm_colorop iteration cursor
+ * @new_colorop_state: &struct drm_colorop_state iteration cursor for the new state
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all colorops in an atomic update, tracking new state. This is
+ * useful is useful in places where the state delta needs to be considered, for
+ * example in atomic check functions.
+ */
+#define for_each_new_colorop_in_state(__state, colorop, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
+
/**
* for_each_oldnew_plane_in_state - iterate over all planes in an atomic update
* @__state: &struct drm_atomic_state pointer
diff --git a/include/drm/drm_atomic_uapi.h b/include/drm/drm_atomic_uapi.h
index 4c6d39d7bdb2..436315523326 100644
--- a/include/drm/drm_atomic_uapi.h
+++ b/include/drm/drm_atomic_uapi.h
@@ -37,6 +37,7 @@ struct drm_crtc;
struct drm_connector_state;
struct dma_fence;
struct drm_framebuffer;
+struct drm_colorop;
int __must_check
drm_atomic_set_mode_for_crtc(struct drm_crtc_state *state,
@@ -49,6 +50,8 @@ drm_atomic_set_crtc_for_plane(struct drm_plane_state *plane_state,
struct drm_crtc *crtc);
void drm_atomic_set_fb_for_plane(struct drm_plane_state *plane_state,
struct drm_framebuffer *fb);
+void drm_atomic_set_colorop_for_plane(struct drm_plane_state *plane_state,
+ struct drm_colorop *colorop);
int __must_check
drm_atomic_set_crtc_for_connector(struct drm_connector_state *conn_state,
struct drm_crtc *crtc);
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
new file mode 100644
index 000000000000..bf5117f30c80
--- /dev/null
+++ b/include/drm/drm_colorop.h
@@ -0,0 +1,441 @@
+/*
+ * Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: AMD
+ *
+ */
+
+#ifndef __DRM_COLOROP_H__
+#define __DRM_COLOROP_H__
+
+#include <drm/drm_mode_object.h>
+#include <drm/drm_mode.h>
+#include <drm/drm_property.h>
+
+
+/**
+ * enum drm_colorop_curve_1d_type - type of 1D curve
+ *
+ * Describes a 1D curve to be applied by the DRM_COLOROP_1D_CURVE colorop.
+ */
+enum drm_colorop_curve_1d_type {
+ /**
+ * @DRM_COLOROP_1D_CURVE_SRGB_EOTF:
+ *
+ * sRGB piece-wise electro-optical transfer function. Transfer
+ * characteristics as defined by IEC 61966-2-1 sRGB. Equivalent
+ * to H.273 TransferCharacteristics code point 13 with
+ * MatrixCoefficients set to 0.
+ */
+ DRM_COLOROP_1D_CURVE_SRGB_EOTF,
+
+ /**
+ * @DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF:
+ *
+ * The inverse of &DRM_COLOROP_1D_CURVE_SRGB_EOTF
+ */
+ DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF,
+
+ /**
+ * @DRM_COLOROP_1D_CURVE_BT2020_INV_OETF:
+ *
+ * The inverse of &DRM_COLOROP_1D_CURVE_BT2020_OETF
+ */
+ DRM_COLOROP_1D_CURVE_BT2020_INV_OETF,
+
+ /**
+ * @DRM_COLOROP_1D_CURVE_BT2020_OETF:
+ *
+ * The BT.2020/BT.709 transfer function. The BT.709 and BT.2020
+ * transfer functions are the same, the only difference is that
+ * BT.2020 is defined with more precision for 10 and 12-bit
+ * encodings.
+ *
+ *
+ */
+ DRM_COLOROP_1D_CURVE_BT2020_OETF,
+
+ /**
+ * @DRM_COLOROP_1D_CURVE_PQ_125_EOTF:
+ *
+ * The PQ transfer function, scaled by 125.0f, so that 10,000
+ * nits correspond to 125.0f.
+ *
+ * Transfer characteristics of the PQ function as defined by
+ * SMPTE ST 2084 (2014) for 10-, 12-, 14-, and 16-bit systems
+ * and Rec. ITU-R BT.2100-2 perceptual quantization (PQ) system.
+ * Equivalent to H.273 TransferCharacteristics code point 16.
+ */
+ DRM_COLOROP_1D_CURVE_PQ_125_EOTF,
+
+ /**
+ * @DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF:
+ *
+ * The inverse of DRM_COLOROP_1D_CURVE_PQ_125_EOTF.
+ */
+ DRM_COLOROP_1D_CURVE_PQ_125_INV_EOTF,
+
+ /**
+ * @DRM_COLOROP_1D_CURVE_COUNT:
+ *
+ * enum value denoting the size of the enum
+ */
+ DRM_COLOROP_1D_CURVE_COUNT
+};
+
+/**
+ * struct drm_colorop_state - mutable colorop state
+ */
+struct drm_colorop_state {
+ /** @colorop: backpointer to the colorop */
+ struct drm_colorop *colorop;
+
+ /*
+ * Color properties
+ *
+ * The following fields are not always valid, their usage depends
+ * on the colorop type. See their associated comment for more
+ * information.
+ */
+
+
+ /**
+ * @bypass:
+ *
+ * When the property BYPASS exists on this colorop, this stores
+ * the requested bypass state: true if colorop shall be bypassed,
+ * false if colorop is enabled.
+ */
+ bool bypass;
+
+ /**
+ * @curve_1d_type:
+ *
+ * Type of 1D curve.
+ */
+ enum drm_colorop_curve_1d_type curve_1d_type;
+
+ /**
+ * @multiplier:
+ *
+ * Multiplier to 'gain' the plane. Format is S31.32 sign-magnitude.
+ */
+ uint64_t multiplier;
+
+ /**
+ * @size:
+ *
+ * Number of entries of the custom LUT. This should be read-only.
+ */
+ uint32_t size;
+
+ /**
+ * @lut_3d_modes:
+ *
+ * Mode blob for displaying a list of supported 3dlut modes.
+ *
+ * To setup a 3D LUT, lut_3d_modes, lut_3d_modes and data are expected
+ * to be used in the following sequence:
+ *
+ * 1. device driver sets a list of supported drm_mode_3dlut_mode in "lut_3d_modes".
+ * 2. userspace reads "lut_3d_modes" to determines an appropriate mode.
+ * 3. userspace sets "lut_3d_mode_index" pointing the selected mode.
+ * 4. userspace passes a 3D LUT via "data"
+ * 5. usersapce commits to device driver
+ */
+ struct drm_property_blob *lut_3d_modes;
+
+ /**
+ * @lut_3d_mode_index:
+ *
+ * A zero-based index pointing to current lut_3d_mode.
+ */
+ uint16_t lut_3d_mode_index;
+
+ /**
+ * @data:
+ *
+ * Data blob for any TYPE that requires such a blob. The
+ * interpretation of the blob is TYPE-specific.
+ */
+ struct drm_property_blob *data;
+
+ /** @state: backpointer to global drm_atomic_state */
+ struct drm_atomic_state *state;
+};
+
+/**
+ * struct drm_colorop - DRM color operation control structure
+ *
+ * A colorop represents one color operation. They can be chained via
+ * the 'next' pointer to build a color pipeline.
+ */
+struct drm_colorop {
+ /** @dev: parent DRM device */
+ struct drm_device *dev;
+
+ /**
+ * @head:
+ *
+ * List of all colorops on @dev, linked from &drm_mode_config.colorop_list.
+ * Invariant over the lifetime of @dev and therefore does not need
+ * locking.
+ */
+ struct list_head head;
+
+ /**
+ * @index: Position inside the mode_config.list, can be used as an array
+ * index. It is invariant over the lifetime of the colorop.
+ */
+ unsigned index;
+
+ /** @base: base mode object */
+ struct drm_mode_object base;
+
+ /**
+ * @plane:
+ *
+ * The plane on which the colorop sits. A drm_colorop is always unique
+ * to a plane.
+ */
+ struct drm_plane *plane;
+
+ /**
+ * @state:
+ *
+ * Current atomic state for this colorop.
+ *
+ * This is protected by @mutex. Note that nonblocking atomic commits
+ * access the current colorop state without taking locks.
+ */
+ struct drm_colorop_state *state;
+
+ /*
+ * Color properties
+ *
+ * The following fields are not always valid, their usage depends
+ * on the colorop type. See their associated comment for more
+ * information.
+ */
+
+ /** @properties: property tracking for this colorop */
+ struct drm_object_properties properties;
+
+ /**
+ * @type:
+ *
+ * Read-only
+ * Type of color operation
+ */
+ enum drm_colorop_type type;
+
+ /**
+ * @next:
+ *
+ * Read-only
+ * Pointer to next drm_colorop in pipeline
+ */
+ struct drm_colorop *next;
+
+ /**
+ * @type_property:
+ *
+ * Read-only "TYPE" property for specifying the type of
+ * this color operation. The type is enum drm_colorop_type.
+ */
+ struct drm_property *type_property;
+
+ /**
+ * @bypass_property:
+ *
+ * Boolean property to control enablement of the color
+ * operation. Setting bypass to "true" shall always be supported
+ * in order to allow compositors to quickly fall back to
+ * alternate methods of color processing. This is important
+ * since setting color operations can fail due to unique
+ * HW constraints.
+ */
+ struct drm_property *bypass_property;
+
+ /**
+ * @lut1d_interpolation:
+ *
+ * Read-only
+ * Interpolation for DRM_COLOROP_1D_LUT
+ */
+ enum drm_colorop_lut1d_interpolation_type lut1d_interpolation;
+
+ /**
+ * @lut1d_interpolation_property:
+ *
+ * Read-only property for DRM_COLOROP_1D_LUT interpolation
+ */
+ struct drm_property *lut1d_interpolation_property;
+
+ /**
+ * @curve_1d_type_property:
+ *
+ * Sub-type for DRM_COLOROP_1D_CURVE type.
+ */
+ struct drm_property *curve_1d_type_property;
+
+ /**
+ * @multiplier_property:
+ *
+ * Multiplier property for plane gain
+ */
+ struct drm_property *multiplier_property;
+
+ /**
+ * @size_property:
+ *
+ * Size property for custom LUT from userspace.
+ */
+ struct drm_property *size_property;
+
+ /**
+ * @lut_3d_modes_property:
+ *
+ * 3DLUT mode property used to convert the framebuffer's colors
+ * to non-linear gamma.
+ */
+ struct drm_property *lut_3d_modes_property;
+
+ /**
+ * @lut_3d_mode_index_property:
+ *
+ * 3DLUT mode index property for choosing 3D LUT mode.
+ */
+ struct drm_property *lut_3d_mode_index_property;
+
+ /**
+ * @data_property:
+ *
+ * blob property for any TYPE that requires a blob of data,
+ * such as 1DLUT, CTM, 3DLUT, etc.
+ *
+ * The way this blob is interpreted depends on the TYPE of
+ * this
+ */
+ struct drm_property *data_property;
+
+ /**
+ * @next_property:
+ *
+ * Read-only property to next colorop in the pipeline
+ */
+ struct drm_property *next_property;
+
+};
+
+#define obj_to_colorop(x) container_of(x, struct drm_colorop, base)
+
+
+
+
+/**
+ * drm_colorop_find - look up a Colorop object from its ID
+ * @dev: DRM device
+ * @file_priv: drm file to check for lease against.
+ * @id: &drm_mode_object ID
+ *
+ * This can be used to look up a Colorop from its userspace ID. Only used by
+ * drivers for legacy IOCTLs and interface, nowadays extensions to the KMS
+ * userspace interface should be done using &drm_property.
+ */
+static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev,
+ struct drm_file *file_priv,
+ uint32_t id)
+{
+ struct drm_mode_object *mo;
+ mo = drm_mode_object_find(dev, file_priv, id, DRM_MODE_OBJECT_COLOROP);
+ return mo ? obj_to_colorop(mo) : NULL;
+}
+
+int drm_colorop_curve_1d_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, u64 supported_tfs,
+ bool allow_bypass);
+int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, uint32_t lut_size,
+ enum drm_colorop_lut1d_interpolation_type lut1d_interpolation,
+ bool allow_bypass);
+int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass);
+int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass);
+int drm_colorop_3dlut_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, struct drm_mode_3dlut_mode *mode_3dlut,
+ size_t num, bool allow_bypass);
+
+struct drm_colorop_state *
+drm_atomic_helper_colorop_duplicate_state(struct drm_colorop *colorop);
+
+void drm_colorop_atomic_destroy_state(struct drm_colorop *colorop,
+ struct drm_colorop_state *state);
+
+/**
+ * drm_colorop_reset - reset colorop atomic state
+ * @colorop: drm colorop
+ *
+ * Resets the atomic state for @colorop by freeing the state pointer (which might
+ * be NULL, e.g. at driver load time) and allocating a new empty state object.
+ */
+void drm_colorop_reset(struct drm_colorop *colorop);
+
+/**
+ * drm_colorop_index - find the index of a registered colorop
+ * @colorop: colorop to find index for
+ *
+ * Given a registered colorop, return the index of that colorop within a DRM
+ * device's list of colorops.
+ */
+static inline unsigned int drm_colorop_index(const struct drm_colorop *colorop)
+{
+ return colorop->index;
+}
+
+
+#define drm_for_each_colorop(colorop, dev) \
+ list_for_each_entry(colorop, &(dev)->mode_config.colorop_list, head)
+
+/**
+ * drm_get_colorop_type_name - return a string for colorop type
+ * @type: colorop type to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_colorop_type_name(enum drm_colorop_type type);
+
+/**
+ * drm_get_colorop_curve_1d_type_name - return a string for 1D curve type
+ * @type: 1d curve type to compute name of
+ *
+ * In contrast to the other drm_get_*_name functions this one here returns a
+ * const pointer and hence is threadsafe.
+ */
+const char *drm_get_colorop_curve_1d_type_name(enum drm_colorop_curve_1d_type type);
+const char *drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_type type);
+const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
+
+void drm_colorop_set_next_property(struct drm_colorop *colorop, struct drm_colorop *next);
+
+#endif /* __DRM_COLOROP_H__ */
diff --git a/include/drm/drm_file.h b/include/drm/drm_file.h
index f0ef32e9fa5e..df32fa4d4859 100644
--- a/include/drm/drm_file.h
+++ b/include/drm/drm_file.h
@@ -206,6 +206,13 @@ struct drm_file {
*/
bool writeback_connectors;
+ /**
+ * @plane_color_pipeline:
+ *
+ * True if client understands plane color pipelines
+ */
+ bool plane_color_pipeline;
+
/**
* @was_master:
*
diff --git a/include/drm/drm_fixed.h b/include/drm/drm_fixed.h
index 1922188f00e8..0b44f2f294ce 100644
--- a/include/drm/drm_fixed.h
+++ b/include/drm/drm_fixed.h
@@ -78,6 +78,24 @@ static inline u32 dfixed_div(fixed20_12 A, fixed20_12 B)
#define DRM_FIXED_EPSILON 1LL
#define DRM_FIXED_ALMOST_ONE (DRM_FIXED_ONE - DRM_FIXED_EPSILON)
+/**
+ * @drm_sm2fixp
+ *
+ * Convert a 1.31.32 signed-magnitude fixed point to 32.32
+ * 2s-complement fixed point
+ *
+ * @return s64 2s-complement fixed point
+ */
+static inline s64 drm_sm2fixp(__u64 a)
+{
+ if ((a & (1LL << 63))) {
+ return -(a & 0x7fffffffffffffffll);
+ } else {
+ return a;
+ }
+
+}
+
static inline s64 drm_int2fixp(int a)
{
return ((s64)a) << DRM_FIXED_POINT;
diff --git a/include/drm/drm_mode_config.h b/include/drm/drm_mode_config.h
index 271765e2e9f2..d4661d4431dc 100644
--- a/include/drm/drm_mode_config.h
+++ b/include/drm/drm_mode_config.h
@@ -499,6 +499,24 @@ struct drm_mode_config {
*/
struct raw_spinlock panic_lock;
+ /**
+ * @num_colorop:
+ *
+ * Number of colorop objects on this device.
+ * This is invariant over the lifetime of a device and hence doesn't
+ * need any locks.
+ */
+ int num_colorop;
+
+ /**
+ * @colorop_list:
+ *
+ * List of colorop objects linked with &drm_colorop.head. This is
+ * invariant over the lifetime of a device and hence doesn't need any
+ * locks.
+ */
+ struct list_head colorop_list;
+
/**
* @num_crtc:
*
diff --git a/include/drm/drm_plane.h b/include/drm/drm_plane.h
index dd718c62ac31..8a769c6a8251 100644
--- a/include/drm/drm_plane.h
+++ b/include/drm/drm_plane.h
@@ -243,6 +243,14 @@ struct drm_plane_state {
*/
enum drm_scaling_filter scaling_filter;
+ /**
+ * @color_pipeline:
+ *
+ * The first colorop of the active color pipeline, or NULL, if no
+ * color pipeline is active.
+ */
+ struct drm_colorop *color_pipeline;
+
/**
* @commit: Tracks the pending commit to prevent use-after-free conditions,
* and for async plane updates.
@@ -766,6 +774,14 @@ struct drm_plane {
*/
struct drm_property *color_range_property;
+ /**
+ * @color_pipeline_property:
+ *
+ * Optional "COLOR_PIPELINE" enum property for specifying
+ * a color pipeline to use on the plane.
+ */
+ struct drm_property *color_pipeline_property;
+
/**
* @scaling_filter_property: property to apply a particular filter while
* scaling.
@@ -989,4 +1005,7 @@ int drm_plane_add_size_hints_property(struct drm_plane *plane,
const struct drm_plane_size_hint *hints,
int num_hints);
+int drm_plane_create_color_pipeline_property(struct drm_plane *plane,
+ struct drm_prop_enum_list *pipelines,
+ int num_pipelines);
#endif
diff --git a/include/uapi/drm/amdgpu_drm.h b/include/uapi/drm/amdgpu_drm.h
index efe5de6ce208..e44362e74fa1 100644
--- a/include/uapi/drm/amdgpu_drm.h
+++ b/include/uapi/drm/amdgpu_drm.h
@@ -1283,15 +1283,6 @@ struct drm_amdgpu_info_gpuvm_fault {
#define AMDGPU_FAMILY_GC_11_5_0 150 /* GC 11.5.0 */
#define AMDGPU_FAMILY_GC_12_0_0 152 /* GC 12.0.0 */
-/* FIXME wrong namespace! */
-struct drm_color_ctm_3x4 {
- /*
- * Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude
- * (not two's complement!) format.
- */
- __u64 matrix[12];
-};
-
#if defined(__cplusplus)
}
#endif
diff --git a/include/uapi/drm/drm.h b/include/uapi/drm/drm.h
index 7fba37b94401..e1c4f3bece03 100644
--- a/include/uapi/drm/drm.h
+++ b/include/uapi/drm/drm.h
@@ -875,6 +875,22 @@ struct drm_get_cap {
*/
#define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6
+/**
+ * DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE
+ *
+ * If set to 1 the DRM core will allow setting the COLOR_PIPELINE
+ * property on a &drm_plane, as well as drm_colorop properties.
+ *
+ * Drivers will ignore these drm_plane properties:
+ * - COLOR_ENCODING
+ * - COLOR_RANGE
+ *
+ * The client must enable &DRM_CLIENT_CAP_ATOMIC first.
+ *
+ * This capability is currently in development.
+ */
+#define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7
+
/* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
struct drm_set_client_cap {
__u64 capability;
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index c082810c08a8..290c2e32f692 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -629,6 +629,7 @@ struct drm_mode_connector_set_property {
#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
+#define DRM_MODE_OBJECT_COLOROP 0xfafafafa
#define DRM_MODE_OBJECT_ANY 0
struct drm_mode_obj_get_properties {
@@ -846,6 +847,20 @@ struct drm_color_ctm {
__u64 matrix[9];
};
+struct drm_color_ctm_3x4 {
+ /*
+ * Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude
+ * (not two's complement!) format.
+ *
+ * out matrix in
+ * |R| |0 1 2 3 | | R |
+ * |G| = |4 5 6 7 | x | G |
+ * |B| |8 9 10 11| | B |
+ * |1.0|
+ */
+ __u64 matrix[12];
+};
+
struct drm_color_lut {
/*
* Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and
@@ -857,6 +872,146 @@ struct drm_color_lut {
__u16 reserved;
};
+/**
+ * enum drm_colorop_type - Type of color operation
+ *
+ * drm_colorops can be of many different types. Each type behaves differently
+ * and defines a different set of properties. This enum defines all types and
+ * gives a high-level description.
+ */
+enum drm_colorop_type {
+ /**
+ * @DRM_COLOROP_1D_CURVE:
+ *
+ * A 1D curve that is being applied to all color channels. The
+ * curve is specified via the CURVE_1D_TYPE colorop property.
+ */
+ DRM_COLOROP_1D_CURVE,
+
+ /**
+ * @DRM_COLOROP_1D_LUT:
+ *
+ * A simple 1D LUT of uniformly spaced &drm_color_lut entries,
+ * packed into a blob via the DATA property. The driver's expected
+ * LUT size is advertised via the SIZE property.
+ */
+ DRM_COLOROP_1D_LUT,
+
+ /**
+ * @DRM_COLOROP_CTM_3X4:
+ *
+ * A 3x4 matrix. Its values are specified via the
+ * &drm_color_ctm_3x4 struct provided via the DATA property.
+ */
+ DRM_COLOROP_CTM_3X4,
+
+ /**
+ * @DRM_COLOROP_MULTIPLIER:
+ *
+ * A simple multiplier, applied to all color values. The
+ * multiplier is specified as a S31.32 via the MULTIPLIER
+ * property.
+ */
+ DRM_COLOROP_MULTIPLIER,
+ /**
+ * @DRM_COLOROP_3D_LUT:
+ *
+ * A 3D LUT of &drm_color_lut entries,
+ * packed into a blob via the DATA property. The driver's expected
+ * LUT size is advertised via the SIZE property.
+ */
+ DRM_COLOROP_3D_LUT,
+};
+
+/**
+ * enum drm_colorop_lut3d_interpolation_type - type of 3DLUT interpolation
+ *
+ */
+enum drm_colorop_lut3d_interpolation_type {
+ /**
+ * @DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL:
+ *
+ * Tetrahedral 3DLUT interpolation
+ */
+ DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL,
+};
+
+/**
+ * enum drm_colorop_lut3d_traversal_order - traversal order of the 3D LUT
+ *
+ * This enum describes the order of traversal of 3DLUT elements.
+ */
+enum drm_colorop_lut3d_traversal_order {
+ /**
+ * @DRM_COLOROP_LUT3D_TRAVERSAL_RGB:
+ *
+ * the LUT elements are traversed like so:
+ * for R in range 0..n
+ * for G in range 0..n
+ * for B in range 0..n
+ * color = lut3d[R][G][B]
+ */
+ DRM_COLOROP_LUT3D_TRAVERSAL_RGB,
+ /**
+ * @DRM_COLOROP_LUT3D_TRAVERSAL_BGR:
+ *
+ * the LUT elements are traversed like so:
+ * for R in range 0..n
+ * for G in range 0..n
+ * for B in range 0..n
+ * color = lut3d[B][G][R]
+ */
+ DRM_COLOROP_LUT3D_TRAVERSAL_BGR,
+};
+
+/**
+ * struct drm_mode_3dlut_mode - 3D LUT mode
+ *
+ * The mode describes the supported and selected format of a 3DLUT.
+ */
+struct drm_mode_3dlut_mode {
+ /**
+ * @lut_size: 3D LUT size - can be 9, 17 or 33
+ */
+ __u16 lut_size;
+ /**
+ * @lut_stride: dimensions of 3D LUT. Must be larger than lut_size
+ */
+ __u16 lut_stride[3];
+ /**
+ * @interpolation: interpolation algorithm for 3D LUT. See drm_colorop_lut3d_interpolation_type
+ */
+ __u16 interpolation;
+ /**
+ * @color_depth: color depth - can be 8, 10 or 12
+ */
+ __u16 color_depth;
+ /**
+ * @color_format: color format specified by fourcc values
+ * ex. DRM_FORMAT_XRGB16161616 - color in order of RGB, each is 16bit.
+ */
+ __u32 color_format;
+ /**
+ * @traversal_order:
+ *
+ * Traversal order when parsing/writing the 3D LUT. See enum drm_colorop_lut3d_traversal_order
+ */
+ __u16 traversal_order;
+};
+
+/**
+ * enum drm_colorop_lut1d_interpolation_type - type of interpolation for 1D LUTs
+ */
+enum drm_colorop_lut1d_interpolation_type {
+ /**
+ * @DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR:
+ *
+ * Linear interpolation. Values between points of the LUT will be
+ * linearly interpolated.
+ */
+ DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
+};
+
/**
* struct drm_plane_size_hint - Plane size hints
* @width: The width of the plane in pixel
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 02/25] drm: Add support for 3x3 CTM
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
2024-11-26 13:27 ` [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-30 9:38 ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 03/25] drm: Add Enhanced LUT precision structure Uma Shankar
` (30 subsequent siblings)
32 siblings, 1 reply; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add support for 3x3 Color Transformation Matrices in Color Pipeline.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/drm_atomic.c | 3 +++
drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
drivers/gpu/drm/drm_colorop.c | 29 +++++++++++++++++++++++++++++
include/drm/drm_colorop.h | 2 ++
include/uapi/drm/drm_mode.h | 8 ++++++++
5 files changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 3161e2ab4efc..8a75f4a0637a 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -802,6 +802,9 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
break;
+ case DRM_COLOROP_CTM_3X3:
+ drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
+ break;
case DRM_COLOROP_CTM_3X4:
drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
break;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index d6c71135f290..ba68358c0ffe 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -708,6 +708,9 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop,
case DRM_COLOROP_CTM_3X4:
size = sizeof(struct drm_color_ctm_3x4);
break;
+ case DRM_COLOROP_CTM_3X3:
+ size = sizeof(struct drm_color_ctm);
+ break;
case DRM_COLOROP_3D_LUT:
index = state->lut_3d_mode_index;
if (index >= (state->lut_3d_modes->length / sizeof(struct drm_mode_3dlut_mode)))
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index fd1cd934df48..a427cfc5bbbc 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -315,6 +315,35 @@ int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop
}
EXPORT_SYMBOL(drm_colorop_ctm_3x4_init);
+/**
+ * drm_colorop_ctm_3x3 - Initialize a DRM_COLOROP_CTM_3X3
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @allow_bypass: true if BYPASS property should be created, false if bypass of
+ * this colorop is not possible
+ * @return zero on success, -E value on failure
+ */
+int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass)
+{
+ int ret;
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X3, allow_bypass);
+ if (ret)
+ return ret;
+
+ ret = drm_colorop_create_data_prop(dev, colorop);
+ if (ret)
+ return ret;
+
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_ctm_3x3_init);
+
/**
* drm_colorop_mult_init - Initialize a DRM_COLOROP_MULTIPLIER
*
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index bf5117f30c80..56b51fafebdf 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -377,6 +377,8 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co
struct drm_plane *plane, uint32_t lut_size,
enum drm_colorop_lut1d_interpolation_type lut1d_interpolation,
bool allow_bypass);
+int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass);
int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
struct drm_plane *plane, bool allow_bypass);
int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 290c2e32f692..a4a7ab689631 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -905,6 +905,14 @@ enum drm_colorop_type {
*/
DRM_COLOROP_CTM_3X4,
+ /**
+ * @DRM_COLOROP_CTM_3X3:
+ *
+ * A 3x3 matrix. Its values are specified via the
+ * &drm_color_ctm struct provided via the DATA property.
+ */
+ DRM_COLOROP_CTM_3X3,
+
/**
* @DRM_COLOROP_MULTIPLIER:
*
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 03/25] drm: Add Enhanced LUT precision structure
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
2024-11-26 13:27 ` [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
2024-11-26 13:27 ` [v2 02/25] drm: Add support for 3x3 CTM Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 04/25] drm: Add Color lut range attributes Uma Shankar
` (29 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Existing LUT precision structure is having only 16 bit
precision. This is not enough for upcoming enhanced hardwares
and advance usecases like HDR processing. Hence added a new
structure with 32 bit precision values.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/drm_color_mgmt.c | 43 ++++++++++++++++++++++++++++++++
include/drm/drm_color_mgmt.h | 13 ++++++++++
include/uapi/drm/drm_mode.h | 18 +++++++++++++
3 files changed, 74 insertions(+)
diff --git a/drivers/gpu/drm/drm_color_mgmt.c b/drivers/gpu/drm/drm_color_mgmt.c
index 3969dc548cff..83dc850d3b54 100644
--- a/drivers/gpu/drm/drm_color_mgmt.c
+++ b/drivers/gpu/drm/drm_color_mgmt.c
@@ -630,3 +630,46 @@ int drm_color_lut_check(const struct drm_property_blob *lut, u32 tests)
return 0;
}
EXPORT_SYMBOL(drm_color_lut_check);
+
+/**
+ * drm_color_lut_32_check - check validity of extended lookup table
+ * @lut: property blob containing extended LUT to check
+ * @tests: bitmask of tests to run
+ *
+ * Helper to check whether a userspace-provided extended lookup table is valid and
+ * satisfies hardware requirements. Drivers pass a bitmask indicating which of
+ * the tests in &drm_color_lut_tests should be performed.
+ *
+ * Returns 0 on success, -EINVAL on failure.
+ */
+int drm_color_lut_32_check(const struct drm_property_blob *lut, u32 tests)
+{
+ const struct drm_color_lut_32 *entry;
+ int i;
+
+ if (!lut || !tests)
+ return 0;
+
+ entry = lut->data;
+ for (i = 0; i < drm_color_lut_32_size(lut); i++) {
+ if (tests & DRM_COLOR_LUT_EQUAL_CHANNELS) {
+ if (entry[i].red != entry[i].blue ||
+ entry[i].red != entry[i].green) {
+ DRM_DEBUG_KMS("All LUT entries must have equal r/g/b\n");
+ return -EINVAL;
+ }
+ }
+
+ if (i > 0 && tests & DRM_COLOR_LUT_NON_DECREASING) {
+ if (entry[i].red < entry[i - 1].red ||
+ entry[i].green < entry[i - 1].green ||
+ entry[i].blue < entry[i - 1].blue) {
+ DRM_DEBUG_KMS("LUT entries must never decrease.\n");
+ return -EINVAL;
+ }
+ }
+ }
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_color_lut_32_check);
diff --git a/include/drm/drm_color_mgmt.h b/include/drm/drm_color_mgmt.h
index ed81741036d7..882253a82bf1 100644
--- a/include/drm/drm_color_mgmt.h
+++ b/include/drm/drm_color_mgmt.h
@@ -72,6 +72,18 @@ static inline int drm_color_lut_size(const struct drm_property_blob *blob)
return blob->length / sizeof(struct drm_color_lut);
}
+/**
+ * drm_color_lut_32_size - calculate the number of entries in the extended LUT
+ * @blob: blob containing the LUT
+ *
+ * Returns:
+ * The number of entries in the color LUT stored in @blob.
+ */
+static inline int drm_color_lut_32_size(const struct drm_property_blob *blob)
+{
+ return blob->length / sizeof(struct drm_color_lut_32);
+}
+
enum drm_color_encoding {
DRM_COLOR_YCBCR_BT601,
DRM_COLOR_YCBCR_BT709,
@@ -118,4 +130,5 @@ enum drm_color_lut_tests {
};
int drm_color_lut_check(const struct drm_property_blob *lut, u32 tests);
+int drm_color_lut_32_check(const struct drm_property_blob *lut, u32 tests);
#endif
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index a4a7ab689631..e5090416c1ae 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -872,6 +872,23 @@ struct drm_color_lut {
__u16 reserved;
};
+/**
+ * struct drm_color_lut_32 - Represents high precision lut values
+ *
+ * Creating 32 bit palette entries for better data
+ * precision. This will be required for HDR and
+ * similar color processing usecases.
+ */
+struct drm_color_lut_32 {
+ /*
+ * Data for high precision LUTs
+ */
+ __u32 red;
+ __u32 green;
+ __u32 blue;
+ __u32 reserved;
+};
+
/**
* enum drm_colorop_type - Type of color operation
*
@@ -879,6 +896,7 @@ struct drm_color_lut {
* and defines a different set of properties. This enum defines all types and
* gives a high-level description.
*/
+
enum drm_colorop_type {
/**
* @DRM_COLOROP_1D_CURVE:
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 04/25] drm: Add Color lut range attributes
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (2 preceding siblings ...)
2024-11-26 13:27 ` [v2 03/25] drm: Add Enhanced LUT precision structure Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 05/25] drm: Add Color ops capability property Uma Shankar
` (28 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
This defines a new structure to define color lut ranges,
along with related macro definitions and enums. This will help
describe segmented lut ranges/PWL LUTs in the hardware.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
include/uapi/drm/drm_mode.h | 64 +++++++++++++++++++++++++++++++++++++
1 file changed, 64 insertions(+)
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index e5090416c1ae..9ed8b1b1357a 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -1175,6 +1175,70 @@ struct hdr_output_metadata {
DRM_MODE_PAGE_FLIP_ASYNC | \
DRM_MODE_PAGE_FLIP_TARGET)
+/**
+ * DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE
+ *
+ * linearly interpolate between the points
+ */
+#define DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE BIT(0)
+
+/**
+ * DRM_COLOROP_1D_LUT_MULTSEG_REUSE_LAST
+ *
+ * the last value of the previous range is the
+ * first value of the current range.
+ */
+#define DRM_COLOROP_1D_LUT_MULTSEG_REUSE_LAST BIT(1)
+
+/**
+ * DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING
+ *
+ * the curve must be non-decreasing
+ */
+#define DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING BIT(2)
+
+/**
+ * DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE
+ *
+ * the curve is reflected across origin for negative inputs
+ */
+#define DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE BIT(3)
+
+/**
+ * DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL
+ *
+ * the same curve (red) is used for blue and green channels as well
+ */
+#define DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL BIT(4)
+
+/**
+ * struct drm_color_lut_range
+ *
+ * structure to advertise capability of a color hardware
+ * block that accepts LUT values. It can represent LUTs with
+ * varied number of entries and distributions
+ * (Multi segmented, Logarithmic etc).
+ */
+
+struct drm_color_lut_range {
+ /* DRM_COLOROP_1D_LUT_MULTSEG_* */
+ __u32 flags;
+ /* number of points on the curve in the segment */
+ __u16 count;
+ /* input start/end values of the segment */
+ __s32 start, end;
+ /* normalization factor. Represents 1.0 in terms of smallest step size */
+ __u32 norm_factor;
+
+ /* precision of HW LUT*/
+ struct {
+ /* Integer precision */
+ __u16 intp;
+ /* Fractional precision */
+ __u16 fracp;
+ } precision;
+};
+
/*
* Request a page flip on the specified crtc.
*
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 05/25] drm: Add Color ops capability property
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (3 preceding siblings ...)
2024-11-26 13:27 ` [v2 04/25] drm: Add Color lut range attributes Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-30 9:43 ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 06/25] drm: Define helper to create color " Uma Shankar
` (27 subsequent siblings)
32 siblings, 1 reply; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Add capability property which a colorop can expose it's
hardware's abilities. It's a blob property that can be
filled with respective data structures depending on the
colorop. The user space is expected to read this property
and program the colorop accordingly.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
include/drm/drm_colorop.h | 12 ++++++++++++
2 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index ba68358c0ffe..46cc7b0df6e8 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -780,6 +780,9 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
*val = state->size;
} else if (property == colorop->data_property) {
*val = (state->data) ? state->data->base.id : 0;
+ } else if (property == colorop->hw_caps_property) {
+ *val = state->hw_caps ?
+ state->hw_caps->base.id : 0;
} else {
return -EINVAL;
}
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index 56b51fafebdf..58e5b87c6d56 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -146,6 +146,11 @@ struct drm_colorop_state {
* Number of entries of the custom LUT. This should be read-only.
*/
uint32_t size;
+ /**
+ * @hw_caps:
+ *
+ */
+ struct drm_property_blob *hw_caps;
/**
* @lut_3d_modes:
@@ -297,6 +302,13 @@ struct drm_colorop {
*/
struct drm_property *curve_1d_type_property;
+ /**
+ * @hwlut_caps_property:
+ *
+ * Property to expose hardware lut capbilities.
+ */
+ struct drm_property *hw_caps_property;
+
/**
* @multiplier_property:
*
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 06/25] drm: Define helper to create color ops capability property
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (4 preceding siblings ...)
2024-11-26 13:27 ` [v2 05/25] drm: Add Color ops capability property Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 07/25] drm: Add 1D LUT multi-segmented color op Uma Shankar
` (26 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Add a helper to create capability property for a colorop
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/drm_colorop.c | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index a427cfc5bbbc..8563953ec9cf 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -83,6 +83,27 @@ static const struct drm_prop_enum_list drm_colorop_lut1d_interpolation_list[] =
};
/* Init Helpers */
+__maybe_unused
+static int drm_create_colorop_capability_prop(struct drm_device *dev,
+ struct drm_colorop *colorop,
+ struct drm_property_blob *blob)
+{
+ struct drm_property *prop = NULL;
+
+ prop = drm_property_create(dev, DRM_MODE_PROP_BLOB |
+ DRM_MODE_PROP_ATOMIC |
+ DRM_MODE_PROP_IMMUTABLE,
+ "HW_CAPS", 1);
+ if (!prop)
+ return -ENOMEM;
+
+ colorop->hw_caps_property = prop;
+ drm_object_attach_property(&colorop->base,
+ colorop->hw_caps_property,
+ blob->base.id);
+
+ return 0;
+}
static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
struct drm_plane *plane, enum drm_colorop_type type,
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 07/25] drm: Add 1D LUT multi-segmented color op
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (5 preceding siblings ...)
2024-11-26 13:27 ` [v2 06/25] drm: Define helper to create color " Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-30 9:44 ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG Uma Shankar
` (25 subsequent siblings)
32 siblings, 1 reply; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add support for color ops that can be programmed
by 1 dimensional multi segmented Look Up Tables.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/drm_atomic.c | 4 ++++
drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
include/uapi/drm/drm_mode.h | 8 ++++++++
3 files changed, 15 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 8a75f4a0637a..f344d64d42ce 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -802,6 +802,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
break;
+ case DRM_COLOROP_1D_LUT_MULTSEG:
+ drm_printf(p, "\thw cap blob id=%d\n", state->hw_caps ? state->hw_caps->base.id : 0);
+ drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
+ break;
case DRM_COLOROP_CTM_3X3:
drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
break;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index 46cc7b0df6e8..326159bff91c 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -720,6 +720,9 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop,
size = modes[index].lut_stride[0] * modes[index].lut_stride[1] * modes[index].lut_stride[2] *
sizeof(struct drm_color_lut);
break;
+ case DRM_COLOROP_1D_LUT_MULTSEG:
+ elem_size = sizeof(struct drm_color_lut_32);
+ break;
default:
/* should never get here */
return -EINVAL;
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 9ed8b1b1357a..d126a5410eea 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -923,6 +923,14 @@ enum drm_colorop_type {
*/
DRM_COLOROP_CTM_3X4,
+ /**
+ * @DRM_COLOROP_1D_LUT_MULTSEG:
+ *
+ * A 3x4 matrix. Its values are specified via the
+ * &drm_color_ctm_3x4 struct provided via the DATA property.
+ */
+ DRM_COLOROP_1D_LUT_MULTSEG,
+
/**
* @DRM_COLOROP_CTM_3X3:
*
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (6 preceding siblings ...)
2024-11-26 13:27 ` [v2 07/25] drm: Add 1D LUT multi-segmented color op Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 09/25] drm: Add helper to initialize segmented 1D LUT Uma Shankar
` (24 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
This adds helper functions to create 1D multi-segmented Lut color block
capabilities. It exposes the hardware block as segments
which are converted to blob and passed in the property.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/drm_colorop.c | 24 +++++++++++++++++++++++-
1 file changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index 8563953ec9cf..111517c08216 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -83,7 +83,6 @@ static const struct drm_prop_enum_list drm_colorop_lut1d_interpolation_list[] =
};
/* Init Helpers */
-__maybe_unused
static int drm_create_colorop_capability_prop(struct drm_device *dev,
struct drm_colorop *colorop,
struct drm_property_blob *blob)
@@ -105,6 +104,29 @@ static int drm_create_colorop_capability_prop(struct drm_device *dev,
return 0;
}
+__maybe_unused
+static int drm_colorop_lutcaps_init(struct drm_colorop *colorop,
+ struct drm_plane *plane,
+ const struct drm_color_lut_range *ranges,
+ size_t length)
+{
+ struct drm_device *dev = plane->dev;
+ struct drm_property_blob *blob;
+
+ /* Create Color Caps property for multi-segmented 1D LUT */
+ if (colorop->type != DRM_COLOROP_1D_LUT_MULTSEG)
+ return -EINVAL;
+
+ if (WARN_ON(length == 0 || length % sizeof(ranges[0]) != 0))
+ return -EINVAL;
+
+ blob = drm_property_create_blob(plane->dev, length, ranges);
+ if (IS_ERR(blob))
+ return PTR_ERR(blob);
+
+ return drm_create_colorop_capability_prop(dev, colorop, blob);
+}
+
static int drm_colorop_init(struct drm_device *dev, struct drm_colorop *colorop,
struct drm_plane *plane, enum drm_colorop_type type,
bool allow_bypass)
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 09/25] drm: Add helper to initialize segmented 1D LUT
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (7 preceding siblings ...)
2024-11-26 13:27 ` [v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-30 9:46 ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 10/25] drm/i915: Add identifiers for intel color blocks Uma Shankar
` (23 subsequent siblings)
32 siblings, 1 reply; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add helper to initialize 1D segmented LUT
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/drm_colorop.c | 27 ++++++++++++++++++++++++++-
include/drm/drm_colorop.h | 4 ++++
2 files changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index 111517c08216..871d5660e3b2 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -104,7 +104,6 @@ static int drm_create_colorop_capability_prop(struct drm_device *dev,
return 0;
}
-__maybe_unused
static int drm_colorop_lutcaps_init(struct drm_colorop *colorop,
struct drm_plane *plane,
const struct drm_color_lut_range *ranges,
@@ -338,6 +337,32 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co
}
EXPORT_SYMBOL(drm_colorop_curve_1d_lut_init);
+int drm_colorop_curve_1d_lut_multseg_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane,
+ const struct drm_color_lut_range *ranges,
+ size_t length, bool allow_bypass)
+{
+ int ret;
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_LUT_MULTSEG, allow_bypass);
+ if (ret)
+ return ret;
+
+ ret = drm_colorop_lutcaps_init(colorop, plane, ranges, length);
+ if (ret)
+ return ret;
+
+ /* data */
+ ret = drm_colorop_create_data_prop(dev, colorop);
+ if (ret)
+ return ret;
+
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_curve_1d_lut_multseg_init);
+
int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
struct drm_plane *plane, bool allow_bypass)
{
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index 58e5b87c6d56..9268fffd04f6 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -391,6 +391,10 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co
bool allow_bypass);
int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
struct drm_plane *plane, bool allow_bypass);
+int drm_colorop_curve_1d_lut_multseg_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane,
+ const struct drm_color_lut_range *ranges,
+ size_t length, bool allow_bypass);
int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
struct drm_plane *plane, bool allow_bypass);
int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 10/25] drm/i915: Add identifiers for intel color blocks
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (8 preceding siblings ...)
2024-11-26 13:27 ` [v2 09/25] drm: Add helper to initialize segmented 1D LUT Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 11/25] drm/i915: Add intel_color_op Uma Shankar
` (22 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add macros to identify intel color blocks. It will help
in mapping drm_color_ops to intel color HW blocks
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_display_limits.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index f0fa27e365ab..97c960cc16aa 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -138,4 +138,17 @@ enum hpd_pin {
HPD_NUM_PINS
};
+/*
+ * Intel Color Blocks
+ *
+ */
+
+enum intel_color_block {
+ CB_PLANE_PRE_CSC_LUT,
+ CB_PLANE_CSC,
+ CB_PLANE_POST_CSC_LUT,
+
+ I915_MAX_CB
+};
+
#endif /* __INTEL_DISPLAY_LIMITS_H__ */
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 11/25] drm/i915: Add intel_color_op
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (9 preceding siblings ...)
2024-11-26 13:27 ` [v2 10/25] drm/i915: Add identifiers for intel color blocks Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 12/25] drm/i915/color: Add helper to create intel colorop Uma Shankar
` (21 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add data structure to store intel specific details of colorop
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
.../drm/i915/display/intel_display_types.h | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index 339e4b0f7698..cfb5e5658b17 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1497,6 +1497,10 @@ struct intel_plane {
#define to_intel_framebuffer(fb) \
container_of_const((fb), struct intel_framebuffer, base)
+#define intel_fb_obj(x) ((x) ? to_intel_bo((x)->obj[0]) : NULL)
+#define to_intel_plane_colorop(x) container_of(x, struct intel_plane_colorop, base)
+#define to_intel_colorop_state(x) container_of(x, struct intel_plane_colorop_state, uapi)
+
struct intel_hdmi {
i915_reg_t hdmi_reg;
struct {
@@ -1856,6 +1860,21 @@ struct intel_dp_mst_encoder {
struct intel_connector *connector;
};
+struct intel_plane_colorop {
+ struct drm_colorop base;
+ enum intel_color_block id;
+};
+
+struct intel_plane_colorop_state {
+ struct drm_colorop_state uapi;
+
+ /* TODO: Add hw implementation */
+ struct {
+ bool active, enable;
+ struct drm_property_blob *data;
+ } hw;
+};
+
static inline struct intel_encoder *
intel_attached_encoder(struct intel_connector *connector)
{
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 12/25] drm/i915/color: Add helper to create intel colorop
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (10 preceding siblings ...)
2024-11-26 13:27 ` [v2 11/25] drm/i915: Add intel_color_op Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 13/25] drm/i915/color: Create a transfer function color pipeline Uma Shankar
` (20 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add intel colorop create helper
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 39 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_color.h | 3 ++
2 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 174753625bca..29a2463cbe7f 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3910,6 +3910,45 @@ static const struct intel_color_funcs ilk_color_funcs = {
.get_config = ilk_get_config,
};
+/* TODO: Move to another file */
+struct intel_plane_colorop *intel_colorop_alloc(void)
+{
+ struct intel_plane_colorop *colorop;
+ struct intel_plane_colorop_state *colorop_state;
+
+ colorop = kzalloc(sizeof(*colorop), GFP_KERNEL);
+ if (!colorop)
+ return ERR_PTR(-ENOMEM);
+
+ colorop_state = kzalloc(sizeof(*colorop_state), GFP_KERNEL);
+ if (!colorop_state) {
+ kfree(colorop);
+ return ERR_PTR(-ENOMEM);
+ }
+
+ /* TODO: Add color op reset
+ * intel_colorop_state_reset(plane_state, plane);
+ */
+
+ colorop->base.state = &colorop_state->uapi;
+
+ return colorop;
+}
+
+struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id)
+{
+ struct intel_plane_colorop *colorop;
+
+ colorop = intel_colorop_alloc();
+
+ if (IS_ERR(colorop))
+ return colorop;
+
+ colorop->id = id;
+
+ return colorop;
+}
+
void intel_color_crtc_init(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index 9d66457c1e89..a9f229e37317 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -14,6 +14,7 @@ struct intel_crtc;
struct intel_display;
struct intel_dsb;
struct drm_property_blob;
+enum intel_color_block;
void intel_color_init_hooks(struct intel_display *display);
int intel_color_init(struct intel_display *display);
@@ -38,5 +39,7 @@ bool intel_color_lut_equal(const struct intel_crtc_state *crtc_state,
const struct drm_property_blob *blob2,
bool is_pre_csc_lut);
void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
+struct intel_plane_colorop *intel_colorop_alloc(void);
+struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id);
#endif /* __INTEL_COLOR_H__ */
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 13/25] drm/i915/color: Create a transfer function color pipeline
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (11 preceding siblings ...)
2024-11-26 13:27 ` [v2 12/25] drm/i915/color: Add helper to create intel colorop Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
` (19 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add a color pipeline with three colorops in the sequence
1D LUT MULTSEG - CTM - 1D LUT MULTSEG
This pipeline can be used to do any color space conversion or HDR
tone mapping
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 175 +++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_color.h | 3 +
2 files changed, 178 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 29a2463cbe7f..ba4c4ff6c9d5 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -28,6 +28,7 @@
#include "intel_de.h"
#include "intel_display_types.h"
#include "intel_dsb.h"
+#include "skl_universal_plane.h"
struct intel_color_funcs {
int (*color_check)(struct intel_atomic_state *state,
@@ -3910,6 +3911,139 @@ static const struct intel_color_funcs ilk_color_funcs = {
.get_config = ilk_get_config,
};
+static const struct drm_color_lut_range xelpd_degamma_hdr[] = {
+ /* segment 1 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 128,
+ .start = 0, .end = (1 << 24) - 1,
+ .norm_factor = (1 << 24),
+ .precision = {
+ .intp = 0,
+ .fracp = 24,
+ },
+ },
+ /* segment 2 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 1,
+ .start = (1 << 24), .end = (1 << 24),
+ .norm_factor = (1 << 24),
+ .precision = {
+ .intp = 3,
+ .fracp = 24,
+ },
+ },
+ /* Segment 3 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 1,
+ .start = 3 * (1 << 24), .end = 3 * (1 << 24),
+ .norm_factor = (1 << 24),
+ .precision = {
+ .intp = 3,
+ .fracp = 24,
+ },
+ },
+ /* Segment 4 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 1,
+ .start = 7 * (1 << 24), .end = 7 * (1 << 24),
+ .norm_factor = (1 << 24),
+ .precision = {
+ .intp = 3,
+ .fracp = 24,
+ },
+ }
+};
+
+/* FIXME input bpc? */
+static const struct drm_color_lut_range xelpd_gamma_hdr[] = {
+ /* segment 1 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 9,
+ .start = 0, .end = 8,
+ .norm_factor = 8 * 32,
+ .precision = {
+ .intp = 0,
+ .fracp = 24,
+ },
+ },
+ /* segment 2 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 30,
+ .start = 8 * 2, .end = 8 * (32 - 1),
+ .norm_factor = 8 * 32,
+ .precision = {
+ .intp = 0,
+ .fracp = 24,
+ },
+ },
+ /* segment 3 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 1,
+ .start = 8 * 32, .end = 8 * 32,
+ .norm_factor = 8 * 32,
+ .precision = {
+ .intp = 3,
+ .fracp = 24,
+ },
+ },
+ /* segment 4 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 1,
+ .start = 3 * 8 * 32, .end = 3 * 8 * 32,
+ .norm_factor = 8 * 32,
+ .precision = {
+ .intp = 3,
+ .fracp = 24,
+ },
+ },
+ /* segment 5 */
+ {
+ .flags = (DRM_COLOROP_1D_LUT_MULTSEG_REFLECT_NEGATIVE |
+ DRM_COLOROP_1D_LUT_MULTSEG_INTERPOLATE |
+ DRM_COLOROP_1D_LUT_MULTSEG_SINGLE_CHANNEL |
+ DRM_COLOROP_1D_LUT_MULTSEG_NON_DECREASING),
+ .count = 1,
+ .start = 7 * 8 * 32, .end = 7 * 8 * 32,
+ .norm_factor = 8 * 32,
+ .precision = {
+ .intp = 3,
+ .fracp = 24,
+ },
+ },
+};
+
/* TODO: Move to another file */
struct intel_plane_colorop *intel_colorop_alloc(void)
{
@@ -3949,6 +4083,47 @@ struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id
return colorop;
}
+int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list)
+{
+ struct intel_plane_colorop *colorop;
+ struct drm_device *dev = plane->dev;
+ int ret;
+ struct drm_colorop *prev_op;
+
+ colorop = intel_plane_colorop_create(CB_PLANE_PRE_CSC_LUT);
+
+ ret = drm_colorop_curve_1d_lut_multseg_init(dev, &colorop->base,
+ plane, xelpd_degamma_hdr,
+ sizeof(xelpd_degamma_hdr), true);
+ if (ret)
+ return ret;
+
+ list->type = colorop->base.base.id;
+ list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", colorop->base.base.id);
+
+ /* TODO: handle failures and clean up*/
+ prev_op = &colorop->base;
+
+ colorop = intel_plane_colorop_create(CB_PLANE_CSC);
+ ret = drm_colorop_ctm_3x3_init(dev, &colorop->base, plane, true);
+ if (ret)
+ return ret;
+
+ drm_colorop_set_next_property(prev_op, &colorop->base);
+ prev_op = &colorop->base;
+
+ colorop = intel_plane_colorop_create(CB_PLANE_POST_CSC_LUT);
+ ret = drm_colorop_curve_1d_lut_multseg_init(dev, &colorop->base,
+ plane, xelpd_gamma_hdr,
+ sizeof(xelpd_gamma_hdr), true);
+ if (ret)
+ return ret;
+
+ drm_colorop_set_next_property(prev_op, &colorop->base);
+
+ return 0;
+}
+
void intel_color_crtc_init(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index a9f229e37317..abbc41d730a9 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -14,6 +14,8 @@ struct intel_crtc;
struct intel_display;
struct intel_dsb;
struct drm_property_blob;
+struct drm_plane;
+struct drm_prop_enum_list;
enum intel_color_block;
void intel_color_init_hooks(struct intel_display *display);
@@ -41,5 +43,6 @@ bool intel_color_lut_equal(const struct intel_crtc_state *crtc_state,
void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
struct intel_plane_colorop *intel_colorop_alloc(void);
struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id);
+int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list);
#endif /* __INTEL_COLOR_H__ */
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (12 preceding siblings ...)
2024-11-26 13:27 ` [v2 13/25] drm/i915/color: Create a transfer function color pipeline Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 15/25] drm/i915/color: Add framework to set colorop Uma Shankar
` (18 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add supported color pipelines and attach it to plane.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_color.h | 3 ++
2 files changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index ba4c4ff6c9d5..8bbaca9b3e9d 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4124,6 +4124,48 @@ int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_l
return 0;
}
+int intel_plane_color_init(struct drm_plane *plane)
+{
+ struct drm_device *dev = plane->dev;
+ struct drm_i915_private *i915 = to_i915(dev);
+ struct drm_property *prop;
+ struct drm_prop_enum_list pipelines[MAX_COLOR_PIPELINES];
+ int len = 0;
+ int ret;
+
+ /* Currently expose pipeline only for HDR planes*/
+ if (!icl_is_hdr_plane(i915, to_intel_plane(plane)->id))
+ return 0;
+
+ /* Add "Bypass" (i.e. NULL) pipeline */
+ pipelines[len].type = 0;
+ pipelines[len].name = "Bypass";
+ len++;
+
+ /* Add pipeline consisting of transfer functions */
+ ret = intel_plane_tf_pipeline_init(plane, &pipelines[len]);
+ if (ret)
+ return ret;
+ len++;
+
+ /* Create COLOR_PIPELINE property and attach */
+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_ATOMIC,
+ "COLOR_PIPELINE",
+ pipelines, len);
+ if (!prop)
+ return -ENOMEM;
+
+ plane->color_pipeline_property = prop;
+
+ drm_object_attach_property(&plane->base, prop, 0);
+
+ /* TODO check if needed */
+ if (plane->state)
+ plane->state->color_pipeline = NULL;
+
+ return 0;
+}
+
void intel_color_crtc_init(struct intel_crtc *crtc)
{
struct intel_display *display = to_intel_display(crtc);
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index abbc41d730a9..8a3bf5b79e39 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -18,6 +18,8 @@ struct drm_plane;
struct drm_prop_enum_list;
enum intel_color_block;
+#define MAX_COLOR_PIPELINES 5
+
void intel_color_init_hooks(struct intel_display *display);
int intel_color_init(struct intel_display *display);
void intel_color_crtc_init(struct intel_crtc *crtc);
@@ -44,5 +46,6 @@ void intel_color_assert_luts(const struct intel_crtc_state *crtc_state);
struct intel_plane_colorop *intel_colorop_alloc(void);
struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id);
int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list);
+int intel_plane_color_init(struct drm_plane *plane);
#endif /* __INTEL_COLOR_H__ */
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 15/25] drm/i915/color: Add framework to set colorop
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (13 preceding siblings ...)
2024-11-26 13:27 ` [v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 16/25] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
` (17 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add infrastructure to set colorop. We iterate through all the color ops
in a selected COLOR PIPELINE and set them one by one.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 31 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_color.h | 3 +++
2 files changed, 34 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 8bbaca9b3e9d..01bd5820a12b 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -4083,6 +4083,37 @@ struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id
return colorop;
}
+static void apply_colorop(const struct drm_plane_state *plane_state,
+ struct drm_colorop *colorop,
+ u32 *plane_color_ctl)
+{
+}
+
+void intel_program_pipeline(const struct drm_plane_state *plane_state, u32 *plane_color_ctl)
+{
+ struct drm_colorop *colorop;
+
+ colorop = plane_state->color_pipeline;
+
+ while (colorop) {
+ struct drm_colorop_state *colorop_state;
+
+ if (!colorop)
+ return;
+
+ /* TODO this is probably wrong */
+ colorop_state = colorop->state;
+
+ if (!colorop_state)
+ return;
+
+ if (!colorop_state->bypass)
+ apply_colorop(plane_state, colorop, plane_color_ctl);
+
+ colorop = colorop->next;
+ }
+}
+
int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list)
{
struct intel_plane_colorop *colorop;
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index 8a3bf5b79e39..7be2453eee0a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -15,6 +15,7 @@ struct intel_display;
struct intel_dsb;
struct drm_property_blob;
struct drm_plane;
+struct drm_plane_state;
struct drm_prop_enum_list;
enum intel_color_block;
@@ -47,5 +48,7 @@ struct intel_plane_colorop *intel_colorop_alloc(void);
struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id);
int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list);
int intel_plane_color_init(struct drm_plane *plane);
+void intel_program_pipeline(const struct drm_plane_state *plane_state,
+ u32 *plane_color_ctl);
#endif /* __INTEL_COLOR_H__ */
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 16/25] drm/i915/color: Add callbacks to set plane CTM
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (14 preceding siblings ...)
2024-11-26 13:27 ` [v2 15/25] drm/i915/color: Add framework to set colorop Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 17/25] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
` (16 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add callback to intel color functions for setting plane CTM.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 23 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_color.h | 2 ++
2 files changed, 25 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 01bd5820a12b..26c51334f3b7 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -29,6 +29,7 @@
#include "intel_display_types.h"
#include "intel_dsb.h"
#include "skl_universal_plane.h"
+#include "skl_universal_plane_regs.h"
struct intel_color_funcs {
int (*color_check)(struct intel_atomic_state *state,
@@ -84,6 +85,10 @@ struct intel_color_funcs {
* Read config other than LUTs and CSCs, before them. Optional.
*/
void (*get_config)(struct intel_crtc_state *crtc_state);
+
+ /* Plane CSC*/
+ void (*load_plane_csc_matrix)(const struct drm_plane_state *plane_state,
+ const struct drm_property_blob *blob);
};
#define CTM_COEFF_SIGN (1ULL << 63)
@@ -3784,6 +3789,15 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state)
}
}
+void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state,
+ const struct drm_property_blob *blob)
+{
+ struct drm_i915_private *i915 = to_i915(plane_state->plane->dev);
+
+ if (i915->display.funcs.color->load_plane_csc_matrix)
+ i915->display.funcs.color->load_plane_csc_matrix(plane_state, blob);
+}
+
static const struct intel_color_funcs chv_color_funcs = {
.color_check = chv_color_check,
.color_commit_arm = i9xx_color_commit_arm,
@@ -4087,6 +4101,15 @@ static void apply_colorop(const struct drm_plane_state *plane_state,
struct drm_colorop *colorop,
u32 *plane_color_ctl)
{
+ struct drm_colorop_state *state = colorop->state;
+ struct intel_plane_colorop *intel_colorop = to_intel_plane_colorop(colorop);
+
+ if (colorop->type == DRM_COLOROP_CTM_3X3) {
+ /* TODO: use intel_color_op state data */
+ (*plane_color_ctl) |= PLANE_COLOR_PLANE_CSC_ENABLE;
+ if (state->data && intel_colorop->id == CB_PLANE_CSC)
+ intel_color_load_plane_csc_matrix(plane_state, state->data);
+ }
}
void intel_program_pipeline(const struct drm_plane_state *plane_state, u32 *plane_color_ctl)
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index 7be2453eee0a..522d1ddd574a 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -50,5 +50,7 @@ int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_l
int intel_plane_color_init(struct drm_plane *plane);
void intel_program_pipeline(const struct drm_plane_state *plane_state,
u32 *plane_color_ctl);
+void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state,
+ const struct drm_property_blob *blob);
#endif /* __INTEL_COLOR_H__ */
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 17/25] drm/i915/color: Add new color callbacks for Xelpd
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (15 preceding siblings ...)
2024-11-26 13:27 ` [v2 16/25] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
` (15 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Since we intend to add plane color callbacks from Xelpd(D13 and beyond),
create a different structure for it.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 15 ++++++++++++++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 26c51334f3b7..c2da5aea5d56 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3847,6 +3847,17 @@ static const struct intel_color_funcs tgl_color_funcs = {
.get_config = skl_get_config,
};
+static const struct intel_color_funcs xelpd_color_funcs = {
+ .color_check = icl_color_check,
+ .color_commit_noarm = icl_color_commit_noarm,
+ .color_commit_arm = icl_color_commit_arm,
+ .load_luts = icl_load_luts,
+ .read_luts = icl_read_luts,
+ .lut_equal = icl_lut_equal,
+ .read_csc = icl_read_csc,
+ .get_config = skl_get_config,
+};
+
static const struct intel_color_funcs icl_color_funcs = {
.color_check = icl_color_check,
.color_commit_noarm = icl_color_commit_noarm,
@@ -4278,7 +4289,9 @@ void intel_color_init_hooks(struct intel_display *display)
else
display->funcs.color = &i9xx_color_funcs;
} else {
- if (DISPLAY_VER(display) >= 12)
+ if (DISPLAY_VER(display) >= 13)
+ display->funcs.color = &xelpd_color_funcs;
+ else if (DISPLAY_VER(display) == 12)
display->funcs.color = &tgl_color_funcs;
else if (DISPLAY_VER(display) == 11)
display->funcs.color = &icl_color_funcs;
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (16 preceding siblings ...)
2024-11-26 13:27 ` [v2 17/25] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 19/25] drm/i915: Add register definitions for Plane Degamma Uma Shankar
` (14 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Add callback for setting CTM block in platforms D13 and beyond
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 79 ++++++++++++++++++++++
1 file changed, 79 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index c2da5aea5d56..df5d81bbd7e3 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3789,6 +3789,84 @@ static void icl_read_luts(struct intel_crtc_state *crtc_state)
}
}
+static void xelpd_load_plane_csc_matrix(const struct drm_plane_state *state,
+ const struct drm_property_blob *blob)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
+ enum pipe pipe = to_intel_plane(state->plane)->pipe;
+ enum plane_id plane = to_intel_plane(state->plane)->id;
+ struct drm_color_ctm *ctm;
+ const u64 *input;
+ u16 coeffs[9] = {};
+ u16 postoff = 0;
+ int i;
+
+ if (!icl_is_hdr_plane(dev_priv, plane) || !blob)
+ return;
+
+ ctm = blob->data;
+ input = ctm->matrix;
+
+ /*
+ * Convert fixed point S31.32 input to format supported by the
+ * hardware.
+ */
+ for (i = 0; i < ARRAY_SIZE(coeffs); i++) {
+ u64 abs_coeff = ((1ULL << 63) - 1) & input[i];
+
+ /*
+ * Clamp input value to min/max supported by
+ * hardware.
+ */
+ abs_coeff = clamp_val(abs_coeff, 0, CTM_COEFF_4_0 - 1);
+
+ /* sign bit */
+ if (CTM_COEFF_NEGATIVE(input[i]))
+ coeffs[i] |= 1 << 15;
+
+ if (abs_coeff < CTM_COEFF_0_125)
+ coeffs[i] |= (3 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 12);
+ else if (abs_coeff < CTM_COEFF_0_25)
+ coeffs[i] |= (2 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 11);
+ else if (abs_coeff < CTM_COEFF_0_5)
+ coeffs[i] |= (1 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 10);
+ else if (abs_coeff < CTM_COEFF_1_0)
+ coeffs[i] |= ILK_CSC_COEFF_FP(abs_coeff, 9);
+ else if (abs_coeff < CTM_COEFF_2_0)
+ coeffs[i] |= (7 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 8);
+ else
+ coeffs[i] |= (6 << 12) |
+ ILK_CSC_COEFF_FP(abs_coeff, 7);
+ }
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 0),
+ coeffs[0] << 16 | coeffs[1]);
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 1),
+ coeffs[2] << 16);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 2),
+ coeffs[3] << 16 | coeffs[4]);
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 3),
+ coeffs[5] << 16);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 4),
+ coeffs[6] << 16 | coeffs[7]);
+ intel_de_write_fw(dev_priv, PLANE_CSC_COEFF(pipe, plane, 5),
+ coeffs[8] << 16);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 0), 0);
+ intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 1), 0);
+ intel_de_write_fw(dev_priv, PLANE_CSC_PREOFF(pipe, plane, 2), 0);
+
+ intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 0), postoff);
+ intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 1), postoff);
+ intel_de_write_fw(dev_priv, PLANE_CSC_POSTOFF(pipe, plane, 2), postoff);
+}
+
void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state,
const struct drm_property_blob *blob)
{
@@ -3856,6 +3934,7 @@ static const struct intel_color_funcs xelpd_color_funcs = {
.lut_equal = icl_lut_equal,
.read_csc = icl_read_csc,
.get_config = skl_get_config,
+ .load_plane_csc_matrix = xelpd_load_plane_csc_matrix,
};
static const struct intel_color_funcs icl_color_funcs = {
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 19/25] drm/i915: Add register definitions for Plane Degamma
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (17 preceding siblings ...)
2024-11-26 13:27 ` [v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
` (13 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Add macros to define Plane Degamma registers
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
.../i915/display/skl_universal_plane_regs.h | 53 +++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
index ff31a00d511e..8625914a9614 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
@@ -254,6 +254,7 @@
#define PLANE_COLOR_PIPE_CSC_ENABLE REG_BIT(23) /* Pre-ICL */
#define PLANE_COLOR_PLANE_CSC_ENABLE REG_BIT(21) /* ICL+ */
#define PLANE_COLOR_INPUT_CSC_ENABLE REG_BIT(20) /* ICL+ */
+#define PLANE_COLOR_PRE_CSC_GAMMA_ENABLE REG_BIT(14)
#define PLANE_COLOR_CSC_MODE_MASK REG_GENMASK(19, 17)
#define PLANE_COLOR_CSC_MODE_BYPASS REG_FIELD_PREP(PLANE_COLOR_CSC_MODE_MASK, 0)
#define PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601 REG_FIELD_PREP(PLANE_COLOR_CSC_MODE_MASK, 1)
@@ -290,6 +291,58 @@
_PLANE_INPUT_CSC_POSTOFF_HI_1_A, _PLANE_INPUT_CSC_POSTOFF_HI_1_B, \
_PLANE_INPUT_CSC_POSTOFF_HI_2_A, _PLANE_INPUT_CSC_POSTOFF_HI_2_B)
+#define _MMIO_PLANE_GAMC(plane, i, a, b) _MMIO(_PIPE(plane, a, b) + (i) * 4)
+
+/* Display13 Plane Degmma Reg */
+#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_A 0x701d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_B 0x711d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_A 0x702d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_B 0x712d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_A, \
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_B)
+#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_A, \
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_B)
+#define PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_2(pipe))
+#define PLANE_PAL_PREC_AUTO_INCREMENT REG_BIT(10)
+
+#define _PLANE_PRE_CSC_GAMC_DATA_ENH_1_A 0x701d4
+#define _PLANE_PRE_CSC_GAMC_DATA_ENH_1_B 0x711d4
+#define _PLANE_PRE_CSC_GAMC_DATA_ENH_2_A 0x702d4
+#define _PLANE_PRE_CSC_GAMC_DATA_ENH_2_B 0x712d4
+#define _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_ENH_1_A, \
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_1_B)
+#define _PLANE_PRE_CSC_GAMC_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_ENH_2_A, \
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_2_B)
+#define PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_2(pipe))
+
+#define _PLANE_PRE_CSC_GAMC_INDEX_1_A 0x704d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_1_B 0x714d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_2_A 0x705d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_2_B 0x715d0
+#define _PLANE_PRE_CSC_GAMC_INDEX_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_1_A, \
+ _PLANE_PRE_CSC_GAMC_INDEX_1_B)
+#define _PLANE_PRE_CSC_GAMC_INDEX_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_INDEX_2_A, \
+ _PLANE_PRE_CSC_GAMC_INDEX_2_B)
+#define PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_INDEX_2(pipe))
+
+#define _PLANE_PRE_CSC_GAMC_DATA_1_A 0x704d4
+#define _PLANE_PRE_CSC_GAMC_DATA_1_B 0x714d4
+#define _PLANE_PRE_CSC_GAMC_DATA_2_A 0x705d4
+#define _PLANE_PRE_CSC_GAMC_DATA_2_B 0x715d4
+#define _PLANE_PRE_CSC_GAMC_DATA_1(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_1_A, \
+ _PLANE_PRE_CSC_GAMC_DATA_1_B)
+#define _PLANE_PRE_CSC_GAMC_DATA_2(pipe) _PIPE(pipe, _PLANE_PRE_CSC_GAMC_DATA_2_A, \
+ _PLANE_PRE_CSC_GAMC_DATA_2_B)
+#define PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_DATA_2(pipe))
+
#define _PLANE_CSC_RY_GY_1_A 0x70210
#define _PLANE_CSC_RY_GY_2_A 0x70310
#define _PLANE_CSC_RY_GY_1_B 0x71210
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (18 preceding siblings ...)
2024-11-26 13:27 ` [v2 19/25] drm/i915: Add register definitions for Plane Degamma Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 21/25] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
` (12 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add framework that will help in loading LUT to Pre/Post CSC color
blocks.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 27 ++++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_color.h | 2 ++
2 files changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index df5d81bbd7e3..736113faaec0 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -89,6 +89,10 @@ struct intel_color_funcs {
/* Plane CSC*/
void (*load_plane_csc_matrix)(const struct drm_plane_state *plane_state,
const struct drm_property_blob *blob);
+
+ /* Plane Pre/Post CSC */
+ void (*load_plane_luts)(const struct drm_plane_state *plane_state,
+ const struct drm_property_blob *blob, bool is_pre_csc);
};
#define CTM_COEFF_SIGN (1ULL << 63)
@@ -3876,6 +3880,20 @@ void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state
i915->display.funcs.color->load_plane_csc_matrix(plane_state, blob);
}
+static void xelpd_plane_load_luts(const struct drm_plane_state *plane_state,
+ const struct drm_property_blob *blob, bool is_pre_csc)
+{
+}
+
+void intel_color_load_plane_luts(const struct drm_plane_state *plane_state,
+ const struct drm_property_blob *blob, bool is_pre_csc)
+{
+ struct drm_i915_private *i915 = to_i915(plane_state->plane->dev);
+
+ if (i915->display.funcs.color->load_plane_luts)
+ i915->display.funcs.color->load_plane_luts(plane_state, blob, is_pre_csc);
+}
+
static const struct intel_color_funcs chv_color_funcs = {
.color_check = chv_color_check,
.color_commit_arm = i9xx_color_commit_arm,
@@ -3935,6 +3953,7 @@ static const struct intel_color_funcs xelpd_color_funcs = {
.read_csc = icl_read_csc,
.get_config = skl_get_config,
.load_plane_csc_matrix = xelpd_load_plane_csc_matrix,
+ .load_plane_luts = xelpd_plane_load_luts,
};
static const struct intel_color_funcs icl_color_funcs = {
@@ -4199,6 +4218,14 @@ static void apply_colorop(const struct drm_plane_state *plane_state,
(*plane_color_ctl) |= PLANE_COLOR_PLANE_CSC_ENABLE;
if (state->data && intel_colorop->id == CB_PLANE_CSC)
intel_color_load_plane_csc_matrix(plane_state, state->data);
+ } else if (colorop->type == DRM_COLOROP_1D_LUT_MULTSEG) {
+ if (state->data && intel_colorop->id == CB_PLANE_PRE_CSC_LUT) {
+ (*plane_color_ctl) |= PLANE_COLOR_PRE_CSC_GAMMA_ENABLE;
+ intel_color_load_plane_luts(plane_state, state->data, true);
+ } else if (state->data && intel_colorop->id == CB_PLANE_POST_CSC_LUT) {
+ (*plane_color_ctl) &= ~PLANE_COLOR_PLANE_GAMMA_DISABLE;
+ intel_color_load_plane_luts(plane_state, state->data, false);
+ }
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h
index 522d1ddd574a..98de1f98651b 100644
--- a/drivers/gpu/drm/i915/display/intel_color.h
+++ b/drivers/gpu/drm/i915/display/intel_color.h
@@ -52,5 +52,7 @@ void intel_program_pipeline(const struct drm_plane_state *plane_state,
u32 *plane_color_ctl);
void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state,
const struct drm_property_blob *blob);
+void intel_color_load_plane_luts(const struct drm_plane_state *plane_state,
+ const struct drm_property_blob *blob, bool is_pre_csc);
#endif /* __INTEL_COLOR_H__ */
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 21/25] drm/i915: Add register definitions for Plane Post CSC
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (19 preceding siblings ...)
2024-11-26 13:27 ` [v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 22/25] drm/i915/color: Program Pre-CSC registers Uma Shankar
` (11 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Add macros to define Plane Post CSC registers
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
.../i915/display/skl_universal_plane_regs.h | 73 +++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
index 8625914a9614..5e2a40f7d919 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane_regs.h
@@ -293,6 +293,79 @@
#define _MMIO_PLANE_GAMC(plane, i, a, b) _MMIO(_PIPE(plane, a, b) + (i) * 4)
+/* Display13 Plane Gamma Reg */
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_A 0x70160
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_B 0x71160
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_A 0x70260
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_B 0x71260
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_A, \
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_B)
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_A, \
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_B)
+#define PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe))
+
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_A 0x70164
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_B 0x71164
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_A 0x70264
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_B 0x71264
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_A, \
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_B)
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_A, \
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_B)
+#define PLANE_POST_CSC_GAMC_SEG0_DATA_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe))
+
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A 0x701d8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B 0x711d8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A 0x702d8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B 0x712d8
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_1_A, \
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B)
+#define _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_ENH_2_A, \
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B)
+#define PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe))
+
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_A 0x701dc
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_1_B 0x711dc
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_A 0x702dc
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_2_B 0x712dc
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_1_A, \
+ _PLANE_POST_CSC_GAMC_DATA_ENH_1_B)
+#define _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_ENH_2_A, \
+ _PLANE_POST_CSC_GAMC_DATA_ENH_2_B)
+#define PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe))
+
+#define _PLANE_POST_CSC_GAMC_INDEX_1_A 0x704d8
+#define _PLANE_POST_CSC_GAMC_INDEX_1_B 0x714d8
+#define _PLANE_POST_CSC_GAMC_INDEX_2_A 0x705d8
+#define _PLANE_POST_CSC_GAMC_INDEX_2_B 0x715d8
+#define _PLANE_POST_CSC_GAMC_INDEX_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_1_A, \
+ _PLANE_POST_CSC_GAMC_INDEX_1_B)
+#define _PLANE_POST_CSC_GAMC_INDEX_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_INDEX_2_A, \
+ _PLANE_POST_CSC_GAMC_INDEX_2_B)
+#define PLANE_POST_CSC_GAMC_INDEX(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_1(pipe), \
+ _PLANE_POST_CSC_GAMC_INDEX_2(pipe))
+
+#define _PLANE_POST_CSC_GAMC_DATA_1_A 0x704dc
+#define _PLANE_POST_CSC_GAMC_DATA_1_B 0x714dc
+#define _PLANE_POST_CSC_GAMC_DATA_2_A 0x705dc
+#define _PLANE_POST_CSC_GAMC_DATA_2_B 0x715dc
+#define _PLANE_POST_CSC_GAMC_DATA_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_1_A, \
+ _PLANE_POST_CSC_GAMC_DATA_1_B)
+#define _PLANE_POST_CSC_GAMC_DATA_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_DATA_2_A, \
+ _PLANE_POST_CSC_GAMC_DATA_2_B)
+#define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_1(pipe), \
+ _PLANE_POST_CSC_GAMC_DATA_2(pipe))
+
/* Display13 Plane Degmma Reg */
#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_A 0x701d0
#define _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_B 0x711d0
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 22/25] drm/i915/color: Program Pre-CSC registers
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (20 preceding siblings ...)
2024-11-26 13:27 ` [v2 21/25] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
` (10 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Add callback for programming Pre-CSC LUT for TGL and beyond
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 88 ++++++++++++++++++++++
1 file changed, 88 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 736113faaec0..d942e70bcb56 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3880,9 +3880,97 @@ void intel_color_load_plane_csc_matrix(const struct drm_plane_state *plane_state
i915->display.funcs.color->load_plane_csc_matrix(plane_state, blob);
}
+static void xelpd_program_plane_pre_csc_lut(const struct drm_plane_state *state,
+ const struct drm_color_lut_32 *pre_csc_lut,
+ u32 offset)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
+ enum pipe pipe = to_intel_plane(state->plane)->pipe;
+ enum plane_id plane = to_intel_plane(state->plane)->id;
+ u32 i, lut_size;
+
+ if (icl_is_hdr_plane(dev_priv, plane)) {
+ lut_size = 128;
+
+ intel_de_write_fw(dev_priv, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
+ offset | PLANE_PAL_PREC_AUTO_INCREMENT);
+
+ if (pre_csc_lut) {
+ for (i = 0; i < lut_size; i++) {
+ u32 lut_val = (pre_csc_lut[i].green & 0xffffff);
+
+ intel_de_write_fw(dev_priv,
+ PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+ lut_val);
+ }
+
+ /* Program the max register to clamp values > 1.0. */
+ /* ToDo: Restrict to 0x7ffffff*/
+ while (i < 131)
+ intel_de_write_fw(dev_priv,
+ PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+ pre_csc_lut[i++].green);
+ } else {
+ for (i = 0; i < lut_size; i++) {
+ u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
+
+ intel_de_write_fw(dev_priv,
+ PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);
+ }
+
+ do {
+ intel_de_write_fw(dev_priv,
+ PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+ 1 << 24);
+ } while (i++ < 130);
+ }
+
+ intel_de_write_fw(dev_priv, PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
+ } else {
+ lut_size = 32;
+
+ /*
+ * First 3 planes are HDR, so reduce by 3 to get to the right
+ * SDR plane offset
+ */
+ plane = plane - 3;
+
+ intel_de_write_fw(dev_priv, PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, 0),
+ offset | PLANE_PAL_PREC_AUTO_INCREMENT);
+
+ if (pre_csc_lut) {
+ for (i = 0; i < lut_size; i++)
+ intel_de_write_fw(dev_priv, PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+ pre_csc_lut[i].green);
+ /* Program the max register to clamp values > 1.0. */
+ while (i < 35)
+ intel_de_write_fw(dev_priv, PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+ pre_csc_lut[i++].green);
+ } else {
+ for (i = 0; i < lut_size; i++) {
+ u32 v = (i * ((1 << 16) - 1)) / (lut_size - 1);
+
+ intel_de_write_fw(dev_priv,
+ PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0), v);
+ }
+
+ do {
+ intel_de_write_fw(dev_priv, PLANE_PRE_CSC_GAMC_DATA(pipe, plane, 0),
+ 1 << 16);
+ } while (i++ < 34);
+ }
+
+ intel_de_write_fw(dev_priv, PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+ }
+}
+
static void xelpd_plane_load_luts(const struct drm_plane_state *plane_state,
const struct drm_property_blob *blob, bool is_pre_csc)
{
+ struct drm_color_lut_32 *lut = blob->data;
+
+ if (is_pre_csc)
+ xelpd_program_plane_pre_csc_lut(plane_state, lut, 0);
}
void intel_color_load_plane_luts(const struct drm_plane_state *plane_state,
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (21 preceding siblings ...)
2024-11-26 13:27 ` [v2 22/25] drm/i915/color: Program Pre-CSC registers Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 24/25] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
` (9 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Extract the LUT and program plane post csc registers.
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 109 +++++++++++++++++++++
1 file changed, 109 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index d942e70bcb56..f3333d0c8b49 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -3964,6 +3964,113 @@ static void xelpd_program_plane_pre_csc_lut(const struct drm_plane_state *state,
}
}
+static void xelpd_program_plane_post_csc_lut(const struct drm_plane_state *state,
+ const struct drm_color_lut_32 *post_csc_lut,
+ u32 offset)
+{
+ struct drm_i915_private *dev_priv = to_i915(state->plane->dev);
+ enum pipe pipe = to_intel_plane(state->plane)->pipe;
+ enum plane_id plane = to_intel_plane(state->plane)->id;
+ u32 i, lut_size, j;
+
+ if (icl_is_hdr_plane(dev_priv, plane)) {
+ intel_de_write_fw(dev_priv, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0),
+ offset | PLANE_PAL_PREC_AUTO_INCREMENT);
+ /* TODO: Add macro */
+ intel_de_write_fw(dev_priv, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0),
+ PLANE_PAL_PREC_AUTO_INCREMENT);
+ if (post_csc_lut) {
+ /* Segment 0 */
+ for (i = 0, j = 0; i < 9; i++, j++) {
+ u32 lut_val = (post_csc_lut[j].green & 0xffffff);
+
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_SEG0_DATA_ENH(pipe, plane, 0),
+ lut_val);
+ }
+
+ /* Segment 1 */
+ lut_size = 32;
+ for (i = 0; i < lut_size; i++) {
+ u32 lut_val;
+
+ if (i == 0)
+ lut_val = post_csc_lut[0].green & 0xffffff;
+ else if (i == 1)
+ lut_val = (post_csc_lut[8].green & 0xffffff);
+ else
+ lut_val = (post_csc_lut[j++].green & 0xffffff);
+
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+ lut_val);
+ }
+
+ /* Segment 2 */
+ do {
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+ post_csc_lut[j++].green);
+ } while (j < 42);
+ } else {
+ /*TODO: Add for segment 0 */
+ lut_size = 32;
+ for (i = 0; i < lut_size; i++) {
+ u32 v = (i * ((1 << 24) - 1)) / (lut_size - 1);
+
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0), v);
+ }
+
+ do {
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, 0),
+ 1 << 24);
+ } while (i++ < 34);
+ }
+
+ intel_de_write_fw(dev_priv, PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, 0), 0);
+ intel_de_write_fw(dev_priv, PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, 0), 0);
+ } else {
+ lut_size = 32;
+ /*
+ * First 3 planes are HDR, so reduce by 3 to get to the right
+ * SDR plane offset
+ */
+ plane = plane - 3;
+
+ intel_de_write_fw(dev_priv, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0),
+ offset | PLANE_PAL_PREC_AUTO_INCREMENT);
+
+ if (post_csc_lut) {
+ for (i = 0; i < lut_size; i++)
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+ post_csc_lut[i].green & 0xffff);
+ /* Program the max register to clamp values > 1.0. */
+ while (i < 35)
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+ post_csc_lut[i++].green & 0x3ffff);
+ } else {
+ for (i = 0; i < lut_size; i++) {
+ u32 v = (i * ((1 << 16) - 1)) / (lut_size - 1);
+
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0), v);
+ }
+
+ do {
+ intel_de_write_fw(dev_priv,
+ PLANE_POST_CSC_GAMC_DATA(pipe, plane, 0),
+ (1 << 16));
+ } while (i++ < 34);
+ }
+
+ intel_de_write_fw(dev_priv, PLANE_POST_CSC_GAMC_INDEX(pipe, plane, 0), 0);
+ }
+}
+
static void xelpd_plane_load_luts(const struct drm_plane_state *plane_state,
const struct drm_property_blob *blob, bool is_pre_csc)
{
@@ -3971,6 +4078,8 @@ static void xelpd_plane_load_luts(const struct drm_plane_state *plane_state,
if (is_pre_csc)
xelpd_program_plane_pre_csc_lut(plane_state, lut, 0);
+ else
+ xelpd_program_plane_post_csc_lut(plane_state, lut, 0);
}
void intel_color_load_plane_luts(const struct drm_plane_state *plane_state,
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 24/25] drm/i915/color: Enable Plane Color Pipelines
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (22 preceding siblings ...)
2024-11-26 13:27 ` [v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` [v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar
` (8 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Chaitanya Kumar Borah,
Uma Shankar
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Expose color pipeline and add ability to program it.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/i915/display/skl_universal_plane.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
index 4c7bcf6806ff..4fe1e347cce1 100644
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@ -12,6 +12,7 @@
#include "i915_reg.h"
#include "intel_atomic_plane.h"
#include "intel_bo.h"
+#include "intel_color.h"
#include "intel_de.h"
#include "intel_display_irq.h"
#include "intel_display_types.h"
@@ -1455,6 +1456,8 @@ icl_plane_update_noarm(struct intel_dsb *dsb,
plane_color_ctl = plane_state->color_ctl |
glk_plane_color_ctl_crtc(crtc_state);
+ intel_program_pipeline(&plane_state->uapi, &plane_color_ctl);
+
/* The scaler will handle the output position */
if (plane_state->scaler_id >= 0) {
crtc_x = 0;
@@ -2715,6 +2718,8 @@ skl_universal_plane_create(struct drm_i915_private *dev_priv,
DRM_COLOR_YCBCR_BT709,
DRM_COLOR_YCBCR_LIMITED_RANGE);
+ intel_plane_color_init(&plane->base);
+
drm_plane_create_alpha_property(&plane->base);
drm_plane_create_blend_mode_property(&plane->base,
BIT(DRM_MODE_BLEND_PIXEL_NONE) |
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* [v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (23 preceding siblings ...)
2024-11-26 13:27 ` [v2 24/25] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
@ 2024-11-26 13:27 ` Uma Shankar
2024-11-26 13:27 ` ✓ CI.Patch_applied: success for Plane Color Pipeline support for Intel platforms Patchwork
` (7 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Uma Shankar @ 2024-11-26 13:27 UTC (permalink / raw)
To: dri-devel, intel-gfx, intel-xe
Cc: ville.syrjala, harry.wentland, pekka.paalanen, sebastian.wick,
jadahl, mwen, contact, naveen1.kumar, Uma Shankar
Add documentation to explain properties of the exposed hardware
1D LUT blocks, its identification and computation of the LUT samples
based on the number of samples, their distribution and precison.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
Documentation/gpu/rfc/color_pipeline.rst | 142 ++++++++++++++++++++++-
1 file changed, 141 insertions(+), 1 deletion(-)
diff --git a/Documentation/gpu/rfc/color_pipeline.rst b/Documentation/gpu/rfc/color_pipeline.rst
index 4135f07b85a7..706dfc449aee 100644
--- a/Documentation/gpu/rfc/color_pipeline.rst
+++ b/Documentation/gpu/rfc/color_pipeline.rst
@@ -277,6 +277,125 @@ pipeline might look like this::
├─ "CURVE_1D_TYPE": enum {sRGB EOTF, PQ EOTF} = sRGB EOTF
└─ "NEXT" (immutable) = 0
+Discover capabilities of 1D LUT HW block
+----------------------------------------
+
+The driver exposes a blob property(HW_CAPS) which allows user-space to
+parse and extract the hardware capabilities of 1D LUT. These include
+number of LUT segments, number of LUT samples per segment, start and end
+point of respective segments and the precision of the LUT sample along
+with the normalization factor. This is how the capability structure look like
+
+ struct drm_color_lut_range {
+ __u32 flags;
+ __u16 count;
+ __s32 start, end;
+ __u32 norm_factor;
+
+ struct {
+ __u16 intp;
+ __u16 fracp;
+ } precision;
+ };
+
+If a hardware has multiple segments in 1D LUT, each segment will be represented
+by one instance of the above structure and the whole 1D LUT block will be represented
+by an array of drm_color_lut_range.
+
+Here,
+
+flags : This indicates LUT characteristics like linearly increasing, negative
+ reflect or any other property of the LUT.
+
+count : Number of samples in the respective segments.
+
+start, end : It indicates the starting point and ending point of the segment respectively.
+ This represent a point in 0 to 1.0 color space curve and the value depends on
+ the normalization factor chosen.
+
+norm_factor : This factor helps define a scale to represent LUT sample with the smallest step size
+ in case of uniform or non-uniform LUT sample distribution.
+
+precision: It indicates the fixed point precision of HW LUT including integer and fractional component.
+
+To explain the usage with some real life example
+------------------------------------------------
+
+1. Conventional 1D LUT with just one segment
+
+ |---|---|------------------------------------|
+ 0 1 2 1024
+
+
+ - Hardware Description: A color block with a LUT linearly interpolating and
+ covering range from 0 to 1.0
+ - Number of segments - 1
+ - Number of samples in LUT 1024
+ - Precision of LUT samples in HW 0.10
+ - Normalization Factor - Max value to represent 1.0
+ in terms of smallest step size which is 1024.
+
+ In this case, it will be represented by the following structure.
+
+ struct drm_color_lut_range lut_1024[] = {
+ .start = 0 .end = (1 << 10);
+ .normalization_factor = 1024;
+ .count = 1024;
+ .precision {
+ .int_comp = 0;
+ .fractional_comp = 10;
+ }
+ }
+
+2. Piece Wise Linear 1D LUT2. Piece Wise Linear 1D LUT
+
+ |---|---|------------------------------------|
+ 0 1 2 32
+ | \
+ | \
+ | \
+ | \
+ | \
+ 0 \
+ |---|---|--...-------|
+ 0 1 2 8
+
+ - Hardware Description: A color block with a LUT linearly interpolating and
+ covering range from 0 to 1.0
+ - Number of segments 2
+ - Number of samples
+ - segment 1 - 9 (covers range from 0 to 1/32)
+ - segment 2 - 30 (covers range from 2/32 to 1.0)
+ - Precision of LUT samples in HW 0.24
+ - Normalization Factor - Max value to represent 1.0
+ in terms of smallest step size which is 8*32.
+
+ struct drm_color_lut_range lut_pwl[] = {
+ /* segment 1 */
+ {
+ .count = 9,
+ .start = 0, .end = 8,
+ .norm_factor = 8*32,
+ .precision = {
+ .intp = 0,
+ .fracp = 24,
+ },
+ },
+ /* segment 2 */
+ {
+ .count = 30,
+ .start = 8*2, .end = 8*32,
+ .norm_factor = 8*32,
+ .precision = {
+ .intp = 0,
+ .fracp = 24,
+ },
+ },
+ }
+
+Note: In case HW supports overlapping LUTs expectation from uAPI is that the respective HW vendor
+driver expose it as linearly increasing LUT and it will internally handle the programming of the
+overlapping sections.
Color Pipeline Programming
==========================
@@ -318,6 +437,27 @@ property values::
├─ "CURVE_1D_TYPE" = PQ EOTF
└─ "BYPASS" = false
+Programming 1d LUT HW block
+---------------------------
+
+In order to compute the LUT samples, userspace will parse the drm_color_lut_range structure to
+get the LUT distribution of the underlying HW block.
+
+It needs to compute the normalized value of the LUT sample using the normalization factor provided
+by the driver. The normalized value can then be scaled to the LUT precision of the HW. The computed
+LUT samples will be packed in a blob and passed to the driver to be programmed in HW.
+
+The pseudo code of calculating the LUT samples for a linear LUT is described below.
+
+ for (i = 0; i < sample_count; i++) {
+ start end - start
+ normalized_value = ---------------------- + ----------------------------------------- * i
+ normalization_factor (sample_count - 1) * normalization_factor
+
+ lut[i] = normalized_value * lut_precision /* (1 << precision.fracp) */
+ }
+
+Note: The same logic can be extended for any color space transfer function implementation.
Driver Implementer's Guide
==========================
@@ -373,4 +513,4 @@ for user space. In this case a new pipeline should be defined.
References
==========
-1. https://lore.kernel.org/dri-devel/QMers3awXvNCQlyhWdTtsPwkp5ie9bze_hD5nAccFW7a_RXlWjYB7MoUW_8CKLT2bSQwIXVi5H6VULYIxCdgvryZoAoJnC5lZgyK1QWn488=@emersion.fr/
\ No newline at end of file
+1. https://lore.kernel.org/dri-devel/QMers3awXvNCQlyhWdTtsPwkp5ie9bze_hD5nAccFW7a_RXlWjYB7MoUW_8CKLT2bSQwIXVi5H6VULYIxCdgvryZoAoJnC5lZgyK1QWn488=@emersion.fr/
--
2.42.0
^ permalink raw reply related [flat|nested] 43+ messages in thread
* ✓ CI.Patch_applied: success for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (24 preceding siblings ...)
2024-11-26 13:27 ` [v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar
@ 2024-11-26 13:27 ` Patchwork
2024-11-26 13:28 ` ✗ CI.checkpatch: warning " Patchwork
` (6 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 13:27 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : success
== Summary ==
=== Applying kernel patches on branch 'drm-tip' with base: ===
Base commit: ef0147fcb01d drm-tip: 2024y-11m-26d-12h-47m-19s UTC integration manifest
=== git am output follows ===
Applying: drm: color pipeline base work
Applying: drm: Add support for 3x3 CTM
Applying: drm: Add Enhanced LUT precision structure
Applying: drm: Add Color lut range attributes
Applying: drm: Add Color ops capability property
Applying: drm: Define helper to create color ops capability property
Applying: drm: Add 1D LUT multi-segmented color op
Applying: drm: Define helper for adding capability property for 1D LUT MULTSEG
Applying: drm: Add helper to initialize segmented 1D LUT
Applying: drm/i915: Add identifiers for intel color blocks
Applying: drm/i915: Add intel_color_op
Applying: drm/i915/color: Add helper to create intel colorop
Applying: drm/i915/color: Create a transfer function color pipeline
Applying: drm/i915/color: Add and attach COLORPIPELINE plane property
Applying: drm/i915/color: Add framework to set colorop
Applying: drm/i915/color: Add callbacks to set plane CTM
Applying: drm/i915/color: Add new color callbacks for Xelpd
Applying: drm/i915/color: Add plane CTM callback for D13 and beyond
Applying: drm/i915: Add register definitions for Plane Degamma
Applying: drm/i915/color: Add framework to program PRE/POST CSC LUT
Applying: drm/i915: Add register definitions for Plane Post CSC
Applying: drm/i915/color: Program Pre-CSC registers
Applying: drm/i915/xelpd: Program Plane Post CSC Registers
Applying: drm/i915/color: Enable Plane Color Pipelines
Applying: drm/doc/rfc: Add documentation for multi-segmented 1D LUT
^ permalink raw reply [flat|nested] 43+ messages in thread
* ✗ CI.checkpatch: warning for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (25 preceding siblings ...)
2024-11-26 13:27 ` ✓ CI.Patch_applied: success for Plane Color Pipeline support for Intel platforms Patchwork
@ 2024-11-26 13:28 ` Patchwork
2024-11-26 13:31 ` ✓ CI.KUnit: success " Patchwork
` (5 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 13:28 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : warning
== Summary ==
+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
30ab6715fc09baee6cc14cb3c89ad8858688d474
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit beac1492ff14b4c063aab030a6f5701b5b61edef
Author: Uma Shankar <uma.shankar@intel.com>
Date: Tue Nov 26 18:57:30 2024 +0530
drm/doc/rfc: Add documentation for multi-segmented 1D LUT
Add documentation to explain properties of the exposed hardware
1D LUT blocks, its identification and computation of the LUT samples
based on the number of samples, their distribution and precison.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
+ /mt/dim checkpatch ef0147fcb01d58268e41f3b72e21c99014c55b8f drm-intel
c9fb9768c0b5 drm: color pipeline base work
-:46: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#46:
new file mode 100644
-:51: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#51: FILE: Documentation/gpu/rfc/color_pipeline.rst:1:
+========================
-:643: ERROR:OPEN_BRACE: that open brace { should be on the previous line
#643: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:757:
+ switch (tf)
+ {
-:655: WARNING:ONE_SEMICOLON: Statements terminations use 1 semicolon
#655: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:769:
+ return TRANSFER_FUNCTION_LINEAR;;
-:668: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#668: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1244:
+__set_colorop_in_tf_1d_curve(struct dc_plane_state *dc_plane_state,
+ struct drm_colorop_state *colorop_state)
-:748: CHECK:SPACING: No space is necessary after a cast
#748: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1324:
+ ctm = blob ? (struct drm_color_ctm_3x4 *) blob->data : NULL;
-:752: CHECK:BRACES: Unbalanced braces around else statement
#752: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1328:
+ } else
-:802: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#802: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1378:
+ uint32_t shaper_size;
-:818: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#818: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1394:
+ tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
-:846: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "shaper_lut"
#846: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1422:
+ shaper_size = shaper_lut != NULL ? shaper_size : 0;
-:868: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#868: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1444:
+ uint32_t drm_lut3d_size,
-:893: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#893: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1469:
+
+}
-:909: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#909: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1485:
+ uint32_t lut3d_size, index;
-:929: CHECK:SPACING: No space is necessary after a cast
#929: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1505:
+ mode = (struct drm_mode_3dlut_mode *) colorop_state->lut_3d_modes->data;
-:932: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "lut3d"
#932: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1508:
+ lut3d_size = lut3d != NULL ? lut3d_size : 0;
-:961: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#961: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1537:
+ uint32_t blend_size;
-:978: CHECK:MULTIPLE_ASSIGNMENTS: multiple assignments should be avoided
#978: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1554:
+ tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
-:1006: CHECK:COMPARISON_TO_NULL: Comparison to NULL could be written "blend_lut"
#1006: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1582:
+ blend_size = blend_lut != NULL ? blend_size : 0;
-:1025: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1025: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1644:
+amdgpu_dm_plane_set_colorop_properties(struct drm_plane_state *plane_state,
+ struct dc_plane_state *dc_plane_state)
-:1033: WARNING:BRACES: braces {} are not necessary for single statement blocks
#1033: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1652:
+ if (!colorop) {
+ return -EINVAL;
+ }
-:1199: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1199: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:73:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1218: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1218: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:92:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1229: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#1229: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:103:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:1234: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1234: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:108:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1245: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#1245: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:119:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:1250: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1250: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:124:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1263: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#1263: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:137:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:1268: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1268: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:142:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1281: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#1281: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:155:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:1286: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1286: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:160:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1293: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#1293: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:167:
+ ret = drm_colorop_3dlut_init(dev, ops[i], plane, lut3d_modes, ARRAY_SIZE(lut3d_modes), true);
-:1297: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#1297: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:171:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:1302: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1302: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:176:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1315: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#1315: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:189:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:1320: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#1320: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:194:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:1333: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#1333: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:207:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:1339: WARNING:NEEDLESS_IF: kfree(NULL) is safe and this check is probably not required
#1339: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:213:
+ if (ops[i])
+ kfree(ops[i]);
-:1342: WARNING:MISSING_EOF_NEWLINE: adding a line without newline at end of file
#1342: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.c:216:
+}
-:1350: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h', please use '/*' instead
#1350: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h:1:
+// SPDX-License-Identifier: MIT
-:1350: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#1350: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h:1:
+// SPDX-License-Identifier: MIT
-:1385: WARNING:MISSING_EOF_NEWLINE: adding a line without newline at end of file
#1385: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_colorop.h:36:
+#endif /* __AMDGPU_DM_COLOROP_H__*/
-:1416: CHECK:UNNECESSARY_PARENTHESES: Unnecessary parentheses around pipelines[len]
#1416: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c:1773:
+ ret = amdgpu_dm_initialize_default_pipeline(plane, &(pipelines[len]));
-:1418: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#1418: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_plane.c:1775:
+ DRM_ERROR("Failed to create color pipeline for plane %d: %d\n", plane->base.id, ret);
-:1501: CHECK:LINE_SPACING: Please don't use multiple blank lines
#1501: FILE: drivers/gpu/drm/drm_atomic.c:591:
+
-:1558: CHECK:LINE_SPACING: Please don't use multiple blank lines
#1558: FILE: drivers/gpu/drm/drm_atomic.c:780:
+
-:1561: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1561: FILE: drivers/gpu/drm/drm_atomic.c:783:
+static void drm_atomic_colorop_print_state(struct drm_printer *p,
+ const struct drm_colorop_state *state)
-:1580: WARNING:LONG_LINE: line length of 126 exceeds 100 columns
#1580: FILE: drivers/gpu/drm/drm_atomic.c:802:
+ drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
-:1590: CHECK:SPACING: No space is necessary after a cast
#1590: FILE: drivers/gpu/drm/drm_atomic.c:812:
+ mode_3dlut = (struct drm_mode_3dlut_mode *) modes->data;
-:1596: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1596: FILE: drivers/gpu/drm/drm_atomic.c:818:
+ drm_printf(p, "\t lut_strides=%d %d %d\n", mode_3dlut[i].lut_stride[0],
+ mode_3dlut[i].lut_stride[1],
-:1599: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#1599: FILE: drivers/gpu/drm/drm_atomic.c:821:
+ drm_get_colorop_lut3d_interpolation_name(mode_3dlut[i].interpolation));
-:1765: CHECK:LINE_SPACING: Please don't use multiple blank lines
#1765: FILE: drivers/gpu/drm/drm_atomic_uapi.c:259:
+
-:1794: CHECK:LINE_SPACING: Please don't use multiple blank lines
#1794: FILE: drivers/gpu/drm/drm_atomic_uapi.c:288:
+
+
-:1811: WARNING:LINE_SPACING: Missing a blank line after declarations
#1811: FILE: drivers/gpu/drm/drm_atomic_uapi.c:581:
+ struct drm_colorop *colorop = NULL;
+ colorop = drm_colorop_find(dev, file_priv, val);
-:1835: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1835: FILE: drivers/gpu/drm/drm_atomic_uapi.c:695:
+static int drm_atomic_color_set_data_property(struct drm_colorop *colorop,
+ struct drm_colorop_state *state,
-:1842: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#1842: FILE: drivers/gpu/drm/drm_atomic_uapi.c:702:
+ uint32_t index;
-:1856: CHECK:SPACING: No space is necessary after a cast
#1856: FILE: drivers/gpu/drm/drm_atomic_uapi.c:716:
+ modes = (struct drm_mode_3dlut_mode *) state->lut_3d_modes->data;
-:1857: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#1857: FILE: drivers/gpu/drm/drm_atomic_uapi.c:717:
+ size = modes[index].lut_stride[0] * modes[index].lut_stride[1] * modes[index].lut_stride[2] *
-:1874: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1874: FILE: drivers/gpu/drm/drm_atomic_uapi.c:734:
+static int drm_atomic_colorop_set_property(struct drm_colorop *colorop,
+ struct drm_colorop_state *state, struct drm_file *file_priv,
-:1901: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1901: FILE: drivers/gpu/drm/drm_atomic_uapi.c:761:
+drm_atomic_colorop_get_property(struct drm_colorop *colorop,
+ const struct drm_colorop_state *state,
-:1904: WARNING:BRACES: braces {} are not necessary for any arm of this statement
#1904: FILE: drivers/gpu/drm/drm_atomic_uapi.c:764:
+ if (property == colorop->type_property) {
[...]
+ } else if (property == colorop->bypass_property) {
[...]
+ } else if (property == colorop->curve_1d_type_property) {
[...]
+ } else if (property == colorop->multiplier_property) {
[...]
+ } else if (property == colorop->lut_3d_modes_property) {
[...]
+ } else if (property == colorop->lut_3d_mode_index_property) {
[...]
+ } else if (property == colorop->size_property) {
[...]
+ } else if (property == colorop->data_property) {
[...]
+ } else {
[...]
-:1941: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1941: FILE: drivers/gpu/drm/drm_atomic_uapi.c:1060:
+ ret = drm_atomic_colorop_get_property(colorop,
+ colorop->state, property, val);
-:1971: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#1971: FILE: drivers/gpu/drm/drm_atomic_uapi.c:1259:
+ ret = drm_atomic_colorop_set_property(colorop,
+ colorop_state, file_priv,
-:1990: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#1990: FILE: drivers/gpu/drm/drm_colorop.c:1:
+/*
-:2123: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#2123: FILE: drivers/gpu/drm/drm_colorop.c:134:
+ drm_object_attach_property(&colorop->base,
+ colorop->bypass_property,
-:2194: CHECK:LINE_SPACING: Please don't use multiple blank lines
#2194: FILE: drivers/gpu/drm/drm_colorop.c:205:
+
+
-:2217: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#2217: FILE: drivers/gpu/drm/drm_colorop.c:228:
+ prop = drm_property_create(dev, DRM_MODE_PROP_ATOMIC | DRM_MODE_PROP_BLOB,
+ "DATA", 0);
-:2318: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#2318: FILE: drivers/gpu/drm/drm_colorop.c:329:
+int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass)
-:2354: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#2354: FILE: drivers/gpu/drm/drm_colorop.c:365:
+ prop = drm_property_create(dev, DRM_MODE_PROP_BLOB | DRM_MODE_PROP_IMMUTABLE, "3DLUT_MODES", 0);
-:2360: CHECK:LINE_SPACING: Please don't use multiple blank lines
#2360: FILE: drivers/gpu/drm/drm_colorop.c:371:
+
+
-:2366: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#2366: FILE: drivers/gpu/drm/drm_colorop.c:377:
+ drm_object_attach_property(&colorop->base, colorop->lut_3d_modes_property, blob ? blob->base.id : 0);
-:2414: CHECK:LINE_SPACING: Please don't use multiple blank lines
#2414: FILE: drivers/gpu/drm/drm_colorop.c:425:
+
+
-:2439: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#2439: FILE: drivers/gpu/drm/drm_colorop.c:450:
+ drm_object_property_get_default_value(&colorop->base,
+ colorop->curve_1d_type_property,
-:2712: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#2712: FILE: drivers/gpu/drm/tests/drm_fixp_test.c:17:
+ KUNIT_EXPECT_EQ(test, drm_int2fixp(-1), drm_sm2fixp((1ull << 63) | (1ull << DRM_FIXED_POINT)));
-:2715: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#2715: FILE: drivers/gpu/drm/tests/drm_fixp_test.c:20:
+ KUNIT_EXPECT_EQ(test, drm_fixp_from_fraction(1, 2), drm_sm2fixp(1ull << (DRM_FIXED_POINT - 1)));
-:2718: WARNING:LONG_LINE: line length of 122 exceeds 100 columns
#2718: FILE: drivers/gpu/drm/tests/drm_fixp_test.c:23:
+ KUNIT_EXPECT_EQ(test, drm_fixp_from_fraction(-1, 2), drm_sm2fixp((1ull << 63) | (1ull << (DRM_FIXED_POINT - 1))));
-:2720: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#2720: FILE: drivers/gpu/drm/tests/drm_fixp_test.c:25:
+
+}
-:2748: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#2748: FILE: drivers/gpu/drm/tests/drm_fixp_test.c:53:
+
+}
-:2765: WARNING:MISSING_EOF_NEWLINE: adding a line without newline at end of file
#2765: FILE: drivers/gpu/drm/tests/drm_fixp_test.c:70:
+MODULE_DESCRIPTION("Unit tests for drm_fixed.h");
-:2831: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/vkms/tests/vkms_color_test.c', please use '//' instead
#2831: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:1:
+/* SPDX-License-Identifier: GPL-2.0+ */
-:2831: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#2831: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:1:
+/* SPDX-License-Identifier: GPL-2.0+ */
-:2874: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#2874: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:44:
+ KUNIT_EXPECT_EQ(test, drm_fixp2int(get_lut_index(&test_linear_lut, test_linear_array[0].red)), 0);
-:2877: WARNING:LONG_LINE: line length of 119 exceeds 100 columns
#2877: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:47:
+ KUNIT_EXPECT_EQ(test, drm_fixp2int_ceil(get_lut_index(&test_linear_lut, test_linear_array[i].red)), i);
-:2897: WARNING:LINE_SPACING: Missing a blank line after declarations
#2897: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:67:
+ s64 t = 0x80000000 - 1;
+ KUNIT_EXPECT_EQ(test, lerp_u16(0x0, 0x10, t), 0x8);
-:2911: CHECK:LINE_SPACING: Please don't use multiple blank lines
#2911: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:81:
+
+
-:2960: CHECK:LINE_SPACING: Please don't use multiple blank lines
#2960: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:130:
+
+
-:2993: CHECK:LINE_SPACING: Please don't use multiple blank lines
#2993: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:163:
+
+
-:3003: WARNING:LINE_SPACING: Missing a blank line after declarations
#3003: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:173:
+ int linear = apply_lut_to_channel_value(&linear_eotf, i * 0x101, LUT_RED);
+ KUNIT_EXPECT_EQ(test, DIV_ROUND_CLOSEST(linear, 0x101), i);
-:3015: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#3015: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:185:
+ KUNIT_EXPECT_GE(test, final / 0x101, i-1);
^
-:3016: CHECK:SPACING: spaces preferred around that '+' (ctx:VxV)
#3016: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:186:
+ KUNIT_EXPECT_LE(test, final / 0x101, i+1);
^
-:3171: CHECK:LINE_SPACING: Please don't use multiple blank lines
#3171: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:341:
+
+
-:3246: CHECK:LINE_SPACING: Please don't use multiple blank lines
#3246: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:416:
+
+
-:3266: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#3266: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:436:
+
+}
-:3282: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#3282: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:452:
+};
+kunit_test_suite(vkms_color_test_suite);
-:3284: WARNING:MISSING_EOF_NEWLINE: adding a line without newline at end of file
#3284: FILE: drivers/gpu/drm/vkms/tests/vkms_color_test.c:454:
+MODULE_LICENSE("GPL");
-:3292: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/vkms/vkms_colorop.c', please use '//' instead
#3292: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:1:
+/* SPDX-License-Identifier: GPL-2.0+ */
-:3292: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#3292: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:1:
+/* SPDX-License-Identifier: GPL-2.0+ */
-:3318: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#3318: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:27:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:3335: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#3335: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:44:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:3346: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#3346: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:55:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:3351: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#3351: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:60:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:3362: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#3362: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:71:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:3367: CHECK:ALLOC_SIZEOF_STRUCT: Prefer kzalloc(sizeof(*ops[i])...) over kzalloc(sizeof(struct drm_colorop)...)
#3367: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:76:
+ ops[i] = kzalloc(sizeof(struct drm_colorop), GFP_KERNEL);
-:3378: CHECK:SPACING: spaces preferred around that '-' (ctx:VxV)
#3378: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:87:
+ drm_colorop_set_next_property(ops[i-1], ops[i]);
^
-:3385: WARNING:NEEDLESS_IF: kfree(NULL) is safe and this check is probably not required
#3385: FILE: drivers/gpu/drm/vkms/vkms_colorop.c:94:
+ if (ops[i])
+ kfree(ops[i]);
-:3458: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#3458: FILE: drivers/gpu/drm/vkms/vkms_composer.c:86:
+VISIBLE_IF_KUNIT u16 apply_lut_to_channel_value(const struct vkms_color_lut *lut, u16 channel_value,
enum lut_channel channel)
-:3474: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#3474: FILE: drivers/gpu/drm/vkms/vkms_composer.c:131:
+VISIBLE_IF_KUNIT void apply_3x4_matrix(struct pixel_argb_s32 *pixel, const struct drm_color_ctm_3x4 *matrix)
-:3509: ERROR:SWITCH_CASE_INDENT_LEVEL: switch and case should be at the same indent
#3509: FILE: drivers/gpu/drm/vkms/vkms_composer.c:166:
+ switch (colorop_state->curve_1d_type) {
+ case DRM_COLOROP_1D_CURVE_SRGB_INV_EOTF:
[...]
+ case DRM_COLOROP_1D_CURVE_SRGB_EOTF:
[...]
+ default:
-:3511: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#3511: FILE: drivers/gpu/drm/vkms/vkms_composer.c:168:
+ pixel->r = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->r, LUT_RED);
-:3512: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#3512: FILE: drivers/gpu/drm/vkms/vkms_composer.c:169:
+ pixel->g = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->g, LUT_GREEN);
-:3513: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#3513: FILE: drivers/gpu/drm/vkms/vkms_composer.c:170:
+ pixel->b = apply_lut_to_channel_value(&srgb_inv_eotf, pixel->b, LUT_BLUE);
-:3516: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#3516: FILE: drivers/gpu/drm/vkms/vkms_composer.c:173:
+ pixel->r = apply_lut_to_channel_value(&srgb_eotf, pixel->r, LUT_RED);
-:3517: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#3517: FILE: drivers/gpu/drm/vkms/vkms_composer.c:174:
+ pixel->g = apply_lut_to_channel_value(&srgb_eotf, pixel->g, LUT_GREEN);
-:3518: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#3518: FILE: drivers/gpu/drm/vkms/vkms_composer.c:175:
+ pixel->b = apply_lut_to_channel_value(&srgb_eotf, pixel->b, LUT_BLUE);
-:3521: WARNING:TYPO_SPELLING: 'unkown' may be misspelled - perhaps 'unknown'?
#3521: FILE: drivers/gpu/drm/vkms/vkms_composer.c:178:
+ DRM_DEBUG_DRIVER("unkown colorop 1D curve type %d\n", colorop_state->curve_1d_type);
^^^^^^
-:3521: WARNING:LONG_LINE: line length of 116 exceeds 100 columns
#3521: FILE: drivers/gpu/drm/vkms/vkms_composer.c:178:
+ DRM_DEBUG_DRIVER("unkown colorop 1D curve type %d\n", colorop_state->curve_1d_type);
-:3526: WARNING:LONG_LINE: line length of 104 exceeds 100 columns
#3526: FILE: drivers/gpu/drm/vkms/vkms_composer.c:183:
+ apply_3x4_matrix(pixel, (struct drm_color_ctm_3x4 *) colorop_state->data->data);
-:3526: CHECK:SPACING: No space is necessary after a cast
#3526: FILE: drivers/gpu/drm/vkms/vkms_composer.c:183:
+ apply_3x4_matrix(pixel, (struct drm_color_ctm_3x4 *) colorop_state->data->data);
-:3529: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#3529: FILE: drivers/gpu/drm/vkms/vkms_composer.c:186:
+
+}
-:3531: WARNING:LONG_LINE: line length of 116 exceeds 100 columns
#3531: FILE: drivers/gpu/drm/vkms/vkms_composer.c:188:
+static void pre_blend_color_transform(const struct vkms_plane_state *plane_state, struct line_buffer *output_buffer)
-:3641: CHECK:LINE_SPACING: Please don't use multiple blank lines
#3641: FILE: drivers/gpu/drm/vkms/vkms_drv.h:287:
+
+
-:3649: WARNING:SPDX_LICENSE_TAG: Improper SPDX comment style for 'drivers/gpu/drm/vkms/vkms_luts.c', please use '//' instead
#3649: FILE: drivers/gpu/drm/vkms/vkms_luts.c:1:
+/* SPDX-License-Identifier: GPL-2.0+ */
-:3649: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#3649: FILE: drivers/gpu/drm/vkms/vkms_luts.c:1:
+/* SPDX-License-Identifier: GPL-2.0+ */
-:3921: CHECK:LINE_SPACING: Please don't use multiple blank lines
#3921: FILE: drivers/gpu/drm/vkms/vkms_luts.c:273:
+
+
-:4468: WARNING:MISSING_EOF_NEWLINE: adding a line without newline at end of file
#4468: FILE: drivers/gpu/drm/vkms/vkms_luts.h:12:
+#endif /* _VKMS_LUTS_H_ */
-:4553: CHECK:LINE_SPACING: Please don't use multiple blank lines
#4553: FILE: include/drm/drm_atomic.h:716:
+
-:4567: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#4567: FILE: include/drm/drm_atomic.h:730:
+drm_atomic_get_existing_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop)
-:4582: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#4582: FILE: include/drm/drm_atomic.h:745:
+drm_atomic_get_old_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop)
-:4597: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#4597: FILE: include/drm/drm_atomic.h:760:
+drm_atomic_get_new_colorop_state(struct drm_atomic_state *state,
+ struct drm_colorop *colorop)
-:4631: WARNING:LONG_LINE: line length of 103 exceeds 100 columns
#4631: FILE: include/drm/drm_atomic.h:1027:
+#define for_each_oldnew_colorop_in_state(__state, colorop, old_colorop_state, new_colorop_state, __i) \
-:4631: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#4631: FILE: include/drm/drm_atomic.h:1027:
+#define for_each_oldnew_colorop_in_state(__state, colorop, old_colorop_state, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (old_colorop_state) = (__state)->colorops[__i].old_state,\
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4631: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#4631: FILE: include/drm/drm_atomic.h:1027:
+#define for_each_oldnew_colorop_in_state(__state, colorop, old_colorop_state, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (old_colorop_state) = (__state)->colorops[__i].old_state,\
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4631: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'colorop' - possible side-effects?
#4631: FILE: include/drm/drm_atomic.h:1027:
+#define for_each_oldnew_colorop_in_state(__state, colorop, old_colorop_state, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (old_colorop_state) = (__state)->colorops[__i].old_state,\
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4631: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#4631: FILE: include/drm/drm_atomic.h:1027:
+#define for_each_oldnew_colorop_in_state(__state, colorop, old_colorop_state, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (old_colorop_state) = (__state)->colorops[__i].old_state,\
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4635: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#4635: FILE: include/drm/drm_atomic.h:1031:
+ for_each_if ((__state)->colorops[__i].ptr && \
-:4641: CHECK:LINE_SPACING: Please don't use multiple blank lines
#4641: FILE: include/drm/drm_atomic.h:1037:
+
+
-:4653: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in parentheses
#4653: FILE: include/drm/drm_atomic.h:1049:
+#define for_each_new_colorop_in_state(__state, colorop, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4653: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__state' - possible side-effects?
#4653: FILE: include/drm/drm_atomic.h:1049:
+#define for_each_new_colorop_in_state(__state, colorop, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4653: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'colorop' - possible side-effects?
#4653: FILE: include/drm/drm_atomic.h:1049:
+#define for_each_new_colorop_in_state(__state, colorop, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4653: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i' - possible side-effects?
#4653: FILE: include/drm/drm_atomic.h:1049:
+#define for_each_new_colorop_in_state(__state, colorop, new_colorop_state, __i) \
+ for ((__i) = 0; \
+ (__i) < (__state)->dev->mode_config.num_colorop; \
+ (__i)++) \
+ for_each_if ((__state)->colorops[__i].ptr && \
+ ((colorop) = (__state)->colorops[__i].ptr, \
+ (void)(colorop) /* Only to avoid unused-but-set-variable warning */, \
+ (new_colorop_state) = (__state)->colorops[__i].new_state, 1))
-:4657: WARNING:SPACING: space prohibited between function name and open parenthesis '('
#4657: FILE: include/drm/drm_atomic.h:1053:
+ for_each_if ((__state)->colorops[__i].ptr && \
-:4692: WARNING:SPDX_LICENSE_TAG: Missing or malformed SPDX-License-Identifier tag in line 1
#4692: FILE: include/drm/drm_colorop.h:1:
+/*
-:4724: CHECK:LINE_SPACING: Please don't use multiple blank lines
#4724: FILE: include/drm/drm_colorop.h:33:
+
+
-:4810: CHECK:LINE_SPACING: Please don't use multiple blank lines
#4810: FILE: include/drm/drm_colorop.h:119:
+
+
-:4832: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u64' over 'uint64_t'
#4832: FILE: include/drm/drm_colorop.h:141:
+ uint64_t multiplier;
-:4839: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u32' over 'uint32_t'
#4839: FILE: include/drm/drm_colorop.h:148:
+ uint32_t size;
-:4862: CHECK:PREFER_KERNEL_TYPES: Prefer kernel type 'u16' over 'uint16_t'
#4862: FILE: include/drm/drm_colorop.h:171:
+ uint16_t lut_3d_mode_index;
-:4899: WARNING:UNSPECIFIED_INT: Prefer 'unsigned int' to bare use of 'unsigned'
#4899: FILE: include/drm/drm_colorop.h:208:
+ unsigned index;
-:5042: CHECK:LINE_SPACING: Please don't use multiple blank lines
#5042: FILE: include/drm/drm_colorop.h:351:
+
+
-:5044: CHECK:LINE_SPACING: Please don't use multiple blank lines
#5044: FILE: include/drm/drm_colorop.h:353:
+
+
-:5056: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#5056: FILE: include/drm/drm_colorop.h:365:
+static inline struct drm_colorop *drm_colorop_find(struct drm_device *dev,
+ struct drm_file *file_priv,
-:5060: WARNING:LINE_SPACING: Missing a blank line after declarations
#5060: FILE: include/drm/drm_colorop.h:369:
+ struct drm_mode_object *mo;
+ mo = drm_mode_object_find(dev, file_priv, id, DRM_MODE_OBJECT_COLOROP);
-:5074: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#5074: FILE: include/drm/drm_colorop.h:383:
+int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass);
-:5106: CHECK:LINE_SPACING: Please don't use multiple blank lines
#5106: FILE: include/drm/drm_colorop.h:415:
+
+
-:5127: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#5127: FILE: include/drm/drm_colorop.h:436:
+const char *drm_get_colorop_lut1d_interpolation_name(enum drm_colorop_lut1d_interpolation_type type);
-:5128: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#5128: FILE: include/drm/drm_colorop.h:437:
+const char *drm_get_colorop_lut3d_interpolation_name(enum drm_colorop_lut3d_interpolation_type type);
-:5175: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#5175: FILE: include/drm/drm_fixed.h:97:
+
+}
-:5442: WARNING:LONG_LINE_COMMENT: line length of 103 exceeds 100 columns
#5442: FILE: include/uapi/drm/drm_mode.h:982:
+ * @interpolation: interpolation algorithm for 3D LUT. See drm_colorop_lut3d_interpolation_type
-:5457: WARNING:LONG_LINE_COMMENT: line length of 102 exceeds 100 columns
#5457: FILE: include/uapi/drm/drm_mode.h:997:
+ * Traversal order when parsing/writing the 3D LUT. See enum drm_colorop_lut3d_traversal_order
-:5459: WARNING:TABSTOP: Statements should start on a tabstop
#5459: FILE: include/uapi/drm/drm_mode.h:999:
+ __u16 traversal_order;
-:5477: ERROR:MISSING_SIGN_OFF: Missing Signed-off-by: line(s)
total: 5 errors, 58 warnings, 97 checks, 5184 lines checked
0f24647a6789 drm: Add support for 3x3 CTM
4ca1e845d250 drm: Add Enhanced LUT precision structure
f6a452644d8f drm: Add Color lut range attributes
8218e144f6d1 drm: Add Color ops capability property
bc5d41ae9999 drm: Define helper to create color ops capability property
54fbc11e76e1 drm: Add 1D LUT multi-segmented color op
-:21: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#21: FILE: drivers/gpu/drm/drm_atomic.c:806:
+ drm_printf(p, "\thw cap blob id=%d\n", state->hw_caps ? state->hw_caps->base.id : 0);
total: 0 errors, 1 warnings, 0 checks, 33 lines checked
df921be4f594 drm: Define helper for adding capability property for 1D LUT MULTSEG
6f3c67926f65 drm: Add helper to initialize segmented 1D LUT
8ca49c10e2f5 drm/i915: Add identifiers for intel color blocks
64d8ed93ea94 drm/i915: Add intel_color_op
-:19: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'x' - possible side-effects?
#19: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:1500:
+#define intel_fb_obj(x) ((x) ? to_intel_bo((x)->obj[0]) : NULL)
total: 0 errors, 0 warnings, 1 checks, 31 lines checked
ba0183baf349 drm/i915/color: Add helper to create intel colorop
1a5b5e0cae24 drm/i915/color: Create a transfer function color pipeline
bc72576fbd7d drm/i915/color: Add and attach COLORPIPELINE plane property
5252abf83918 drm/i915/color: Add framework to set colorop
f89e12c53dd2 drm/i915/color: Add callbacks to set plane CTM
822000bbe381 drm/i915/color: Add new color callbacks for Xelpd
b3788d46bdec drm/i915/color: Add plane CTM callback for D13 and beyond
c2478084f32e drm/i915: Add register definitions for Plane Degamma
-:35: ERROR:CODE_INDENT: code indent should use tabs where possible
#35: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:302:
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_B)$
-:35: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#35: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:302:
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_1_B)$
-:37: ERROR:CODE_INDENT: code indent should use tabs where possible
#37: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:304:
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_B)$
-:37: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#37: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:304:
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_2_B)$
-:38: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#38: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:305:
+#define PLANE_PRE_CSC_GAMC_INDEX_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_2(pipe))
-:39: ERROR:CODE_INDENT: code indent should use tabs where possible
#39: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:306:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe), \$
-:39: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#39: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:306:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_ENH_1(pipe), \$
-:40: ERROR:CODE_INDENT: code indent should use tabs where possible
#40: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:307:
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_2(pipe))$
-:40: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#40: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:307:
+ _PLANE_PRE_CSC_GAMC_INDEX_ENH_2(pipe))$
-:48: ERROR:CODE_INDENT: code indent should use tabs where possible
#48: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:315:
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_1_B)$
-:48: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#48: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:315:
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_1_B)$
-:50: ERROR:CODE_INDENT: code indent should use tabs where possible
#50: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:317:
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_2_B)$
-:50: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#50: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:317:
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_2_B)$
-:51: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#51: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:318:
+#define PLANE_PRE_CSC_GAMC_DATA_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_2(pipe))
-:52: ERROR:CODE_INDENT: code indent should use tabs where possible
#52: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:319:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe), \$
-:52: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#52: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:319:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_ENH_1(pipe), \$
-:53: ERROR:CODE_INDENT: code indent should use tabs where possible
#53: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:320:
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_2(pipe))$
-:53: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#53: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:320:
+ _PLANE_PRE_CSC_GAMC_DATA_ENH_2(pipe))$
-:60: ERROR:CODE_INDENT: code indent should use tabs where possible
#60: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:327:
+ _PLANE_PRE_CSC_GAMC_INDEX_1_B)$
-:60: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#60: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:327:
+ _PLANE_PRE_CSC_GAMC_INDEX_1_B)$
-:62: ERROR:CODE_INDENT: code indent should use tabs where possible
#62: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:329:
+ _PLANE_PRE_CSC_GAMC_INDEX_2_B)$
-:62: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#62: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:329:
+ _PLANE_PRE_CSC_GAMC_INDEX_2_B)$
-:63: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#63: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:330:
+#define PLANE_PRE_CSC_GAMC_INDEX(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_INDEX_2(pipe))
-:64: ERROR:CODE_INDENT: code indent should use tabs where possible
#64: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:331:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_1(pipe), \$
-:64: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#64: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:331:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_INDEX_1(pipe), \$
-:65: ERROR:CODE_INDENT: code indent should use tabs where possible
#65: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:332:
+ _PLANE_PRE_CSC_GAMC_INDEX_2(pipe))$
-:65: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#65: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:332:
+ _PLANE_PRE_CSC_GAMC_INDEX_2(pipe))$
-:72: ERROR:CODE_INDENT: code indent should use tabs where possible
#72: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:339:
+ _PLANE_PRE_CSC_GAMC_DATA_1_B)$
-:72: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#72: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:339:
+ _PLANE_PRE_CSC_GAMC_DATA_1_B)$
-:74: ERROR:CODE_INDENT: code indent should use tabs where possible
#74: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:341:
+ _PLANE_PRE_CSC_GAMC_DATA_2_B)$
-:74: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#74: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:341:
+ _PLANE_PRE_CSC_GAMC_DATA_2_B)$
-:75: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#75: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:342:
+#define PLANE_PRE_CSC_GAMC_DATA(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_1(pipe), \
+ _PLANE_PRE_CSC_GAMC_DATA_2(pipe))
-:76: ERROR:CODE_INDENT: code indent should use tabs where possible
#76: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:343:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_1(pipe), \$
-:76: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#76: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:343:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_PRE_CSC_GAMC_DATA_1(pipe), \$
-:77: ERROR:CODE_INDENT: code indent should use tabs where possible
#77: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:344:
+ _PLANE_PRE_CSC_GAMC_DATA_2(pipe))$
-:77: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#77: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:344:
+ _PLANE_PRE_CSC_GAMC_DATA_2(pipe))$
total: 16 errors, 16 warnings, 4 checks, 65 lines checked
b29fc96e5537 drm/i915/color: Add framework to program PRE/POST CSC LUT
3101a48a7c9d drm/i915: Add register definitions for Plane Post CSC
-:24: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#24: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:301:
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_A, \
-:25: ERROR:CODE_INDENT: code indent should use tabs where possible
#25: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:302:
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_B)$
-:25: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#25: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:302:
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1_B)$
-:26: WARNING:LONG_LINE: line length of 109 exceeds 100 columns
#26: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:303:
+#define _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_A, \
-:27: ERROR:CODE_INDENT: code indent should use tabs where possible
#27: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:304:
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_B)$
-:27: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#27: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:304:
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2_B)$
-:28: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#28: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:305:
+#define PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe))
-:29: ERROR:CODE_INDENT: code indent should use tabs where possible
#29: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:306:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe), \$
-:29: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#29: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:306:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_1(pipe), \$
-:30: ERROR:CODE_INDENT: code indent should use tabs where possible
#30: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:307:
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe))$
-:30: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#30: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:307:
+ _PLANE_POST_CSC_GAMC_SEG0_INDEX_ENH_2(pipe))$
-:36: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#36: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:313:
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_A, \
-:37: ERROR:CODE_INDENT: code indent should use tabs where possible
#37: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:314:
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_B)$
-:37: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#37: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:314:
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1_B)$
-:38: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#38: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:315:
+#define _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe) _PIPE(pipe, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_A, \
-:39: ERROR:CODE_INDENT: code indent should use tabs where possible
#39: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:316:
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_B)$
-:39: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#39: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:316:
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2_B)$
-:40: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#40: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:317:
+#define PLANE_POST_CSC_GAMC_SEG0_DATA_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe))
-:41: ERROR:CODE_INDENT: code indent should use tabs where possible
#41: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:318:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe), \$
-:41: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#41: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:318:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_1(pipe), \$
-:42: ERROR:CODE_INDENT: code indent should use tabs where possible
#42: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:319:
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe))$
-:42: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#42: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:319:
+ _PLANE_POST_CSC_GAMC_SEG0_DATA_ENH_2(pipe))$
-:49: ERROR:CODE_INDENT: code indent should use tabs where possible
#49: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:326:
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B)$
-:49: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#49: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:326:
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_1_B)$
-:51: ERROR:CODE_INDENT: code indent should use tabs where possible
#51: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:328:
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B)$
-:51: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#51: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:328:
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_2_B)$
-:52: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#52: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:329:
+#define PLANE_POST_CSC_GAMC_INDEX_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe))
-:53: ERROR:CODE_INDENT: code indent should use tabs where possible
#53: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:330:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe), \$
-:53: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#53: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:330:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_ENH_1(pipe), \$
-:54: ERROR:CODE_INDENT: code indent should use tabs where possible
#54: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:331:
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe))$
-:54: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#54: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:331:
+ _PLANE_POST_CSC_GAMC_INDEX_ENH_2(pipe))$
-:61: ERROR:CODE_INDENT: code indent should use tabs where possible
#61: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:338:
+ _PLANE_POST_CSC_GAMC_DATA_ENH_1_B)$
-:61: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#61: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:338:
+ _PLANE_POST_CSC_GAMC_DATA_ENH_1_B)$
-:63: ERROR:CODE_INDENT: code indent should use tabs where possible
#63: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:340:
+ _PLANE_POST_CSC_GAMC_DATA_ENH_2_B)$
-:63: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#63: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:340:
+ _PLANE_POST_CSC_GAMC_DATA_ENH_2_B)$
-:64: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#64: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:341:
+#define PLANE_POST_CSC_GAMC_DATA_ENH(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe), \
+ _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe))
-:65: ERROR:CODE_INDENT: code indent should use tabs where possible
#65: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:342:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe), \$
-:65: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#65: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:342:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_ENH_1(pipe), \$
-:66: ERROR:CODE_INDENT: code indent should use tabs where possible
#66: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:343:
+ _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe))$
-:66: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#66: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:343:
+ _PLANE_POST_CSC_GAMC_DATA_ENH_2(pipe))$
-:73: ERROR:CODE_INDENT: code indent should use tabs where possible
#73: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:350:
+ _PLANE_POST_CSC_GAMC_INDEX_1_B)$
-:73: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#73: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:350:
+ _PLANE_POST_CSC_GAMC_INDEX_1_B)$
-:75: ERROR:CODE_INDENT: code indent should use tabs where possible
#75: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:352:
+ _PLANE_POST_CSC_GAMC_INDEX_2_B)$
-:75: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#75: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:352:
+ _PLANE_POST_CSC_GAMC_INDEX_2_B)$
-:76: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#76: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:353:
+#define PLANE_POST_CSC_GAMC_INDEX(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_1(pipe), \
+ _PLANE_POST_CSC_GAMC_INDEX_2(pipe))
-:77: ERROR:CODE_INDENT: code indent should use tabs where possible
#77: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:354:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_1(pipe), \$
-:77: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#77: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:354:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_INDEX_1(pipe), \$
-:78: ERROR:CODE_INDENT: code indent should use tabs where possible
#78: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:355:
+ _PLANE_POST_CSC_GAMC_INDEX_2(pipe))$
-:78: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#78: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:355:
+ _PLANE_POST_CSC_GAMC_INDEX_2(pipe))$
-:85: ERROR:CODE_INDENT: code indent should use tabs where possible
#85: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:362:
+ _PLANE_POST_CSC_GAMC_DATA_1_B)$
-:85: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#85: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:362:
+ _PLANE_POST_CSC_GAMC_DATA_1_B)$
-:87: ERROR:CODE_INDENT: code indent should use tabs where possible
#87: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:364:
+ _PLANE_POST_CSC_GAMC_DATA_2_B)$
-:87: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#87: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:364:
+ _PLANE_POST_CSC_GAMC_DATA_2_B)$
-:88: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#88: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:365:
+#define PLANE_POST_CSC_GAMC_DATA(pipe, plane, i) \
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_1(pipe), \
+ _PLANE_POST_CSC_GAMC_DATA_2(pipe))
-:89: ERROR:CODE_INDENT: code indent should use tabs where possible
#89: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:366:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_1(pipe), \$
-:89: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#89: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:366:
+ _MMIO_PLANE_GAMC(plane, i, _PLANE_POST_CSC_GAMC_DATA_1(pipe), \$
-:90: ERROR:CODE_INDENT: code indent should use tabs where possible
#90: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:367:
+ _PLANE_POST_CSC_GAMC_DATA_2(pipe))$
-:90: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#90: FILE: drivers/gpu/drm/i915/display/skl_universal_plane_regs.h:367:
+ _PLANE_POST_CSC_GAMC_DATA_2(pipe))$
total: 24 errors, 28 warnings, 6 checks, 79 lines checked
c082ad6ab463 drm/i915/color: Program Pre-CSC registers
95266cfe8775 drm/i915/xelpd: Program Plane Post CSC Registers
e0dcf9b06273 drm/i915/color: Enable Plane Color Pipelines
beac1492ff14 drm/doc/rfc: Add documentation for multi-segmented 1D LUT
^ permalink raw reply [flat|nested] 43+ messages in thread
* ✓ CI.KUnit: success for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (26 preceding siblings ...)
2024-11-26 13:28 ` ✗ CI.checkpatch: warning " Patchwork
@ 2024-11-26 13:31 ` Patchwork
2024-11-26 14:00 ` ✓ CI.Build: " Patchwork
` (4 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 13:31 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:28:59] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:29:07] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[13:30:02] Starting KUnit Kernel (1/1)...
[13:30:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:30:03] =================== guc_dbm (7 subtests) ===================
[13:30:03] [PASSED] test_empty
[13:30:03] [PASSED] test_default
[13:30:03] ======================== test_size ========================
[13:30:03] [PASSED] 4
[13:30:03] [PASSED] 8
[13:30:03] [PASSED] 32
[13:30:03] [PASSED] 256
[13:30:03] ==================== [PASSED] test_size ====================
[13:30:03] ======================= test_reuse ========================
[13:30:03] [PASSED] 4
[13:30:03] [PASSED] 8
[13:30:03] [PASSED] 32
[13:30:03] [PASSED] 256
[13:30:03] =================== [PASSED] test_reuse ====================
[13:30:03] =================== test_range_overlap ====================
[13:30:03] [PASSED] 4
[13:30:03] [PASSED] 8
[13:30:03] [PASSED] 32
[13:30:03] [PASSED] 256
[13:30:03] =============== [PASSED] test_range_overlap ================
[13:30:03] =================== test_range_compact ====================
[13:30:03] [PASSED] 4
[13:30:03] [PASSED] 8
[13:30:03] [PASSED] 32
[13:30:03] [PASSED] 256
[13:30:03] =============== [PASSED] test_range_compact ================
[13:30:03] ==================== test_range_spare =====================
[13:30:03] [PASSED] 4
[13:30:03] [PASSED] 8
[13:30:03] [PASSED] 32
[13:30:03] [PASSED] 256
[13:30:03] ================ [PASSED] test_range_spare =================
[13:30:03] ===================== [PASSED] guc_dbm =====================
[13:30:03] =================== guc_idm (6 subtests) ===================
[13:30:03] [PASSED] bad_init
[13:30:03] [PASSED] no_init
[13:30:03] [PASSED] init_fini
[13:30:03] [PASSED] check_used
[13:30:03] [PASSED] check_quota
[13:30:03] [PASSED] check_all
[13:30:03] ===================== [PASSED] guc_idm =====================
[13:30:03] ================== no_relay (3 subtests) ===================
[13:30:03] [PASSED] xe_drops_guc2pf_if_not_ready
[13:30:03] [PASSED] xe_drops_guc2vf_if_not_ready
[13:30:03] [PASSED] xe_rejects_send_if_not_ready
[13:30:03] ==================== [PASSED] no_relay =====================
[13:30:03] ================== pf_relay (14 subtests) ==================
[13:30:03] [PASSED] pf_rejects_guc2pf_too_short
[13:30:03] [PASSED] pf_rejects_guc2pf_too_long
[13:30:03] [PASSED] pf_rejects_guc2pf_no_payload
[13:30:03] [PASSED] pf_fails_no_payload
[13:30:03] [PASSED] pf_fails_bad_origin
[13:30:03] [PASSED] pf_fails_bad_type
[13:30:03] [PASSED] pf_txn_reports_error
[13:30:03] [PASSED] pf_txn_sends_pf2guc
[13:30:03] [PASSED] pf_sends_pf2guc
[13:30:03] [SKIPPED] pf_loopback_nop
[13:30:03] [SKIPPED] pf_loopback_echo
[13:30:03] [SKIPPED] pf_loopback_fail
[13:30:03] [SKIPPED] pf_loopback_busy
[13:30:03] [SKIPPED] pf_loopback_retry
[13:30:03] ==================== [PASSED] pf_relay =====================
[13:30:03] ================== vf_relay (3 subtests) ===================
[13:30:03] [PASSED] vf_rejects_guc2vf_too_short
[13:30:03] [PASSED] vf_rejects_guc2vf_too_long
[13:30:03] [PASSED] vf_rejects_guc2vf_no_payload
[13:30:03] ==================== [PASSED] vf_relay =====================
[13:30:03] ================= pf_service (11 subtests) =================
[13:30:03] [PASSED] pf_negotiate_any
[13:30:03] [PASSED] pf_negotiate_base_match
[13:30:03] [PASSED] pf_negotiate_base_newer
[13:30:03] [PASSED] pf_negotiate_base_next
[13:30:03] [SKIPPED] pf_negotiate_base_older
[13:30:03] [PASSED] pf_negotiate_base_prev
[13:30:03] [PASSED] pf_negotiate_latest_match
[13:30:03] [PASSED] pf_negotiate_latest_newer
[13:30:03] [PASSED] pf_negotiate_latest_next
[13:30:03] [SKIPPED] pf_negotiate_latest_older
[13:30:03] [SKIPPED] pf_negotiate_latest_prev
[13:30:03] =================== [PASSED] pf_service ====================
[13:30:03] ===================== lmtt (1 subtest) =====================
[13:30:03] ======================== test_ops =========================
[13:30:03] [PASSED] 2-level
[13:30:03] [PASSED] multi-level
[13:30:03] ==================== [PASSED] test_ops =====================
[13:30:03] ====================== [PASSED] lmtt =======================
[13:30:03] =================== xe_mocs (2 subtests) ===================
[13:30:03] ================ xe_live_mocs_kernel_kunit ================
[13:30:03] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:30:03] ================ xe_live_mocs_reset_kunit =================
[13:30:03] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:30:03] ==================== [SKIPPED] xe_mocs =====================
[13:30:03] ================= xe_migrate (2 subtests) ==================
[13:30:03] ================= xe_migrate_sanity_kunit =================
[13:30:03] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:30:03] ================== xe_validate_ccs_kunit ==================
[13:30:03] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:30:03] =================== [SKIPPED] xe_migrate ===================
[13:30:03] ================== xe_dma_buf (1 subtest) ==================
[13:30:03] ==================== xe_dma_buf_kunit =====================
[13:30:03] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:30:03] =================== [SKIPPED] xe_dma_buf ===================
[13:30:03] ==================== xe_bo (3 subtests) ====================
[13:30:03] ================== xe_ccs_migrate_kunit ===================
[13:30:03] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:30:03] ==================== xe_bo_evict_kunit ====================
[13:30:03] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:30:03] =================== xe_bo_shrink_kunit ====================
[13:30:03] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:30:03] ===================== [SKIPPED] xe_bo ======================
[13:30:03] ==================== args (11 subtests) ====================
[13:30:03] [PASSED] count_args_test
[13:30:03] [PASSED] call_args_example
[13:30:03] [PASSED] call_args_test
[13:30:03] [PASSED] drop_first_arg_example
[13:30:03] [PASSED] drop_first_arg_test
[13:30:03] [PASSED] first_arg_example
[13:30:03] [PASSED] first_arg_test
[13:30:03] [PASSED] last_arg_example
[13:30:03] [PASSED] last_arg_test
[13:30:03] [PASSED] pick_arg_example
[13:30:03] [PASSED] sep_comma_examplestty: 'standard input': Inappropriate ioctl for device
[13:30:03] ====================== [PASSED] args =======================
[13:30:03] =================== xe_pci (2 subtests) ====================
[13:30:03] [PASSED] xe_gmdid_graphics_ip
[13:30:03] [PASSED] xe_gmdid_media_ip
[13:30:03] ===================== [PASSED] xe_pci ======================
[13:30:03] =================== xe_rtp (2 subtests) ====================
[13:30:03] =============== xe_rtp_process_to_sr_tests ================
[13:30:03] [PASSED] coalesce-same-reg
[13:30:03] [PASSED] no-match-no-add
[13:30:03] [PASSED] match-or
[13:30:03] [PASSED] match-or-xfail
[13:30:03] [PASSED] no-match-no-add-multiple-rules
[13:30:03] [PASSED] two-regs-two-entries
[13:30:03] [PASSED] clr-one-set-other
[13:30:03] [PASSED] set-field
[13:30:03] [PASSED] conflict-duplicate
[13:30:03] [PASSED] conflict-not-disjoint
[13:30:03] [PASSED] conflict-reg-type
[13:30:03] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:30:03] ================== xe_rtp_process_tests ===================
[13:30:03] [PASSED] active1
[13:30:03] [PASSED] active2
[13:30:03] [PASSED] active-inactive
[13:30:03] [PASSED] inactive-active
[13:30:03] [PASSED] inactive-1st_or_active-inactive
[13:30:03] [PASSED] inactive-2nd_or_active-inactive
[13:30:03] [PASSED] inactive-last_or_active-inactive
[13:30:03] [PASSED] inactive-no_or_active-inactive
[13:30:03] ============== [PASSED] xe_rtp_process_tests ===============
[13:30:03] ===================== [PASSED] xe_rtp ======================
[13:30:03] ==================== xe_wa (1 subtest) =====================
[13:30:03] ======================== xe_wa_gt =========================
[13:30:03] [PASSED] TIGERLAKE (B0)
[13:30:03] [PASSED] DG1 (A0)
[13:30:03] [PASSED] DG1 (B0)
[13:30:03] [PASSED] ALDERLAKE_S (A0)
[13:30:03] [PASSED] ALDERLAKE_S (B0)
[13:30:03] [PASSED] ALDERLAKE_S (C0)
[13:30:03] [PASSED] ALDERLAKE_S (D0)
[13:30:03] [PASSED] ALDERLAKE_P (A0)
[13:30:03] [PASSED] ALDERLAKE_P (B0)
[13:30:03] [PASSED] ALDERLAKE_P (C0)
[13:30:03] [PASSED] ALDERLAKE_S_RPLS (D0)
[13:30:03] [PASSED] ALDERLAKE_P_RPLU (E0)
[13:30:03] [PASSED] DG2_G10 (C0)
[13:30:03] [PASSED] DG2_G11 (B1)
[13:30:03] [PASSED] DG2_G12 (A1)
[13:30:03] [PASSED] METEORLAKE (g:A0, m:A0)
[13:30:03] [PASSED] METEORLAKE (g:A0, m:A0)
[13:30:03] [PASSED] METEORLAKE (g:A0, m:A0)
[13:30:03] [PASSED] LUNARLAKE (g:A0, m:A0)
[13:30:03] [PASSED] LUNARLAKE (g:B0, m:A0)
[13:30:03] [PASSED] BATTLEMAGE (g:A0, m:A1)
[13:30:03] ==================== [PASSED] xe_wa_gt =====================
[13:30:03] ====================== [PASSED] xe_wa ======================
[13:30:03] ============================================================
[13:30:03] Testing complete. Ran 122 tests: passed: 106, skipped: 16
[13:30:03] Elapsed time: 63.480s total, 7.367s configuring, 55.688s building, 0.398s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:30:03] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:30:06] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
../lib/iomap.c:156:5: warning: no previous prototype for ‘ioread64_lo_hi’ [-Wmissing-prototypes]
156 | u64 ioread64_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:163:5: warning: no previous prototype for ‘ioread64_hi_lo’ [-Wmissing-prototypes]
163 | u64 ioread64_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~
../lib/iomap.c:170:5: warning: no previous prototype for ‘ioread64be_lo_hi’ [-Wmissing-prototypes]
170 | u64 ioread64be_lo_hi(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:178:5: warning: no previous prototype for ‘ioread64be_hi_lo’ [-Wmissing-prototypes]
178 | u64 ioread64be_hi_lo(const void __iomem *addr)
| ^~~~~~~~~~~~~~~~
../lib/iomap.c:264:6: warning: no previous prototype for ‘iowrite64_lo_hi’ [-Wmissing-prototypes]
264 | void iowrite64_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:272:6: warning: no previous prototype for ‘iowrite64_hi_lo’ [-Wmissing-prototypes]
272 | void iowrite64_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~
../lib/iomap.c:280:6: warning: no previous prototype for ‘iowrite64be_lo_hi’ [-Wmissing-prototypes]
280 | void iowrite64be_lo_hi(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
../lib/iomap.c:288:6: warning: no previous prototype for ‘iowrite64be_hi_lo’ [-Wmissing-prototypes]
288 | void iowrite64be_hi_lo(u64 val, void __iomem *addr)
| ^~~~~~~~~~~~~~~~~
[13:30:49] Starting KUnit Kernel (1/1)...
[13:30:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:30:49] ================== drm_buddy (7 subtests) ==================
[13:30:49] [PASSED] drm_test_buddy_alloc_limit
[13:30:49] [PASSED] drm_test_buddy_alloc_optimistic
[13:30:49] [PASSED] drm_test_buddy_alloc_pessimistic
[13:30:49] [PASSED] drm_test_buddy_alloc_pathological
[13:30:49] [PASSED] drm_test_buddy_alloc_contiguous
[13:30:49] [PASSED] drm_test_buddy_alloc_clear
[13:30:49] [PASSED] drm_test_buddy_alloc_range_bias
[13:30:49] ==================== [PASSED] drm_buddy ====================
[13:30:49] ============= drm_cmdline_parser (40 subtests) =============
[13:30:49] [PASSED] drm_test_cmdline_force_d_only
[13:30:49] [PASSED] drm_test_cmdline_force_D_only_dvi
[13:30:49] [PASSED] drm_test_cmdline_force_D_only_hdmi
[13:30:49] [PASSED] drm_test_cmdline_force_D_only_not_digital
[13:30:49] [PASSED] drm_test_cmdline_force_e_only
[13:30:49] [PASSED] drm_test_cmdline_res
[13:30:49] [PASSED] drm_test_cmdline_res_vesa
[13:30:49] [PASSED] drm_test_cmdline_res_vesa_rblank
[13:30:49] [PASSED] drm_test_cmdline_res_rblank
[13:30:49] [PASSED] drm_test_cmdline_res_bpp
[13:30:49] [PASSED] drm_test_cmdline_res_refresh
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[13:30:49] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[13:30:49] [PASSED] drm_test_cmdline_res_margins_force_on
[13:30:49] [PASSED] drm_test_cmdline_res_vesa_margins
[13:30:49] [PASSED] drm_test_cmdline_name
[13:30:49] [PASSED] drm_test_cmdline_name_bpp
[13:30:49] [PASSED] drm_test_cmdline_name_option
[13:30:49] [PASSED] drm_test_cmdline_name_bpp_option
[13:30:49] [PASSED] drm_test_cmdline_rotate_0
[13:30:49] [PASSED] drm_test_cmdline_rotate_90
[13:30:49] [PASSED] drm_test_cmdline_rotate_180
[13:30:49] [PASSED] drm_test_cmdline_rotate_270
[13:30:49] [PASSED] drm_test_cmdline_hmirror
[13:30:49] [PASSED] drm_test_cmdline_vmirror
[13:30:49] [PASSED] drm_test_cmdline_margin_options
[13:30:49] [PASSED] drm_test_cmdline_multiple_options
[13:30:49] [PASSED] drm_test_cmdline_bpp_extra_and_option
[13:30:49] [PASSED] drm_test_cmdline_extra_and_option
[13:30:49] [PASSED] drm_test_cmdline_freestanding_options
[13:30:49] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[13:30:49] [PASSED] drm_test_cmdline_panel_orientation
[13:30:49] ================ drm_test_cmdline_invalid =================
[13:30:49] [PASSED] margin_only
[13:30:49] [PASSED] interlace_only
[13:30:49] [PASSED] res_missing_x
[13:30:49] [PASSED] res_missing_y
[13:30:49] [PASSED] res_bad_y
[13:30:49] [PASSED] res_missing_y_bpp
[13:30:49] [PASSED] res_bad_bpp
[13:30:49] [PASSED] res_bad_refresh
[13:30:49] [PASSED] res_bpp_refresh_force_on_off
[13:30:49] [PASSED] res_invalid_mode
[13:30:49] [PASSED] res_bpp_wrong_place_mode
[13:30:49] [PASSED] name_bpp_refresh
[13:30:49] [PASSED] name_refresh
[13:30:49] [PASSED] name_refresh_wrong_mode
[13:30:49] [PASSED] name_refresh_invalid_mode
[13:30:49] [PASSED] rotate_multiple
[13:30:49] [PASSED] rotate_invalid_val
[13:30:49] [PASSED] rotate_truncated
[13:30:49] [PASSED] invalid_option
[13:30:49] [PASSED] invalid_tv_option
[13:30:49] [PASSED] truncated_tv_option
[13:30:49] ============ [PASSED] drm_test_cmdline_invalid =============
[13:30:49] =============== drm_test_cmdline_tv_options ===============
[13:30:49] [PASSED] NTSC
[13:30:49] [PASSED] NTSC_443
[13:30:49] [PASSED] NTSC_J
[13:30:49] [PASSED] PAL
[13:30:49] [PASSED] PAL_M
[13:30:49] [PASSED] PAL_N
[13:30:49] [PASSED] SECAM
[13:30:49] [PASSED] MONO_525
[13:30:49] [PASSED] MONO_625
[13:30:49] =========== [PASSED] drm_test_cmdline_tv_options ===========
[13:30:49] =============== [PASSED] drm_cmdline_parser ================
[13:30:49] ========== drmm_connector_hdmi_init (19 subtests) ==========
[13:30:49] [PASSED] drm_test_connector_hdmi_init_valid
[13:30:49] [PASSED] drm_test_connector_hdmi_init_bpc_8
[13:30:49] [PASSED] drm_test_connector_hdmi_init_bpc_10
[13:30:49] [PASSED] drm_test_connector_hdmi_init_bpc_12
[13:30:49] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[13:30:49] [PASSED] drm_test_connector_hdmi_init_bpc_null
[13:30:49] [PASSED] drm_test_connector_hdmi_init_formats_empty
[13:30:49] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[13:30:49] [PASSED] drm_test_connector_hdmi_init_null_ddc
[13:30:49] [PASSED] drm_test_connector_hdmi_init_null_product
[13:30:49] [PASSED] drm_test_connector_hdmi_init_null_vendor
[13:30:49] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[13:30:49] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[13:30:49] [PASSED] drm_test_connector_hdmi_init_product_valid
[13:30:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[13:30:49] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[13:30:49] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[13:30:49] ========= drm_test_connector_hdmi_init_type_valid =========
[13:30:49] [PASSED] HDMI-A
[13:30:49] [PASSED] HDMI-B
[13:30:49] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[13:30:49] ======== drm_test_connector_hdmi_init_type_invalid ========
[13:30:49] [PASSED] Unknown
[13:30:49] [PASSED] VGA
[13:30:49] [PASSED] DVI-I
[13:30:49] [PASSED] DVI-D
[13:30:49] [PASSED] DVI-A
[13:30:49] [PASSED] Composite
[13:30:49] [PASSED] SVIDEO
[13:30:49] [PASSED] LVDS
[13:30:49] [PASSED] Component
[13:30:49] [PASSED] DIN
[13:30:49] [PASSED] DP
[13:30:49] [PASSED] TV
[13:30:49] [PASSED] eDP
[13:30:49] [PASSED] Virtual
[13:30:49] [PASSED] DSI
[13:30:49] [PASSED] DPI
[13:30:49] [PASSED] Writeback
[13:30:49] [PASSED] SPI
[13:30:49] [PASSED] USB
[13:30:49] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[13:30:49] ============ [PASSED] drmm_connector_hdmi_init =============
[13:30:49] ============= drmm_connector_init (3 subtests) =============
[13:30:49] [PASSED] drm_test_drmm_connector_init
[13:30:49] [PASSED] drm_test_drmm_connector_init_null_ddc
[13:30:49] ========= drm_test_drmm_connector_init_type_valid =========
[13:30:49] [PASSED] Unknown
[13:30:49] [PASSED] VGA
[13:30:49] [PASSED] DVI-I
[13:30:49] [PASSED] DVI-D
[13:30:49] [PASSED] DVI-A
[13:30:49] [PASSED] Composite
[13:30:49] [PASSED] SVIDEO
[13:30:49] [PASSED] LVDS
[13:30:49] [PASSED] Component
[13:30:49] [PASSED] DIN
[13:30:49] [PASSED] DP
[13:30:49] [PASSED] HDMI-A
[13:30:49] [PASSED] HDMI-B
[13:30:49] [PASSED] TV
[13:30:49] [PASSED] eDP
[13:30:49] [PASSED] Virtual
[13:30:49] [PASSED] DSI
[13:30:49] [PASSED] DPI
[13:30:49] [PASSED] Writeback
[13:30:49] [PASSED] SPI
[13:30:49] [PASSED] USB
[13:30:49] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[13:30:49] =============== [PASSED] drmm_connector_init ===============
[13:30:49] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[13:30:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[13:30:49] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[13:30:49] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[13:30:49] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[13:30:49] ========== drm_test_get_tv_mode_from_name_valid ===========
[13:30:49] [PASSED] NTSC
[13:30:49] [PASSED] NTSC-443
[13:30:49] [PASSED] NTSC-J
[13:30:49] [PASSED] PAL
[13:30:49] [PASSED] PAL-M
[13:30:49] [PASSED] PAL-N
[13:30:49] [PASSED] SECAM
[13:30:49] [PASSED] Mono
[13:30:49] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[13:30:49] [PASSED] drm_test_get_tv_mode_from_name_truncated
[13:30:49] ============ [PASSED] drm_get_tv_mode_from_name ============
[13:30:49] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[13:30:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[13:30:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[13:30:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[13:30:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[13:30:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[13:30:49] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[13:30:49] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[13:30:49] [PASSED] VIC 96
[13:30:49] [PASSED] VIC 97
[13:30:49] [PASSED] VIC 101
[13:30:49] [PASSED] VIC 102
[13:30:49] [PASSED] VIC 106
[13:30:49] [PASSED] VIC 107
[13:30:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[13:30:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[13:30:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[13:30:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[13:30:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[13:30:49] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[13:30:49] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[13:30:49] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[13:30:49] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[13:30:49] [PASSED] Automatic
[13:30:49] [PASSED] Full
[13:30:49] [PASSED] Limited 16:235
[13:30:49] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[13:30:49] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[13:30:49] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[13:30:49] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[13:30:49] === drm_test_drm_hdmi_connector_get_output_format_name ====
[13:30:49] [PASSED] RGB
[13:30:49] [PASSED] YUV 4:2:0
[13:30:49] [PASSED] YUV 4:2:2
[13:30:49] [PASSED] YUV 4:4:4
[13:30:49] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[13:30:49] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[13:30:49] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[13:30:49] ============= drm_damage_helper (21 subtests) ==============
[13:30:49] [PASSED] drm_test_damage_iter_no_damage
[13:30:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[13:30:49] [PASSED] drm_test_damage_iter_no_damage_src_moved
[13:30:49] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[13:30:49] [PASSED] drm_test_damage_iter_no_damage_not_visible
[13:30:49] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[13:30:49] [PASSED] drm_test_damage_iter_no_damage_no_fb
[13:30:49] [PASSED] drm_test_damage_iter_simple_damage
[13:30:49] [PASSED] drm_test_damage_iter_single_damage
[13:30:49] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[13:30:49] [PASSED] drm_test_damage_iter_single_damage_outside_src
[13:30:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[13:30:49] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[13:30:49] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[13:30:49] [PASSED] drm_test_damage_iter_single_damage_src_moved
[13:30:49] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[13:30:49] [PASSED] drm_test_damage_iter_damage
[13:30:49] [PASSED] drm_test_damage_iter_damage_one_intersect
[13:30:49] [PASSED] drm_test_damage_iter_damage_one_outside
[13:30:49] [PASSED] drm_test_damage_iter_damage_src_moved
[13:30:49] [PASSED] drm_test_damage_iter_damage_not_visible
[13:30:49] ================ [PASSED] drm_damage_helper ================
[13:30:49] ============== drm_dp_mst_helper (3 subtests) ==============
[13:30:49] ============== drm_test_dp_mst_calc_pbn_mode ==============
[13:30:49] [PASSED] Clock 154000 BPP 30 DSC disabled
[13:30:49] [PASSED] Clock 234000 BPP 30 DSC disabled
[13:30:49] [PASSED] Clock 297000 BPP 24 DSC disabled
[13:30:49] [PASSED] Clock 332880 BPP 24 DSC enabled
[13:30:49] [PASSED] Clock 324540 BPP 24 DSC enabled
[13:30:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[13:30:49] ============== drm_test_dp_mst_calc_pbn_div ===============
[13:30:49] [PASSED] Link rate 2000000 lane count 4
[13:30:49] [PASSED] Link rate 2000000 lane count 2
[13:30:49] [PASSED] Link rate 2000000 lane count 1
[13:30:49] [PASSED] Link rate 1350000 lane count 4
[13:30:49] [PASSED] Link rate 1350000 lane count 2
[13:30:49] [PASSED] Link rate 1350000 lane count 1
[13:30:49] [PASSED] Link rate 1000000 lane count 4
[13:30:49] [PASSED] Link rate 1000000 lane count 2
[13:30:49] [PASSED] Link rate 1000000 lane count 1
[13:30:49] [PASSED] Link rate 810000 lane count 4
[13:30:49] [PASSED] Link rate 810000 lane count 2
[13:30:49] [PASSED] Link rate 810000 lane count 1
[13:30:49] [PASSED] Link rate 540000 lane count 4
[13:30:49] [PASSED] Link rate 540000 lane count 2
[13:30:49] [PASSED] Link rate 540000 lane count 1
[13:30:49] [PASSED] Link rate 270000 lane count 4
[13:30:49] [PASSED] Link rate 270000 lane count 2
[13:30:49] [PASSED] Link rate 270000 lane count 1
[13:30:49] [PASSED] Link rate 162000 lane count 4
[13:30:49] [PASSED] Link rate 162000 lane count 2
[13:30:49] [PASSED] Link rate 162000 lane count 1
[13:30:49] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[13:30:49] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[13:30:49] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[13:30:49] [PASSED] DP_POWER_UP_PHY with port number
[13:30:49] [PASSED] DP_POWER_DOWN_PHY with port number
[13:30:49] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[13:30:49] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[13:30:49] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[13:30:49] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[13:30:49] [PASSED] DP_QUERY_PAYLOAD with port number
[13:30:49] [PASSED] DP_QUERY_PAYLOAD with VCPI
[13:30:49] [PASSED] DP_REMOTE_DPCD_READ with port number
[13:30:49] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[13:30:49] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[13:30:49] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[13:30:49] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[13:30:49] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[13:30:49] [PASSED] DP_REMOTE_I2C_READ with port number
[13:30:49] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[13:30:49] [PASSED] DP_REMOTE_I2C_READ with transactions array
[13:30:49] [PASSED] DP_REMOTE_I2C_WRITE with port number
[13:30:49] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[13:30:49] [PASSED] DP_REMOTE_I2C_WRITE with data array
[13:30:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[13:30:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[13:30:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[13:30:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[13:30:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[13:30:49] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[13:30:49] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[13:30:49] ================ [PASSED] drm_dp_mst_helper ================
[13:30:49] ================== drm_exec (7 subtests) ===================
[13:30:49] [PASSED] sanitycheck
[13:30:49] [PASSED] test_lock
[13:30:49] [PASSED] test_lock_unlock
[13:30:49] [PASSED] test_duplicates
[13:30:49] [PASSED] test_prepare
[13:30:49] [PASSED] test_prepare_array
[13:30:49] [PASSED] test_multiple_loops
[13:30:49] ==================== [PASSED] drm_exec =====================
[13:30:49] =========== drm_format_helper_test (17 subtests) ===========
[13:30:49] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[13:30:49] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[13:30:49] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[13:30:49] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[13:30:49] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[13:30:49] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[13:30:49] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[13:30:49] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[13:30:49] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[13:30:49] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[13:30:49] ============== drm_test_fb_xrgb8888_to_mono ===============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[13:30:49] ==================== drm_test_fb_swab =====================
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ================ [PASSED] drm_test_fb_swab =================
[13:30:49] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[13:30:49] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[13:30:49] [PASSED] single_pixel_source_buffer
[13:30:49] [PASSED] single_pixel_clip_rectangle
[13:30:49] [PASSED] well_known_colors
[13:30:49] [PASSED] destination_pitch
[13:30:49] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[13:30:49] ================= drm_test_fb_clip_offset =================
[13:30:49] [PASSED] pass through
[13:30:49] [PASSED] horizontal offset
[13:30:49] [PASSED] vertical offset
[13:30:49] [PASSED] horizontal and vertical offset
[13:30:49] [PASSED] horizontal offset (custom pitch)
[13:30:49] [PASSED] vertical offset (custom pitch)
[13:30:49] [PASSED] horizontal and vertical offset (custom pitch)
[13:30:49] ============= [PASSED] drm_test_fb_clip_offset =============
[13:30:49] ============== drm_test_fb_build_fourcc_list ==============
[13:30:49] [PASSED] no native formats
[13:30:49] [PASSED] XRGB8888 as native format
[13:30:49] [PASSED] remove duplicates
[13:30:49] [PASSED] convert alpha formats
[13:30:49] [PASSED] random formats
[13:30:49] ========== [PASSED] drm_test_fb_build_fourcc_list ==========
[13:30:49] =================== drm_test_fb_memcpy ====================
[13:30:49] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[13:30:49] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[13:30:49] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[13:30:49] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[13:30:49] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[13:30:49] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[13:30:49] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[13:30:49] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[13:30:49] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[13:30:49] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[13:30:49] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[13:30:49] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[13:30:49] =============== [PASSED] drm_test_fb_memcpy ================
[13:30:49] ============= [PASSED] drm_format_helper_test ==============
[13:30:49] ================= drm_format (18 subtests) =================
[13:30:49] [PASSED] drm_test_format_block_width_invalid
[13:30:49] [PASSED] drm_test_format_block_width_one_plane
[13:30:49] [PASSED] drm_test_format_block_width_two_plane
[13:30:49] [PASSED] drm_test_format_block_width_three_plane
[13:30:49] [PASSED] drm_test_format_block_width_tiled
[13:30:49] [PASSED] drm_test_format_block_height_invalid
[13:30:49] [PASSED] drm_test_format_block_height_one_plane
[13:30:49] [PASSED] drm_test_format_block_height_two_plane
[13:30:49] [PASSED] drm_test_format_block_height_three_plane
[13:30:49] [PASSED] drm_test_format_block_height_tiled
[13:30:49] [PASSED] drm_test_format_min_pitch_invalid
[13:30:49] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[13:30:49] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[13:30:49] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[13:30:49] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[13:30:49] [PASSED] drm_test_format_min_pitch_two_plane
[13:30:49] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[13:30:49] [PASSED] drm_test_format_min_pitch_tiled
[13:30:49] =================== [PASSED] drm_format ====================
[13:30:49] ============== drm_framebuffer (10 subtests) ===============
[13:30:49] ========== drm_test_framebuffer_check_src_coords ==========
[13:30:49] [PASSED] Success: source fits into fb
[13:30:49] [PASSED] Fail: overflowing fb with x-axis coordinate
[13:30:49] [PASSED] Fail: overflowing fb with y-axis coordinate
[13:30:49] [PASSED] Fail: overflowing fb with source width
[13:30:49] [PASSED] Fail: overflowing fb with source height
[13:30:49] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[13:30:49] [PASSED] drm_test_framebuffer_cleanup
[13:30:49] =============== drm_test_framebuffer_create ===============
[13:30:49] [PASSED] ABGR8888 normal sizes
[13:30:49] [PASSED] ABGR8888 max sizes
[13:30:49] [PASSED] ABGR8888 pitch greater than min required
[13:30:49] [PASSED] ABGR8888 pitch less than min required
[13:30:49] [PASSED] ABGR8888 Invalid width
[13:30:49] [PASSED] ABGR8888 Invalid buffer handle
[13:30:49] [PASSED] No pixel format
[13:30:49] [PASSED] ABGR8888 Width 0
[13:30:49] [PASSED] ABGR8888 Height 0
[13:30:49] [PASSED] ABGR8888 Out of bound height * pitch combination
[13:30:49] [PASSED] ABGR8888 Large buffer offset
[13:30:49] [PASSED] ABGR8888 Buffer offset for inexistent plane
[13:30:49] [PASSED] ABGR8888 Invalid flag
[13:30:49] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[13:30:49] [PASSED] ABGR8888 Valid buffer modifier
[13:30:49] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[13:30:49] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[13:30:49] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[13:30:49] [PASSED] NV12 Normal sizes
[13:30:49] [PASSED] NV12 Max sizes
[13:30:49] [PASSED] NV12 Invalid pitch
[13:30:49] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[13:30:49] [PASSED] NV12 different modifier per-plane
[13:30:49] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[13:30:49] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[13:30:49] [PASSED] NV12 Modifier for inexistent plane
[13:30:49] [PASSED] NV12 Handle for inexistent plane
[13:30:49] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[13:30:49] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[13:30:49] [PASSED] YVU420 Normal sizes
[13:30:49] [PASSED] YVU420 Max sizes
[13:30:49] [PASSED] YVU420 Invalid pitch
[13:30:49] [PASSED] YVU420 Different pitches
[13:30:49] [PASSED] YVU420 Different buffer offsets/pitches
[13:30:49] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[13:30:49] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[13:30:49] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[13:30:49] [PASSED] YVU420 Valid modifier
[13:30:49] [PASSED] YVU420 Different modifiers per plane
[13:30:49] [PASSED] YVU420 Modifier for inexistent plane
[13:30:49] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[13:30:49] [PASSED] X0L2 Normal sizes
[13:30:49] [PASSED] X0L2 Max sizes
[13:30:49] [PASSED] X0L2 Invalid pitch
[13:30:49] [PASSED] X0L2 Pitch greater than minimum required
[13:30:49] [PASSED] X0L2 Handle for inexistent plane
[13:30:49] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[13:30:49] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[13:30:49] [PASSED] X0L2 Valid modifier
[13:30:49] [PASSED] X0L2 Modifier for inexistent plane
[13:30:49] =========== [PASSED] drm_test_framebuffer_create ===========
[13:30:49] [PASSED] drm_test_framebuffer_free
[13:30:49] [PASSED] drm_test_framebuffer_init
[13:30:49] [PASSED] drm_test_framebuffer_init_bad_format
[13:30:49] [PASSED] drm_test_framebuffer_init_dev_mismatch
[13:30:49] [PASSED] drm_test_framebuffer_lookup
[13:30:49] [PASSED] drm_test_framebuffer_lookup_inexistent
[13:30:49] [PASSED] drm_test_framebuffer_modifiers_not_supported
[13:30:49] ================= [PASSED] drm_framebuffer =================
[13:30:49] ================ drm_gem_shmem (8 subtests) ================
[13:30:49] [PASSED] drm_gem_shmem_test_obj_create
[13:30:49] [PASSED] drm_gem_shmem_test_obj_create_private
[13:30:49] [PASSED] drm_gem_shmem_test_pin_pages
[13:30:49] [PASSED] drm_gem_shmem_test_vmap
[13:30:49] [PASSED] drm_gem_shmem_test_get_pages_sgt
[13:30:49] [PASSED] drm_gem_shmem_test_get_sg_table
[13:30:49] [PASSED] drm_gem_shmem_test_madvise
[13:30:49] [PASSED] drm_gem_shmem_test_purge
[13:30:49] ================== [PASSED] drm_gem_shmem ==================
[13:30:49] === drm_atomic_helper_connector_hdmi_check (22 subtests) ===
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[13:30:49] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[13:30:49] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback
[13:30:49] [PASSED] drm_test_check_max_tmds_rate_format_fallback
[13:30:49] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[13:30:49] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[13:30:49] [PASSED] drm_test_check_output_bpc_dvi
[13:30:49] [PASSED] drm_test_check_output_bpc_format_vic_1
[13:30:49] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[13:30:49] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[13:30:49] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[13:30:49] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[13:30:49] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[13:30:49] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[13:30:49] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[13:30:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[13:30:49] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[13:30:49] [PASSED] drm_test_check_broadcast_rgb_value
[13:30:49] [PASSED] drm_test_check_bpc_8_value
[13:30:49] [PASSED] drm_test_check_bpc_10_value
[13:30:49] [PASSED] drm_test_check_bpc_12_value
[13:30:49] [PASSED] drm_test_check_format_value
[13:30:49] [PASSED] drm_test_check_tmds_char_value
[13:30:49] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[13:30:49] ================= drm_managed (2 subtests) =================
[13:30:49] [PASSED] drm_test_managed_release_action
[13:30:49] [PASSED] drm_test_managed_run_action
[13:30:49] =================== [PASSED] drm_managed ===================
[13:30:49] =================== drm_mm (6 subtests) ====================
[13:30:49] [PASSED] drm_test_mm_init
[13:30:49] [PASSED] drm_test_mm_debug
[13:30:49] [PASSED] drm_test_mm_align32
[13:30:49] [PASSED] drm_test_mm_align64
[13:30:49] [PASSED] drm_test_mm_lowest
[13:30:49] [PASSED] drm_test_mm_highest
[13:30:49] ===================== [PASSED] drm_mm ======================
[13:30:49] ============= drm_modes_analog_tv (5 subtests) =============
[13:30:49] [PASSED] drm_test_modes_analog_tv_mono_576i
[13:30:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[13:30:49] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[13:30:49] [PASSED] drm_test_modes_analog_tv_pal_576i
[13:30:49] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[13:30:49] =============== [PASSED] drm_modes_analog_tv ===============
stty: 'standard input': Inappropriate ioctl for device
[13:30:49] ============== drm_plane_helper (2 subtests) ===============
[13:30:49] =============== drm_test_check_plane_state ================
[13:30:49] [PASSED] clipping_simple
[13:30:49] [PASSED] clipping_rotate_reflect
[13:30:49] [PASSED] positioning_simple
[13:30:49] [PASSED] upscaling
[13:30:49] [PASSED] downscaling
[13:30:49] [PASSED] rounding1
[13:30:49] [PASSED] rounding2
[13:30:49] [PASSED] rounding3
[13:30:49] [PASSED] rounding4
[13:30:49] =========== [PASSED] drm_test_check_plane_state ============
[13:30:49] =========== drm_test_check_invalid_plane_state ============
[13:30:49] [PASSED] positioning_invalid
[13:30:49] [PASSED] upscaling_invalid
[13:30:49] [PASSED] downscaling_invalid
[13:30:49] ======= [PASSED] drm_test_check_invalid_plane_state ========
[13:30:49] ================ [PASSED] drm_plane_helper =================
[13:30:49] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[13:30:49] ====== drm_test_connector_helper_tv_get_modes_check =======
[13:30:49] [PASSED] None
[13:30:49] [PASSED] PAL
[13:30:49] [PASSED] NTSC
[13:30:49] [PASSED] Both, NTSC Default
[13:30:49] [PASSED] Both, PAL Default
[13:30:49] [PASSED] Both, NTSC Default, with PAL on command-line
[13:30:49] [PASSED] Both, PAL Default, with NTSC on command-line
[13:30:49] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[13:30:49] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[13:30:49] ================== drm_rect (9 subtests) ===================
[13:30:49] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[13:30:49] [PASSED] drm_test_rect_clip_scaled_not_clipped
[13:30:49] [PASSED] drm_test_rect_clip_scaled_clipped
[13:30:49] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[13:30:49] ================= drm_test_rect_intersect =================
[13:30:49] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[13:30:49] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[13:30:49] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[13:30:49] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[13:30:49] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[13:30:49] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[13:30:49] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[13:30:49] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[13:30:49] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[13:30:49] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[13:30:49] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[13:30:49] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[13:30:49] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[13:30:49] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[13:30:49] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[13:30:49] ============= [PASSED] drm_test_rect_intersect =============
[13:30:49] ================ drm_test_rect_calc_hscale ================
[13:30:49] [PASSED] normal use
[13:30:49] [PASSED] out of max range
[13:30:49] [PASSED] out of min range
[13:30:49] [PASSED] zero dst
[13:30:49] [PASSED] negative src
[13:30:49] [PASSED] negative dst
[13:30:49] ============ [PASSED] drm_test_rect_calc_hscale ============
[13:30:49] ================ drm_test_rect_calc_vscale ================
[13:30:49] [PASSED] normal use
[13:30:49] [PASSED] out of max range
[13:30:49] [PASSED] out of min range
[13:30:49] [PASSED] zero dst
[13:30:49] [PASSED] negative src
[13:30:49] [PASSED] negative dst
[13:30:49] ============ [PASSED] drm_test_rect_calc_vscale ============
[13:30:49] ================== drm_test_rect_rotate ===================
[13:30:49] [PASSED] reflect-x
[13:30:49] [PASSED] reflect-y
[13:30:49] [PASSED] rotate-0
[13:30:49] [PASSED] rotate-90
[13:30:49] [PASSED] rotate-180
[13:30:49] [PASSED] rotate-270
[13:30:49] ============== [PASSED] drm_test_rect_rotate ===============
[13:30:49] ================ drm_test_rect_rotate_inv =================
[13:30:49] [PASSED] reflect-x
[13:30:49] [PASSED] reflect-y
[13:30:49] [PASSED] rotate-0
[13:30:49] [PASSED] rotate-90
[13:30:49] [PASSED] rotate-180
[13:30:49] [PASSED] rotate-270
[13:30:49] ============ [PASSED] drm_test_rect_rotate_inv =============
[13:30:49] ==================== [PASSED] drm_rect =====================
[13:30:49] ================== drm_fixp (2 subtests) ===================
[13:30:49] [PASSED] drm_test_int2fixp
[13:30:49] [PASSED] drm_test_sm2fixp
[13:30:49] ==================== [PASSED] drm_fixp =====================
[13:30:49] ============================================================
[13:30:49] Testing complete. Ran 528 tests: passed: 528
[13:30:49] Elapsed time: 46.353s total, 2.595s configuring, 43.488s building, 0.214s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[13:30:49] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:30:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json ARCH=um O=.kunit --jobs=48
[13:31:04] Starting KUnit Kernel (1/1)...
[13:31:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:31:04] ================= ttm_device (5 subtests) ==================
[13:31:04] [PASSED] ttm_device_init_basic
[13:31:04] [PASSED] ttm_device_init_multiple
[13:31:04] [PASSED] ttm_device_fini_basic
[13:31:04] [PASSED] ttm_device_init_no_vma_man
[13:31:04] ================== ttm_device_init_pools ==================
[13:31:04] [PASSED] No DMA allocations, no DMA32 required
[13:31:04] [PASSED] DMA allocations, DMA32 required
[13:31:04] [PASSED] No DMA allocations, DMA32 required
[13:31:04] [PASSED] DMA allocations, no DMA32 required
[13:31:04] ============== [PASSED] ttm_device_init_pools ==============
[13:31:04] =================== [PASSED] ttm_device ====================
[13:31:04] ================== ttm_pool (8 subtests) ===================
[13:31:04] ================== ttm_pool_alloc_basic ===================
[13:31:04] [PASSED] One page
[13:31:04] [PASSED] More than one page
[13:31:04] [PASSED] Above the allocation limit
[13:31:04] [PASSED] One page, with coherent DMA mappings enabled
[13:31:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:31:04] ============== [PASSED] ttm_pool_alloc_basic ===============
[13:31:04] ============== ttm_pool_alloc_basic_dma_addr ==============
[13:31:04] [PASSED] One page
[13:31:04] [PASSED] More than one page
[13:31:05] [PASSED] Above the allocation limit
[13:31:05] [PASSED] One page, with coherent DMA mappings enabled
[13:31:05] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[13:31:05] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[13:31:05] [PASSED] ttm_pool_alloc_order_caching_match
[13:31:05] [PASSED] ttm_pool_alloc_caching_mismatch
[13:31:05] [PASSED] ttm_pool_alloc_order_mismatch
[13:31:05] [PASSED] ttm_pool_free_dma_alloc
[13:31:05] [PASSED] ttm_pool_free_no_dma_alloc
[13:31:05] [PASSED] ttm_pool_fini_basic
[13:31:05] ==================== [PASSED] ttm_pool =====================
[13:31:05] ================ ttm_resource (8 subtests) =================
[13:31:05] ================= ttm_resource_init_basic =================
[13:31:05] [PASSED] Init resource in TTM_PL_SYSTEM
[13:31:05] [PASSED] Init resource in TTM_PL_VRAM
[13:31:05] [PASSED] Init resource in a private placement
[13:31:05] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[13:31:05] ============= [PASSED] ttm_resource_init_basic =============
[13:31:05] [PASSED] ttm_resource_init_pinned
[13:31:05] [PASSED] ttm_resource_fini_basic
[13:31:05] [PASSED] ttm_resource_manager_init_basic
[13:31:05] [PASSED] ttm_resource_manager_usage_basic
[13:31:05] [PASSED] ttm_resource_manager_set_used_basic
[13:31:05] [PASSED] ttm_sys_man_alloc_basic
[13:31:05] [PASSED] ttm_sys_man_free_basic
[13:31:05] ================== [PASSED] ttm_resource ===================
[13:31:05] =================== ttm_tt (15 subtests) ===================
[13:31:05] ==================== ttm_tt_init_basic ====================
[13:31:05] [PASSED] Page-aligned size
[13:31:05] [PASSED] Extra pages requested
[13:31:05] ================ [PASSED] ttm_tt_init_basic ================
[13:31:05] [PASSED] ttm_tt_init_misaligned
[13:31:05] [PASSED] ttm_tt_fini_basic
[13:31:05] [PASSED] ttm_tt_fini_sg
[13:31:05] [PASSED] ttm_tt_fini_shmem
[13:31:05] [PASSED] ttm_tt_create_basic
[13:31:05] [PASSED] ttm_tt_create_invalid_bo_type
[13:31:05] [PASSED] ttm_tt_create_ttm_exists
[13:31:05] [PASSED] ttm_tt_create_failed
[13:31:05] [PASSED] ttm_tt_destroy_basic
[13:31:05] [PASSED] ttm_tt_populate_null_ttm
[13:31:05] [PASSED] ttm_tt_populate_populated_ttm
[13:31:05] [PASSED] ttm_tt_unpopulate_basic
[13:31:05] [PASSED] ttm_tt_unpopulate_empty_ttm
[13:31:05] [PASSED] ttm_tt_swapin_basic
[13:31:05] ===================== [PASSED] ttm_tt ======================
[13:31:05] =================== ttm_bo (14 subtests) ===================
[13:31:05] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[13:31:05] [PASSED] Cannot be interrupted and sleeps
[13:31:05] [PASSED] Cannot be interrupted, locks straight away
[13:31:05] [PASSED] Can be interrupted, sleeps
[13:31:05] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[13:31:05] [PASSED] ttm_bo_reserve_locked_no_sleep
[13:31:05] [PASSED] ttm_bo_reserve_no_wait_ticket
[13:31:05] [PASSED] ttm_bo_reserve_double_resv
[13:31:05] [PASSED] ttm_bo_reserve_interrupted
[13:31:05] [PASSED] ttm_bo_reserve_deadlock
[13:31:05] [PASSED] ttm_bo_unreserve_basic
[13:31:05] [PASSED] ttm_bo_unreserve_pinned
[13:31:05] [PASSED] ttm_bo_unreserve_bulk
[13:31:05] [PASSED] ttm_bo_put_basic
[13:31:05] [PASSED] ttm_bo_put_shared_resv
[13:31:05] [PASSED] ttm_bo_pin_basic
[13:31:05] [PASSED] ttm_bo_pin_unpin_resource
[13:31:05] [PASSED] ttm_bo_multiple_pin_one_unpin
[13:31:05] ===================== [PASSED] ttm_bo ======================
[13:31:05] ============== ttm_bo_validate (22 subtests) ===============
[13:31:05] ============== ttm_bo_init_reserved_sys_man ===============
[13:31:05] [PASSED] Buffer object for userspace
[13:31:05] [PASSED] Kernel buffer object
[13:31:05] [PASSED] Shared buffer object
[13:31:05] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[13:31:05] ============== ttm_bo_init_reserved_mock_man ==============
[13:31:05] [PASSED] Buffer object for userspace
[13:31:05] [PASSED] Kernel buffer object
[13:31:05] [PASSED] Shared buffer object
[13:31:05] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[13:31:05] [PASSED] ttm_bo_init_reserved_resv
[13:31:05] ================== ttm_bo_validate_basic ==================
[13:31:05] [PASSED] Buffer object for userspace
[13:31:05] [PASSED] Kernel buffer object
[13:31:05] [PASSED] Shared buffer object
[13:31:05] ============== [PASSED] ttm_bo_validate_basic ==============
[13:31:05] [PASSED] ttm_bo_validate_invalid_placement
[13:31:05] ============= ttm_bo_validate_same_placement ==============
[13:31:05] [PASSED] System manager
[13:31:05] [PASSED] VRAM manager
[13:31:05] ========= [PASSED] ttm_bo_validate_same_placement ==========
[13:31:05] [PASSED] ttm_bo_validate_failed_alloc
[13:31:05] [PASSED] ttm_bo_validate_pinned
[13:31:05] [PASSED] ttm_bo_validate_busy_placement
[13:31:05] ================ ttm_bo_validate_multihop =================
[13:31:05] [PASSED] Buffer object for userspace
[13:31:05] [PASSED] Kernel buffer object
[13:31:05] [PASSED] Shared buffer object
[13:31:05] ============ [PASSED] ttm_bo_validate_multihop =============
[13:31:05] ========== ttm_bo_validate_no_placement_signaled ==========
[13:31:05] [PASSED] Buffer object in system domain, no page vector
[13:31:05] [PASSED] Buffer object in system domain with an existing page vector
[13:31:05] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[13:31:05] ======== ttm_bo_validate_no_placement_not_signaled ========
[13:31:05] [PASSED] Buffer object for userspace
[13:31:05] [PASSED] Kernel buffer object
[13:31:05] [PASSED] Shared buffer object
[13:31:05] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[13:31:05] [PASSED] ttm_bo_validate_move_fence_signaled
[13:31:05] ========= ttm_bo_validate_move_fence_not_signaled =========
[13:31:05] [PASSED] Waits for GPU
[13:31:05] [PASSED] Tries to lock straight away
[13:31:05] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[13:31:05] [PASSED] ttm_bo_validate_swapout
[13:31:05] [PASSED] ttm_bo_validate_happy_evict
[13:31:05] [PASSED] ttm_bo_validate_all_pinned_evict
[13:31:05] [PASSED] ttm_bo_validate_allowed_only_evict
[13:31:05] [PASSED] ttm_bo_validate_deleted_evict
[13:31:05] [PASSED] ttm_bo_validate_busy_domain_evict
[13:31:05] [PASSED] ttm_bo_validate_evict_gutting
[13:31:05] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[13:31:05] ================= [PASSED] ttm_bo_validate =================
[13:31:05] ============================================================
[13:31:05] Testing complete. Ran 102 tests: passed: 102
[13:31:05] Elapsed time: 15.772s total, 2.576s configuring, 12.327s building, 0.724s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 43+ messages in thread
* ✓ CI.Build: success for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (27 preceding siblings ...)
2024-11-26 13:31 ` ✓ CI.KUnit: success " Patchwork
@ 2024-11-26 14:00 ` Patchwork
2024-11-26 14:03 ` ✓ CI.Hooks: " Patchwork
` (3 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 14:00 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : success
== Summary ==
lib/modules/6.12.0-xe/kernel/arch/x86/events/rapl.ko
lib/modules/6.12.0-xe/kernel/arch/x86/kvm/
lib/modules/6.12.0-xe/kernel/arch/x86/kvm/kvm.ko
lib/modules/6.12.0-xe/kernel/arch/x86/kvm/kvm-intel.ko
lib/modules/6.12.0-xe/kernel/arch/x86/kvm/kvm-amd.ko
lib/modules/6.12.0-xe/kernel/kernel/
lib/modules/6.12.0-xe/kernel/kernel/kheaders.ko
lib/modules/6.12.0-xe/kernel/crypto/
lib/modules/6.12.0-xe/kernel/crypto/ecrdsa_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/xcbc.ko
lib/modules/6.12.0-xe/kernel/crypto/serpent_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/aria_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/crypto_simd.ko
lib/modules/6.12.0-xe/kernel/crypto/adiantum.ko
lib/modules/6.12.0-xe/kernel/crypto/tcrypt.ko
lib/modules/6.12.0-xe/kernel/crypto/crypto_engine.ko
lib/modules/6.12.0-xe/kernel/crypto/zstd.ko
lib/modules/6.12.0-xe/kernel/crypto/asymmetric_keys/
lib/modules/6.12.0-xe/kernel/crypto/asymmetric_keys/pkcs7_test_key.ko
lib/modules/6.12.0-xe/kernel/crypto/asymmetric_keys/pkcs8_key_parser.ko
lib/modules/6.12.0-xe/kernel/crypto/des_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/xctr.ko
lib/modules/6.12.0-xe/kernel/crypto/authenc.ko
lib/modules/6.12.0-xe/kernel/crypto/sm4_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/keywrap.ko
lib/modules/6.12.0-xe/kernel/crypto/camellia_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/sm3.ko
lib/modules/6.12.0-xe/kernel/crypto/pcrypt.ko
lib/modules/6.12.0-xe/kernel/crypto/aegis128.ko
lib/modules/6.12.0-xe/kernel/crypto/af_alg.ko
lib/modules/6.12.0-xe/kernel/crypto/algif_aead.ko
lib/modules/6.12.0-xe/kernel/crypto/cmac.ko
lib/modules/6.12.0-xe/kernel/crypto/sm3_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/aes_ti.ko
lib/modules/6.12.0-xe/kernel/crypto/chacha_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/poly1305_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/nhpoly1305.ko
lib/modules/6.12.0-xe/kernel/crypto/crc32_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/essiv.ko
lib/modules/6.12.0-xe/kernel/crypto/ccm.ko
lib/modules/6.12.0-xe/kernel/crypto/wp512.ko
lib/modules/6.12.0-xe/kernel/crypto/streebog_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/authencesn.ko
lib/modules/6.12.0-xe/kernel/crypto/echainiv.ko
lib/modules/6.12.0-xe/kernel/crypto/lrw.ko
lib/modules/6.12.0-xe/kernel/crypto/cryptd.ko
lib/modules/6.12.0-xe/kernel/crypto/crypto_user.ko
lib/modules/6.12.0-xe/kernel/crypto/algif_hash.ko
lib/modules/6.12.0-xe/kernel/crypto/vmac.ko
lib/modules/6.12.0-xe/kernel/crypto/polyval-generic.ko
lib/modules/6.12.0-xe/kernel/crypto/hctr2.ko
lib/modules/6.12.0-xe/kernel/crypto/842.ko
lib/modules/6.12.0-xe/kernel/crypto/pcbc.ko
lib/modules/6.12.0-xe/kernel/crypto/ansi_cprng.ko
lib/modules/6.12.0-xe/kernel/crypto/cast6_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/twofish_common.ko
lib/modules/6.12.0-xe/kernel/crypto/twofish_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/lz4hc.ko
lib/modules/6.12.0-xe/kernel/crypto/blowfish_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/md4.ko
lib/modules/6.12.0-xe/kernel/crypto/chacha20poly1305.ko
lib/modules/6.12.0-xe/kernel/crypto/curve25519-generic.ko
lib/modules/6.12.0-xe/kernel/crypto/lz4.ko
lib/modules/6.12.0-xe/kernel/crypto/rmd160.ko
lib/modules/6.12.0-xe/kernel/crypto/algif_skcipher.ko
lib/modules/6.12.0-xe/kernel/crypto/cast5_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/fcrypt.ko
lib/modules/6.12.0-xe/kernel/crypto/ecdsa_generic.ko
lib/modules/6.12.0-xe/kernel/crypto/sm4.ko
lib/modules/6.12.0-xe/kernel/crypto/cast_common.ko
lib/modules/6.12.0-xe/kernel/crypto/blowfish_common.ko
lib/modules/6.12.0-xe/kernel/crypto/michael_mic.ko
lib/modules/6.12.0-xe/kernel/crypto/async_tx/
lib/modules/6.12.0-xe/kernel/crypto/async_tx/async_xor.ko
lib/modules/6.12.0-xe/kernel/crypto/async_tx/async_tx.ko
lib/modules/6.12.0-xe/kernel/crypto/async_tx/async_memcpy.ko
lib/modules/6.12.0-xe/kernel/crypto/async_tx/async_pq.ko
lib/modules/6.12.0-xe/kernel/crypto/async_tx/async_raid6_recov.ko
lib/modules/6.12.0-xe/kernel/crypto/algif_rng.ko
lib/modules/6.12.0-xe/kernel/block/
lib/modules/6.12.0-xe/kernel/block/bfq.ko
lib/modules/6.12.0-xe/kernel/block/kyber-iosched.ko
lib/modules/6.12.0-xe/build
lib/modules/6.12.0-xe/modules.alias.bin
lib/modules/6.12.0-xe/modules.builtin
lib/modules/6.12.0-xe/modules.softdep
lib/modules/6.12.0-xe/modules.alias
lib/modules/6.12.0-xe/modules.order
lib/modules/6.12.0-xe/modules.symbols
lib/modules/6.12.0-xe/modules.dep.bin
+ mv kernel-nodebug.tar.gz ..
+ cd ..
+ rm -rf archive
++ date +%s
+ echo -e '\e[0Ksection_end:1732629634:package_x86_64_nodebug\r\e[0K'
^[[0Ksection_end:1732629634:package_x86_64_nodebug
^[[0K
+ sync
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 43+ messages in thread
* ✓ CI.Hooks: success for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (28 preceding siblings ...)
2024-11-26 14:00 ` ✓ CI.Build: " Patchwork
@ 2024-11-26 14:03 ` Patchwork
2024-11-26 14:04 ` ✗ CI.checksparse: warning " Patchwork
` (2 subsequent siblings)
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 14:03 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : success
== Summary ==
run-parts: executing /workspace/ci/hooks/00-showenv
+ export
+ grep -Ei '(^|\W)CI_'
declare -x CI_KERNEL_BUILD_DIR="/workspace/kernel/build64-default"
declare -x CI_KERNEL_SRC_DIR="/workspace/kernel"
declare -x CI_TOOLS_SRC_DIR="/workspace/ci"
declare -x CI_WORKSPACE_DIR="/workspace"
run-parts: executing /workspace/ci/hooks/10-build-W1
+ SRC_DIR=/workspace/kernel
+ RESTORE_DISPLAY_CONFIG=0
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ cd /workspace/kernel
++ nproc
+ make -j48 O=/workspace/kernel/build64-default modules_prepare
make[1]: Entering directory '/workspace/kernel/build64-default'
GEN Makefile
UPD include/config/kernel.release
mkdir -p /workspace/kernel/build64-default/tools/objtool && make O=/workspace/kernel/build64-default subdir=tools/objtool --no-print-directory -C objtool
UPD include/generated/utsrelease.h
CALL ../scripts/checksyscalls.sh
INSTALL libsubcmd_headers
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/exec-cmd.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/help.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/pager.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/parse-options.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/run-command.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/sigchain.o
CC /workspace/kernel/build64-default/tools/objtool/libsubcmd/subcmd-config.o
LD /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd-in.o
AR /workspace/kernel/build64-default/tools/objtool/libsubcmd/libsubcmd.a
CC /workspace/kernel/build64-default/tools/objtool/weak.o
CC /workspace/kernel/build64-default/tools/objtool/check.o
CC /workspace/kernel/build64-default/tools/objtool/special.o
CC /workspace/kernel/build64-default/tools/objtool/builtin-check.o
CC /workspace/kernel/build64-default/tools/objtool/elf.o
CC /workspace/kernel/build64-default/tools/objtool/objtool.o
CC /workspace/kernel/build64-default/tools/objtool/orc_gen.o
CC /workspace/kernel/build64-default/tools/objtool/orc_dump.o
CC /workspace/kernel/build64-default/tools/objtool/libstring.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/special.o
CC /workspace/kernel/build64-default/tools/objtool/libctype.o
CC /workspace/kernel/build64-default/tools/objtool/str_error_r.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/decode.o
CC /workspace/kernel/build64-default/tools/objtool/librbtree.o
CC /workspace/kernel/build64-default/tools/objtool/arch/x86/orc.o
LD /workspace/kernel/build64-default/tools/objtool/arch/x86/objtool-in.o
LD /workspace/kernel/build64-default/tools/objtool/objtool-in.o
LINK /workspace/kernel/build64-default/tools/objtool/objtool
make[1]: Leaving directory '/workspace/kernel/build64-default'
++ nproc
+ make -j48 O=/workspace/kernel/build64-default W=1 drivers/gpu/drm/xe
make[1]: Entering directory '/workspace/kernel/build64-default'
make[2]: Nothing to be done for 'drivers/gpu/drm/xe'.
make[1]: Leaving directory '/workspace/kernel/build64-default'
run-parts: executing /workspace/ci/hooks/11-build-32b
+++ realpath /workspace/ci/hooks/11-build-32b
++ dirname /workspace/ci/hooks/11-build-32b
+ THIS_SCRIPT_DIR=/workspace/ci/hooks
+ SRC_DIR=/workspace/kernel
+ TOOLS_SRC_DIR=/workspace/ci
+ '[' -n /workspace/kernel/build64-default ']'
+ BUILD_DIR=/workspace/kernel/build64-default
+ BUILD_DIR=/workspace/kernel/build64-default/build32
+ cd /workspace/kernel
+ mkdir -p /workspace/kernel/build64-default/build32
++ nproc
+ make -j48 ARCH=i386 O=/workspace/kernel/build64-default/build32 defconfig
make[1]: Entering directory '/workspace/kernel/build64-default/build32'
GEN Makefile
HOSTCC scripts/basic/fixdep
HOSTCC scripts/kconfig/conf.o
HOSTCC scripts/kconfig/confdata.o
HOSTCC scripts/kconfig/expr.o
LEX scripts/kconfig/lexer.lex.c
YACC scripts/kconfig/parser.tab.[ch]
HOSTCC scripts/kconfig/menu.o
HOSTCC scripts/kconfig/preprocess.o
HOSTCC scripts/kconfig/symbol.o
HOSTCC scripts/kconfig/util.o
HOSTCC scripts/kconfig/lexer.lex.o
HOSTCC scripts/kconfig/parser.tab.o
HOSTLD scripts/kconfig/conf
*** Default configuration is based on 'i386_defconfig'
#
# configuration written to .config
#
make[1]: Leaving directory '/workspace/kernel/build64-default/build32'
+ cd /workspace/kernel/build64-default/build32
+ /workspace/kernel/scripts/kconfig/merge_config.sh .config /workspace/ci/kernel/fragments/10-xe.fragment
Using .config as base
Merging /workspace/ci/kernel/fragments/10-xe.fragment
Value of CONFIG_DRM_XE is redefined by fragment /workspace/ci/kernel/fragments/10-xe.fragment:
Previous value: # CONFIG_DRM_XE is not set
New value: CONFIG_DRM_XE=m
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
#
# configuration written to .config
#
Value requested for CONFIG_HAVE_UID16 not in final .config
Requested value: CONFIG_HAVE_UID16=y
Actual value:
Value requested for CONFIG_UID16 not in final .config
Requested value: CONFIG_UID16=y
Actual value:
Value requested for CONFIG_X86_32 not in final .config
Requested value: CONFIG_X86_32=y
Actual value:
Value requested for CONFIG_OUTPUT_FORMAT not in final .config
Requested value: CONFIG_OUTPUT_FORMAT="elf32-i386"
Actual value: CONFIG_OUTPUT_FORMAT="elf64-x86-64"
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MIN not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MIN=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MIN=28
Value requested for CONFIG_ARCH_MMAP_RND_BITS_MAX not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS_MAX=16
Actual value: CONFIG_ARCH_MMAP_RND_BITS_MAX=32
Value requested for CONFIG_PGTABLE_LEVELS not in final .config
Requested value: CONFIG_PGTABLE_LEVELS=2
Actual value: CONFIG_PGTABLE_LEVELS=5
Value requested for CONFIG_X86_BIGSMP not in final .config
Requested value: # CONFIG_X86_BIGSMP is not set
Actual value:
Value requested for CONFIG_X86_INTEL_QUARK not in final .config
Requested value: # CONFIG_X86_INTEL_QUARK is not set
Actual value:
Value requested for CONFIG_X86_RDC321X not in final .config
Requested value: # CONFIG_X86_RDC321X is not set
Actual value:
Value requested for CONFIG_X86_32_NON_STANDARD not in final .config
Requested value: # CONFIG_X86_32_NON_STANDARD is not set
Actual value:
Value requested for CONFIG_X86_32_IRIS not in final .config
Requested value: # CONFIG_X86_32_IRIS is not set
Actual value:
Value requested for CONFIG_M486SX not in final .config
Requested value: # CONFIG_M486SX is not set
Actual value:
Value requested for CONFIG_M486 not in final .config
Requested value: # CONFIG_M486 is not set
Actual value:
Value requested for CONFIG_M586 not in final .config
Requested value: # CONFIG_M586 is not set
Actual value:
Value requested for CONFIG_M586TSC not in final .config
Requested value: # CONFIG_M586TSC is not set
Actual value:
Value requested for CONFIG_M586MMX not in final .config
Requested value: # CONFIG_M586MMX is not set
Actual value:
Value requested for CONFIG_M686 not in final .config
Requested value: CONFIG_M686=y
Actual value:
Value requested for CONFIG_MPENTIUMII not in final .config
Requested value: # CONFIG_MPENTIUMII is not set
Actual value:
Value requested for CONFIG_MPENTIUMIII not in final .config
Requested value: # CONFIG_MPENTIUMIII is not set
Actual value:
Value requested for CONFIG_MPENTIUMM not in final .config
Requested value: # CONFIG_MPENTIUMM is not set
Actual value:
Value requested for CONFIG_MPENTIUM4 not in final .config
Requested value: # CONFIG_MPENTIUM4 is not set
Actual value:
Value requested for CONFIG_MK6 not in final .config
Requested value: # CONFIG_MK6 is not set
Actual value:
Value requested for CONFIG_MK7 not in final .config
Requested value: # CONFIG_MK7 is not set
Actual value:
Value requested for CONFIG_MCRUSOE not in final .config
Requested value: # CONFIG_MCRUSOE is not set
Actual value:
Value requested for CONFIG_MEFFICEON not in final .config
Requested value: # CONFIG_MEFFICEON is not set
Actual value:
Value requested for CONFIG_MWINCHIPC6 not in final .config
Requested value: # CONFIG_MWINCHIPC6 is not set
Actual value:
Value requested for CONFIG_MWINCHIP3D not in final .config
Requested value: # CONFIG_MWINCHIP3D is not set
Actual value:
Value requested for CONFIG_MELAN not in final .config
Requested value: # CONFIG_MELAN is not set
Actual value:
Value requested for CONFIG_MGEODEGX1 not in final .config
Requested value: # CONFIG_MGEODEGX1 is not set
Actual value:
Value requested for CONFIG_MGEODE_LX not in final .config
Requested value: # CONFIG_MGEODE_LX is not set
Actual value:
Value requested for CONFIG_MCYRIXIII not in final .config
Requested value: # CONFIG_MCYRIXIII is not set
Actual value:
Value requested for CONFIG_MVIAC3_2 not in final .config
Requested value: # CONFIG_MVIAC3_2 is not set
Actual value:
Value requested for CONFIG_MVIAC7 not in final .config
Requested value: # CONFIG_MVIAC7 is not set
Actual value:
Value requested for CONFIG_X86_GENERIC not in final .config
Requested value: # CONFIG_X86_GENERIC is not set
Actual value:
Value requested for CONFIG_X86_INTERNODE_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_INTERNODE_CACHE_SHIFT=5
Actual value: CONFIG_X86_INTERNODE_CACHE_SHIFT=6
Value requested for CONFIG_X86_L1_CACHE_SHIFT not in final .config
Requested value: CONFIG_X86_L1_CACHE_SHIFT=5
Actual value: CONFIG_X86_L1_CACHE_SHIFT=6
Value requested for CONFIG_X86_USE_PPRO_CHECKSUM not in final .config
Requested value: CONFIG_X86_USE_PPRO_CHECKSUM=y
Actual value:
Value requested for CONFIG_X86_MINIMUM_CPU_FAMILY not in final .config
Requested value: CONFIG_X86_MINIMUM_CPU_FAMILY=6
Actual value: CONFIG_X86_MINIMUM_CPU_FAMILY=64
Value requested for CONFIG_CPU_SUP_TRANSMETA_32 not in final .config
Requested value: CONFIG_CPU_SUP_TRANSMETA_32=y
Actual value:
Value requested for CONFIG_CPU_SUP_VORTEX_32 not in final .config
Requested value: CONFIG_CPU_SUP_VORTEX_32=y
Actual value:
Value requested for CONFIG_HPET_TIMER not in final .config
Requested value: # CONFIG_HPET_TIMER is not set
Actual value: CONFIG_HPET_TIMER=y
Value requested for CONFIG_NR_CPUS_RANGE_END not in final .config
Requested value: CONFIG_NR_CPUS_RANGE_END=8
Actual value: CONFIG_NR_CPUS_RANGE_END=512
Value requested for CONFIG_NR_CPUS_DEFAULT not in final .config
Requested value: CONFIG_NR_CPUS_DEFAULT=8
Actual value: CONFIG_NR_CPUS_DEFAULT=64
Value requested for CONFIG_X86_ANCIENT_MCE not in final .config
Requested value: # CONFIG_X86_ANCIENT_MCE is not set
Actual value:
Value requested for CONFIG_X86_LEGACY_VM86 not in final .config
Requested value: # CONFIG_X86_LEGACY_VM86 is not set
Actual value:
Value requested for CONFIG_X86_ESPFIX32 not in final .config
Requested value: CONFIG_X86_ESPFIX32=y
Actual value:
Value requested for CONFIG_TOSHIBA not in final .config
Requested value: # CONFIG_TOSHIBA is not set
Actual value:
Value requested for CONFIG_X86_REBOOTFIXUPS not in final .config
Requested value: # CONFIG_X86_REBOOTFIXUPS is not set
Actual value:
Value requested for CONFIG_MICROCODE_INITRD32 not in final .config
Requested value: CONFIG_MICROCODE_INITRD32=y
Actual value:
Value requested for CONFIG_NOHIGHMEM not in final .config
Requested value: # CONFIG_NOHIGHMEM is not set
Actual value:
Value requested for CONFIG_HIGHMEM4G not in final .config
Requested value: CONFIG_HIGHMEM4G=y
Actual value:
Value requested for CONFIG_HIGHMEM64G not in final .config
Requested value: # CONFIG_HIGHMEM64G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_3G not in final .config
Requested value: CONFIG_VMSPLIT_3G=y
Actual value:
Value requested for CONFIG_VMSPLIT_3G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_3G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G not in final .config
Requested value: # CONFIG_VMSPLIT_2G is not set
Actual value:
Value requested for CONFIG_VMSPLIT_2G_OPT not in final .config
Requested value: # CONFIG_VMSPLIT_2G_OPT is not set
Actual value:
Value requested for CONFIG_VMSPLIT_1G not in final .config
Requested value: # CONFIG_VMSPLIT_1G is not set
Actual value:
Value requested for CONFIG_PAGE_OFFSET not in final .config
Requested value: CONFIG_PAGE_OFFSET=0xC0000000
Actual value:
Value requested for CONFIG_HIGHMEM not in final .config
Requested value: CONFIG_HIGHMEM=y
Actual value:
Value requested for CONFIG_X86_PAE not in final .config
Requested value: # CONFIG_X86_PAE is not set
Actual value:
Value requested for CONFIG_ARCH_FLATMEM_ENABLE not in final .config
Requested value: CONFIG_ARCH_FLATMEM_ENABLE=y
Actual value:
Value requested for CONFIG_ARCH_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_ARCH_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_ILLEGAL_POINTER_VALUE not in final .config
Requested value: CONFIG_ILLEGAL_POINTER_VALUE=0
Actual value: CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
Value requested for CONFIG_HIGHPTE not in final .config
Requested value: # CONFIG_HIGHPTE is not set
Actual value:
Value requested for CONFIG_COMPAT_VDSO not in final .config
Requested value: # CONFIG_COMPAT_VDSO is not set
Actual value:
Value requested for CONFIG_FUNCTION_PADDING_CFI not in final .config
Requested value: CONFIG_FUNCTION_PADDING_CFI=0
Actual value: CONFIG_FUNCTION_PADDING_CFI=11
Value requested for CONFIG_FUNCTION_PADDING_BYTES not in final .config
Requested value: CONFIG_FUNCTION_PADDING_BYTES=4
Actual value: CONFIG_FUNCTION_PADDING_BYTES=16
Value requested for CONFIG_APM not in final .config
Requested value: # CONFIG_APM is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K6 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K6 is not set
Actual value:
Value requested for CONFIG_X86_POWERNOW_K7 not in final .config
Requested value: # CONFIG_X86_POWERNOW_K7 is not set
Actual value:
Value requested for CONFIG_X86_GX_SUSPMOD not in final .config
Requested value: # CONFIG_X86_GX_SUSPMOD is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_ICH not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_ICH is not set
Actual value:
Value requested for CONFIG_X86_SPEEDSTEP_SMI not in final .config
Requested value: # CONFIG_X86_SPEEDSTEP_SMI is not set
Actual value:
Value requested for CONFIG_X86_CPUFREQ_NFORCE2 not in final .config
Requested value: # CONFIG_X86_CPUFREQ_NFORCE2 is not set
Actual value:
Value requested for CONFIG_X86_LONGRUN not in final .config
Requested value: # CONFIG_X86_LONGRUN is not set
Actual value:
Value requested for CONFIG_X86_LONGHAUL not in final .config
Requested value: # CONFIG_X86_LONGHAUL is not set
Actual value:
Value requested for CONFIG_X86_E_POWERSAVER not in final .config
Requested value: # CONFIG_X86_E_POWERSAVER is not set
Actual value:
Value requested for CONFIG_PCI_GOBIOS not in final .config
Requested value: # CONFIG_PCI_GOBIOS is not set
Actual value:
Value requested for CONFIG_PCI_GOMMCONFIG not in final .config
Requested value: # CONFIG_PCI_GOMMCONFIG is not set
Actual value:
Value requested for CONFIG_PCI_GODIRECT not in final .config
Requested value: # CONFIG_PCI_GODIRECT is not set
Actual value:
Value requested for CONFIG_PCI_GOANY not in final .config
Requested value: CONFIG_PCI_GOANY=y
Actual value:
Value requested for CONFIG_PCI_BIOS not in final .config
Requested value: CONFIG_PCI_BIOS=y
Actual value:
Value requested for CONFIG_ISA not in final .config
Requested value: # CONFIG_ISA is not set
Actual value:
Value requested for CONFIG_SCx200 not in final .config
Requested value: # CONFIG_SCx200 is not set
Actual value:
Value requested for CONFIG_OLPC not in final .config
Requested value: # CONFIG_OLPC is not set
Actual value:
Value requested for CONFIG_ALIX not in final .config
Requested value: # CONFIG_ALIX is not set
Actual value:
Value requested for CONFIG_NET5501 not in final .config
Requested value: # CONFIG_NET5501 is not set
Actual value:
Value requested for CONFIG_GEOS not in final .config
Requested value: # CONFIG_GEOS is not set
Actual value:
Value requested for CONFIG_COMPAT_32 not in final .config
Requested value: CONFIG_COMPAT_32=y
Actual value:
Value requested for CONFIG_HAVE_ATOMIC_IOMAP not in final .config
Requested value: CONFIG_HAVE_ATOMIC_IOMAP=y
Actual value:
Value requested for CONFIG_ARCH_32BIT_OFF_T not in final .config
Requested value: CONFIG_ARCH_32BIT_OFF_T=y
Actual value:
Value requested for CONFIG_ARCH_WANT_IPC_PARSE_VERSION not in final .config
Requested value: CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
Actual value:
Value requested for CONFIG_MODULES_USE_ELF_REL not in final .config
Requested value: CONFIG_MODULES_USE_ELF_REL=y
Actual value:
Value requested for CONFIG_ARCH_MMAP_RND_BITS not in final .config
Requested value: CONFIG_ARCH_MMAP_RND_BITS=8
Actual value: CONFIG_ARCH_MMAP_RND_BITS=28
Value requested for CONFIG_CLONE_BACKWARDS not in final .config
Requested value: CONFIG_CLONE_BACKWARDS=y
Actual value:
Value requested for CONFIG_OLD_SIGSUSPEND3 not in final .config
Requested value: CONFIG_OLD_SIGSUSPEND3=y
Actual value:
Value requested for CONFIG_OLD_SIGACTION not in final .config
Requested value: CONFIG_OLD_SIGACTION=y
Actual value:
Value requested for CONFIG_ARCH_SPLIT_ARG64 not in final .config
Requested value: CONFIG_ARCH_SPLIT_ARG64=y
Actual value:
Value requested for CONFIG_FUNCTION_ALIGNMENT not in final .config
Requested value: CONFIG_FUNCTION_ALIGNMENT=4
Actual value: CONFIG_FUNCTION_ALIGNMENT=16
Value requested for CONFIG_SELECT_MEMORY_MODEL not in final .config
Requested value: CONFIG_SELECT_MEMORY_MODEL=y
Actual value:
Value requested for CONFIG_FLATMEM_MANUAL not in final .config
Requested value: CONFIG_FLATMEM_MANUAL=y
Actual value:
Value requested for CONFIG_SPARSEMEM_MANUAL not in final .config
Requested value: # CONFIG_SPARSEMEM_MANUAL is not set
Actual value:
Value requested for CONFIG_FLATMEM not in final .config
Requested value: CONFIG_FLATMEM=y
Actual value:
Value requested for CONFIG_SPARSEMEM_STATIC not in final .config
Requested value: CONFIG_SPARSEMEM_STATIC=y
Actual value:
Value requested for CONFIG_BOUNCE not in final .config
Requested value: CONFIG_BOUNCE=y
Actual value:
Value requested for CONFIG_KMAP_LOCAL not in final .config
Requested value: CONFIG_KMAP_LOCAL=y
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_COMPAQ not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_COMPAQ is not set
Actual value:
Value requested for CONFIG_HOTPLUG_PCI_IBM not in final .config
Requested value: # CONFIG_HOTPLUG_PCI_IBM is not set
Actual value:
Value requested for CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH not in final .config
Requested value: CONFIG_EFI_CAPSULE_QUIRK_QUARK_CSH=y
Actual value:
Value requested for CONFIG_PCH_PHUB not in final .config
Requested value: # CONFIG_PCH_PHUB is not set
Actual value:
Value requested for CONFIG_SCSI_NSP32 not in final .config
Requested value: # CONFIG_SCSI_NSP32 is not set
Actual value:
Value requested for CONFIG_PATA_CS5520 not in final .config
Requested value: # CONFIG_PATA_CS5520 is not set
Actual value:
Value requested for CONFIG_PATA_CS5530 not in final .config
Requested value: # CONFIG_PATA_CS5530 is not set
Actual value:
Value requested for CONFIG_PATA_CS5535 not in final .config
Requested value: # CONFIG_PATA_CS5535 is not set
Actual value:
Value requested for CONFIG_PATA_CS5536 not in final .config
Requested value: # CONFIG_PATA_CS5536 is not set
Actual value:
Value requested for CONFIG_PATA_SC1200 not in final .config
Requested value: # CONFIG_PATA_SC1200 is not set
Actual value:
Value requested for CONFIG_PCH_GBE not in final .config
Requested value: # CONFIG_PCH_GBE is not set
Actual value:
Value requested for CONFIG_INPUT_WISTRON_BTNS not in final .config
Requested value: # CONFIG_INPUT_WISTRON_BTNS is not set
Actual value:
Value requested for CONFIG_SERIAL_TIMBERDALE not in final .config
Requested value: # CONFIG_SERIAL_TIMBERDALE is not set
Actual value:
Value requested for CONFIG_SERIAL_PCH_UART not in final .config
Requested value: # CONFIG_SERIAL_PCH_UART is not set
Actual value:
Value requested for CONFIG_HW_RANDOM_GEODE not in final .config
Requested value: CONFIG_HW_RANDOM_GEODE=y
Actual value:
Value requested for CONFIG_SONYPI not in final .config
Requested value: # CONFIG_SONYPI is not set
Actual value:
Value requested for CONFIG_PC8736x_GPIO not in final .config
Requested value: # CONFIG_PC8736x_GPIO is not set
Actual value:
Value requested for CONFIG_NSC_GPIO not in final .config
Requested value: # CONFIG_NSC_GPIO is not set
Actual value:
Value requested for CONFIG_I2C_EG20T not in final .config
Requested value: # CONFIG_I2C_EG20T is not set
Actual value:
Value requested for CONFIG_SCx200_ACB not in final .config
Requested value: # CONFIG_SCx200_ACB is not set
Actual value:
Value requested for CONFIG_PTP_1588_CLOCK_PCH not in final .config
Requested value: # CONFIG_PTP_1588_CLOCK_PCH is not set
Actual value:
Value requested for CONFIG_SBC8360_WDT not in final .config
Requested value: # CONFIG_SBC8360_WDT is not set
Actual value:
Value requested for CONFIG_SBC7240_WDT not in final .config
Requested value: # CONFIG_SBC7240_WDT is not set
Actual value:
Value requested for CONFIG_MFD_CS5535 not in final .config
Requested value: # CONFIG_MFD_CS5535 is not set
Actual value:
Value requested for CONFIG_AGP_ALI not in final .config
Requested value: # CONFIG_AGP_ALI is not set
Actual value:
Value requested for CONFIG_AGP_ATI not in final .config
Requested value: # CONFIG_AGP_ATI is not set
Actual value:
Value requested for CONFIG_AGP_AMD not in final .config
Requested value: # CONFIG_AGP_AMD is not set
Actual value:
Value requested for CONFIG_AGP_NVIDIA not in final .config
Requested value: # CONFIG_AGP_NVIDIA is not set
Actual value:
Value requested for CONFIG_AGP_SWORKS not in final .config
Requested value: # CONFIG_AGP_SWORKS is not set
Actual value:
Value requested for CONFIG_AGP_EFFICEON not in final .config
Requested value: # CONFIG_AGP_EFFICEON is not set
Actual value:
Value requested for CONFIG_SND_CS5530 not in final .config
Requested value: # CONFIG_SND_CS5530 is not set
Actual value:
Value requested for CONFIG_SND_CS5535AUDIO not in final .config
Requested value: # CONFIG_SND_CS5535AUDIO is not set
Actual value:
Value requested for CONFIG_SND_SIS7019 not in final .config
Requested value: # CONFIG_SND_SIS7019 is not set
Actual value:
Value requested for CONFIG_LEDS_OT200 not in final .config
Requested value: # CONFIG_LEDS_OT200 is not set
Actual value:
Value requested for CONFIG_PCH_DMA not in final .config
Requested value: # CONFIG_PCH_DMA is not set
Actual value:
Value requested for CONFIG_CLKSRC_I8253 not in final .config
Requested value: CONFIG_CLKSRC_I8253=y
Actual value:
Value requested for CONFIG_MAILBOX not in final .config
Requested value: # CONFIG_MAILBOX is not set
Actual value: CONFIG_MAILBOX=y
Value requested for CONFIG_CRYPTO_SERPENT_SSE2_586 not in final .config
Requested value: # CONFIG_CRYPTO_SERPENT_SSE2_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_TWOFISH_586 not in final .config
Requested value: # CONFIG_CRYPTO_TWOFISH_586 is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_GEODE not in final .config
Requested value: # CONFIG_CRYPTO_DEV_GEODE is not set
Actual value:
Value requested for CONFIG_CRYPTO_DEV_HIFN_795X not in final .config
Requested value: # CONFIG_CRYPTO_DEV_HIFN_795X is not set
Actual value:
Value requested for CONFIG_CRYPTO_LIB_POLY1305_RSIZE not in final .config
Requested value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=1
Actual value: CONFIG_CRYPTO_LIB_POLY1305_RSIZE=11
Value requested for CONFIG_AUDIT_GENERIC not in final .config
Requested value: CONFIG_AUDIT_GENERIC=y
Actual value:
Value requested for CONFIG_GENERIC_VDSO_32 not in final .config
Requested value: CONFIG_GENERIC_VDSO_32=y
Actual value:
Value requested for CONFIG_DEBUG_KMAP_LOCAL not in final .config
Requested value: # CONFIG_DEBUG_KMAP_LOCAL is not set
Actual value:
Value requested for CONFIG_DEBUG_HIGHMEM not in final .config
Requested value: # CONFIG_DEBUG_HIGHMEM is not set
Actual value:
Value requested for CONFIG_HAVE_DEBUG_STACKOVERFLOW not in final .config
Requested value: CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
Actual value:
Value requested for CONFIG_DEBUG_STACKOVERFLOW not in final .config
Requested value: # CONFIG_DEBUG_STACKOVERFLOW is not set
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_TRACER not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
Actual value:
Value requested for CONFIG_HAVE_FUNCTION_GRAPH_RETVAL not in final .config
Requested value: CONFIG_HAVE_FUNCTION_GRAPH_RETVAL=y
Actual value:
Value requested for CONFIG_DRM_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_KUNIT_TEST=m
Actual value:
Value requested for CONFIG_DRM_XE_WERROR not in final .config
Requested value: CONFIG_DRM_XE_WERROR=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG not in final .config
Requested value: CONFIG_DRM_XE_DEBUG=y
Actual value:
Value requested for CONFIG_DRM_XE_DEBUG_MEM not in final .config
Requested value: CONFIG_DRM_XE_DEBUG_MEM=y
Actual value:
Value requested for CONFIG_DRM_XE_KUNIT_TEST not in final .config
Requested value: CONFIG_DRM_XE_KUNIT_TEST=m
Actual value:
++ nproc
+ make -j48 ARCH=i386 olddefconfig
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
#
# configuration written to .config
#
++ nproc
+ make -j48 ARCH=i386
SYNC include/config/auto.conf.cmd
GEN Makefile
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
WARNING: unmet direct dependencies detected for FB_IOMEM_HELPERS
Depends on [n]: HAS_IOMEM [=y] && FB_CORE [=n]
Selected by [m]:
- DRM_XE_DISPLAY [=y] && HAS_IOMEM [=y] && DRM [=y] && DRM_XE [=m] && DRM_XE [=m]=m [=m]
GEN Makefile
WRAP arch/x86/include/generated/uapi/asm/bpf_perf_event.h
WRAP arch/x86/include/generated/uapi/asm/errno.h
WRAP arch/x86/include/generated/uapi/asm/fcntl.h
UPD include/generated/uapi/linux/version.h
WRAP arch/x86/include/generated/uapi/asm/ioctl.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_32.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_64.h
WRAP arch/x86/include/generated/uapi/asm/ipcbuf.h
WRAP arch/x86/include/generated/uapi/asm/ioctls.h
SYSHDR arch/x86/include/generated/uapi/asm/unistd_x32.h
WRAP arch/x86/include/generated/uapi/asm/param.h
SYSTBL arch/x86/include/generated/asm/syscalls_32.h
WRAP arch/x86/include/generated/uapi/asm/poll.h
WRAP arch/x86/include/generated/uapi/asm/resource.h
WRAP arch/x86/include/generated/uapi/asm/socket.h
WRAP arch/x86/include/generated/uapi/asm/sockios.h
WRAP arch/x86/include/generated/uapi/asm/termbits.h
WRAP arch/x86/include/generated/uapi/asm/termios.h
WRAP arch/x86/include/generated/uapi/asm/types.h
HOSTCC arch/x86/tools/relocs_32.o
UPD include/generated/compile.h
HOSTCC arch/x86/tools/relocs_64.o
HOSTCC arch/x86/tools/relocs_common.o
WRAP arch/x86/include/generated/asm/early_ioremap.h
WRAP arch/x86/include/generated/asm/mcs_spinlock.h
WRAP arch/x86/include/generated/asm/mmzone.h
WRAP arch/x86/include/generated/asm/irq_regs.h
WRAP arch/x86/include/generated/asm/kmap_size.h
WRAP arch/x86/include/generated/asm/local64.h
HOSTCC scripts/kallsyms
WRAP arch/x86/include/generated/asm/mmiowb.h
HOSTCC scripts/sorttable
WRAP arch/x86/include/generated/asm/module.lds.h
HOSTCC scripts/asn1_compiler
WRAP arch/x86/include/generated/asm/rwonce.h
HOSTCC scripts/selinux/genheaders/genheaders
HOSTCC scripts/selinux/mdp/mdp
HOSTLD arch/x86/tools/relocs
UPD include/config/kernel.release
UPD include/generated/utsrelease.h
CC scripts/mod/empty.o
HOSTCC scripts/mod/mk_elfconfig
CC scripts/mod/devicetable-offsets.s
UPD scripts/mod/devicetable-offsets.h
MKELF scripts/mod/elfconfig.h
HOSTCC scripts/mod/modpost.o
HOSTCC scripts/mod/file2alias.o
HOSTCC scripts/mod/sumversion.o
HOSTCC scripts/mod/symsearch.o
HOSTLD scripts/mod/modpost
CC kernel/bounds.s
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-arch-fallback.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-long.h
CHKSHA1 /workspace/kernel/include/linux/atomic/atomic-instrumented.h
UPD include/generated/timeconst.h
UPD include/generated/bounds.h
CC arch/x86/kernel/asm-offsets.s
UPD include/generated/asm-offsets.h
CALL /workspace/kernel/scripts/checksyscalls.sh
LDS scripts/module.lds
CC init/main.o
HOSTCC usr/gen_init_cpio
CC init/do_mounts.o
CC certs/system_keyring.o
CC init/do_mounts_initrd.o
UPD init/utsversion-tmp.h
CC init/initramfs.o
CC ipc/util.o
CC init/calibrate.o
CC ipc/msgutil.o
CC security/commoncap.o
CC init/init_task.o
CC security/lsm_syscalls.o
CC ipc/msg.o
CC mm/filemap.o
AS arch/x86/lib/atomic64_cx8_32.o
CC security/min_addr.o
CC io_uring/io_uring.o
CC ipc/sem.o
CC init/version.o
CC mm/mempool.o
CC arch/x86/power/cpu.o
CC block/bdev.o
CC security/keys/gc.o
CC arch/x86/realmode/init.o
AR arch/x86/net/built-in.a
CC arch/x86/video/video-common.o
GEN security/selinux/flask.h security/selinux/av_permissions.h
CC security/integrity/iint.o
AR arch/x86/crypto/built-in.a
CC arch/x86/pci/i386.o
CC block/partitions/core.o
AR virt/lib/built-in.a
CC arch/x86/events/amd/core.o
CC security/selinux/avc.o
AR arch/x86/platform/atom/built-in.a
CC arch/x86/mm/pat/set_memory.o
AR arch/x86/virt/svm/built-in.a
AR sound/drivers/opl3/built-in.a
AR drivers/cache/built-in.a
CC net/core/sock.o
CC lib/math/div64.o
AR virt/built-in.a
CC arch/x86/kernel/fpu/init.o
CC sound/core/seq/seq.o
AR sound/i2c/other/built-in.a
AR arch/x86/platform/ce4100/built-in.a
CC fs/notify/dnotify/dnotify.o
CC fs/notify/inotify/inotify_fsnotify.o
AR sound/isa/ad1816a/built-in.a
CC lib/math/gcd.o
AR sound/i2c/built-in.a
AR arch/x86/virt/vmx/built-in.a
AS arch/x86/lib/checksum_32.o
AR sound/drivers/opl4/built-in.a
AR drivers/irqchip/built-in.a
CC security/security.o
AR sound/isa/ad1848/built-in.a
CC arch/x86/platform/efi/memmap.o
CC arch/x86/entry/vdso/vma.o
AR arch/x86/virt/built-in.a
AR sound/drivers/mpu401/built-in.a
AR sound/isa/cs423x/built-in.a
CC kernel/sched/core.o
CC arch/x86/kernel/cpu/mce/core.o
AR drivers/bus/mhi/built-in.a
AR sound/drivers/vx/built-in.a
CC arch/x86/kernel/acpi/boot.o
AR drivers/bus/built-in.a
AR sound/isa/es1688/built-in.a
CC arch/x86/lib/cmdline.o
AR sound/drivers/pcsp/built-in.a
AR sound/isa/galaxy/built-in.a
AR drivers/pwm/built-in.a
CC crypto/asymmetric_keys/asymmetric_type.o
AR sound/drivers/built-in.a
AR sound/isa/gus/built-in.a
AR drivers/leds/trigger/built-in.a
AR sound/isa/msnd/built-in.a
AR sound/isa/opti9xx/built-in.a
AR drivers/leds/blink/built-in.a
AR sound/isa/sb/built-in.a
CC security/keys/key.o
CC arch/x86/kernel/apic/apic.o
AR drivers/leds/simple/built-in.a
AR sound/isa/wavefront/built-in.a
CC drivers/leds/led-core.o
AR sound/isa/wss/built-in.a
AR sound/isa/built-in.a
CC arch/x86/entry/vdso/extable.o
AS arch/x86/lib/cmpxchg8b_emu.o
CC lib/math/lcm.o
CC arch/x86/lib/cpu.o
CC crypto/api.o
CC lib/math/int_log.o
CC lib/math/int_pow.o
CC arch/x86/events/amd/lbr.o
GEN usr/initramfs_data.cpio
COPY usr/initramfs_inc_data
AS usr/initramfs_data.o
AR usr/built-in.a
CC arch/x86/mm/init.o
HOSTCC certs/extract-cert
CC lib/math/int_sqrt.o
CC arch/x86/kernel/fpu/bugs.o
CC lib/math/reciprocal_div.o
CC arch/x86/kernel/fpu/core.o
CC lib/math/rational.o
CC fs/notify/inotify/inotify_user.o
CC sound/core/seq/seq_lock.o
CC arch/x86/lib/delay.o
AS arch/x86/realmode/rm/header.o
AR arch/x86/video/built-in.a
CC arch/x86/mm/init_32.o
AS arch/x86/realmode/rm/trampoline_32.o
CERT certs/x509_certificate_list
AS arch/x86/realmode/rm/stack.o
CERT certs/signing_key.x509
AS arch/x86/realmode/rm/reboot.o
AS certs/system_certificates.o
CC arch/x86/events/intel/core.o
CC security/integrity/integrity_audit.o
AR certs/built-in.a
AS arch/x86/realmode/rm/wakeup_asm.o
CC security/lsm_audit.o
CC arch/x86/events/zhaoxin/core.o
CC arch/x86/realmode/rm/wakemain.o
CC drivers/leds/led-class.o
CC drivers/pci/msi/pcidev_msi.o
CC drivers/pci/pcie/portdrv.o
AR drivers/pci/pwrctl/built-in.a
CC arch/x86/pci/init.o
AR sound/pci/ac97/built-in.a
AR sound/pci/ali5451/built-in.a
AR sound/ppc/built-in.a
CC sound/core/seq/seq_clientmgr.o
AR fs/notify/dnotify/built-in.a
AR sound/pci/asihpi/built-in.a
CC arch/x86/realmode/rm/video-mode.o
CC sound/core/sound.o
AR sound/pci/au88x0/built-in.a
CC arch/x86/platform/efi/quirks.o
CC drivers/pci/hotplug/pci_hotplug_core.o
AR sound/pci/aw2/built-in.a
CC crypto/asymmetric_keys/restrict.o
CC arch/x86/kernel/kprobes/core.o
AR sound/pci/ctxfi/built-in.a
AR sound/pci/ca0106/built-in.a
AS arch/x86/lib/getuser.o
CC arch/x86/power/hibernate_32.o
AR sound/pci/cs46xx/built-in.a
AR sound/pci/cs5535audio/built-in.a
GEN arch/x86/lib/inat-tables.c
AR sound/pci/lola/built-in.a
CC block/partitions/msdos.o
AR sound/pci/lx6464es/built-in.a
CC arch/x86/lib/insn-eval.o
AR sound/pci/echoaudio/built-in.a
AS arch/x86/realmode/rm/copy.o
AR sound/pci/emu10k1/built-in.a
AR lib/math/built-in.a
LDS arch/x86/entry/vdso/vdso32/vdso32.lds
CC sound/pci/hda/hda_bind.o
AS arch/x86/realmode/rm/bioscall.o
CC lib/crypto/mpi/generic_mpih-lshift.o
CC kernel/sched/fair.o
AS arch/x86/entry/vdso/vdso32/note.o
CC arch/x86/realmode/rm/regs.o
AS arch/x86/entry/vdso/vdso32/system_call.o
AS arch/x86/entry/vdso/vdso32/sigreturn.o
CC lib/crypto/memneq.o
CC arch/x86/realmode/rm/video-vga.o
CC arch/x86/entry/vdso/vdso32/vclock_gettime.o
CC arch/x86/kernel/cpu/mce/severity.o
CC arch/x86/platform/efi/efi.o
CC arch/x86/realmode/rm/video-vesa.o
CC io_uring/opdef.o
CC security/keys/keyring.o
CC arch/x86/kernel/cpu/mce/genpool.o
AR arch/x86/entry/vsyscall/built-in.a
CC arch/x86/kernel/acpi/sleep.o
CC arch/x86/realmode/rm/video-bios.o
CC block/fops.o
CC arch/x86/events/amd/ibs.o
CC fs/nfs_common/nfsacl.o
AS arch/x86/power/hibernate_asm_32.o
CC io_uring/kbuf.o
PASYMS arch/x86/realmode/rm/pasyms.h
CC drivers/leds/led-triggers.o
CC crypto/asymmetric_keys/signature.o
LDS arch/x86/realmode/rm/realmode.lds
LD arch/x86/realmode/rm/realmode.elf
AR arch/x86/platform/geode/built-in.a
RELOCS arch/x86/realmode/rm/realmode.relocs
OBJCOPY arch/x86/realmode/rm/realmode.bin
AR sound/pci/ice1712/built-in.a
AS arch/x86/realmode/rmpiggy.o
CC security/keys/keyctl.o
CC arch/x86/mm/pat/memtype.o
AR arch/x86/realmode/built-in.a
CC drivers/pci/msi/api.o
CC arch/x86/mm/pat/memtype_interval.o
CC arch/x86/pci/pcbios.o
CC arch/x86/platform/efi/efi_32.o
AR security/integrity/built-in.a
CC ipc/shm.o
CC arch/x86/entry/vdso/vdso32/vgetcpu.o
AR fs/notify/inotify/built-in.a
AR init/built-in.a
AR fs/notify/fanotify/built-in.a
CC arch/x86/kernel/fpu/regset.o
CC fs/notify/fsnotify.o
CC lib/crypto/mpi/generic_mpih-mul1.o
CC kernel/locking/mutex.o
CC drivers/pci/pcie/rcec.o
CC kernel/power/qos.o
CC arch/x86/power/hibernate.o
AR arch/x86/events/zhaoxin/built-in.a
CC kernel/printk/printk.o
CC security/selinux/hooks.o
CC sound/pci/hda/hda_codec.o
HOSTCC arch/x86/entry/vdso/vdso2c
CC block/partitions/efi.o
CC drivers/video/console/dummycon.o
CC drivers/pci/hotplug/acpi_pcihp.o
CC arch/x86/lib/insn.o
AR drivers/idle/built-in.a
CC io_uring/rsrc.o
LDS arch/x86/kernel/vmlinux.lds
AS arch/x86/entry/entry.o
CC arch/x86/kernel/kprobes/opt.o
AR arch/x86/platform/iris/built-in.a
CC drivers/pci/msi/msi.o
CC net/ethernet/eth.o
CC crypto/asymmetric_keys/public_key.o
AS arch/x86/kernel/head_32.o
AS arch/x86/kernel/acpi/wakeup_32.o
CC arch/x86/kernel/head32.o
CC fs/iomap/trace.o
CC fs/nfs_common/grace.o
CC arch/x86/kernel/acpi/cstate.o
CC arch/x86/kernel/apic/apic_common.o
CC fs/quota/dquot.o
CC arch/x86/kernel/cpu/mce/intel.o
CC fs/nfs_common/common.o
CC arch/x86/events/core.o
AR drivers/leds/built-in.a
CC arch/x86/platform/intel/iosf_mbi.o
AR sound/arm/built-in.a
CC lib/crypto/mpi/generic_mpih-mul2.o
AR net/802/built-in.a
CC sound/core/seq/seq_memory.o
CC arch/x86/mm/fault.o
CC arch/x86/lib/kaslr.o
CC arch/x86/entry/vdso/vdso32-setup.o
AS arch/x86/platform/efi/efi_stub_32.o
CC arch/x86/pci/mmconfig_32.o
CC arch/x86/platform/efi/runtime-map.o
AR arch/x86/mm/pat/built-in.a
CC drivers/video/console/vgacon.o
CC drivers/pci/pcie/aspm.o
CC sound/core/seq/seq_queue.o
AR arch/x86/power/built-in.a
CC lib/crypto/utils.o
CC arch/x86/kernel/fpu/signal.o
CC arch/x86/lib/memcpy_32.o
CC fs/notify/notification.o
AR sound/pci/korg1212/built-in.a
CC sound/core/seq/seq_fifo.o
AS arch/x86/lib/memmove_32.o
CC arch/x86/kernel/fpu/xstate.o
CC arch/x86/events/amd/uncore.o
VDSO arch/x86/entry/vdso/vdso32.so.dbg
CC arch/x86/lib/misc.o
CC arch/x86/kernel/apic/apic_noop.o
OBJCOPY arch/x86/entry/vdso/vdso32.so
VDSO2C arch/x86/entry/vdso/vdso-image-32.c
CC arch/x86/lib/pc-conf-reg.o
CC arch/x86/entry/vdso/vdso-image-32.o
ASN.1 crypto/asymmetric_keys/x509.asn1.[ch]
ASN.1 crypto/asymmetric_keys/x509_akid.asn1.[ch]
CC crypto/asymmetric_keys/x509_loader.o
AR drivers/pci/hotplug/built-in.a
CC drivers/pci/pcie/pme.o
AR arch/x86/kernel/acpi/built-in.a
CC arch/x86/kernel/apic/ipi.o
CC mm/oom_kill.o
CC security/keys/permission.o
CC kernel/printk/printk_safe.o
AR arch/x86/kernel/kprobes/built-in.a
AS arch/x86/entry/entry_32.o
AS arch/x86/lib/putuser.o
AR block/partitions/built-in.a
CC block/bio.o
CC arch/x86/kernel/apic/vector.o
AS arch/x86/lib/retpoline.o
CC arch/x86/kernel/cpu/mce/amd.o
CC net/core/request_sock.o
CC lib/crypto/mpi/generic_mpih-mul3.o
CC crypto/asymmetric_keys/x509_public_key.o
AR sound/sh/built-in.a
CC ipc/syscall.o
CC arch/x86/lib/string_32.o
AR arch/x86/entry/vdso/built-in.a
CC kernel/power/main.o
CC arch/x86/entry/syscall_32.o
CC fs/notify/group.o
AR fs/nfs_common/built-in.a
CC arch/x86/lib/strstr_32.o
AR drivers/pci/controller/dwc/built-in.a
ASN.1 crypto/asymmetric_keys/pkcs7.asn1.[ch]
CC kernel/locking/semaphore.o
CC arch/x86/mm/ioremap.o
AR drivers/pci/controller/mobiveil/built-in.a
CC drivers/pci/msi/irqdomain.o
CC arch/x86/pci/direct.o
AR drivers/pci/controller/plda/built-in.a
AR drivers/pci/controller/built-in.a
CC arch/x86/lib/usercopy.o
CC kernel/locking/rwsem.o
AR arch/x86/platform/intel/built-in.a
CC arch/x86/kernel/cpu/mtrr/mtrr.o
CC arch/x86/kernel/cpu/microcode/core.o
AR arch/x86/platform/efi/built-in.a
AR arch/x86/platform/intel-mid/built-in.a
AR arch/x86/platform/intel-quark/built-in.a
CC arch/x86/kernel/cpu/mtrr/if.o
AR arch/x86/platform/olpc/built-in.a
AR arch/x86/platform/scx200/built-in.a
CC kernel/irq/irqdesc.o
AR arch/x86/platform/ts5500/built-in.a
AR arch/x86/platform/uv/built-in.a
AR arch/x86/platform/built-in.a
CC kernel/rcu/update.o
CC arch/x86/kernel/cpu/microcode/intel.o
CC kernel/sched/build_policy.o
CC sound/core/seq/seq_prioq.o
CC lib/crypto/mpi/generic_mpih-rshift.o
CC arch/x86/lib/usercopy_32.o
CC arch/x86/pci/mmconfig-shared.o
AR net/ethernet/built-in.a
CC arch/x86/pci/fixup.o
CC arch/x86/kernel/cpu/mtrr/generic.o
CC fs/iomap/iter.o
CC security/keys/process_keys.o
AR drivers/video/console/built-in.a
CC sound/core/init.o
CC lib/crypto/chacha.o
CC drivers/video/backlight/backlight.o
CC crypto/asymmetric_keys/pkcs7_trust.o
AR drivers/video/fbdev/core/built-in.a
CC fs/quota/quota_v2.o
AR drivers/video/fbdev/omap/built-in.a
AR drivers/video/fbdev/omap2/omapfb/dss/built-in.a
AR drivers/video/fbdev/omap2/omapfb/displays/built-in.a
AR drivers/video/fbdev/omap2/omapfb/built-in.a
AR drivers/video/fbdev/omap2/built-in.a
AR drivers/video/fbdev/built-in.a
AR sound/synth/emux/built-in.a
CC arch/x86/kernel/cpu/cacheinfo.o
AR sound/synth/built-in.a
CC lib/zlib_inflate/inffast.o
CC kernel/printk/nbcon.o
CC arch/x86/lib/msr-smp.o
CC ipc/ipc_sysctl.o
CC arch/x86/entry/common.o
CC fs/notify/mark.o
CC fs/quota/quota_tree.o
AR drivers/pci/pcie/built-in.a
AR arch/x86/events/amd/built-in.a
CC arch/x86/events/probe.o
CC lib/zlib_deflate/deflate.o
AR kernel/livepatch/built-in.a
AR drivers/pci/msi/built-in.a
CC arch/x86/kernel/apic/init.o
AR drivers/pci/switch/built-in.a
CC lib/zlib_inflate/inflate.o
CC drivers/pci/access.o
CC fs/proc/task_mmu.o
CC sound/core/seq/seq_timer.o
CC crypto/asymmetric_keys/pkcs7_verify.o
AR arch/x86/kernel/fpu/built-in.a
CC kernel/locking/percpu-rwsem.o
CC lib/crypto/mpi/generic_mpih-sub1.o
CC lib/lzo/lzo1x_compress.o
CC net/core/skbuff.o
CC arch/x86/mm/extable.o
CC kernel/irq/handle.o
CC arch/x86/kernel/ebda.o
CC arch/x86/lib/cache-smp.o
CC arch/x86/kernel/platform-quirks.o
CC arch/x86/events/intel/bts.o
CC kernel/power/console.o
CC arch/x86/kernel/cpu/microcode/amd.o
CC lib/lz4/lz4_decompress.o
CC sound/pci/hda/hda_jack.o
CC arch/x86/lib/msr.o
CC lib/zstd/zstd_decompress_module.o
CC io_uring/notif.o
CC ipc/mqueue.o
CC lib/xz/xz_dec_syms.o
CC fs/iomap/buffered-io.o
CC kernel/sched/build_utility.o
CC lib/lzo/lzo1x_decompress_safe.o
CC lib/zstd/decompress/huf_decompress.o
CC arch/x86/pci/acpi.o
CC crypto/asymmetric_keys/x509.asn1.o
CC crypto/asymmetric_keys/x509_akid.asn1.o
CC mm/fadvise.o
CC crypto/asymmetric_keys/x509_cert_parser.o
AR drivers/video/backlight/built-in.a
CC drivers/video/aperture.o
CC lib/zstd/decompress/zstd_ddict.o
CC arch/x86/kernel/cpu/mtrr/cleanup.o
CC io_uring/tctx.o
CC lib/zlib_inflate/infutil.o
CC arch/x86/pci/legacy.o
CC kernel/printk/printk_ringbuffer.o
CC security/keys/request_key.o
CC fs/quota/quota.o
CC lib/crypto/mpi/generic_mpih-add1.o
CC arch/x86/kernel/apic/hw_nmi.o
CC kernel/locking/spinlock.o
CC arch/x86/kernel/apic/io_apic.o
CC kernel/irq/manage.o
AR sound/usb/misc/built-in.a
CC arch/x86/kernel/cpu/mce/threshold.o
AR sound/usb/usx2y/built-in.a
CC lib/xz/xz_dec_stream.o
CC arch/x86/kernel/apic/msi.o
AR sound/usb/caiaq/built-in.a
AS arch/x86/entry/thunk.o
AR sound/usb/6fire/built-in.a
AR sound/usb/hiface/built-in.a
AR sound/usb/bcd2000/built-in.a
AR arch/x86/entry/built-in.a
CC sound/core/seq/seq_system.o
AR sound/usb/built-in.a
CC block/elevator.o
CC drivers/video/cmdline.o
CC lib/zlib_inflate/inftrees.o
CC lib/zlib_deflate/deftree.o
CC kernel/printk/sysctl.o
CC arch/x86/kernel/apic/probe_32.o
CC fs/notify/fdinfo.o
CC drivers/pci/bus.o
AR lib/lzo/built-in.a
CC kernel/power/process.o
CC sound/pci/hda/hda_auto_parser.o
CC arch/x86/kernel/cpu/scattered.o
CC lib/zlib_inflate/inflate_syms.o
CC kernel/locking/osq_lock.o
CC arch/x86/mm/mmap.o
CC crypto/asymmetric_keys/pkcs7.asn1.o
AR arch/x86/kernel/cpu/microcode/built-in.a
CC arch/x86/mm/pgtable.o
CC crypto/asymmetric_keys/pkcs7_parser.o
AS arch/x86/lib/msr-reg.o
CC drivers/video/nomodeset.o
CC arch/x86/events/intel/ds.o
CC arch/x86/lib/msr-reg-export.o
CC lib/crypto/mpi/mpicoder.o
CC lib/xz/xz_dec_lzma2.o
CC security/keys/request_key_auth.o
CC security/device_cgroup.o
CC lib/xz/xz_dec_bcj.o
CC kernel/locking/qspinlock.o
CC arch/x86/pci/irq.o
CC drivers/pci/probe.o
CC arch/x86/kernel/cpu/mtrr/amd.o
AR lib/zlib_inflate/built-in.a
CC net/core/datagram.o
CC sound/core/seq/seq_ports.o
CC kernel/power/suspend.o
AS arch/x86/lib/hweight.o
CC mm/maccess.o
AR kernel/printk/built-in.a
CC arch/x86/lib/iomem.o
CC io_uring/filetable.o
CC kernel/power/hibernate.o
CC lib/zlib_deflate/deflate_syms.o
CC kernel/rcu/sync.o
CC lib/crypto/aes.o
CC arch/x86/kernel/cpu/topology_common.o
AR fs/notify/built-in.a
CC security/keys/user_defined.o
CC drivers/video/hdmi.o
CC sound/core/seq/seq_info.o
CC mm/page-writeback.o
AR lib/lz4/built-in.a
CC block/blk-core.o
CC security/selinux/selinuxfs.o
AR sound/pci/mixart/built-in.a
CC fs/proc/inode.o
AR drivers/char/ipmi/built-in.a
CC lib/zstd/decompress/zstd_decompress.o
AR crypto/asymmetric_keys/built-in.a
CC crypto/cipher.o
CC kernel/irq/spurious.o
CC kernel/rcu/srcutree.o
CC fs/kernfs/mount.o
CC arch/x86/lib/atomic64_32.o
CC kernel/locking/rtmutex_api.o
CC fs/sysfs/file.o
AR lib/zlib_deflate/built-in.a
CC security/keys/proc.o
AR sound/pci/nm256/built-in.a
CC fs/quota/kqid.o
CC net/sched/sch_generic.o
CC net/netlink/af_netlink.o
CC arch/x86/lib/inat.o
AR arch/x86/kernel/cpu/mce/built-in.a
CC arch/x86/events/utils.o
CC arch/x86/kernel/cpu/mtrr/cyrix.o
CC net/netlink/genetlink.o
CC ipc/namespace.o
CC lib/crypto/mpi/mpi-add.o
CC arch/x86/mm/physaddr.o
CC kernel/power/snapshot.o
AR arch/x86/lib/built-in.a
AR arch/x86/lib/lib.a
AR lib/xz/built-in.a
CC kernel/power/swap.o
CC kernel/rcu/tree.o
CC crypto/compress.o
CC sound/pci/hda/hda_sysfs.o
CC kernel/irq/resend.o
CC net/netlink/policy.o
CC security/keys/sysctl.o
CC sound/core/seq/seq_dummy.o
CC fs/iomap/direct-io.o
CC security/keys/keyctl_pkey.o
CC security/selinux/netlink.o
CC arch/x86/events/intel/knc.o
CC io_uring/rw.o
CC fs/sysfs/dir.o
AR drivers/video/built-in.a
CC net/sched/sch_mq.o
CC arch/x86/kernel/cpu/topology_ext.o
CC fs/quota/netlink.o
AR arch/x86/kernel/apic/built-in.a
CC arch/x86/pci/common.o
CC arch/x86/pci/early.o
CC fs/proc/root.o
CC lib/crypto/mpi/mpi-bit.o
CC mm/folio-compat.o
CC ipc/mq_sysctl.o
CC kernel/irq/chip.o
CC arch/x86/mm/tlb.o
CC kernel/rcu/rcu_segcblist.o
CC arch/x86/kernel/cpu/mtrr/centaur.o
CC net/core/stream.o
CC lib/zstd/decompress/zstd_decompress_block.o
CC fs/kernfs/inode.o
CC security/selinux/nlmsgtab.o
CC security/selinux/netif.o
CC crypto/algapi.o
CC net/core/scm.o
AR sound/core/seq/built-in.a
CC sound/core/memory.o
CC fs/devpts/inode.o
CC sound/pci/hda/hda_controller.o
CC kernel/locking/qrwlock.o
AR security/keys/built-in.a
CC io_uring/net.o
CC arch/x86/kernel/cpu/topology_amd.o
CC fs/sysfs/symlink.o
CC fs/proc/base.o
AR ipc/built-in.a
CC fs/netfs/buffered_read.o
CC drivers/pci/host-bridge.o
CC fs/iomap/fiemap.o
CC fs/kernfs/dir.o
CC lib/crypto/arc4.o
CC arch/x86/events/intel/lbr.o
CC sound/pci/hda/hda_proc.o
AR net/bpf/built-in.a
CC block/blk-sysfs.o
CC net/sched/sch_frag.o
CC fs/proc/generic.o
CC lib/crypto/mpi/mpi-cmp.o
CC arch/x86/kernel/cpu/mtrr/legacy.o
AR kernel/locking/built-in.a
CC io_uring/poll.o
CC kernel/power/user.o
CC lib/zstd/zstd_common_module.o
CC fs/proc/array.o
CC arch/x86/pci/bus_numa.o
AR fs/quota/built-in.a
CC sound/core/control.o
AR sound/pci/oxygen/built-in.a
CC kernel/dma/mapping.o
CC kernel/entry/common.o
CC fs/proc/fd.o
CC io_uring/eventfd.o
CC net/sched/sch_api.o
CC kernel/power/poweroff.o
CC net/ethtool/ioctl.o
CC mm/readahead.o
AR arch/x86/kernel/cpu/mtrr/built-in.a
CC kernel/irq/dummychip.o
CC arch/x86/kernel/cpu/common.o
CC net/ethtool/common.o
CC fs/sysfs/mount.o
AR fs/devpts/built-in.a
CC fs/netfs/buffered_write.o
CC arch/x86/mm/cpu_entry_area.o
CC arch/x86/mm/maccess.o
CC drivers/pci/remove.o
CC arch/x86/events/intel/p4.o
CC fs/iomap/seek.o
CC lib/zstd/common/debug.o
CC fs/netfs/direct_read.o
CC kernel/irq/devres.o
CC kernel/irq/autoprobe.o
CC kernel/irq/irqdomain.o
CC lib/crypto/mpi/mpi-sub-ui.o
CC kernel/module/main.o
CC security/selinux/netnode.o
CC sound/core/misc.o
CC crypto/scatterwalk.o
CC lib/crypto/gf128mul.o
CC kernel/dma/direct.o
CC arch/x86/pci/amd_bus.o
CC mm/swap.o
CC net/netfilter/core.o
AR kernel/power/built-in.a
CC arch/x86/kernel/cpu/rdrand.o
CC fs/sysfs/group.o
CC lib/crypto/mpi/mpi-div.o
CC block/blk-flush.o
CC crypto/proc.o
CC fs/netfs/direct_write.o
CC fs/ext4/balloc.o
CC fs/netfs/iterator.o
CC sound/pci/hda/hda_hwdep.o
CC fs/ext4/bitmap.o
CC io_uring/uring_cmd.o
CC arch/x86/mm/pgprot.o
CC fs/kernfs/file.o
AR kernel/sched/built-in.a
CC lib/zstd/common/entropy_common.o
CC arch/x86/kernel/process_32.o
CC lib/crypto/mpi/mpi-mod.o
CC net/netfilter/nf_log.o
CC drivers/pci/pci.o
CC arch/x86/events/intel/p6.o
CC fs/iomap/swapfile.o
CC kernel/entry/syscall_user_dispatch.o
CC sound/core/device.o
AR net/netlink/built-in.a
CC drivers/pci/pci-driver.o
CC fs/kernfs/symlink.o
CC kernel/dma/ops_helpers.o
CC lib/crypto/blake2s.o
CC lib/dim/dim.o
CC net/ipv4/netfilter/nf_defrag_ipv4.o
CC drivers/acpi/acpica/dsargs.o
AR drivers/acpi/pmic/built-in.a
CC net/netfilter/nf_queue.o
AR fs/sysfs/built-in.a
CC crypto/aead.o
CC drivers/pnp/pnpacpi/core.o
CC lib/fonts/fonts.o
CC net/netfilter/nf_sockopt.o
CC crypto/geniv.o
AR arch/x86/pci/built-in.a
CC drivers/acpi/dptf/int340x_thermal.o
CC fs/ext4/block_validity.o
CC drivers/acpi/x86/apple.o
CC arch/x86/mm/pgtable_32.o
CC sound/pci/hda/hda_intel.o
CC lib/crypto/mpi/mpi-mul.o
CC lib/crypto/mpi/mpih-cmp.o
CC lib/zstd/common/error_private.o
CC fs/proc/proc_tty.o
CC kernel/irq/proc.o
CC lib/zstd/common/fse_decompress.o
CC sound/core/info.o
CC crypto/lskcipher.o
CC net/ethtool/netlink.o
CC net/core/gen_stats.o
CC lib/dim/net_dim.o
CC net/netfilter/utils.o
CC security/selinux/netport.o
CC block/blk-settings.o
AR kernel/entry/built-in.a
CC drivers/pci/search.o
CC drivers/acpi/acpica/dscontrol.o
CC arch/x86/kernel/cpu/match.o
AR fs/iomap/built-in.a
CC mm/truncate.o
CC lib/fonts/font_8x16.o
CC arch/x86/events/intel/pt.o
CC arch/x86/events/intel/uncore.o
CC net/ipv4/netfilter/nf_reject_ipv4.o
CC net/xfrm/xfrm_policy.o
CC drivers/acpi/x86/cmos_rtc.o
AR drivers/acpi/dptf/built-in.a
CC fs/netfs/locking.o
CC fs/proc/cmdline.o
AR fs/kernfs/built-in.a
CC lib/crypto/mpi/mpih-div.o
CC block/blk-ioc.o
CC drivers/pnp/pnpacpi/rsparser.o
CC kernel/dma/remap.o
AR drivers/amba/built-in.a
CC lib/zstd/common/zstd_common.o
CC kernel/module/strict_rwx.o
CC net/sched/sch_blackhole.o
CC io_uring/openclose.o
CC drivers/acpi/acpica/dsdebug.o
CC lib/crypto/blake2s-generic.o
CC arch/x86/events/rapl.o
CC fs/jbd2/transaction.o
AR lib/fonts/built-in.a
CC arch/x86/mm/iomap_32.o
CC fs/jbd2/commit.o
CC fs/ext4/dir.o
CC arch/x86/kernel/cpu/bugs.o
AR lib/zstd/built-in.a
CC net/unix/af_unix.o
CC kernel/time/time.o
CC kernel/irq/migration.o
CC kernel/futex/core.o
CC kernel/time/timer.o
CC kernel/time/hrtimer.o
CC lib/dim/rdma_dim.o
AR drivers/clk/actions/built-in.a
AR drivers/clk/analogbits/built-in.a
AR drivers/clk/bcm/built-in.a
CC arch/x86/mm/hugetlbpage.o
AR drivers/clk/imgtec/built-in.a
AR drivers/clk/imx/built-in.a
AR drivers/clk/ingenic/built-in.a
CC fs/proc/consoles.o
AR drivers/clk/mediatek/built-in.a
CC lib/crypto/sha1.o
AR drivers/clk/microchip/built-in.a
CC drivers/acpi/acpica/dsfield.o
AR drivers/clk/mstar/built-in.a
CC sound/core/isadma.o
AR drivers/clk/mvebu/built-in.a
AR drivers/clk/ralink/built-in.a
AR drivers/clk/renesas/built-in.a
AR drivers/clk/socfpga/built-in.a
CC net/xfrm/xfrm_state.o
AR drivers/clk/sophgo/built-in.a
CC crypto/skcipher.o
CC drivers/acpi/x86/lpss.o
AR drivers/clk/sprd/built-in.a
CC net/netfilter/nfnetlink.o
CC fs/ramfs/inode.o
AR drivers/clk/starfive/built-in.a
AR drivers/clk/sunxi-ng/built-in.a
CC fs/hugetlbfs/inode.o
AR drivers/clk/ti/built-in.a
AR drivers/clk/versatile/built-in.a
AR drivers/clk/xilinx/built-in.a
AR drivers/clk/built-in.a
CC net/core/gen_estimator.o
CC fs/fat/cache.o
AR kernel/dma/built-in.a
CC fs/isofs/namei.o
CC fs/fat/dir.o
CC kernel/irq/cpuhotplug.o
CC kernel/module/kmod.o
CC net/unix/garbage.o
CC sound/core/vmaster.o
AR kernel/rcu/built-in.a
CC security/selinux/status.o
AR lib/dim/built-in.a
CC net/core/net_namespace.o
CC mm/vmscan.o
CC block/blk-map.o
AR sound/pci/pcxhr/built-in.a
CC block/blk-merge.o
CC lib/crypto/mpi/mpih-mul.o
CC fs/netfs/main.o
AR sound/firewire/built-in.a
CC net/ethtool/bitset.o
CC crypto/seqiv.o
CC arch/x86/mm/dump_pagetables.o
CC fs/proc/cpuinfo.o
CC drivers/acpi/acpica/dsinit.o
AR drivers/pnp/pnpacpi/built-in.a
CC drivers/pnp/core.o
CC net/sched/cls_api.o
AR sound/pci/hda/built-in.a
AR sound/pci/riptide/built-in.a
AR sound/sparc/built-in.a
AR sound/pci/rme9652/built-in.a
CC net/ethtool/strset.o
AR sound/pci/trident/built-in.a
AR sound/pci/ymfpci/built-in.a
AR sound/pci/vx222/built-in.a
CC io_uring/sqpoll.o
AR sound/pci/built-in.a
CC kernel/module/tree_lookup.o
CC arch/x86/events/intel/uncore_nhmex.o
CC drivers/dma/dw/core.o
CC kernel/futex/syscalls.o
CC drivers/dma/dw/dw.o
CC net/ipv4/netfilter/ip_tables.o
CC lib/crypto/mpi/mpi-pow.o
CC block/blk-timeout.o
CC fs/ext4/ext4_jbd2.o
CC fs/ramfs/file-mmu.o
CC sound/core/ctljack.o
CC drivers/acpi/acpica/dsmethod.o
CC drivers/acpi/x86/s2idle.o
CC fs/isofs/inode.o
CC kernel/irq/pm.o
CC fs/nfs/client.o
CC fs/netfs/misc.o
CC drivers/acpi/tables.o
CC fs/proc/devices.o
CC fs/netfs/objects.o
CC fs/ext4/extents.o
CC arch/x86/events/intel/uncore_snb.o
CC drivers/pnp/card.o
CC drivers/dma/hsu/hsu.o
CC arch/x86/mm/highmem_32.o
CC kernel/module/kallsyms.o
CC fs/jbd2/recovery.o
CC crypto/echainiv.o
CC sound/core/jack.o
CC net/ipv4/netfilter/iptable_filter.o
CC net/netfilter/nfnetlink_log.o
CC lib/argv_split.o
CC arch/x86/kernel/cpu/aperfmperf.o
CC drivers/acpi/acpica/dsmthdat.o
CC mm/shrinker.o
CC kernel/irq/msi.o
CC drivers/pci/rom.o
CC security/selinux/ss/ebitmap.o
CC kernel/futex/pi.o
AR fs/hugetlbfs/built-in.a
CC kernel/futex/requeue.o
CC lib/crypto/mpi/mpiutil.o
AR fs/ramfs/built-in.a
CC net/xfrm/xfrm_hash.o
AR drivers/soc/apple/built-in.a
AR drivers/soc/aspeed/built-in.a
AR drivers/soc/bcm/built-in.a
CC net/ipv6/netfilter/ip6_tables.o
AR drivers/soc/fsl/built-in.a
AR drivers/soc/fujitsu/built-in.a
CC net/ipv6/af_inet6.o
AR drivers/soc/hisilicon/built-in.a
CC fs/fat/fatent.o
AR drivers/soc/imx/built-in.a
CC net/ipv6/anycast.o
CC fs/proc/interrupts.o
AR drivers/soc/ixp4xx/built-in.a
CC net/ethtool/linkinfo.o
AR drivers/soc/loongson/built-in.a
CC net/core/secure_seq.o
AR drivers/soc/mediatek/built-in.a
AR drivers/soc/microchip/built-in.a
AR drivers/soc/nuvoton/built-in.a
CC drivers/acpi/acpica/dsobject.o
AR drivers/soc/pxa/built-in.a
AR drivers/soc/amlogic/built-in.a
CC drivers/dma/dw/idma32.o
AR drivers/soc/qcom/built-in.a
AR drivers/soc/renesas/built-in.a
CC lib/crypto/sha256.o
CC kernel/time/timekeeping.o
AR drivers/soc/rockchip/built-in.a
AR drivers/soc/sunxi/built-in.a
CC drivers/acpi/x86/utils.o
AR drivers/soc/ti/built-in.a
AR drivers/soc/versatile/built-in.a
AR drivers/soc/xilinx/built-in.a
AR arch/x86/mm/built-in.a
AR drivers/soc/built-in.a
CC net/ipv4/netfilter/iptable_mangle.o
CC crypto/ahash.o
CC drivers/pnp/driver.o
CC block/blk-lib.o
CC crypto/shash.o
CC net/ipv4/netfilter/ipt_REJECT.o
CC sound/core/hwdep.o
AR drivers/dma/hsu/built-in.a
CC fs/ext4/extents_status.o
CC kernel/module/procfs.o
CC drivers/pci/setup-res.o
CC arch/x86/kernel/cpu/cpuid-deps.o
AR sound/spi/built-in.a
CC lib/bug.o
CC fs/exportfs/expfs.o
CC lib/buildid.o
CC net/unix/sysctl_net_unix.o
CC mm/shmem.o
CC fs/isofs/dir.o
CC fs/netfs/read_collect.o
AR lib/crypto/mpi/built-in.a
CC kernel/futex/waitwake.o
CC arch/x86/events/intel/uncore_snbep.o
CC drivers/virtio/virtio.o
CC drivers/acpi/acpica/dsopcode.o
CC fs/proc/loadavg.o
CC io_uring/xattr.o
CC fs/jbd2/checkpoint.o
CC io_uring/nop.o
CC drivers/acpi/acpica/dspkginit.o
CC drivers/acpi/osi.o
CC drivers/acpi/x86/blacklist.o
AR lib/crypto/built-in.a
CC net/ipv6/ip6_output.o
CC arch/x86/kernel/cpu/umwait.o
CC drivers/pnp/resource.o
CC drivers/dma/dw/acpi.o
CC kernel/irq/affinity.o
CC fs/nfs/dir.o
CC security/selinux/ss/hashtab.o
CC kernel/cgroup/cgroup.o
CC kernel/module/sysfs.o
CC net/ethtool/linkmodes.o
CC block/blk-mq.o
CC sound/core/timer.o
CC net/ipv6/netfilter/ip6table_filter.o
CC net/netfilter/nf_conntrack_core.o
CC drivers/acpi/acpica/dsutils.o
CC drivers/tty/vt/vt_ioctl.o
CC fs/proc/meminfo.o
AR fs/exportfs/built-in.a
CC fs/netfs/read_pgpriv2.o
CC drivers/pci/irq.o
AR drivers/acpi/x86/built-in.a
CC drivers/tty/hvc/hvc_console.o
CC fs/fat/file.o
CC lib/clz_tab.o
CC fs/isofs/util.o
MKCAP arch/x86/kernel/cpu/capflags.c
CC net/core/flow_dissector.o
CC net/netfilter/nf_conntrack_standalone.o
CC lib/cmdline.o
CC net/xfrm/xfrm_input.o
CC net/sched/act_api.o
CC crypto/akcipher.o
CC net/ethtool/rss.o
AR kernel/futex/built-in.a
CC kernel/irq/matrix.o
CC arch/x86/kernel/cpu/powerflags.o
CC drivers/virtio/virtio_ring.o
CC [M] net/ipv4/netfilter/iptable_nat.o
CC fs/jbd2/revoke.o
CC security/selinux/ss/symtab.o
CC lib/cpumask.o
AR net/unix/built-in.a
CC drivers/acpi/acpica/dswexec.o
CC net/ipv4/route.o
CC fs/ext4/file.o
CC io_uring/fs.o
CC arch/x86/events/intel/uncore_discovery.o
CC drivers/pci/vpd.o
AR drivers/dma/dw/built-in.a
CC fs/nfs/file.o
AR drivers/dma/idxd/built-in.a
CC kernel/trace/trace_clock.o
AR drivers/dma/amd/built-in.a
AR drivers/dma/mediatek/built-in.a
AR drivers/dma/qcom/built-in.a
AR drivers/dma/stm32/built-in.a
CC security/selinux/ss/sidtab.o
CC kernel/bpf/core.o
AR drivers/dma/ti/built-in.a
AR drivers/dma/xilinx/built-in.a
CC drivers/dma/dmaengine.o
CC kernel/time/ntp.o
CC drivers/char/hw_random/core.o
CC drivers/pnp/manager.o
AR drivers/iommu/amd/built-in.a
AR kernel/module/built-in.a
CC net/xfrm/xfrm_output.o
AR drivers/iommu/intel/built-in.a
AR drivers/iommu/arm/arm-smmu/built-in.a
AR drivers/iommu/arm/arm-smmu-v3/built-in.a
AR drivers/iommu/arm/built-in.a
AR drivers/iommu/iommufd/built-in.a
CC drivers/iommu/iommu.o
CC kernel/time/clocksource.o
CC fs/isofs/rock.o
CC fs/proc/stat.o
CC drivers/acpi/acpica/dswload.o
CC lib/ctype.o
CC drivers/char/hw_random/intel-rng.o
CC kernel/trace/ring_buffer.o
CC lib/dec_and_lock.o
CC arch/x86/kernel/cpu/topology.o
CC fs/netfs/read_retry.o
AR drivers/tty/hvc/built-in.a
CC crypto/sig.o
CC drivers/acpi/osl.o
CC drivers/tty/vt/vc_screen.o
CC lib/decompress.o
CC fs/fat/inode.o
CC net/ipv6/netfilter/ip6table_mangle.o
CC lib/decompress_bunzip2.o
CC fs/jbd2/journal.o
CC drivers/acpi/acpica/dswload2.o
CC net/ethtool/linkstate.o
CC block/blk-mq-tag.o
CC drivers/pnp/support.o
CC drivers/pci/setup-bus.o
CC io_uring/splice.o
AR net/ipv4/netfilter/built-in.a
AR drivers/gpu/host1x/built-in.a
CC drivers/iommu/iommu-traces.o
CC drivers/dma/virt-dma.o
CC fs/proc/uptime.o
CC fs/fat/misc.o
CC drivers/tty/serial/8250/8250_core.o
CC sound/core/hrtimer.o
AR kernel/irq/built-in.a
CC net/ipv6/netfilter/nf_defrag_ipv6_hooks.o
AR drivers/gpu/drm/tests/built-in.a
AR drivers/gpu/drm/arm/built-in.a
CC drivers/char/hw_random/amd-rng.o
AR drivers/gpu/drm/clients/built-in.a
CC drivers/gpu/drm/display/drm_display_helper_mod.o
CC drivers/gpu/drm/ttm/ttm_tt.o
CC fs/isofs/export.o
CC arch/x86/events/intel/cstate.o
CC drivers/acpi/acpica/dswscope.o
CC kernel/time/jiffies.o
CC net/ethtool/debug.o
CC security/selinux/ss/avtab.o
CC net/netfilter/nf_conntrack_expect.o
CC net/netfilter/nf_conntrack_helper.o
CC drivers/pnp/interface.o
CC mm/util.o
CC crypto/kpp.o
CC drivers/gpu/drm/display/drm_dp_dual_mode_helper.o
CC lib/decompress_inflate.o
CC sound/core/pcm.o
CC drivers/virtio/virtio_anchor.o
CC drivers/tty/vt/selection.o
CC drivers/acpi/acpica/dswstate.o
CC fs/proc/util.o
CC drivers/dma/acpi-dma.o
CC kernel/time/timer_list.o
CC fs/netfs/write_collect.o
CC net/sched/sch_fifo.o
CC net/xfrm/xfrm_sysctl.o
CC net/core/sysctl_net_core.o
CC net/ipv6/ip6_input.o
CC io_uring/sync.o
AR drivers/gpu/vga/built-in.a
CC fs/isofs/joliet.o
CC fs/isofs/compress.o
CC drivers/char/hw_random/geode-rng.o
CC fs/netfs/write_issue.o
CC drivers/acpi/acpica/evevent.o
CC drivers/gpu/drm/i915/i915_config.o
CC net/ipv4/inetpeer.o
CC drivers/pci/vc.o
CC drivers/tty/serial/8250/8250_platform.o
CC drivers/gpu/drm/ttm/ttm_bo.o
CC fs/lockd/clntlock.o
CC lib/decompress_unlz4.o
CC fs/lockd/clntproc.o
CC drivers/pnp/quirks.o
AR arch/x86/events/intel/built-in.a
CC arch/x86/events/msr.o
CC fs/fat/nfs.o
CC drivers/virtio/virtio_pci_modern_dev.o
CC fs/proc/version.o
CC fs/ext4/fsmap.o
CC drivers/iommu/iommu-sysfs.o
CC drivers/gpu/drm/i915/i915_driver.o
CC net/ethtool/wol.o
ASN.1 crypto/rsapubkey.asn1.[ch]
ASN.1 crypto/rsaprivkey.asn1.[ch]
CC drivers/acpi/acpica/evgpe.o
CC crypto/rsa.o
CC drivers/virtio/virtio_pci_legacy_dev.o
CC net/ipv6/netfilter/nf_conntrack_reasm.o
CC kernel/time/timeconv.o
CC drivers/gpu/drm/display/drm_dp_helper.o
CC drivers/tty/vt/keyboard.o
AR drivers/dma/built-in.a
CC sound/core/pcm_native.o
CC drivers/tty/serial/8250/8250_pnp.o
CC mm/mmzone.o
CC net/ipv4/protocol.o
CC drivers/char/hw_random/via-rng.o
CC fs/lockd/clntxdr.o
CC security/selinux/ss/policydb.o
CC lib/decompress_unlzma.o
CC net/ipv6/addrconf.o
CC fs/proc/softirqs.o
CC io_uring/msg_ring.o
CC drivers/pci/mmap.o
CC fs/nfs/getroot.o
CC kernel/time/timecounter.o
AR fs/isofs/built-in.a
CC drivers/acpi/acpica/evgpeblk.o
CC net/netfilter/nf_conntrack_proto.o
CC net/ethtool/features.o
AR drivers/gpu/drm/renesas/rcar-du/built-in.a
AR drivers/gpu/drm/renesas/rz-du/built-in.a
AR drivers/gpu/drm/renesas/built-in.a
CC drivers/pnp/system.o
CC net/xfrm/xfrm_replay.o
CC arch/x86/kernel/cpu/proc.o
CC net/sched/cls_cgroup.o
CC kernel/time/alarmtimer.o
CC block/blk-stat.o
AR kernel/bpf/built-in.a
CC drivers/iommu/dma-iommu.o
AR sound/parisc/built-in.a
CC crypto/rsa_helper.o
CC net/ipv4/ip_input.o
CC fs/fat/namei_vfat.o
AR arch/x86/events/built-in.a
AR drivers/char/hw_random/built-in.a
CC arch/x86/kernel/cpu/feat_ctl.o
CC drivers/acpi/acpica/evgpeinit.o
CC drivers/char/agp/backend.o
CC drivers/char/mem.o
CC drivers/virtio/virtio_pci_modern.o
CC crypto/rsa-pkcs1pad.o
CC drivers/tty/serial/serial_core.o
CC mm/vmstat.o
CC net/core/dev.o
AR fs/netfs/built-in.a
CC kernel/events/core.o
CC io_uring/advise.o
CC drivers/gpu/drm/ttm/ttm_bo_util.o
CC drivers/tty/serial/8250/8250_rsa.o
CC security/selinux/ss/services.o
CC arch/x86/kernel/cpu/intel.o
CC kernel/trace/trace.o
CC crypto/acompress.o
AR fs/jbd2/built-in.a
CC fs/fat/namei_msdos.o
CC drivers/acpi/acpica/evgpeutil.o
CC fs/proc/namespaces.o
AR drivers/pnp/built-in.a
CC drivers/acpi/acpica/evglock.o
CC net/xfrm/xfrm_device.o
CC arch/x86/kernel/signal.o
CC lib/decompress_unlzo.o
CC drivers/pci/devres.o
CC fs/nfs/inode.o
CC net/ipv6/netfilter/nf_reject_ipv6.o
CC drivers/virtio/virtio_pci_common.o
CC block/blk-mq-sysfs.o
CC fs/lockd/host.o
CC drivers/virtio/virtio_pci_legacy.o
CC drivers/char/agp/generic.o
CC fs/lockd/svc.o
CC block/blk-mq-cpumap.o
CC kernel/cgroup/rstat.o
CC drivers/tty/vt/vt.o
CC drivers/acpi/acpica/evhandler.o
CC drivers/acpi/acpica/evmisc.o
CC fs/lockd/svclock.o
CC drivers/gpu/drm/ttm/ttm_bo_vm.o
CC net/ethtool/privflags.o
CC drivers/gpu/drm/i915/i915_drm_client.o
CC drivers/tty/serial/8250/8250_port.o
CC kernel/time/posix-timers.o
CC net/sched/ematch.o
CC io_uring/epoll.o
CC block/blk-mq-sched.o
CC net/packet/af_packet.o
CC lib/decompress_unxz.o
CC drivers/virtio/virtio_pci_admin_legacy_io.o
CC arch/x86/kernel/signal_32.o
CC fs/proc/self.o
CC crypto/scompress.o
CC drivers/acpi/acpica/evregion.o
CC net/netfilter/nf_conntrack_proto_generic.o
CC net/ipv4/ip_fragment.o
CC drivers/gpu/drm/display/drm_dp_mst_topology.o
CC net/ipv4/ip_forward.o
AR fs/fat/built-in.a
CC drivers/pci/proc.o
CC net/xfrm/xfrm_nat_keepalive.o
CC drivers/iommu/iova.o
CC io_uring/statx.o
CC fs/ext4/fsync.o
CC arch/x86/kernel/cpu/tsx.o
CC kernel/fork.o
CC net/ipv6/netfilter/ip6t_ipv6header.o
CC kernel/events/ring_buffer.o
CC kernel/cgroup/namespace.o
AR sound/pcmcia/vx/built-in.a
AR sound/pcmcia/pdaudiocf/built-in.a
AR sound/pcmcia/built-in.a
COPY drivers/tty/vt/defkeymap.c
CC mm/backing-dev.o
CC sound/core/pcm_lib.o
CC fs/nfs/super.o
CC lib/decompress_unzstd.o
CC drivers/gpu/drm/ttm/ttm_module.o
CC drivers/acpi/acpica/evrgnini.o
CC fs/proc/thread_self.o
CC drivers/virtio/virtio_input.o
CC drivers/char/agp/isoch.o
CC arch/x86/kernel/cpu/intel_epb.o
CC sound/core/pcm_misc.o
CC lib/dump_stack.o
CC net/ethtool/rings.o
CC drivers/char/random.o
CC net/ipv4/ip_options.o
CC net/core/dev_addr_lists.o
CC fs/nls/nls_base.o
CC arch/x86/kernel/cpu/amd.o
AR net/sched/built-in.a
CC drivers/gpu/drm/display/drm_dsc_helper.o
CC block/ioctl.o
CC crypto/algboss.o
CC drivers/acpi/acpica/evsci.o
CC drivers/gpu/drm/i915/i915_getparam.o
CC fs/lockd/svcshare.o
CC kernel/time/posix-cpu-timers.o
CC block/genhd.o
AR drivers/tty/ipwireless/built-in.a
CC block/ioprio.o
CC io_uring/timeout.o
CC drivers/gpu/drm/ttm/ttm_execbuf_util.o
AR drivers/iommu/built-in.a
CC drivers/gpu/drm/ttm/ttm_range_manager.o
CC kernel/cgroup/cgroup-v1.o
CC drivers/pci/pci-sysfs.o
CC block/badblocks.o
CC fs/proc/proc_sysctl.o
CC block/blk-rq-qos.o
CC net/netfilter/nf_conntrack_proto_tcp.o
CC fs/nls/nls_cp437.o
CC drivers/acpi/acpica/evxface.o
CC net/xfrm/xfrm_algo.o
CC lib/earlycpio.o
CC drivers/virtio/virtio_dma_buf.o
AR fs/unicode/built-in.a
CC fs/proc/proc_net.o
CC fs/nfs/io.o
CC drivers/char/agp/amd64-agp.o
CC drivers/char/misc.o
CC net/ipv6/netfilter/ip6t_REJECT.o
CC kernel/cgroup/freezer.o
CC lib/extable.o
CC drivers/tty/serial/8250/8250_dma.o
CC mm/mm_init.o
CC security/selinux/ss/conditional.o
CC kernel/cgroup/legacy_freezer.o
CC drivers/gpu/drm/ttm/ttm_resource.o
CC fs/nls/nls_ascii.o
CC net/ethtool/channels.o
CC drivers/acpi/acpica/evxfevnt.o
CC crypto/testmgr.o
CC sound/core/pcm_memory.o
CC kernel/trace/trace_output.o
CC drivers/acpi/acpica/evxfgpe.o
CC kernel/cgroup/pids.o
CC arch/x86/kernel/cpu/hygon.o
CC lib/flex_proportions.o
CC fs/proc/kcore.o
CC drivers/gpu/drm/i915/i915_ioctl.o
AR drivers/gpu/drm/omapdrm/built-in.a
CC drivers/tty/serial/serial_base_bus.o
CC net/ethtool/coalesce.o
CC kernel/time/posix-clock.o
CC fs/lockd/svcproc.o
AR drivers/virtio/built-in.a
CC drivers/tty/vt/consolemap.o
CC drivers/gpu/drm/display/drm_hdcp_helper.o
CC fs/ext4/hash.o
CC fs/nls/nls_iso8859-1.o
CC net/ipv4/ip_output.o
CC drivers/gpu/drm/display/drm_hdmi_helper.o
CC io_uring/fdinfo.o
CC drivers/gpu/drm/display/drm_scdc_helper.o
CC sound/core/memalloc.o
CC block/disk-events.o
CC drivers/char/agp/intel-agp.o
CC kernel/exec_domain.o
CC drivers/tty/tty_io.o
CC lib/idr.o
CC drivers/pci/slot.o
CC drivers/acpi/acpica/evxfregn.o
CC lib/irq_regs.o
CC arch/x86/kernel/cpu/centaur.o
CC drivers/tty/serial/8250/8250_dwlib.o
CC crypto/cmac.o
CC fs/nls/nls_utf8.o
CC kernel/events/callchain.o
CC drivers/connector/cn_queue.o
CC kernel/cgroup/rdma.o
CC net/xfrm/xfrm_user.o
CC mm/percpu.o
CC fs/nfs/direct.o
CC security/selinux/ss/mls.o
AR net/ipv6/netfilter/built-in.a
CC drivers/connector/connector.o
CC net/ipv6/addrlabel.o
CC drivers/gpu/drm/ttm/ttm_pool.o
CC kernel/trace/trace_seq.o
CC drivers/acpi/utils.o
CC drivers/acpi/acpica/exconcat.o
CC kernel/time/itimer.o
CC fs/autofs/init.o
CC fs/9p/vfs_super.o
CC fs/autofs/inode.o
CC drivers/pci/pci-acpi.o
AR fs/nls/built-in.a
CC fs/proc/vmcore.o
CC crypto/hmac.o
CC kernel/trace/trace_stat.o
CC arch/x86/kernel/cpu/transmeta.o
CC drivers/gpu/drm/i915/i915_irq.o
CC io_uring/cancel.o
CC drivers/connector/cn_proc.o
CC net/netfilter/nf_conntrack_proto_udp.o
CC lib/is_single_threaded.o
CC fs/ext4/ialloc.o
HOSTCC drivers/tty/vt/conmakehash
CC net/core/dst.o
CC fs/proc/kmsg.o
CC arch/x86/kernel/cpu/zhaoxin.o
AR net/packet/built-in.a
AR fs/hostfs/built-in.a
AR sound/mips/built-in.a
AR sound/soc/built-in.a
CC net/netfilter/nf_conntrack_proto_icmp.o
CC io_uring/waitid.o
CC block/blk-ia-ranges.o
CC drivers/char/agp/intel-gtt.o
CC kernel/time/clockevents.o
CC sound/core/pcm_timer.o
CC kernel/cgroup/cpuset.o
CC drivers/acpi/acpica/exconfig.o
AR drivers/gpu/drm/display/built-in.a
CC drivers/tty/vt/defkeymap.o
CC net/ethtool/pause.o
CONMK drivers/tty/vt/consolemap_deftbl.c
CC kernel/cgroup/misc.o
CC drivers/tty/serial/8250/8250_pcilib.o
CC fs/ext4/indirect.o
CC lib/klist.o
CC fs/lockd/svcsubs.o
CC drivers/tty/n_tty.o
CC fs/autofs/root.o
CC block/early-lookup.o
CC drivers/tty/vt/consolemap_deftbl.o
AR drivers/tty/vt/built-in.a
CC fs/ext4/inline.o
CC fs/proc/page.o
AR net/dsa/built-in.a
CC drivers/tty/serial/serial_ctrl.o
CC fs/nfs/pagelist.o
CC drivers/gpu/drm/i915/i915_mitigations.o
CC arch/x86/kernel/cpu/vortex.o
CC fs/9p/vfs_inode.o
CC drivers/acpi/acpica/exconvrt.o
CC lib/kobject.o
CC crypto/crypto_null.o
CC drivers/tty/serial/8250/8250_early.o
CC drivers/gpu/drm/ttm/ttm_device.o
AR drivers/gpu/drm/tilcdc/built-in.a
CC drivers/base/power/sysfs.o
CC kernel/panic.o
CC kernel/trace/trace_printk.o
CC drivers/gpu/drm/ttm/ttm_sys_manager.o
CC crypto/md5.o
CC kernel/time/tick-common.o
CC sound/core/seq_device.o
CC security/selinux/ss/context.o
CC drivers/gpu/drm/ttm/ttm_agp_backend.o
CC net/ipv6/route.o
CC fs/autofs/symlink.o
CC arch/x86/kernel/cpu/perfctr-watchdog.o
CC arch/x86/kernel/cpu/vmware.o
CC net/sunrpc/auth_gss/auth_gss.o
AR net/wireless/tests/built-in.a
CC drivers/pci/iomap.o
CC net/wireless/core.o
CC io_uring/register.o
AR drivers/connector/built-in.a
CC drivers/acpi/acpica/excreate.o
AR net/mac80211/tests/built-in.a
CC net/mac80211/main.o
AR drivers/char/agp/built-in.a
CC block/bounce.o
CC drivers/char/virtio_console.o
CC fs/ext4/inode.o
CC kernel/cgroup/debug.o
CC fs/9p/vfs_inode_dotl.o
AR fs/proc/built-in.a
CC net/ethtool/eee.o
AR sound/atmel/built-in.a
CC net/ipv6/ip6_fib.o
CC lib/kobject_uevent.o
CC drivers/block/loop.o
CC net/ipv4/ip_sockglue.o
CC net/netfilter/nf_conntrack_extend.o
CC lib/logic_pio.o
CC drivers/base/power/generic_ops.o
CC security/selinux/netlabel.o
CC drivers/tty/serial/8250/8250_exar.o
CC net/ipv6/ipv6_sockglue.o
CC crypto/sha256_generic.o
AR sound/core/built-in.a
CC fs/9p/vfs_addr.o
CC sound/hda/hda_bus_type.o
CC drivers/acpi/acpica/exdebug.o
CC drivers/gpu/drm/i915/i915_module.o
CC fs/lockd/mon.o
CC drivers/acpi/reboot.o
AR drivers/gpu/drm/ttm/built-in.a
CC fs/debugfs/inode.o
CC kernel/trace/pid_list.o
CC fs/autofs/waitq.o
CC drivers/block/virtio_blk.o
CC arch/x86/kernel/cpu/hypervisor.o
CC drivers/pci/quirks.o
CC fs/debugfs/file.o
CC drivers/base/power/common.o
CC drivers/tty/serial/8250/8250_lpss.o
CC drivers/acpi/acpica/exdump.o
CC drivers/acpi/nvs.o
CC arch/x86/kernel/cpu/mshyperv.o
CC drivers/char/hpet.o
CC mm/slab_common.o
CC kernel/time/tick-broadcast.o
CC crypto/sha512_generic.o
CC fs/nfs/read.o
CC io_uring/truncate.o
AR net/xfrm/built-in.a
CC fs/9p/vfs_file.o
CC fs/lockd/trace.o
CC sound/hda/hdac_bus.o
CC drivers/acpi/acpica/exfield.o
CC net/ethtool/tsinfo.o
CC block/bsg.o
CC arch/x86/kernel/cpu/debugfs.o
AR drivers/misc/eeprom/built-in.a
AR drivers/misc/cb710/built-in.a
AR drivers/misc/ti-st/built-in.a
AR drivers/misc/lis3lv02d/built-in.a
AR kernel/cgroup/built-in.a
AR drivers/misc/cardreader/built-in.a
CC net/wireless/sysfs.o
CC net/ipv4/inet_hashtables.o
AR drivers/misc/keba/built-in.a
AR drivers/misc/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_drv.o
CC drivers/base/power/qos.o
CC lib/maple_tree.o
CC fs/ext4/ioctl.o
CC net/netfilter/nf_conntrack_acct.o
CC fs/autofs/expire.o
CC kernel/trace/trace_sched_switch.o
CC drivers/gpu/drm/i915/i915_params.o
CC drivers/tty/serial/8250/8250_mid.o
CC net/netfilter/nf_conntrack_seqadj.o
CC drivers/acpi/wakeup.o
AR security/selinux/built-in.a
CC drivers/acpi/acpica/exfldio.o
CC fs/tracefs/inode.o
AR security/built-in.a
CC [M] fs/efivarfs/inode.o
CC fs/open.o
CC kernel/time/tick-broadcast-hrtimer.o
CC mm/compaction.o
CC net/wireless/radiotap.o
CC net/ethtool/cabletest.o
CC kernel/events/hw_breakpoint.o
CC crypto/sha3_generic.o
CC drivers/gpu/drm/i915/i915_pci.o
AR drivers/block/built-in.a
CC drivers/acpi/sleep.o
CC drivers/char/nvram.o
CC drivers/tty/serial/serial_port.o
CC arch/x86/kernel/cpu/capflags.o
AR arch/x86/kernel/cpu/built-in.a
CC fs/9p/vfs_dir.o
CC arch/x86/kernel/traps.o
AR fs/debugfs/built-in.a
CC io_uring/memmap.o
CC sound/hda/hdac_device.o
CC net/netlabel/netlabel_user.o
CC io_uring/io-wq.o
CC block/blk-cgroup.o
CC kernel/time/tick-oneshot.o
CC drivers/gpu/drm/virtio/virtgpu_kms.o
CC kernel/cpu.o
CC net/netlabel/netlabel_kapi.o
CC net/core/netevent.o
CC drivers/acpi/acpica/exmisc.o
CC net/sunrpc/auth_gss/gss_generic_token.o
CC fs/9p/vfs_dentry.o
CC fs/lockd/xdr.o
CC kernel/events/uprobes.o
CC [M] fs/efivarfs/file.o
CC [M] fs/efivarfs/super.o
CC crypto/ecb.o
CC fs/autofs/dev-ioctl.o
CC drivers/tty/serial/8250/8250_pci.o
CC net/mac80211/status.o
CC fs/tracefs/event_inode.o
CC kernel/time/tick-sched.o
CC net/sunrpc/auth_gss/gss_mech_switch.o
CC drivers/acpi/acpica/exmutex.o
CC kernel/trace/trace_nop.o
CC net/sunrpc/clnt.o
CC net/wireless/util.o
CC drivers/base/power/runtime.o
AR drivers/char/built-in.a
CC drivers/gpu/drm/i915/i915_scatterlist.o
CC fs/ext4/mballoc.o
CC drivers/pci/pci-label.o
CC crypto/cbc.o
CC [M] fs/efivarfs/vars.o
CC drivers/acpi/device_sysfs.o
CC net/ethtool/tunnels.o
CC net/ethtool/fec.o
CC fs/9p/v9fs.o
CC lib/memcat_p.o
CC net/netfilter/nf_conntrack_proto_icmpv6.o
CC arch/x86/kernel/idt.o
AR drivers/mfd/built-in.a
CC net/netfilter/nf_conntrack_netlink.o
CC drivers/gpu/drm/virtio/virtgpu_gem.o
CC kernel/trace/blktrace.o
CC sound/hda/hdac_sysfs.o
CC drivers/acpi/acpica/exnames.o
CC drivers/pci/vgaarb.o
CC net/core/neighbour.o
CC fs/lockd/clnt4xdr.o
AR drivers/gpu/drm/imx/built-in.a
CC drivers/acpi/acpica/exoparg1.o
CC net/ethtool/eeprom.o
AR fs/autofs/built-in.a
CC fs/nfs/symlink.o
CC fs/9p/fid.o
CC drivers/tty/serial/8250/8250_pericom.o
CC crypto/ctr.o
CC net/ipv4/inet_timewait_sock.o
CC net/mac80211/driver-ops.o
CC fs/nfs/unlink.o
CC net/sunrpc/auth_gss/svcauth_gss.o
CC io_uring/futex.o
CC drivers/gpu/drm/i915/i915_switcheroo.o
CC net/netfilter/nf_conntrack_ftp.o
CC net/core/rtnetlink.o
CC block/blk-ioprio.o
CC net/netlabel/netlabel_domainhash.o
AR fs/tracefs/built-in.a
CC fs/nfs/write.o
CC net/rfkill/core.o
CC net/9p/mod.o
LD [M] fs/efivarfs/efivarfs.o
AR drivers/nfc/built-in.a
CC net/ipv6/ndisc.o
CC block/blk-iolatency.o
CC kernel/time/timer_migration.o
CC drivers/acpi/acpica/exoparg2.o
CC arch/x86/kernel/irq.o
CC drivers/base/power/wakeirq.o
CC crypto/gcm.o
CC drivers/gpu/drm/virtio/virtgpu_vram.o
CC kernel/exit.o
CC sound/hda/hdac_regmap.o
CC drivers/acpi/device_pm.o
CC net/mac80211/sta_info.o
AR drivers/tty/serial/8250/built-in.a
CC drivers/tty/serial/earlycon.o
CC fs/9p/xattr.o
AR kernel/events/built-in.a
CC mm/show_mem.o
CC net/rfkill/input.o
CC io_uring/napi.o
CC net/ipv4/inet_connection_sock.o
CC net/9p/client.o
AR drivers/pci/built-in.a
CC kernel/time/vsyscall.o
CC drivers/acpi/acpica/exoparg3.o
CC fs/lockd/xdr4.o
CC drivers/base/power/main.o
CC fs/lockd/svc4proc.o
CC net/ethtool/stats.o
CC fs/ext4/migrate.o
CC net/dns_resolver/dns_key.o
AR drivers/gpu/drm/i2c/built-in.a
CC mm/interval_tree.o
CC fs/ext4/mmp.o
CC mm/list_lru.o
CC net/ipv4/tcp.o
CC drivers/gpu/drm/i915/i915_sysfs.o
CC drivers/gpu/drm/i915/i915_utils.o
CC sound/hda/hdac_controller.o
CC drivers/gpu/drm/virtio/virtgpu_display.o
CC drivers/acpi/acpica/exoparg6.o
CC arch/x86/kernel/irq_32.o
CC kernel/trace/trace_events.o
AR net/rfkill/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_vq.o
AR fs/9p/built-in.a
CC sound/hda/hdac_stream.o
CC arch/x86/kernel/dumpstack_32.o
AR drivers/tty/serial/built-in.a
CC drivers/tty/tty_ioctl.o
CC net/wireless/reg.o
CC crypto/ccm.o
CC net/netfilter/nf_conntrack_irc.o
CC net/dns_resolver/dns_query.o
CC block/blk-iocost.o
CC net/netlabel/netlabel_addrlist.o
CC drivers/acpi/acpica/exprep.o
AR drivers/dax/hmem/built-in.a
AR drivers/dax/built-in.a
CC net/mac80211/wep.o
CC net/core/utils.o
CC drivers/base/firmware_loader/builtin/main.o
CC mm/workingset.o
CC drivers/base/firmware_loader/main.o
CC fs/lockd/procfs.o
CC mm/debug.o
CC net/ipv6/udp.o
CC crypto/aes_generic.o
CC net/ethtool/phc_vclocks.o
CC lib/nmi_backtrace.o
CC drivers/gpu/drm/i915/intel_clock_gating.o
CC kernel/time/timekeeping_debug.o
CC drivers/acpi/proc.o
CC drivers/acpi/acpica/exregion.o
CC net/ethtool/mm.o
AR drivers/base/firmware_loader/builtin/built-in.a
CC net/ipv4/tcp_input.o
CC mm/gup.o
CC lib/objpool.o
CC net/sunrpc/xprt.o
CC drivers/base/regmap/regmap.o
AR io_uring/built-in.a
CC net/sunrpc/auth_gss/gss_rpc_upcall.o
AR drivers/base/test/built-in.a
CC crypto/crc32c_generic.o
CC drivers/tty/tty_ldisc.o
CC arch/x86/kernel/time.o
AR net/dns_resolver/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_fence.o
CC sound/hda/array.o
CC net/netlabel/netlabel_mgmt.o
CC net/wireless/scan.o
CC fs/read_write.o
CC drivers/acpi/acpica/exresnte.o
CC drivers/base/power/wakeup.o
CC net/9p/error.o
AR fs/lockd/built-in.a
CC block/mq-deadline.o
CC fs/nfs/namespace.o
CC drivers/acpi/bus.o
CC net/sunrpc/auth_gss/gss_rpc_xdr.o
CC fs/ext4/move_extent.o
CC net/netlabel/netlabel_unlabeled.o
CC net/netfilter/nf_conntrack_sip.o
CC arch/x86/kernel/ioport.o
CC kernel/time/namespace.o
CC fs/file_table.o
CC net/mac80211/aead_api.o
CC fs/nfs/mount_clnt.o
CC crypto/authenc.o
CC sound/hda/hdmi_chmap.o
AR drivers/base/firmware_loader/built-in.a
CC net/ipv6/udplite.o
CC drivers/acpi/acpica/exresolv.o
CC drivers/gpu/drm/virtio/virtgpu_object.o
AR drivers/gpu/drm/panel/built-in.a
CC drivers/gpu/drm/virtio/virtgpu_debugfs.o
CC net/ipv4/tcp_output.o
CC net/netlabel/netlabel_cipso_v4.o
CC drivers/tty/tty_buffer.o
CC net/sunrpc/auth_gss/trace.o
CC net/9p/protocol.o
CC net/sunrpc/auth_gss/gss_krb5_mech.o
CC kernel/trace/trace_export.o
AR sound/x86/built-in.a
AR drivers/gpu/drm/bridge/analogix/built-in.a
AR drivers/gpu/drm/bridge/cadence/built-in.a
AR drivers/gpu/drm/bridge/imx/built-in.a
CC net/sunrpc/socklib.o
AR drivers/gpu/drm/bridge/synopsys/built-in.a
AR drivers/gpu/drm/bridge/built-in.a
CC net/netfilter/nf_nat_core.o
CC net/ethtool/module.o
CC drivers/acpi/acpica/exresop.o
CC drivers/gpu/drm/i915/intel_device_info.o
CC drivers/gpu/drm/i915/intel_memory_region.o
CC net/ethtool/cmis_fw_update.o
AR kernel/time/built-in.a
CC drivers/base/regmap/regcache.o
CC arch/x86/kernel/dumpstack.o
CC net/netlabel/netlabel_calipso.o
CC lib/plist.o
CC net/core/link_watch.o
CC net/9p/trans_common.o
CC drivers/tty/tty_port.o
CC drivers/gpu/drm/virtio/virtgpu_plane.o
CC lib/radix-tree.o
CC net/ipv4/tcp_timer.o
CC drivers/gpu/drm/i915/intel_pcode.o
CC drivers/acpi/acpica/exserial.o
CC net/core/filter.o
CC sound/hda/trace.o
CC net/handshake/alert.o
CC drivers/dma-buf/dma-buf.o
CC net/handshake/genl.o
CC kernel/trace/trace_event_perf.o
CC drivers/gpu/drm/virtio/virtgpu_ioctl.o
CC drivers/base/power/wakeup_stats.o
CC crypto/authencesn.o
CC net/sunrpc/xprtsock.o
CC kernel/softirq.o
CC fs/nfs/nfstrace.o
CC drivers/base/regmap/regcache-rbtree.o
CC mm/mmap_lock.o
CC drivers/acpi/acpica/exstore.o
CC fs/ext4/namei.o
CC net/wireless/nl80211.o
AR drivers/gpu/drm/hisilicon/built-in.a
CC drivers/acpi/glue.o
CC block/kyber-iosched.o
CC net/devres.o
CC net/netfilter/nf_nat_proto.o
CC net/9p/trans_fd.o
CC crypto/lzo.o
CC net/ipv6/raw.o
CC arch/x86/kernel/nmi.o
CC net/ipv6/icmp.o
CC crypto/lzo-rle.o
AR drivers/cxl/core/built-in.a
AR drivers/cxl/built-in.a
CC drivers/base/power/trace.o
CC net/handshake/netlink.o
CC net/ethtool/cmis_cdb.o
CC drivers/tty/tty_mutex.o
CC net/netfilter/nf_nat_helper.o
CC drivers/acpi/acpica/exstoren.o
CC kernel/resource.o
CC sound/hda/hdac_component.o
CC lib/ratelimit.o
AR net/netlabel/built-in.a
CC lib/rbtree.o
AR sound/xen/built-in.a
CC drivers/acpi/scan.o
CC lib/seq_buf.o
CC kernel/trace/trace_events_filter.o
CC drivers/gpu/drm/virtio/virtgpu_prime.o
CC drivers/gpu/drm/i915/intel_region_ttm.o
CC net/mac80211/wpa.o
CC net/mac80211/scan.o
CC drivers/base/regmap/regcache-flat.o
CC drivers/tty/tty_ldsem.o
CC crypto/rng.o
CC drivers/acpi/acpica/exstorob.o
CC net/ipv4/tcp_ipv4.o
AR sound/virtio/built-in.a
CC fs/super.o
CC drivers/dma-buf/dma-fence.o
CC net/handshake/request.o
CC drivers/dma-buf/dma-fence-array.o
CC kernel/trace/trace_events_trigger.o
CC mm/highmem.o
CC net/core/sock_diag.o
CC fs/char_dev.o
CC fs/ext4/page-io.o
CC arch/x86/kernel/ldt.o
CC sound/sound_core.o
AR drivers/base/power/built-in.a
CC net/socket.o
CC kernel/trace/trace_eprobe.o
CC net/mac80211/offchannel.o
CC fs/nfs/export.o
CC drivers/acpi/acpica/exsystem.o
AR drivers/gpu/drm/mxsfb/built-in.a
CC arch/x86/kernel/setup.o
CC sound/hda/hdac_i915.o
CC net/sunrpc/auth_gss/gss_krb5_seal.o
CC lib/siphash.o
CC drivers/base/regmap/regcache-maple.o
CC block/blk-mq-pci.o
CC drivers/acpi/mipi-disco-img.o
CC drivers/gpu/drm/virtio/virtgpu_trace_points.o
CC net/9p/trans_virtio.o
CC net/ethtool/pse-pd.o
CC drivers/tty/tty_baudrate.o
CC net/core/dev_ioctl.o
CC mm/memory.o
CC drivers/acpi/acpica/extrace.o
CC crypto/drbg.o
CC drivers/gpu/drm/i915/intel_runtime_pm.o
CC drivers/gpu/drm/i915/intel_sbi.o
CC lib/string.o
CC fs/stat.o
CC net/ipv6/mcast.o
CC net/netfilter/nf_nat_masquerade.o
CC net/ipv6/reassembly.o
CC net/handshake/tlshd.o
CC sound/hda/intel-dsp-config.o
CC drivers/base/regmap/regmap-debugfs.o
CC lib/timerqueue.o
CC drivers/dma-buf/dma-fence-chain.o
CC drivers/acpi/resource.o
CC drivers/acpi/acpica/exutils.o
CC drivers/macintosh/mac_hid.o
CC drivers/tty/tty_jobctrl.o
CC net/sunrpc/auth_gss/gss_krb5_unseal.o
CC net/ipv6/tcp_ipv6.o
CC lib/union_find.o
CC block/blk-mq-virtio.o
CC crypto/jitterentropy.o
CC lib/vsprintf.o
CC fs/nfs/sysfs.o
CC fs/exec.o
CC drivers/gpu/drm/i915/intel_step.o
CC net/handshake/trace.o
CC fs/nfs/fs_context.o
CC sound/last.o
CC kernel/trace/trace_kprobe.o
CC net/wireless/mlme.o
CC drivers/gpu/drm/i915/intel_uncore.o
CC sound/hda/intel-nhlt.o
CC drivers/gpu/drm/virtio/virtgpu_submit.o
CC arch/x86/kernel/x86_init.o
CC net/ipv6/ping.o
CC drivers/acpi/acpica/hwacpi.o
CC fs/pipe.o
CC crypto/jitterentropy-kcapi.o
CC net/ethtool/plca.o
CC drivers/dma-buf/dma-fence-unwrap.o
AR drivers/macintosh/built-in.a
CC net/sysctl_net.o
CC lib/win_minmax.o
CC block/blk-mq-debugfs.o
CC drivers/tty/n_null.o
CC net/core/tso.o
AR drivers/base/regmap/built-in.a
CC drivers/base/component.o
CC drivers/acpi/acpica/hwesleep.o
AR net/9p/built-in.a
CC crypto/ghash-generic.o
CC kernel/sysctl.o
CC lib/xarray.o
CC sound/hda/intel-sdw-acpi.o
CC drivers/base/core.o
CC net/wireless/ibss.o
AR drivers/gpu/drm/tiny/built-in.a
AR drivers/gpu/drm/xlnx/built-in.a
CC net/sunrpc/auth_gss/gss_krb5_wrap.o
CC net/ethtool/phy.o
CC block/blk-pm.o
CC drivers/acpi/acpica/hwgpe.o
CC net/ipv4/tcp_minisocks.o
CC arch/x86/kernel/i8259.o
CC drivers/base/bus.o
CC net/netfilter/nf_nat_ftp.o
CC drivers/dma-buf/dma-resv.o
CC drivers/acpi/acpi_processor.o
CC net/mac80211/ht.o
CC drivers/tty/pty.o
AR drivers/gpu/drm/virtio/built-in.a
CC kernel/trace/error_report-traces.o
CC kernel/capability.o
CC crypto/hash_info.o
CC crypto/rsapubkey.asn1.o
CC crypto/rsaprivkey.asn1.o
CC drivers/base/dd.o
AR crypto/built-in.a
CC drivers/dma-buf/sync_file.o
CC drivers/tty/tty_audit.o
CC mm/mincore.o
AR sound/hda/built-in.a
AR sound/built-in.a
CC net/sunrpc/auth_gss/gss_krb5_crypto.o
CC kernel/trace/power-traces.o
CC drivers/acpi/acpica/hwregs.o
CC block/holder.o
CC net/netfilter/nf_nat_irc.o
CC lib/lockref.o
CC net/mac80211/agg-tx.o
CC net/wireless/sme.o
CC net/ipv4/tcp_cong.o
CC fs/ext4/readpage.o
CC arch/x86/kernel/irqinit.o
AR net/handshake/built-in.a
CC net/sunrpc/sched.o
CC drivers/gpu/drm/i915/intel_wakeref.o
CC net/sunrpc/auth_gss/gss_krb5_keys.o
AR drivers/scsi/pcmcia/built-in.a
CC drivers/scsi/scsi.o
CC fs/nfs/nfsroot.o
CC net/mac80211/agg-rx.o
CC net/wireless/chan.o
CC net/netfilter/nf_nat_sip.o
CC drivers/acpi/acpica/hwsleep.o
CC net/ipv6/exthdrs.o
CC arch/x86/kernel/jump_label.o
AR drivers/dma-buf/built-in.a
CC drivers/acpi/processor_core.o
CC net/netfilter/x_tables.o
AR net/ethtool/built-in.a
CC net/sunrpc/auth.o
CC drivers/acpi/acpica/hwvalid.o
CC drivers/tty/sysrq.o
AR drivers/gpu/drm/gud/built-in.a
CC drivers/gpu/drm/i915/vlv_sideband.o
AR drivers/gpu/drm/solomon/built-in.a
CC fs/ext4/resize.o
CC net/core/sock_reuseport.o
CC lib/bcd.o
AR block/built-in.a
CC net/ipv4/tcp_metrics.o
CC fs/nfs/sysctl.o
CC net/core/fib_notifier.o
CC net/core/xdp.o
CC drivers/acpi/processor_pdc.o
CC net/wireless/ethtool.o
CC [M] drivers/gpu/drm/scheduler/sched_main.o
AR drivers/nvme/common/built-in.a
AR drivers/nvme/host/built-in.a
CC drivers/ata/libata-core.o
AR drivers/nvme/target/built-in.a
AR drivers/nvme/built-in.a
CC net/netfilter/xt_tcpudp.o
CC drivers/acpi/acpica/hwxface.o
CC drivers/scsi/hosts.o
CC net/core/flow_offload.o
CC arch/x86/kernel/irq_work.o
CC drivers/acpi/ec.o
CC net/wireless/mesh.o
CC net/netfilter/xt_CONNSECMARK.o
CC drivers/acpi/acpica/hwxfsleep.o
CC net/sunrpc/auth_null.o
CC fs/namei.o
CC lib/sort.o
CC net/mac80211/vht.o
CC kernel/ptrace.o
CC lib/parser.o
CC fs/ext4/super.o
CC net/ipv6/datagram.o
CC kernel/trace/rpm-traces.o
CC drivers/base/syscore.o
AR net/sunrpc/auth_gss/built-in.a
CC [M] drivers/gpu/drm/scheduler/sched_fence.o
CC drivers/acpi/acpica/hwpci.o
AR drivers/tty/built-in.a
CC mm/mlock.o
CC mm/mmap.o
CC drivers/acpi/acpica/nsaccess.o
CC drivers/gpu/drm/i915/vlv_suspend.o
CC drivers/ata/libata-scsi.o
CC net/wireless/ap.o
CC fs/nfs/nfs3super.o
CC [M] drivers/gpu/drm/scheduler/sched_entity.o
CC lib/debug_locks.o
CC drivers/scsi/scsi_ioctl.o
CC net/netfilter/xt_NFLOG.o
CC arch/x86/kernel/probe_roms.o
AR drivers/net/phy/qcom/built-in.a
CC lib/random32.o
CC drivers/net/phy/mdio-boardinfo.o
AR drivers/net/pse-pd/built-in.a
CC drivers/gpu/drm/i915/soc/intel_dram.o
HOSTCC drivers/gpu/drm/xe/xe_gen_wa_oob
CC drivers/acpi/acpica/nsalloc.o
CC drivers/net/phy/stubs.o
GEN xe_wa_oob.c xe_wa_oob.h
CC [M] drivers/gpu/drm/xe/xe_bb.o
CC mm/mmu_gather.o
CC drivers/net/phy/mdio_devres.o
CC drivers/firewire/init_ohci1394_dma.o
CC drivers/cdrom/cdrom.o
AR drivers/auxdisplay/built-in.a
CC drivers/acpi/dock.o
CC net/ipv6/ip6_flowlabel.o
CC drivers/net/phy/phy.o
CC drivers/net/mdio/acpi_mdio.o
CC drivers/gpu/drm/i915/soc/intel_gmch.o
CC net/netfilter/xt_SECMARK.o
CC net/ipv4/tcp_fastopen.o
CC lib/bust_spinlocks.o
CC kernel/trace/trace_dynevent.o
CC lib/kasprintf.o
CC kernel/user.o
CC [M] drivers/gpu/drm/xe/xe_bo.o
CC fs/fcntl.o
LD [M] drivers/gpu/drm/scheduler/gpu-sched.o
CC fs/nfs/nfs3client.o
CC drivers/base/driver.o
CC drivers/acpi/acpica/nsarguments.o
CC arch/x86/kernel/sys_ia32.o
CC net/netfilter/xt_TCPMSS.o
CC drivers/scsi/scsicam.o
CC drivers/scsi/scsi_error.o
CC drivers/net/mdio/fwnode_mdio.o
CC net/mac80211/he.o
CC net/sunrpc/auth_tls.o
CC kernel/trace/trace_probe.o
CC drivers/pcmcia/cs.o
AR drivers/firewire/built-in.a
CC net/ipv4/tcp_rate.o
CC drivers/usb/common/common.o
CC drivers/acpi/acpica/nsconvert.o
CC drivers/pcmcia/socket_sysfs.o
CC drivers/acpi/acpica/nsdump.o
CC drivers/base/class.o
CC lib/bitmap.o
CC net/ipv4/tcp_recovery.o
AR drivers/net/pcs/built-in.a
CC kernel/trace/trace_uprobe.o
CC drivers/gpu/drm/drm_atomic.o
CC drivers/usb/core/usb.o
CC drivers/scsi/scsi_lib.o
CC drivers/usb/common/debug.o
CC drivers/acpi/pci_root.o
CC drivers/acpi/acpica/nseval.o
CC net/core/gro.o
CC net/ipv4/tcp_ulp.o
CC drivers/ata/libata-eh.o
CC [M] drivers/gpu/drm/xe/xe_bo_evict.o
CC drivers/gpu/drm/i915/soc/intel_pch.o
CC mm/mprotect.o
CC fs/ext4/symlink.o
CC drivers/pcmcia/cardbus.o
CC arch/x86/kernel/ksysfs.o
CC drivers/gpu/drm/drm_atomic_uapi.o
CC drivers/base/platform.o
CC drivers/acpi/acpica/nsinit.o
CC net/sunrpc/auth_unix.o
CC fs/nfs/nfs3proc.o
CC net/ipv6/inet6_connection_sock.o
CC arch/x86/kernel/bootflag.o
AR drivers/usb/common/built-in.a
CC net/netfilter/xt_conntrack.o
CC drivers/input/serio/serio.o
AR drivers/net/mdio/built-in.a
CC net/mac80211/s1g.o
CC drivers/net/phy/phy-c45.o
CC lib/scatterlist.o
CC drivers/base/cpu.o
CC drivers/acpi/acpica/nsload.o
CC kernel/signal.o
CC arch/x86/kernel/e820.o
CC drivers/usb/core/hub.o
CC fs/ext4/sysfs.o
CC net/core/netdev-genl.o
CC drivers/scsi/constants.o
CC net/ipv6/udp_offload.o
AR drivers/usb/phy/built-in.a
CC drivers/pcmcia/ds.o
AR drivers/cdrom/built-in.a
CC drivers/net/phy/phy-core.o
CC drivers/gpu/drm/drm_auth.o
CC drivers/acpi/pci_link.o
CC drivers/gpu/drm/i915/soc/intel_rom.o
CC fs/ext4/xattr.o
CC net/sunrpc/svc.o
CC drivers/gpu/drm/drm_blend.o
CC mm/mremap.o
CC drivers/acpi/acpica/nsnames.o
CC drivers/pcmcia/pcmcia_resource.o
CC drivers/scsi/scsi_lib_dma.o
CC net/netfilter/xt_policy.o
CC lib/list_sort.o
CC net/core/netdev-genl-gen.o
CC [M] drivers/gpu/drm/xe/xe_devcoredump.o
CC net/mac80211/ibss.o
CC net/wireless/trace.o
CC net/ipv4/tcp_offload.o
CC net/mac80211/iface.o
CC drivers/input/serio/i8042.o
CC arch/x86/kernel/pci-dma.o
CC lib/uuid.o
CC drivers/pcmcia/cistpl.o
CC drivers/acpi/acpica/nsobject.o
CC fs/ioctl.o
CC drivers/base/firmware.o
CC fs/nfs/nfs3xdr.o
CC drivers/acpi/acpica/nsparse.o
CC drivers/input/serio/serport.o
CC fs/ext4/xattr_hurd.o
CC net/core/gso.o
CC net/wireless/ocb.o
CC drivers/pcmcia/pcmcia_cis.o
CC mm/msync.o
CC kernel/trace/rethook.o
CC net/sunrpc/svcsock.o
CC drivers/gpu/drm/drm_bridge.o
CC fs/readdir.o
CC drivers/acpi/acpica/nspredef.o
CC drivers/scsi/scsi_scan.o
CC lib/iov_iter.o
CC drivers/pcmcia/rsrc_mgr.o
CC drivers/usb/mon/mon_main.o
CC drivers/acpi/pci_irq.o
CC drivers/gpu/drm/i915/i915_memcpy.o
CC drivers/base/init.o
CC drivers/gpu/drm/drm_cache.o
CC drivers/base/map.o
CC arch/x86/kernel/quirks.o
CC lib/clz_ctz.o
CC kernel/sys.o
CC net/ipv6/seg6.o
CC drivers/net/phy/phy_device.o
CC fs/nfs/nfs3acl.o
CC drivers/gpu/drm/i915/i915_mm.o
CC drivers/usb/mon/mon_stat.o
CC [M] drivers/gpu/drm/xe/xe_device.o
CC fs/ext4/xattr_trusted.o
CC drivers/acpi/acpica/nsprepkg.o
CC fs/select.o
CC net/netfilter/xt_state.o
CC net/ipv4/tcp_plb.o
CC net/core/net-sysfs.o
CC drivers/acpi/acpi_apd.o
AR kernel/trace/built-in.a
CC net/wireless/pmsr.o
CC mm/page_vma_mapped.o
CC drivers/gpu/drm/drm_color_mgmt.o
CC drivers/base/devres.o
CC drivers/ata/libata-transport.o
CC drivers/acpi/acpica/nsrepair.o
CC drivers/usb/host/pci-quirks.o
CC drivers/gpu/drm/drm_colorop.o
CC drivers/input/serio/libps2.o
CC net/sunrpc/svcauth.o
CC kernel/umh.o
CC drivers/usb/mon/mon_text.o
CC drivers/usb/core/hcd.o
CC fs/nfs/nfs4proc.o
CC arch/x86/kernel/kdebugfs.o
CC drivers/usb/host/ehci-hcd.o
CC net/sunrpc/svcauth_unix.o
CC drivers/pcmcia/rsrc_nonstatic.o
CC net/mac80211/link.o
GEN drivers/scsi/scsi_devinfo_tbl.c
CC [M] drivers/gpu/drm/xe/xe_device_sysfs.o
CC drivers/net/phy/linkmode.o
CC [M] net/netfilter/nf_log_syslog.o
CC drivers/acpi/acpica/nsrepair2.o
CC drivers/gpu/drm/i915/i915_sw_fence.o
CC drivers/scsi/scsi_devinfo.o
GEN net/wireless/shipped-certs.c
CC net/core/hotdata.o
CC net/ipv6/fib6_notifier.o
CC [M] net/netfilter/xt_mark.o
CC arch/x86/kernel/alternative.o
CC drivers/gpu/drm/drm_connector.o
CC [M] drivers/gpu/drm/xe/xe_dma_buf.o
CC [M] drivers/gpu/drm/xe/xe_drm_client.o
CC drivers/scsi/scsi_sysctl.o
CC mm/pagewalk.o
CC drivers/base/attribute_container.o
CC net/mac80211/rate.o
AR drivers/input/serio/built-in.a
CC drivers/acpi/acpica/nssearch.o
CC fs/ext4/xattr_user.o
CC fs/nfs/nfs4xdr.o
CC net/ipv4/datagram.o
CC kernel/workqueue.o
CC drivers/usb/mon/mon_bin.o
CC fs/dcache.o
CC drivers/net/phy/phy_link_topology.o
CC arch/x86/kernel/i8253.o
CC drivers/gpu/drm/i915/i915_sw_fence_work.o
CC drivers/ata/libata-trace.o
CC net/ipv6/rpl.o
CC drivers/pcmcia/yenta_socket.o
CC fs/ext4/fast_commit.o
CC drivers/acpi/acpi_platform.o
CC drivers/acpi/acpica/nsutils.o
CC drivers/base/transport_class.o
CC fs/inode.o
CC net/sunrpc/addr.o
CC drivers/base/topology.o
CC drivers/scsi/scsi_proc.o
CC drivers/input/keyboard/atkbd.o
CC drivers/gpu/drm/i915/i915_syncmap.o
CC lib/bsearch.o
CC lib/find_bit.o
CC drivers/rtc/lib.o
CC [M] drivers/gpu/drm/xe/xe_exec.o
CC fs/ext4/orphan.o
CC [M] net/netfilter/xt_nat.o
CC drivers/usb/core/urb.o
CC drivers/gpu/drm/i915/i915_user_extensions.o
CC mm/pgtable-generic.o
CC drivers/acpi/acpica/nswalk.o
CC net/core/netdev_rx_queue.o
CC net/core/net-procfs.o
CC fs/nfs/nfs4state.o
CC net/wireless/shipped-certs.o
AR drivers/net/ethernet/3com/built-in.a
CC drivers/net/ethernet/8390/ne2k-pci.o
AR drivers/net/wireless/admtek/built-in.a
AR drivers/net/wireless/ath/built-in.a
AR drivers/net/wireless/atmel/built-in.a
AR drivers/net/wireless/broadcom/built-in.a
AR drivers/net/usb/built-in.a
AR drivers/net/wireless/intel/built-in.a
CC drivers/net/phy/mdio_bus.o
CC drivers/ata/libata-sata.o
AR drivers/net/wireless/intersil/built-in.a
AR drivers/net/ethernet/adaptec/built-in.a
AR drivers/net/wireless/marvell/built-in.a
CC arch/x86/kernel/hw_breakpoint.o
CC net/sunrpc/rpcb_clnt.o
CC drivers/gpu/drm/i915/i915_debugfs.o
CC fs/nfs/nfs4renewd.o
AR drivers/net/wireless/mediatek/built-in.a
AR drivers/net/wireless/microchip/built-in.a
AR drivers/net/wireless/purelifi/built-in.a
AR drivers/net/wireless/quantenna/built-in.a
AR drivers/usb/mon/built-in.a
AR drivers/net/wireless/ralink/built-in.a
AR drivers/net/wireless/realtek/built-in.a
CC drivers/net/phy/mdio_device.o
AR drivers/net/wireless/rsi/built-in.a
CC drivers/base/container.o
CC drivers/ata/libata-sff.o
AR drivers/net/wireless/silabs/built-in.a
CC lib/llist.o
AR drivers/net/wireless/st/built-in.a
CC net/ipv4/raw.o
AR drivers/net/wireless/ti/built-in.a
AR drivers/net/wireless/zydas/built-in.a
AR drivers/net/wireless/virtual/built-in.a
CC drivers/net/mii.o
CC drivers/acpi/acpica/nsxfeval.o
AR drivers/net/wireless/built-in.a
CC drivers/rtc/class.o
AR drivers/net/ethernet/agere/built-in.a
CC drivers/net/loopback.o
CC drivers/rtc/interface.o
CC lib/lwq.o
CC drivers/scsi/scsi_debugfs.o
CC net/ipv6/ioam6.o
CC mm/rmap.o
CC kernel/pid.o
CC lib/memweight.o
CC drivers/i2c/algos/i2c-algo-bit.o
CC drivers/i2c/busses/i2c-i801.o
CC drivers/ata/libata-pmp.o
CC drivers/base/property.o
AR drivers/pcmcia/built-in.a
AR drivers/input/keyboard/built-in.a
CC drivers/usb/class/usblp.o
CC drivers/usb/core/message.o
CC drivers/input/mouse/psmouse-base.o
CC lib/kfifo.o
CC [M] drivers/gpu/drm/xe/xe_execlist.o
CC drivers/input/mouse/synaptics.o
CC drivers/acpi/acpica/nsxfname.o
CC drivers/base/cacheinfo.o
CC drivers/net/phy/swphy.o
CC [M] net/netfilter/xt_LOG.o
CC arch/x86/kernel/tsc.o
CC kernel/task_work.o
CC drivers/net/ethernet/8390/8390.o
CC net/core/netpoll.o
AR drivers/net/ethernet/alacritech/built-in.a
CC drivers/net/netconsole.o
AR drivers/input/joystick/built-in.a
CC drivers/usb/core/driver.o
CC drivers/scsi/scsi_trace.o
CC lib/percpu-refcount.o
CC kernel/extable.o
CC mm/vmalloc.o
CC drivers/usb/storage/scsiglue.o
CC drivers/acpi/acpica/nsxfobj.o
CC drivers/usb/storage/protocol.o
CC drivers/usb/host/ehci-pci.o
CC drivers/gpu/drm/drm_crtc.o
CC fs/attr.o
AR drivers/i3c/built-in.a
AR drivers/i2c/muxes/built-in.a
CC drivers/usb/core/config.o
CC drivers/gpu/drm/i915/i915_debugfs_params.o
CC mm/vma.o
AR drivers/i2c/algos/built-in.a
AR drivers/usb/class/built-in.a
CC drivers/gpu/drm/drm_displayid.o
CC fs/ext4/acl.o
CC drivers/acpi/acpica/psargs.o
CC drivers/rtc/nvmem.o
CC net/ipv6/sysctl_net_ipv6.o
CC [M] drivers/gpu/drm/xe/xe_exec_queue.o
CC drivers/gpu/drm/i915/i915_pmu.o
CC drivers/input/mouse/focaltech.o
CC drivers/net/phy/fixed_phy.o
CC net/core/fib_rules.o
CC lib/rhashtable.o
AR drivers/i2c/busses/built-in.a
CC drivers/net/virtio_net.o
CC drivers/i2c/i2c-boardinfo.o
CC [M] net/netfilter/xt_MASQUERADE.o
CC drivers/base/swnode.o
CC drivers/scsi/scsi_logging.o
CC net/ipv4/udp.o
CC net/mac80211/michael.o
CC drivers/usb/storage/transport.o
CC arch/x86/kernel/tsc_msr.o
AR drivers/media/i2c/built-in.a
AR drivers/input/tablet/built-in.a
AR drivers/media/tuners/built-in.a
CC net/ipv6/xfrm6_policy.o
AR drivers/media/rc/keymaps/built-in.a
AR drivers/media/common/b2c2/built-in.a
AR drivers/media/rc/built-in.a
AR drivers/media/common/saa7146/built-in.a
CC net/mac80211/tkip.o
CC [M] drivers/gpu/drm/xe/xe_force_wake.o
CC mm/process_vm_access.o
CC drivers/usb/host/ohci-hcd.o
AR drivers/media/common/siano/built-in.a
CC drivers/acpi/acpica/psloop.o
CC drivers/gpu/drm/i915/gt/gen2_engine_cs.o
CC drivers/usb/host/ohci-pci.o
AR drivers/media/common/v4l2-tpg/built-in.a
AR drivers/media/common/videobuf2/built-in.a
CC drivers/gpu/drm/i915/gt/gen6_engine_cs.o
AR drivers/media/common/built-in.a
CC drivers/ata/libata-acpi.o
AR drivers/media/platform/allegro-dvt/built-in.a
AR drivers/media/platform/amlogic/meson-ge2d/built-in.a
AR drivers/media/platform/amlogic/built-in.a
CC lib/base64.o
CC drivers/rtc/dev.o
AR drivers/media/platform/amphion/built-in.a
CC fs/nfs/nfs4super.o
AR drivers/net/ethernet/8390/built-in.a
AR drivers/media/platform/aspeed/built-in.a
AR drivers/net/ethernet/alteon/built-in.a
AR drivers/media/platform/atmel/built-in.a
AR drivers/net/ethernet/amazon/built-in.a
AR drivers/net/ethernet/amd/built-in.a
AR drivers/media/platform/broadcom/built-in.a
AR drivers/media/platform/cadence/built-in.a
AR drivers/net/ethernet/aquantia/built-in.a
AR drivers/net/ethernet/arc/built-in.a
AR drivers/media/platform/chips-media/coda/built-in.a
AR drivers/net/ethernet/asix/built-in.a
AR drivers/media/platform/chips-media/wave5/built-in.a
AR drivers/media/platform/chips-media/built-in.a
AR drivers/net/ethernet/atheros/built-in.a
CC fs/ext4/xattr_security.o
AR drivers/media/platform/imagination/built-in.a
AR drivers/usb/misc/built-in.a
AR drivers/net/ethernet/cadence/built-in.a
CC drivers/net/phy/realtek.o
AR drivers/media/platform/intel/built-in.a
CC drivers/net/ethernet/broadcom/bnx2.o
AR drivers/media/platform/marvell/built-in.a
CC drivers/input/mouse/alps.o
AR drivers/media/platform/mediatek/jpeg/built-in.a
AR drivers/media/platform/mediatek/mdp/built-in.a
AR drivers/media/platform/microchip/built-in.a
CC drivers/net/net_failover.o
AR drivers/net/ethernet/brocade/built-in.a
AR drivers/media/platform/mediatek/vcodec/common/built-in.a
CC drivers/usb/host/uhci-hcd.o
AR drivers/media/platform/mediatek/vcodec/encoder/built-in.a
AR drivers/media/platform/mediatek/vcodec/decoder/built-in.a
AR drivers/media/platform/mediatek/vcodec/built-in.a
CC drivers/ptp/ptp_clock.o
AR drivers/pps/clients/built-in.a
AR drivers/media/platform/mediatek/vpu/built-in.a
AR drivers/pps/generators/built-in.a
CC drivers/pps/pps.o
AR drivers/media/platform/mediatek/mdp3/built-in.a
AR drivers/media/platform/mediatek/built-in.a
AR drivers/media/platform/nuvoton/built-in.a
CC arch/x86/kernel/io_delay.o
AR drivers/media/platform/nvidia/tegra-vde/built-in.a
AR drivers/media/platform/nvidia/built-in.a
AR drivers/net/ethernet/cavium/common/built-in.a
AR drivers/media/platform/nxp/dw100/built-in.a
AR drivers/net/ethernet/cavium/thunder/built-in.a
AR drivers/media/platform/nxp/imx-jpeg/built-in.a
CC kernel/params.o
AR drivers/net/ethernet/cavium/liquidio/built-in.a
AR drivers/media/platform/nxp/imx8-isi/built-in.a
AR drivers/media/platform/nxp/built-in.a
AR drivers/net/ethernet/cavium/octeon/built-in.a
AR drivers/net/ethernet/cavium/built-in.a
CC drivers/acpi/acpica/psobject.o
AR drivers/media/platform/qcom/camss/built-in.a
AR drivers/media/platform/qcom/venus/built-in.a
AR drivers/media/platform/raspberrypi/pisp_be/built-in.a
AR drivers/media/platform/qcom/built-in.a
AR drivers/media/platform/raspberrypi/built-in.a
CC [M] net/netfilter/xt_addrtype.o
AR drivers/media/platform/renesas/rcar-vin/built-in.a
CC drivers/i2c/i2c-core-base.o
AR drivers/media/platform/renesas/rzg2l-cru/built-in.a
AR drivers/media/platform/renesas/vsp1/built-in.a
AR drivers/media/platform/renesas/built-in.a
CC drivers/usb/early/ehci-dbgp.o
CC drivers/gpu/drm/i915/gt/gen6_ppgtt.o
CC drivers/ptp/ptp_chardev.o
AR drivers/media/platform/rockchip/rga/built-in.a
AR drivers/input/touchscreen/built-in.a
CC drivers/usb/core/file.o
CC drivers/acpi/acpica/psopcode.o
AR drivers/media/platform/rockchip/rkisp1/built-in.a
AR drivers/media/platform/rockchip/built-in.a
AR drivers/media/platform/samsung/exynos-gsc/built-in.a
AR drivers/media/platform/samsung/exynos4-is/built-in.a
AR drivers/media/platform/samsung/s3c-camif/built-in.a
CC drivers/scsi/scsi_pm.o
AR drivers/media/platform/samsung/s5p-g2d/built-in.a
AR drivers/media/platform/samsung/s5p-jpeg/built-in.a
AR drivers/media/platform/samsung/s5p-mfc/built-in.a
CC net/sunrpc/timer.o
AR drivers/media/platform/samsung/built-in.a
AR drivers/input/misc/built-in.a
AR drivers/media/platform/st/sti/bdisp/built-in.a
CC drivers/power/supply/power_supply_core.o
AR drivers/media/platform/st/sti/c8sectpfe/built-in.a
CC drivers/base/auxiliary.o
AR drivers/media/platform/st/sti/delta/built-in.a
AR drivers/media/pci/ttpci/built-in.a
AR drivers/media/platform/st/sti/hva/built-in.a
CC arch/x86/kernel/rtc.o
AR drivers/media/pci/b2c2/built-in.a
AR drivers/media/platform/st/stm32/built-in.a
CC fs/bad_inode.o
AR drivers/media/pci/pluto2/built-in.a
AR drivers/media/platform/st/built-in.a
CC drivers/rtc/proc.o
AR drivers/media/pci/dm1105/built-in.a
AR drivers/media/pci/pt1/built-in.a
CC net/ipv4/udplite.o
AR drivers/media/platform/sunxi/sun4i-csi/built-in.a
AR drivers/media/pci/pt3/built-in.a
AR drivers/media/platform/sunxi/sun6i-csi/built-in.a
AR drivers/media/pci/mantis/built-in.a
AR drivers/media/platform/sunxi/sun6i-mipi-csi2/built-in.a
AR drivers/media/pci/ngene/built-in.a
AR drivers/media/pci/ddbridge/built-in.a
AR drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/built-in.a
CC lib/once.o
AR drivers/media/pci/saa7146/built-in.a
AR drivers/media/platform/sunxi/sun8i-di/built-in.a
AR drivers/media/pci/smipcie/built-in.a
AR drivers/media/platform/sunxi/sun8i-rotate/built-in.a
AR drivers/media/platform/sunxi/built-in.a
CC fs/file.o
AR drivers/media/pci/netup_unidvb/built-in.a
CC drivers/gpu/drm/i915/gt/gen7_renderclear.o
CC drivers/usb/storage/usb.o
AR drivers/media/pci/intel/ipu3/built-in.a
AR drivers/media/platform/ti/am437x/built-in.a
CC lib/refcount.o
AR drivers/media/pci/intel/ivsc/built-in.a
AR drivers/media/pci/intel/built-in.a
AR drivers/media/platform/ti/cal/built-in.a
AR drivers/media/platform/ti/vpe/built-in.a
CC drivers/base/devtmpfs.o
AR drivers/media/pci/built-in.a
CC drivers/acpi/acpica/psopinfo.o
CC drivers/net/ethernet/broadcom/tg3.o
AR drivers/media/platform/ti/davinci/built-in.a
AR drivers/media/platform/ti/j721e-csi2rx/built-in.a
CC drivers/input/mouse/byd.o
AR drivers/media/platform/ti/omap/built-in.a
CC drivers/pps/kapi.o
AR drivers/media/platform/ti/omap3isp/built-in.a
AR drivers/media/platform/ti/built-in.a
AR fs/ext4/built-in.a
CC drivers/usb/storage/initializers.o
CC [M] drivers/gpu/drm/xe/xe_ggtt.o
AR drivers/media/platform/verisilicon/built-in.a
CC drivers/acpi/acpi_pnp.o
AR drivers/media/platform/via/built-in.a
AR drivers/media/usb/b2c2/built-in.a
AR drivers/media/platform/xilinx/built-in.a
AR drivers/media/usb/dvb-usb/built-in.a
AR drivers/media/platform/built-in.a
AR drivers/media/usb/dvb-usb-v2/built-in.a
CC drivers/acpi/power.o
AR drivers/media/usb/s2255/built-in.a
AR drivers/media/usb/siano/built-in.a
CC drivers/input/input.o
AR drivers/media/usb/ttusb-budget/built-in.a
AR drivers/media/usb/ttusb-dec/built-in.a
CC drivers/ata/libata-pata-timings.o
AR drivers/media/usb/built-in.a
CC mm/page_alloc.o
CC net/ipv6/xfrm6_state.o
CC kernel/kthread.o
AR drivers/media/mmc/siano/built-in.a
AR drivers/media/mmc/built-in.a
AR drivers/media/firewire/built-in.a
AR drivers/media/spi/built-in.a
CC drivers/usb/core/buffer.o
AR drivers/media/test-drivers/built-in.a
CC fs/nfs/nfs4file.o
AR drivers/media/built-in.a
CC kernel/sys_ni.o
CC drivers/pps/sysfs.o
CC lib/rcuref.o
CC net/core/net-traces.o
CC drivers/acpi/acpica/psparse.o
CC net/core/selftests.o
CC lib/usercopy.o
CC drivers/rtc/sysfs.o
CC arch/x86/kernel/resource.o
CC drivers/scsi/scsi_bsg.o
AR drivers/net/phy/built-in.a
CC drivers/gpu/drm/drm_drv.o
CC drivers/power/supply/power_supply_sysfs.o
CC drivers/ata/ahci.o
CC mm/init-mm.o
CC drivers/ptp/ptp_sysfs.o
AR drivers/usb/early/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gpu_scheduler.o
CC drivers/input/input-compat.o
CC net/mac80211/aes_cmac.o
CC drivers/input/mouse/logips2pp.o
AS arch/x86/kernel/irqflags.o
CC drivers/usb/core/sysfs.o
CC arch/x86/kernel/static_call.o
CC drivers/acpi/acpica/psscope.o
CC lib/errseq.o
AR drivers/pps/built-in.a
AR drivers/net/ethernet/chelsio/built-in.a
CC fs/nfs/delegation.o
CC drivers/acpi/event.o
CC net/sunrpc/xdr.o
CC net/ipv4/udp_offload.o
CC lib/bucket_locks.o
CC drivers/base/module.o
AR net/netfilter/built-in.a
CC net/core/ptp_classifier.o
CC drivers/rtc/rtc-mc146818-lib.o
CC drivers/scsi/scsi_common.o
CC drivers/usb/storage/sierra_ms.o
CC net/sunrpc/sunrpc_syms.o
CC net/mac80211/aes_gmac.o
CC mm/memblock.o
CC drivers/gpu/drm/drm_dumb_buffers.o
CC drivers/gpu/drm/i915/gt/gen8_engine_cs.o
CC mm/slub.o
CC drivers/power/supply/power_supply_leds.o
CC drivers/usb/storage/option_ms.o
CC drivers/acpi/acpica/pstree.o
CC [M] drivers/gpu/drm/xe/xe_gsc.o
CC drivers/power/supply/power_supply_hwmon.o
CC drivers/usb/host/xhci.o
CC arch/x86/kernel/process.o
CC net/sunrpc/cache.o
CC lib/generic-radix-tree.o
CC fs/filesystems.o
CC drivers/usb/storage/usual-tables.o
CC net/ipv6/xfrm6_input.o
CC drivers/base/auxiliary_sysfs.o
CC drivers/input/mouse/lifebook.o
CC drivers/scsi/scsi_transport_spi.o
CC drivers/input/mouse/trackpoint.o
CC drivers/ptp/ptp_vclock.o
CC drivers/acpi/acpica/psutils.o
CC fs/nfs/nfs4idmap.o
CC drivers/i2c/i2c-core-smbus.o
CC arch/x86/kernel/ptrace.o
CC drivers/rtc/rtc-cmos.o
AR drivers/power/supply/built-in.a
AR drivers/power/built-in.a
CC mm/madvise.o
CC drivers/ata/libahci.o
CC net/mac80211/fils_aead.o
CC drivers/input/mouse/cypress_ps2.o
CC net/ipv6/xfrm6_output.o
CC drivers/usb/core/endpoint.o
CC drivers/ptp/ptp_kvm_x86.o
CC lib/bitmap-str.o
CC net/core/netprio_cgroup.o
AR drivers/net/ethernet/cisco/built-in.a
CC fs/namespace.o
CC net/sunrpc/rpc_pipe.o
CC kernel/nsproxy.o
CC drivers/acpi/acpica/pswalk.o
CC drivers/base/devcoredump.o
CC arch/x86/kernel/tls.o
AR drivers/usb/storage/built-in.a
CC fs/seq_file.o
CC drivers/gpu/drm/i915/gt/gen8_ppgtt.o
CC net/ipv4/arp.o
CC drivers/base/platform-msi.o
CC kernel/notifier.o
CC drivers/i2c/i2c-core-acpi.o
CC net/ipv6/xfrm6_protocol.o
CC drivers/acpi/acpica/psxface.o
CC net/ipv6/netfilter.o
CC [M] drivers/gpu/drm/xe/xe_gsc_debugfs.o
CC drivers/acpi/evged.o
CC drivers/hwmon/hwmon.o
CC [M] drivers/gpu/drm/xe/xe_gsc_proxy.o
CC lib/string_helpers.o
CC drivers/usb/core/devio.o
CC drivers/gpu/drm/i915/gt/intel_breadcrumbs.o
CC net/core/netclassid_cgroup.o
AR drivers/net/ethernet/cortina/built-in.a
CC drivers/input/mouse/psmouse-smbus.o
CC drivers/ptp/ptp_kvm_common.o
CC drivers/ata/ata_piix.o
CC net/ipv4/icmp.o
CC drivers/base/physical_location.o
CC drivers/acpi/acpica/rsaddr.o
CC kernel/ksysfs.o
AR drivers/rtc/built-in.a
AR drivers/thermal/broadcom/built-in.a
CC lib/hexdump.o
AR drivers/thermal/renesas/built-in.a
CC net/core/dst_cache.o
CC net/sunrpc/sysfs.o
AR drivers/thermal/samsung/built-in.a
CC drivers/thermal/intel/intel_tcc.o
CC arch/x86/kernel/step.o
CC net/mac80211/cfg.o
CC drivers/thermal/intel/therm_throt.o
CC fs/nfs/callback.o
CC drivers/scsi/virtio_scsi.o
AR drivers/thermal/st/built-in.a
CC net/mac80211/ethtool.o
CC drivers/acpi/acpica/rscalc.o
CC drivers/i2c/i2c-smbus.o
CC drivers/gpu/drm/i915/gt/intel_context.o
CC arch/x86/kernel/i8237.o
CC drivers/base/trace.o
CC fs/nfs/callback_xdr.o
CC drivers/acpi/acpica/rscreate.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.o
CC drivers/usb/core/notify.o
CC drivers/gpu/drm/drm_edid.o
CC net/mac80211/rx.o
CC drivers/input/input-mt.o
AR drivers/ptp/built-in.a
CC kernel/cred.o
CC [M] drivers/gpu/drm/xe/xe_gsc_submit.o
CC drivers/acpi/acpica/rsdumpinfo.o
CC drivers/ata/pata_amd.o
CC lib/kstrtox.o
AR drivers/thermal/qcom/built-in.a
CC fs/nfs/callback_proc.o
AR drivers/input/mouse/built-in.a
CC drivers/scsi/sd.o
CC net/core/gro_cells.o
CC arch/x86/kernel/stacktrace.o
CC lib/iomap.o
CC drivers/usb/host/xhci-mem.o
CC drivers/scsi/sr.o
CC mm/page_io.o
AR drivers/net/ethernet/dec/tulip/built-in.a
AR drivers/net/ethernet/dec/built-in.a
CC net/ipv6/proc.o
CC drivers/acpi/acpica/rsinfo.o
CC drivers/gpu/drm/i915/gt/intel_context_sseu.o
CC drivers/ata/pata_oldpiix.o
AR drivers/hwmon/built-in.a
CC kernel/reboot.o
CC net/core/failover.o
AR drivers/watchdog/built-in.a
AR drivers/net/ethernet/dlink/built-in.a
CC drivers/acpi/acpica/rsio.o
CC drivers/usb/core/generic.o
CC drivers/input/input-poller.o
CC drivers/gpu/drm/drm_eld.o
AR drivers/i2c/built-in.a
CC drivers/acpi/sysfs.o
CC net/mac80211/spectmgmt.o
CC drivers/acpi/acpica/rsirq.o
CC drivers/gpu/drm/i915/gt/intel_engine_cs.o
CC drivers/gpu/drm/i915/gt/intel_engine_heartbeat.o
AR drivers/base/built-in.a
CC arch/x86/kernel/reboot.o
CC net/sunrpc/svc_xprt.o
CC drivers/scsi/sr_ioctl.o
CC net/sunrpc/xprtmultipath.o
AR drivers/net/ethernet/emulex/built-in.a
AR drivers/thermal/tegra/built-in.a
CC net/sunrpc/stats.o
AR drivers/thermal/intel/built-in.a
AR drivers/thermal/mediatek/built-in.a
CC drivers/thermal/thermal_core.o
CC drivers/acpi/acpica/rslist.o
CC net/ipv4/devinet.o
CC [M] drivers/gpu/drm/xe/xe_gt.o
CC drivers/acpi/acpica/rsmemory.o
CC drivers/gpu/drm/i915/gt/intel_engine_pm.o
CC drivers/acpi/property.o
CC lib/iomap_copy.o
CC drivers/usb/core/quirks.o
CC drivers/usb/core/devices.o
CC net/ipv6/syncookies.o
CC net/mac80211/tx.o
CC drivers/input/ff-core.o
CC drivers/gpu/drm/drm_encoder.o
CC lib/devres.o
CC drivers/scsi/sr_vendor.o
CC drivers/gpu/drm/i915/gt/intel_engine_user.o
CC drivers/acpi/acpica/rsmisc.o
CC drivers/md/md.o
CC drivers/cpufreq/cpufreq.o
CC drivers/md/md-bitmap.o
CC drivers/ata/pata_sch.o
CC arch/x86/kernel/msr.o
CC net/sunrpc/sysctl.o
CC drivers/usb/core/phy.o
CC mm/swap_state.o
CC drivers/acpi/acpica/rsserial.o
CC fs/xattr.o
CC kernel/async.o
CC [M] drivers/gpu/drm/xe/xe_gt_ccs_mode.o
CC lib/check_signature.o
CC net/ipv6/calipso.o
AR net/wireless/built-in.a
CC drivers/input/touchscreen.o
CC drivers/gpu/drm/i915/gt/intel_execlists_submission.o
CC drivers/cpuidle/governors/menu.o
CC drivers/gpu/drm/i915/gt/intel_ggtt.o
CC drivers/input/ff-memless.o
CC drivers/acpi/debugfs.o
CC drivers/acpi/acpica/rsutils.o
CC arch/x86/kernel/cpuid.o
CC lib/interval_tree.o
CC fs/nfs/nfs4namespace.o
CC mm/swapfile.o
CC drivers/gpu/drm/drm_file.o
AR net/core/built-in.a
CC drivers/md/md-autodetect.o
CC drivers/cpufreq/freq_table.o
CC kernel/range.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_fencing.o
CC drivers/acpi/acpi_lpat.o
CC arch/x86/kernel/early-quirks.o
CC lib/assoc_array.o
CC fs/nfs/nfs4getroot.o
CC lib/bitrev.o
CC drivers/ata/pata_mpiix.o
CC kernel/smpboot.o
AR drivers/net/ethernet/engleder/built-in.a
CC net/mac80211/key.o
AR drivers/net/ethernet/ezchip/built-in.a
CC drivers/cpufreq/cpufreq_performance.o
CC drivers/usb/core/port.o
CC drivers/cpuidle/governors/haltpoll.o
CC drivers/acpi/acpica/rsxface.o
CC net/ipv4/af_inet.o
CC drivers/cpuidle/cpuidle.o
CC arch/x86/kernel/smp.o
CC fs/nfs/nfs4client.o
CC drivers/thermal/thermal_sysfs.o
CC fs/libfs.o
CC mm/swap_slots.o
CC drivers/md/dm.o
CC [M] drivers/gpu/drm/xe/xe_gt_clock.o
CC lib/crc-ccitt.o
CC drivers/md/dm-table.o
CC drivers/usb/host/xhci-ext-caps.o
CC drivers/md/dm-target.o
CC drivers/input/sparse-keymap.o
CC mm/dmapool.o
AR drivers/net/ethernet/fujitsu/built-in.a
CC drivers/gpu/drm/drm_fourcc.o
CC drivers/acpi/acpica/tbdata.o
CC drivers/scsi/sg.o
CC kernel/ucount.o
AR drivers/mmc/built-in.a
CC drivers/thermal/thermal_trip.o
CC kernel/regset.o
CC drivers/usb/host/xhci-ring.o
CC lib/crc16.o
CC [M] drivers/gpu/drm/xe/xe_gt_freq.o
CC fs/fs-writeback.o
CC drivers/ata/ata_generic.o
CC mm/hugetlb.o
CC net/ipv6/ah6.o
CC fs/nfs/nfs4session.o
CC drivers/input/vivaldi-fmap.o
CC drivers/cpufreq/cpufreq_userspace.o
CC drivers/md/dm-linear.o
CC mm/mmu_notifier.o
CC arch/x86/kernel/smpboot.o
CC drivers/acpi/acpica/tbfadt.o
CC drivers/usb/core/hcd-pci.o
CC drivers/acpi/acpi_pcc.o
CC drivers/thermal/thermal_helpers.o
AR drivers/net/ethernet/fungible/built-in.a
CC mm/migrate.o
CC arch/x86/kernel/tsc_sync.o
CC net/ipv4/igmp.o
CC kernel/ksyms_common.o
CC drivers/cpuidle/driver.o
HOSTCC lib/gen_crc32table
AR drivers/cpuidle/governors/built-in.a
AR drivers/ufs/built-in.a
AR drivers/net/ethernet/google/built-in.a
CC drivers/cpufreq/cpufreq_ondemand.o
AR drivers/firmware/arm_ffa/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt.o
AR drivers/net/ethernet/huawei/built-in.a
CC drivers/cpuidle/governor.o
AR drivers/firmware/arm_scmi/built-in.a
AR drivers/firmware/broadcom/built-in.a
AR drivers/firmware/cirrus/built-in.a
AR drivers/firmware/meson/built-in.a
CC drivers/md/dm-stripe.o
AR drivers/firmware/microchip/built-in.a
CC lib/xxhash.o
CC drivers/input/input-leds.o
CC net/mac80211/util.o
CC lib/genalloc.o
CC drivers/firmware/efi/libstub/efi-stub-helper.o
CC drivers/firmware/efi/efi-bgrt.o
CC drivers/firmware/efi/efi.o
CC kernel/groups.o
CC drivers/acpi/acpica/tbfind.o
CC drivers/gpu/drm/drm_framebuffer.o
CC drivers/usb/host/xhci-hub.o
CC drivers/thermal/thermal_hwmon.o
AR net/sunrpc/built-in.a
CC net/ipv6/esp6.o
CC [M] drivers/gpu/drm/xe/xe_gt_idle.o
CC drivers/acpi/acpica/tbinstal.o
CC fs/nfs/dns_resolve.o
AR drivers/ata/built-in.a
CC drivers/cpufreq/cpufreq_governor.o
CC net/ipv4/fib_frontend.o
CC drivers/gpu/drm/drm_gem.o
CC drivers/cpuidle/sysfs.o
CC drivers/firmware/efi/vars.o
CC drivers/gpu/drm/drm_ioctl.o
CC kernel/kcmp.o
CC drivers/thermal/gov_step_wise.o
CC drivers/cpufreq/cpufreq_governor_attr_set.o
CC net/ipv4/fib_semantics.o
CC net/ipv4/fib_trie.o
CC drivers/usb/core/usb-acpi.o
CC drivers/input/evdev.o
CC drivers/cpuidle/poll_state.o
CC drivers/acpi/acpica/tbprint.o
CC kernel/freezer.o
CC lib/percpu_counter.o
CC drivers/net/ethernet/intel/e1000/e1000_main.o
CC drivers/net/ethernet/intel/e1000e/82571.o
CC drivers/net/ethernet/intel/e100.o
CC drivers/usb/host/xhci-dbg.o
CC drivers/scsi/scsi_sysfs.o
CC drivers/gpu/drm/drm_lease.o
CC arch/x86/kernel/setup_percpu.o
CC drivers/firmware/efi/libstub/gop.o
CC drivers/net/ethernet/intel/e1000/e1000_hw.o
CC drivers/firmware/efi/reboot.o
AR drivers/crypto/stm32/built-in.a
AR drivers/net/ethernet/i825xx/built-in.a
AR drivers/crypto/xilinx/built-in.a
CC drivers/cpuidle/cpuidle-haltpoll.o
CC [M] drivers/gpu/drm/xe/xe_gt_mcr.o
CC fs/nfs/nfs4trace.o
AR drivers/crypto/hisilicon/built-in.a
AR drivers/crypto/intel/keembay/built-in.a
AR drivers/crypto/intel/ixp4xx/built-in.a
AR drivers/crypto/intel/built-in.a
CC [M] drivers/gpu/drm/xe/xe_gt_pagefault.o
CC drivers/firmware/efi/memattr.o
AR drivers/crypto/starfive/built-in.a
AR drivers/crypto/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_buffer_pool.o
CC drivers/thermal/gov_user_space.o
CC [M] drivers/gpu/drm/xe/xe_gt_sysfs.o
CC drivers/acpi/acpica/tbutils.o
CC drivers/cpufreq/acpi-cpufreq.o
CC arch/x86/kernel/mpparse.o
CC net/ipv6/sit.o
CC lib/audit.o
CC drivers/firmware/efi/libstub/secureboot.o
CC net/mac80211/parse.o
CC drivers/usb/host/xhci-trace.o
AR drivers/usb/core/built-in.a
CC drivers/acpi/ac.o
CC drivers/acpi/acpica/tbxface.o
CC mm/page_counter.o
AR drivers/cpuidle/built-in.a
AR drivers/net/ethernet/microsoft/built-in.a
CC drivers/gpu/drm/drm_managed.o
CC drivers/md/dm-ioctl.o
CC drivers/clocksource/acpi_pm.o
AR drivers/thermal/built-in.a
CC arch/x86/kernel/trace_clock.o
CC drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.o
CC drivers/acpi/button.o
CC drivers/gpu/drm/drm_mm.o
CC kernel/profile.o
CC fs/nfs/nfs4sysctl.o
CC drivers/net/ethernet/intel/e1000e/ich8lan.o
AR drivers/input/built-in.a
CC mm/hugetlb_cgroup.o
CC drivers/firmware/efi/libstub/tpm.o
CC drivers/cpufreq/amd-pstate.o
CC drivers/acpi/fan_core.o
CC drivers/md/dm-io.o
CC drivers/acpi/acpica/tbxfload.o
CC drivers/clocksource/i8253.o
CC drivers/acpi/acpica/tbxfroot.o
CC mm/early_ioremap.o
CC lib/syscall.o
CC fs/pnode.o
CC drivers/gpu/drm/i915/gt/intel_gt_clock_utils.o
CC kernel/stacktrace.o
CC arch/x86/kernel/trace.o
CC drivers/firmware/efi/tpm.o
AR drivers/net/ethernet/litex/built-in.a
AR drivers/scsi/built-in.a
CC drivers/md/dm-kcopyd.o
CC mm/secretmem.o
CC kernel/dma.o
CC [M] drivers/gpu/drm/xe/xe_gt_throttle.o
CC drivers/net/ethernet/intel/e1000/e1000_ethtool.o
CC drivers/cpufreq/amd-pstate-trace.o
CC drivers/acpi/acpica/utaddress.o
CC fs/splice.o
CC arch/x86/kernel/rethook.o
CC net/ipv6/addrconf_core.o
AR drivers/clocksource/built-in.a
CC drivers/md/dm-sysfs.o
CC drivers/cpufreq/intel_pstate.o
CC drivers/net/ethernet/intel/e1000/e1000_param.o
CC net/ipv6/exthdrs_core.o
CC [M] drivers/gpu/drm/xe/xe_gt_tlb_invalidation.o
CC fs/sync.o
CC drivers/firmware/efi/libstub/file.o
AR drivers/net/ethernet/broadcom/built-in.a
CC drivers/firmware/efi/memmap.o
CC lib/errname.o
CC mm/hmm.o
CC drivers/hid/usbhid/hid-core.o
CC drivers/hid/hid-core.o
CC drivers/acpi/fan_attr.o
CC lib/nlattr.o
CC drivers/hid/usbhid/hiddev.o
CC drivers/md/dm-stats.o
CC drivers/firmware/efi/capsule.o
CC drivers/acpi/acpica/utalloc.o
CC kernel/smp.o
CC drivers/gpu/drm/i915/gt/intel_gt_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_gt_topology.o
AR drivers/net/ethernet/marvell/octeon_ep/built-in.a
AR drivers/net/ethernet/marvell/octeon_ep_vf/built-in.a
AR drivers/net/ethernet/marvell/octeontx2/built-in.a
AR drivers/net/ethernet/marvell/prestera/built-in.a
AR drivers/firmware/imx/built-in.a
CC drivers/net/ethernet/marvell/sky2.o
CC drivers/net/ethernet/intel/e1000e/80003es2lan.o
CC fs/utimes.o
CC drivers/usb/host/xhci-debugfs.o
CC arch/x86/kernel/vmcore_info_32.o
CC drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.o
CC net/ipv4/fib_notifier.o
CC net/mac80211/wme.o
AR drivers/platform/x86/amd/built-in.a
AR drivers/platform/x86/intel/built-in.a
CC drivers/platform/x86/wmi.o
AR drivers/platform/surface/built-in.a
CC drivers/acpi/acpica/utascii.o
CC net/ipv6/ip6_checksum.o
CC drivers/usb/host/xhci-pci.o
CC drivers/md/dm-rq.o
AR drivers/firmware/psci/built-in.a
CC lib/cpu_rmap.o
CC drivers/firmware/efi/esrt.o
CC drivers/firmware/efi/libstub/mem.o
CC drivers/net/ethernet/intel/e1000e/mac.o
CC drivers/gpu/drm/drm_mode_config.o
CC net/mac80211/chan.o
CC drivers/gpu/drm/i915/gt/intel_gt_irq.o
CC mm/memfd.o
AR drivers/firmware/qcom/built-in.a
CC mm/ptdump.o
CC drivers/gpu/drm/i915/gt/intel_gt_mcr.o
CC drivers/acpi/fan_hwmon.o
CC net/ipv4/inet_fragment.o
CC drivers/acpi/acpica/utbuffer.o
CC drivers/mailbox/mailbox.o
CC drivers/platform/x86/wmi-bmof.o
CC drivers/hid/usbhid/hid-pidff.o
CC arch/x86/kernel/machine_kexec_32.o
AR drivers/perf/built-in.a
AR drivers/hwtracing/intel_th/built-in.a
AS arch/x86/kernel/relocate_kernel_32.o
CC kernel/uid16.o
CC drivers/hid/hid-input.o
CC fs/d_path.o
AR drivers/firmware/smccc/built-in.a
AR drivers/net/ethernet/mellanox/built-in.a
CC drivers/acpi/acpi_video.o
CC drivers/firmware/efi/runtime-wrappers.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm.o
CC [M] drivers/gpu/drm/xe/xe_guc.o
CC drivers/firmware/efi/capsule-loader.o
CC drivers/hid/hid-quirks.o
CC drivers/gpu/drm/drm_mode_object.o
CC lib/dynamic_queue_limits.o
CC drivers/acpi/acpica/utcksum.o
CC net/ipv4/ping.o
CC lib/glob.o
CC net/ipv6/ip6_icmp.o
CC drivers/firmware/efi/libstub/random.o
CC mm/execmem.o
CC drivers/md/dm-io-rewind.o
CC arch/x86/kernel/crash_dump_32.o
CC fs/stack.o
CC arch/x86/kernel/crash.o
CC drivers/acpi/video_detect.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.o
CC drivers/mailbox/pcc.o
CC drivers/platform/x86/eeepc-laptop.o
AR drivers/net/ethernet/intel/e1000/built-in.a
CC drivers/hid/hid-debug.o
CC net/ipv4/ip_tunnel_core.o
AR drivers/android/built-in.a
CC fs/fs_struct.o
CC drivers/firmware/efi/earlycon.o
CC drivers/hid/hidraw.o
CC kernel/kallsyms.o
CC drivers/net/ethernet/intel/e1000e/manage.o
CC drivers/acpi/acpica/utcopy.o
CC arch/x86/kernel/module.o
CC drivers/acpi/processor_driver.o
CC drivers/gpu/drm/i915/gt/intel_gt_pm_irq.o
AR drivers/firmware/tegra/built-in.a
CC drivers/md/dm-builtin.o
CC drivers/gpu/drm/drm_modes.o
CC [M] drivers/gpu/drm/xe/xe_guc_ads.o
AR fs/nfs/built-in.a
CC drivers/net/ethernet/intel/e1000e/nvm.o
CC drivers/gpu/drm/i915/gt/intel_gt_requests.o
CC drivers/gpu/drm/drm_modeset_lock.o
AR drivers/net/ethernet/meta/built-in.a
CC drivers/acpi/processor_thermal.o
AR drivers/nvmem/layouts/built-in.a
CC kernel/acct.o
CC drivers/nvmem/core.o
AR drivers/cpufreq/built-in.a
AR mm/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_capture.o
CC fs/statfs.o
AR drivers/firmware/xilinx/built-in.a
CC drivers/platform/x86/p2sb.o
CC drivers/firmware/efi/libstub/randomalloc.o
CC fs/fs_pin.o
CC fs/nsfs.o
CC net/ipv6/output_core.o
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs.o
CC drivers/acpi/processor_idle.o
CC fs/fs_types.o
AR drivers/usb/host/built-in.a
AR drivers/mailbox/built-in.a
CC drivers/acpi/acpica/utexcep.o
AR drivers/usb/built-in.a
CC drivers/gpu/drm/drm_plane.o
CC drivers/net/ethernet/intel/e1000e/phy.o
CC drivers/net/ethernet/intel/e1000e/param.o
CC drivers/acpi/processor_throttling.o
AR drivers/hid/usbhid/built-in.a
CC net/ipv4/gre_offload.o
CC drivers/firmware/dmi_scan.o
CC lib/strncpy_from_user.o
CC drivers/firmware/efi/libstub/pci.o
CC net/ipv6/protocol.o
CC arch/x86/kernel/doublefault_32.o
CC fs/fs_context.o
AR drivers/net/ethernet/micrel/built-in.a
CC drivers/hid/hid-generic.o
CC drivers/hid/hid-a4tech.o
CC net/ipv6/ip6_offload.o
CC drivers/net/ethernet/intel/e1000e/ethtool.o
CC drivers/firmware/dmi-id.o
CC drivers/acpi/acpica/utdebug.o
CC lib/strnlen_user.o
CC net/mac80211/trace.o
AR drivers/net/ethernet/microchip/built-in.a
CC drivers/gpu/drm/drm_prime.o
CC drivers/gpu/drm/drm_print.o
AR drivers/firmware/efi/built-in.a
CC drivers/gpu/drm/i915/gt/intel_gt_sysfs_pm.o
CC net/ipv4/metrics.o
CC drivers/md/dm-raid1.o
CC drivers/net/ethernet/intel/e1000e/netdev.o
AR drivers/platform/x86/built-in.a
AR drivers/platform/built-in.a
CC drivers/acpi/processor_perflib.o
CC drivers/acpi/container.o
CC net/ipv6/tcpv6_offload.o
CC drivers/hid/hid-apple.o
CC lib/net_utils.o
CC net/mac80211/mlme.o
AR drivers/net/ethernet/mscc/built-in.a
CC drivers/acpi/acpica/utdecode.o
CC arch/x86/kernel/early_printk.o
CC drivers/firmware/memmap.o
CC drivers/acpi/acpica/utdelete.o
CC drivers/gpu/drm/drm_property.o
CC net/mac80211/tdls.o
CC drivers/firmware/efi/libstub/skip_spaces.o
CC kernel/vmcore_info.o
CC drivers/gpu/drm/i915/gt/intel_gtt.o
CC net/ipv4/netlink.o
CC drivers/firmware/efi/libstub/lib-cmdline.o
CC drivers/md/dm-log.o
CC drivers/gpu/drm/i915/gt/intel_llc.o
CC drivers/acpi/acpica/uterror.o
CC drivers/acpi/acpica/uteval.o
CC drivers/firmware/efi/libstub/lib-ctype.o
CC net/mac80211/ocb.o
CC fs/fs_parser.o
CC drivers/gpu/drm/drm_rect.o
AR drivers/nvmem/built-in.a
CC drivers/hid/hid-belkin.o
CC arch/x86/kernel/hpet.o
CC drivers/firmware/efi/libstub/alignedmem.o
CC [M] drivers/gpu/drm/xe/xe_guc_ct.o
CC kernel/elfcorehdr.o
CC drivers/gpu/drm/i915/gt/intel_lrc.o
CC net/ipv4/nexthop.o
CC fs/fsopen.o
CC net/mac80211/airtime.o
AR drivers/net/ethernet/marvell/built-in.a
CC arch/x86/kernel/amd_nb.o
CC drivers/hid/hid-cherry.o
CC [M] drivers/gpu/drm/xe/xe_guc_db_mgr.o
CC drivers/gpu/drm/i915/gt/intel_migrate.o
CC [M] drivers/gpu/drm/xe/xe_guc_hwconfig.o
CC drivers/firmware/efi/libstub/relocate.o
CC fs/init.o
CC drivers/gpu/drm/i915/gt/intel_mocs.o
CC drivers/net/ethernet/intel/e1000e/ptp.o
CC drivers/firmware/efi/libstub/printk.o
CC arch/x86/kernel/kvm.o
AR drivers/net/ethernet/myricom/built-in.a
CC lib/sg_pool.o
CC kernel/crash_reserve.o
CC drivers/gpu/drm/drm_syncobj.o
CC drivers/acpi/thermal_lib.o
CC lib/stackdepot.o
CC drivers/acpi/acpica/utglobal.o
CC fs/kernel_read_file.o
CC net/ipv6/exthdrs_offload.o
CC drivers/md/dm-region-hash.o
CC net/mac80211/eht.o
CC kernel/kexec_core.o
CC drivers/acpi/acpica/uthex.o
CC drivers/gpu/drm/drm_sysfs.o
CC drivers/gpu/drm/drm_trace_points.o
CC net/ipv4/udp_tunnel_stub.o
CC fs/mnt_idmapping.o
AR drivers/net/ethernet/natsemi/built-in.a
AR drivers/net/ethernet/neterion/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_id_mgr.o
CC lib/asn1_decoder.o
CC drivers/firmware/efi/libstub/vsprintf.o
CC net/mac80211/led.o
CC drivers/acpi/acpica/utids.o
CC drivers/acpi/thermal.o
CC kernel/crash_core.o
CC drivers/hid/hid-chicony.o
CC drivers/md/dm-zero.o
CC drivers/gpu/drm/drm_vblank.o
CC kernel/kexec.o
CC drivers/firmware/efi/libstub/x86-stub.o
CC [M] drivers/gpu/drm/xe/xe_guc_klv_helpers.o
CC fs/remap_range.o
CC drivers/gpu/drm/i915/gt/intel_ppgtt.o
CC drivers/hid/hid-cypress.o
CC drivers/firmware/efi/libstub/smbios.o
CC drivers/acpi/acpica/utinit.o
CC net/ipv4/ip_tunnel.o
CC net/ipv4/sysctl_net_ipv4.o
CC drivers/gpu/drm/i915/gt/intel_rc6.o
CC drivers/gpu/drm/i915/gt/intel_region_lmem.o
AR drivers/net/ethernet/netronome/built-in.a
GEN lib/oid_registry_data.c
CC drivers/gpu/drm/drm_vblank_work.o
CC drivers/hid/hid-ezkey.o
CC drivers/acpi/nhlt.o
CC net/ipv6/inet6_hashtables.o
CC kernel/utsname.o
CC drivers/gpu/drm/drm_vma_manager.o
AR drivers/net/ethernet/ni/built-in.a
CC net/mac80211/pm.o
CC lib/ucs2_string.o
CC arch/x86/kernel/kvmclock.o
CC net/ipv4/proc.o
CC drivers/acpi/acpica/utlock.o
CC drivers/acpi/acpica/utmath.o
CC drivers/hid/hid-gyration.o
CC drivers/acpi/acpica/utmisc.o
CC kernel/pid_namespace.o
CC [M] drivers/gpu/drm/xe/xe_guc_log.o
AR drivers/md/built-in.a
CC drivers/gpu/drm/drm_writeback.o
CC kernel/stop_machine.o
CC net/mac80211/rc80211_minstrel_ht.o
CC drivers/gpu/drm/i915/gt/intel_renderstate.o
CC drivers/hid/hid-ite.o
CC net/mac80211/wbrf.o
CC drivers/hid/hid-kensington.o
CC drivers/gpu/drm/i915/gt/intel_reset.o
CC lib/sbitmap.o
CC kernel/audit.o
CC drivers/net/ethernet/nvidia/forcedeth.o
AR drivers/net/ethernet/oki-semi/built-in.a
CC drivers/gpu/drm/drm_panel.o
CC net/ipv6/mcast_snoop.o
CC kernel/auditfilter.o
CC drivers/gpu/drm/drm_pci.o
CC [M] drivers/gpu/drm/xe/xe_guc_pc.o
CC drivers/gpu/drm/i915/gt/intel_ring.o
CC drivers/gpu/drm/i915/gt/intel_ring_submission.o
CC kernel/auditsc.o
CC fs/pidfs.o
STUBCPY drivers/firmware/efi/libstub/alignedmem.stub.o
STUBCPY drivers/firmware/efi/libstub/efi-stub-helper.stub.o
STUBCPY drivers/firmware/efi/libstub/file.stub.o
STUBCPY drivers/firmware/efi/libstub/gop.stub.o
STUBCPY drivers/firmware/efi/libstub/lib-cmdline.stub.o
CC drivers/acpi/acpi_memhotplug.o
STUBCPY drivers/firmware/efi/libstub/lib-ctype.stub.o
STUBCPY drivers/firmware/efi/libstub/mem.stub.o
CC drivers/acpi/acpica/utmutex.o
STUBCPY drivers/firmware/efi/libstub/pci.stub.o
STUBCPY drivers/firmware/efi/libstub/printk.stub.o
STUBCPY drivers/firmware/efi/libstub/random.stub.o
STUBCPY drivers/firmware/efi/libstub/randomalloc.stub.o
CC drivers/acpi/acpica/utnonansi.o
CC lib/group_cpus.o
STUBCPY drivers/firmware/efi/libstub/relocate.stub.o
STUBCPY drivers/firmware/efi/libstub/secureboot.stub.o
STUBCPY drivers/firmware/efi/libstub/skip_spaces.stub.o
CC kernel/audit_watch.o
STUBCPY drivers/firmware/efi/libstub/smbios.stub.o
STUBCPY drivers/firmware/efi/libstub/tpm.stub.o
STUBCPY drivers/firmware/efi/libstub/vsprintf.stub.o
STUBCPY drivers/firmware/efi/libstub/x86-stub.stub.o
AR drivers/firmware/efi/libstub/lib.a
AR drivers/firmware/built-in.a
CC [M] drivers/gpu/drm/xe/xe_guc_submit.o
CC drivers/gpu/drm/i915/gt/intel_rps.o
CC drivers/acpi/ioapic.o
CC kernel/audit_fsnotify.o
CC arch/x86/kernel/paravirt.o
CC drivers/acpi/acpica/utobject.o
CC net/ipv4/fib_rules.o
AR drivers/net/ethernet/packetengines/built-in.a
CC lib/fw_table.o
CC arch/x86/kernel/pvclock.o
CC drivers/hid/hid-lg.o
CC drivers/gpu/drm/drm_debugfs.o
CC net/ipv4/ipmr.o
CC drivers/gpu/drm/i915/gt/intel_sa_media.o
CC drivers/hid/hid-lgff.o
CC [M] drivers/gpu/drm/xe/xe_heci_gsc.o
CC fs/buffer.o
CC drivers/acpi/battery.o
CC net/ipv4/ipmr_base.o
CC arch/x86/kernel/pcspeaker.o
AR lib/lib.a
GEN lib/crc32table.h
CC net/ipv4/syncookies.o
CC fs/mpage.o
CC drivers/acpi/acpica/utosi.o
CC kernel/audit_tree.o
CC arch/x86/kernel/check.o
CC drivers/hid/hid-lg4ff.o
CC drivers/acpi/bgrt.o
CC drivers/gpu/drm/drm_debugfs_crc.o
CC net/ipv4/tunnel4.o
AR drivers/net/ethernet/qlogic/built-in.a
CC drivers/hid/hid-lg-g15.o
CC drivers/hid/hid-microsoft.o
CC lib/oid_registry.o
CC drivers/acpi/acpica/utownerid.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine.o
CC drivers/acpi/spcr.o
CC kernel/kprobes.o
AR net/ipv6/built-in.a
CC net/ipv4/ipconfig.o
CC fs/proc_namespace.o
CC arch/x86/kernel/uprobes.o
CC drivers/gpu/drm/i915/gt/intel_sseu.o
CC drivers/gpu/drm/drm_panel_orientation_quirks.o
CC drivers/hid/hid-monterey.o
CC drivers/gpu/drm/drm_buddy.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.o
CC net/ipv4/netfilter.o
CC fs/direct-io.o
CC drivers/gpu/drm/i915/gt/intel_sseu_debugfs.o
AR drivers/net/ethernet/qualcomm/emac/built-in.a
AR drivers/net/ethernet/qualcomm/built-in.a
CC drivers/acpi/acpica/utpredef.o
CC drivers/net/ethernet/realtek/8139too.o
CC kernel/seccomp.o
CC lib/crc32.o
CC drivers/gpu/drm/drm_gem_shmem_helper.o
CC net/ipv4/tcp_cubic.o
CC net/ipv4/tcp_sigpool.o
CC arch/x86/kernel/perf_regs.o
AR drivers/net/ethernet/renesas/built-in.a
CC drivers/acpi/acpica/utresdecode.o
CC drivers/gpu/drm/i915/gt/intel_timeline.o
CC drivers/net/ethernet/realtek/r8169_main.o
CC fs/eventpoll.o
CC drivers/gpu/drm/drm_atomic_helper.o
CC [M] drivers/gpu/drm/xe/xe_hw_engine_group.o
AR drivers/net/ethernet/rdc/built-in.a
CC drivers/gpu/drm/drm_atomic_state_helper.o
CC drivers/hid/hid-ntrig.o
CC [M] drivers/gpu/drm/xe/xe_hw_fence.o
CC arch/x86/kernel/tracepoint.o
CC net/ipv4/cipso_ipv4.o
CC drivers/gpu/drm/i915/gt/intel_tlb.o
CC drivers/net/ethernet/realtek/r8169_firmware.o
CC fs/anon_inodes.o
CC drivers/gpu/drm/drm_crtc_helper.o
CC [M] drivers/gpu/drm/xe/xe_huc.o
AR lib/built-in.a
CC arch/x86/kernel/itmt.o
CC drivers/acpi/acpica/utresrc.o
CC drivers/gpu/drm/drm_damage_helper.o
CC drivers/gpu/drm/i915/gt/intel_wopcm.o
CC kernel/relay.o
AR drivers/net/ethernet/rocker/built-in.a
CC fs/signalfd.o
CC drivers/acpi/acpica/utstate.o
CC drivers/net/ethernet/realtek/r8169_phy_config.o
CC drivers/gpu/drm/drm_encoder_slave.o
CC fs/timerfd.o
CC drivers/gpu/drm/i915/gt/intel_workarounds.o
CC kernel/utsname_sysctl.o
CC arch/x86/kernel/umip.o
CC drivers/hid/hid-pl.o
AR drivers/net/ethernet/intel/e1000e/built-in.a
AR drivers/net/ethernet/intel/built-in.a
CC [M] drivers/gpu/drm/xe/xe_irq.o
CC drivers/gpu/drm/drm_flip_work.o
CC drivers/gpu/drm/i915/gt/shmem_utils.o
CC net/ipv4/xfrm4_policy.o
CC [M] drivers/gpu/drm/xe/xe_lrc.o
CC drivers/acpi/acpica/utstring.o
CC kernel/delayacct.o
CC arch/x86/kernel/unwind_frame.o
CC drivers/gpu/drm/drm_format_helper.o
CC drivers/gpu/drm/drm_gem_atomic_helper.o
CC drivers/gpu/drm/i915/gt/sysfs_engines.o
CC drivers/acpi/acpica/utstrsuppt.o
CC [M] drivers/gpu/drm/xe/xe_migrate.o
CC drivers/hid/hid-petalynx.o
CC drivers/hid/hid-redragon.o
AR drivers/net/ethernet/samsung/built-in.a
CC net/ipv4/xfrm4_state.o
CC drivers/gpu/drm/i915/gt/intel_ggtt_gmch.o
CC net/ipv4/xfrm4_input.o
CC drivers/acpi/acpica/utstrtoul64.o
CC kernel/taskstats.o
AR drivers/net/ethernet/seeq/built-in.a
CC [M] drivers/gpu/drm/xe/xe_mmio.o
CC drivers/gpu/drm/i915/gt/gen6_renderstate.o
CC net/ipv4/xfrm4_output.o
CC drivers/acpi/acpica/utxface.o
CC drivers/gpu/drm/drm_gem_framebuffer_helper.o
AR drivers/net/ethernet/silan/built-in.a
CC drivers/gpu/drm/i915/gt/gen7_renderstate.o
CC kernel/tsacct.o
CC drivers/acpi/acpica/utxfinit.o
CC net/ipv4/xfrm4_protocol.o
CC drivers/gpu/drm/i915/gt/gen8_renderstate.o
CC [M] drivers/gpu/drm/xe/xe_mocs.o
AR drivers/net/ethernet/sis/built-in.a
CC kernel/tracepoint.o
CC drivers/gpu/drm/drm_kms_helper_common.o
CC drivers/acpi/acpica/utxferror.o
CC kernel/irq_work.o
CC drivers/acpi/acpica/utxfmutex.o
CC kernel/static_call.o
CC drivers/hid/hid-samsung.o
AR drivers/net/ethernet/sfc/built-in.a
CC drivers/hid/hid-sony.o
CC drivers/gpu/drm/i915/gt/gen9_renderstate.o
AR drivers/net/ethernet/smsc/built-in.a
CC drivers/hid/hid-sunplus.o
CC drivers/gpu/drm/i915/gem/i915_gem_busy.o
AR drivers/net/ethernet/nvidia/built-in.a
CC [M] drivers/gpu/drm/xe/xe_module.o
CC fs/eventfd.o
AR arch/x86/kernel/built-in.a
AR arch/x86/built-in.a
CC drivers/hid/hid-topseed.o
CC drivers/gpu/drm/drm_modeset_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_clflush.o
AR drivers/net/ethernet/socionext/built-in.a
CC kernel/padata.o
CC fs/aio.o
AR drivers/net/ethernet/stmicro/built-in.a
AR drivers/net/ethernet/sun/built-in.a
CC [M] drivers/gpu/drm/xe/xe_oa.o
CC fs/locks.o
AR drivers/net/ethernet/ti/built-in.a
AR drivers/net/ethernet/tehuti/built-in.a
CC [M] drivers/gpu/drm/xe/xe_observation.o
CC drivers/gpu/drm/drm_plane_helper.o
CC kernel/jump_label.o
AR drivers/net/ethernet/vertexcom/built-in.a
CC kernel/context_tracking.o
CC drivers/gpu/drm/drm_probe_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_context.o
CC kernel/iomem.o
AR drivers/acpi/acpica/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_create.o
AR drivers/acpi/built-in.a
CC drivers/gpu/drm/drm_self_refresh_helper.o
AR drivers/net/ethernet/via/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_dmabuf.o
CC kernel/rseq.o
CC drivers/gpu/drm/drm_simple_kms_helper.o
CC [M] drivers/gpu/drm/xe/xe_pat.o
CC drivers/gpu/drm/i915/gem/i915_gem_domain.o
CC drivers/gpu/drm/bridge/panel.o
AR drivers/net/ethernet/wangxun/built-in.a
CC fs/binfmt_misc.o
CC [M] drivers/gpu/drm/xe/xe_pci.o
CC fs/binfmt_script.o
CC drivers/gpu/drm/drm_mipi_dsi.o
CC drivers/gpu/drm/i915/gem/i915_gem_execbuffer.o
AR drivers/net/ethernet/wiznet/built-in.a
CC [M] drivers/gpu/drm/xe/xe_pcode.o
CC fs/binfmt_elf.o
CC [M] drivers/gpu/drm/xe/xe_pm.o
AR drivers/net/ethernet/xilinx/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_internal.o
CC fs/mbcache.o
CC [M] drivers/gpu/drm/xe/xe_preempt_fence.o
AR drivers/net/ethernet/xircom/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_lmem.o
CC fs/posix_acl.o
CC fs/coredump.o
AR drivers/net/ethernet/synopsys/built-in.a
AR drivers/net/ethernet/pensando/built-in.a
CC [M] drivers/gpu/drm/xe/xe_pt.o
CC drivers/gpu/drm/i915/gem/i915_gem_mman.o
CC drivers/gpu/drm/i915/gem/i915_gem_object.o
CC [M] drivers/gpu/drm/drm_exec.o
CC fs/drop_caches.o
CC [M] drivers/gpu/drm/xe/xe_pt_walk.o
AR net/ipv4/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_pages.o
CC fs/sysctls.o
CC [M] drivers/gpu/drm/drm_gpuvm.o
CC [M] drivers/gpu/drm/xe/xe_query.o
CC fs/fhandle.o
CC drivers/gpu/drm/i915/gem/i915_gem_phys.o
CC [M] drivers/gpu/drm/drm_suballoc.o
CC [M] drivers/gpu/drm/xe/xe_range_fence.o
CC drivers/gpu/drm/i915/gem/i915_gem_pm.o
CC [M] drivers/gpu/drm/xe/xe_reg_sr.o
CC [M] drivers/gpu/drm/drm_gem_ttm_helper.o
AR drivers/hid/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_region.o
CC [M] drivers/gpu/drm/xe/xe_reg_whitelist.o
AR kernel/built-in.a
CC drivers/gpu/drm/i915/gem/i915_gem_shmem.o
CC [M] drivers/gpu/drm/xe/xe_rtp.o
CC [M] drivers/gpu/drm/xe/xe_ring_ops.o
CC [M] drivers/gpu/drm/xe/xe_sa.o
CC drivers/gpu/drm/i915/gem/i915_gem_shrinker.o
CC drivers/gpu/drm/i915/gem/i915_gem_stolen.o
CC [M] drivers/gpu/drm/xe/xe_sched_job.o
CC drivers/gpu/drm/i915/gem/i915_gem_throttle.o
CC [M] drivers/gpu/drm/xe/xe_step.o
CC [M] drivers/gpu/drm/xe/xe_sync.o
CC drivers/gpu/drm/i915/gem/i915_gem_tiling.o
CC [M] drivers/gpu/drm/xe/xe_tile.o
CC [M] drivers/gpu/drm/xe/xe_tile_sysfs.o
CC [M] drivers/gpu/drm/xe/xe_trace.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_move.o
CC [M] drivers/gpu/drm/xe/xe_trace_bo.o
CC [M] drivers/gpu/drm/xe/xe_trace_guc.o
CC drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.o
AR drivers/net/ethernet/realtek/built-in.a
AR drivers/net/ethernet/built-in.a
CC [M] drivers/gpu/drm/xe/xe_trace_lrc.o
CC drivers/gpu/drm/i915/gem/i915_gem_userptr.o
AR drivers/net/built-in.a
LD [M] drivers/gpu/drm/drm_suballoc_helper.o
CC drivers/gpu/drm/i915/gem/i915_gem_wait.o
CC [M] drivers/gpu/drm/xe/xe_ttm_sys_mgr.o
CC drivers/gpu/drm/i915/gem/i915_gemfs.o
LD [M] drivers/gpu/drm/drm_ttm_helper.o
CC [M] drivers/gpu/drm/xe/xe_ttm_stolen_mgr.o
CC drivers/gpu/drm/i915/i915_active.o
CC [M] drivers/gpu/drm/xe/xe_ttm_vram_mgr.o
CC drivers/gpu/drm/i915/i915_cmd_parser.o
CC [M] drivers/gpu/drm/xe/xe_tuning.o
CC drivers/gpu/drm/i915/i915_deps.o
CC [M] drivers/gpu/drm/xe/xe_uc.o
CC [M] drivers/gpu/drm/xe/xe_uc_fw.o
CC drivers/gpu/drm/i915/i915_gem.o
CC [M] drivers/gpu/drm/xe/xe_vm.o
CC [M] drivers/gpu/drm/xe/xe_vram.o
CC [M] drivers/gpu/drm/xe/xe_vram_freq.o
CC [M] drivers/gpu/drm/xe/xe_wait_user_fence.o
CC [M] drivers/gpu/drm/xe/xe_wa.o
CC drivers/gpu/drm/i915/i915_gem_evict.o
CC [M] drivers/gpu/drm/xe/xe_wopcm.o
CC [M] drivers/gpu/drm/xe/xe_hmm.o
CC drivers/gpu/drm/i915/i915_gem_gtt.o
CC drivers/gpu/drm/i915/i915_gem_ww.o
CC [M] drivers/gpu/drm/xe/xe_hwmon.o
CC drivers/gpu/drm/i915/i915_query.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf.o
CC [M] drivers/gpu/drm/xe/xe_guc_relay.o
CC [M] drivers/gpu/drm/xe/xe_memirq.o
CC drivers/gpu/drm/i915/i915_request.o
CC [M] drivers/gpu/drm/xe/xe_sriov.o
AR fs/built-in.a
CC drivers/gpu/drm/i915/i915_scheduler.o
CC drivers/gpu/drm/i915/i915_trace_points.o
CC [M] drivers/gpu/drm/xe/xe_sriov_vf.o
CC drivers/gpu/drm/i915/i915_ttm_buddy_manager.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_irq.o
CC drivers/gpu/drm/i915/i915_vma.o
CC drivers/gpu/drm/i915/i915_vma_resource.o
CC [M] drivers/gpu/drm/xe/display/ext/i915_utils.o
CC [M] drivers/gpu/drm/xe/display/intel_bo.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_proxy.o
CC [M] drivers/gpu/drm/xe/display/intel_fb_bo.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc.o
CC [M] drivers/gpu/drm/xe/display/intel_fbdev_fb.o
CC [M] drivers/gpu/drm/xe/display/xe_display.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_heci_cmd_submit.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ads.o
CC [M] drivers/gpu/drm/xe/display/xe_display_misc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_capture.o
CC [M] drivers/gpu/drm/xe/display/xe_display_rps.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_ct.o
CC [M] drivers/gpu/drm/xe/display/xe_display_wa.o
CC [M] drivers/gpu/drm/xe/display/xe_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/display/xe_fb_pin.o
CC [M] drivers/gpu/drm/xe/display/xe_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/display/xe_plane_initial.o
CC [M] drivers/gpu/drm/xe/display/xe_tdf.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_dram.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.o
AR net/mac80211/built-in.a
AR net/built-in.a
CC [M] drivers/gpu/drm/xe/i915-soc/intel_pch.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_fw.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_hwconfig.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-soc/intel_rom.o
CC [M] drivers/gpu/drm/xe/i915-display/icl_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_alpm.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_rc.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_atomic_plane.o
CC drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.o
CC drivers/gpu/drm/i915/gt/uc/intel_huc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_audio.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_backlight.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bios.o
CC drivers/gpu/drm/i915/gt/uc/intel_uc_fw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cdclk.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_color.o
CC drivers/gpu/drm/i915/gt/intel_gsc.o
CC drivers/gpu/drm/i915/i915_hwmon.o
CC drivers/gpu/drm/i915/display/hsw_ips.o
CC drivers/gpu/drm/i915/display/i9xx_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_combo_phy.o
CC drivers/gpu/drm/i915/display/i9xx_display_sr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_connector.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc.o
CC drivers/gpu/drm/i915/display/i9xx_wm.o
CC drivers/gpu/drm/i915/display/intel_alpm.o
CC drivers/gpu/drm/i915/display/intel_atomic.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_crtc_state_dump.o
CC drivers/gpu/drm/i915/display/intel_atomic_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cursor.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_audio.o
CC drivers/gpu/drm/i915/display/intel_bios.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi.o
CC drivers/gpu/drm/i915/display/intel_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/display/intel_bw.o
CC drivers/gpu/drm/i915/display/intel_cdclk.o
CC drivers/gpu/drm/i915/display/intel_color.o
CC drivers/gpu/drm/i915/display/intel_combo_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_connector.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_driver.o
CC drivers/gpu/drm/i915/display/intel_crtc.o
CC drivers/gpu/drm/i915/display/intel_crtc_state_dump.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_irq.o
CC drivers/gpu/drm/i915/display/intel_cursor.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_params.o
CC drivers/gpu/drm/i915/display/intel_display.o
CC drivers/gpu/drm/i915/display/intel_display_driver.o
CC drivers/gpu/drm/i915/display/intel_display_irq.o
CC drivers/gpu/drm/i915/display/intel_display_params.o
CC drivers/gpu/drm/i915/display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_map.o
CC drivers/gpu/drm/i915/display/intel_display_power_map.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_power_well.o
CC drivers/gpu/drm/i915/display/intel_display_power_well.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_display_reset.o
CC drivers/gpu/drm/i915/display/intel_display_rps.o
CC drivers/gpu/drm/i915/display/intel_display_snapshot.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_wa.o
CC drivers/gpu/drm/i915/display/intel_display_wa.o
CC drivers/gpu/drm/i915/display/intel_dmc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_dmc_wl.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc.o
CC drivers/gpu/drm/i915/display/intel_dpio_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_dpll.o
CC drivers/gpu/drm/i915/display/intel_dpll_mgr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_aux_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_dpt.o
CC drivers/gpu/drm/i915/display/intel_dpt_common.o
CC drivers/gpu/drm/i915/display/intel_drrs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_mst.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_dsb.o
CC drivers/gpu/drm/i915/display/intel_dsb_buffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpll_mgr.o
CC drivers/gpu/drm/i915/display/intel_fb.o
CC drivers/gpu/drm/i915/display/intel_fb_bo.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dpt_common.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_drrs.o
CC drivers/gpu/drm/i915/display/intel_fb_pin.o
CC drivers/gpu/drm/i915/display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsb.o
CC drivers/gpu/drm/i915/display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_fifo_underrun.o
CC drivers/gpu/drm/i915/display/intel_frontbuffer.o
CC drivers/gpu/drm/i915/display/intel_global_state.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_dcs_backlight.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dsi_vbt.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fb.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fbc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fdi.o
CC drivers/gpu/drm/i915/display/intel_hdcp_gsc_message.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_fifo_underrun.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_frontbuffer.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_global_state.o
CC drivers/gpu/drm/i915/display/intel_hotplug.o
CC drivers/gpu/drm/i915/display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_hti.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdcp_gsc_message.o
CC drivers/gpu/drm/i915/display/intel_link_bw.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_load_detect.o
CC drivers/gpu/drm/i915/display/intel_lpe_audio.o
CC drivers/gpu/drm/i915/display/intel_modeset_lock.o
CC drivers/gpu/drm/i915/display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_modeset_verify.o
CC drivers/gpu/drm/i915/display/intel_overlay.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug.o
CC drivers/gpu/drm/i915/display/intel_pch_display.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hotplug_irq.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_hti.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_link_bw.o
CC drivers/gpu/drm/i915/display/intel_pch_refclk.o
CC drivers/gpu/drm/i915/display/intel_plane_initial.o
CC drivers/gpu/drm/i915/display/intel_pmdemand.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_psr.o
CC drivers/gpu/drm/i915/display/intel_quirks.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_lock.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_setup.o
CC drivers/gpu/drm/i915/display/intel_sprite.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_modeset_verify.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_sprite_uapi.o
CC drivers/gpu/drm/i915/display/intel_tc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pfit.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pmdemand.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_vblank.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_psr.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_vga.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_quirks.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_snps_phy.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_tc.o
CC drivers/gpu/drm/i915/display/intel_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vblank.o
CC drivers/gpu/drm/i915/display/skl_scaler.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vdsc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vga.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_vrr.o
CC drivers/gpu/drm/i915/display/skl_universal_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_dmc_wl.o
CC drivers/gpu/drm/i915/display/skl_watermark.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_wm.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_scaler.o
CC drivers/gpu/drm/i915/display/intel_acpi.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_universal_plane.o
CC [M] drivers/gpu/drm/xe/i915-display/skl_watermark.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_acpi.o
CC drivers/gpu/drm/i915/display/intel_opregion.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs.o
CC drivers/gpu/drm/i915/display/intel_display_debugfs_params.o
CC drivers/gpu/drm/i915/display/intel_pipe_crc.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_opregion.o
CC drivers/gpu/drm/i915/display/dvo_ch7017.o
CC [M] drivers/gpu/drm/xe/xe_debugfs.o
CC drivers/gpu/drm/i915/display/dvo_ch7xxx.o
CC drivers/gpu/drm/i915/display/dvo_ivch.o
CC [M] drivers/gpu/drm/xe/xe_gt_debugfs.o
CC drivers/gpu/drm/i915/display/dvo_ns2501.o
CC drivers/gpu/drm/i915/display/dvo_sil164.o
CC [M] drivers/gpu/drm/xe/xe_gt_sriov_vf_debugfs.o
CC drivers/gpu/drm/i915/display/dvo_tfp410.o
CC [M] drivers/gpu/drm/xe/xe_gt_stats.o
CC [M] drivers/gpu/drm/xe/xe_guc_debugfs.o
CC drivers/gpu/drm/i915/display/g4x_dp.o
CC [M] drivers/gpu/drm/xe/xe_huc_debugfs.o
CC [M] drivers/gpu/drm/xe/xe_uc_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_display_debugfs_params.o
CC [M] drivers/gpu/drm/xe/i915-display/intel_pipe_crc.o
CC drivers/gpu/drm/i915/display/g4x_hdmi.o
CC drivers/gpu/drm/i915/display/icl_dsi.o
CC drivers/gpu/drm/i915/display/intel_backlight.o
CC drivers/gpu/drm/i915/display/intel_crt.o
CC drivers/gpu/drm/i915/display/intel_cx0_phy.o
CC drivers/gpu/drm/i915/display/intel_ddi.o
CC drivers/gpu/drm/i915/display/intel_ddi_buf_trans.o
CC drivers/gpu/drm/i915/display/intel_display_device.o
CC drivers/gpu/drm/i915/display/intel_display_trace.o
CC drivers/gpu/drm/i915/display/intel_dkl_phy.o
CC drivers/gpu/drm/i915/display/intel_dp.o
CC drivers/gpu/drm/i915/display/intel_dp_aux.o
CC drivers/gpu/drm/i915/display/intel_dp_aux_backlight.o
CC drivers/gpu/drm/i915/display/intel_dp_hdcp.o
CC drivers/gpu/drm/i915/display/intel_dp_link_training.o
CC drivers/gpu/drm/i915/display/intel_dp_mst.o
CC drivers/gpu/drm/i915/display/intel_dp_test.o
CC drivers/gpu/drm/i915/display/intel_dsi.o
CC drivers/gpu/drm/i915/display/intel_dsi_dcs_backlight.o
CC drivers/gpu/drm/i915/display/intel_dsi_vbt.o
CC drivers/gpu/drm/i915/display/intel_dvo.o
CC drivers/gpu/drm/i915/display/intel_encoder.o
CC drivers/gpu/drm/i915/display/intel_gmbus.o
CC drivers/gpu/drm/i915/display/intel_hdmi.o
CC drivers/gpu/drm/i915/display/intel_lspcon.o
CC drivers/gpu/drm/i915/display/intel_lvds.o
CC drivers/gpu/drm/i915/display/intel_panel.o
CC drivers/gpu/drm/i915/display/intel_pfit.o
CC drivers/gpu/drm/i915/display/intel_pps.o
CC drivers/gpu/drm/i915/display/intel_qp_tables.o
CC drivers/gpu/drm/i915/display/intel_sdvo.o
CC drivers/gpu/drm/i915/display/intel_snps_phy.o
CC drivers/gpu/drm/i915/display/intel_tv.o
CC drivers/gpu/drm/i915/display/intel_vdsc.o
CC drivers/gpu/drm/i915/display/intel_vrr.o
CC drivers/gpu/drm/i915/display/vlv_dsi.o
CC drivers/gpu/drm/i915/display/vlv_dsi_pll.o
CC drivers/gpu/drm/i915/i915_perf.o
CC drivers/gpu/drm/i915/pxp/intel_pxp.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_huc.o
CC drivers/gpu/drm/i915/pxp/intel_pxp_tee.o
CC drivers/gpu/drm/i915/i915_gpu_error.o
CC drivers/gpu/drm/i915/i915_vgpu.o
LD [M] drivers/gpu/drm/xe/xe.o
AR drivers/gpu/drm/i915/built-in.a
AR drivers/gpu/drm/built-in.a
AR drivers/gpu/built-in.a
AR drivers/built-in.a
AR built-in.a
AR vmlinux.a
LD vmlinux.o
OBJCOPY modules.builtin.modinfo
GEN modules.builtin
MODPOST Module.symvers
CC .vmlinux.export.o
CC [M] fs/efivarfs/efivarfs.mod.o
CC [M] .module-common.o
CC [M] drivers/gpu/drm/drm_exec.mod.o
CC [M] drivers/gpu/drm/drm_gpuvm.mod.o
CC [M] drivers/gpu/drm/drm_suballoc_helper.mod.o
CC [M] drivers/gpu/drm/drm_ttm_helper.mod.o
CC [M] drivers/gpu/drm/scheduler/gpu-sched.mod.o
CC [M] drivers/gpu/drm/xe/xe.mod.o
CC [M] drivers/thermal/intel/x86_pkg_temp_thermal.mod.o
CC [M] net/netfilter/nf_log_syslog.mod.o
CC [M] net/netfilter/xt_mark.mod.o
CC [M] net/netfilter/xt_nat.mod.o
CC [M] net/netfilter/xt_LOG.mod.o
CC [M] net/netfilter/xt_MASQUERADE.mod.o
CC [M] net/netfilter/xt_addrtype.mod.o
CC [M] net/ipv4/netfilter/iptable_nat.mod.o
LD [M] fs/efivarfs/efivarfs.ko
LD [M] drivers/gpu/drm/drm_exec.ko
LD [M] drivers/gpu/drm/drm_gpuvm.ko
LD [M] drivers/gpu/drm/drm_suballoc_helper.ko
LD [M] drivers/gpu/drm/drm_ttm_helper.ko
LD [M] drivers/gpu/drm/scheduler/gpu-sched.ko
LD [M] drivers/thermal/intel/x86_pkg_temp_thermal.ko
LD [M] net/netfilter/nf_log_syslog.ko
LD [M] net/netfilter/xt_mark.ko
LD [M] net/netfilter/xt_LOG.ko
LD [M] net/netfilter/xt_MASQUERADE.ko
LD [M] net/netfilter/xt_addrtype.ko
LD [M] net/ipv4/netfilter/iptable_nat.ko
LD [M] drivers/gpu/drm/xe/xe.ko
LD [M] net/netfilter/xt_nat.ko
UPD include/generated/utsversion.h
CC init/version-timestamp.o
KSYMS .tmp_vmlinux0.kallsyms.S
AS .tmp_vmlinux0.kallsyms.o
LD .tmp_vmlinux1
NM .tmp_vmlinux1.syms
KSYMS .tmp_vmlinux1.kallsyms.S
AS .tmp_vmlinux1.kallsyms.o
LD .tmp_vmlinux2
NM .tmp_vmlinux2.syms
KSYMS .tmp_vmlinux2.kallsyms.S
AS .tmp_vmlinux2.kallsyms.o
LD vmlinux
NM System.map
SORTTAB vmlinux
RELOCS arch/x86/boot/compressed/vmlinux.relocs
RSTRIP vmlinux
CC arch/x86/boot/a20.o
AS arch/x86/boot/bioscall.o
CC arch/x86/boot/cmdline.o
AS arch/x86/boot/copy.o
HOSTCC arch/x86/boot/mkcpustr
CC arch/x86/boot/cpuflags.o
CC arch/x86/boot/cpucheck.o
CC arch/x86/boot/early_serial_console.o
CC arch/x86/boot/edd.o
CC arch/x86/boot/main.o
CC arch/x86/boot/memory.o
CC arch/x86/boot/pm.o
AS arch/x86/boot/pmjump.o
CC arch/x86/boot/printf.o
CC arch/x86/boot/regs.o
CC arch/x86/boot/string.o
CC arch/x86/boot/tty.o
CC arch/x86/boot/video.o
CC arch/x86/boot/video-mode.o
CC arch/x86/boot/version.o
CC arch/x86/boot/video-vga.o
CC arch/x86/boot/video-vesa.o
CC arch/x86/boot/video-bios.o
HOSTCC arch/x86/boot/tools/build
LDS arch/x86/boot/compressed/vmlinux.lds
AS arch/x86/boot/compressed/kernel_info.o
AS arch/x86/boot/compressed/head_32.o
VOFFSET arch/x86/boot/compressed/../voffset.h
CPUSTR arch/x86/boot/cpustr.h
CC arch/x86/boot/compressed/string.o
CC arch/x86/boot/compressed/cmdline.o
CC arch/x86/boot/compressed/error.o
OBJCOPY arch/x86/boot/compressed/vmlinux.bin
CC arch/x86/boot/cpu.o
HOSTCC arch/x86/boot/compressed/mkpiggy
CC arch/x86/boot/compressed/cpuflags.o
CC arch/x86/boot/compressed/early_serial_console.o
CC arch/x86/boot/compressed/kaslr.o
CC arch/x86/boot/compressed/acpi.o
CC arch/x86/boot/compressed/efi.o
GZIP arch/x86/boot/compressed/vmlinux.bin.gz
CC arch/x86/boot/compressed/misc.o
MKPIGGY arch/x86/boot/compressed/piggy.S
AS arch/x86/boot/compressed/piggy.o
LD arch/x86/boot/compressed/vmlinux
ZOFFSET arch/x86/boot/zoffset.h
OBJCOPY arch/x86/boot/vmlinux.bin
AS arch/x86/boot/header.o
LD arch/x86/boot/setup.elf
OBJCOPY arch/x86/boot/setup.bin
BUILD arch/x86/boot/bzImage
Kernel: arch/x86/boot/bzImage is ready (#1)
run-parts: executing /workspace/ci/hooks/20-kernel-doc
+ SRC_DIR=/workspace/kernel
+ cd /workspace/kernel
+ find drivers/gpu/drm/xe/ -name '*.[ch]' -not -path 'drivers/gpu/drm/xe/display/*'
+ xargs ./scripts/kernel-doc -Werror -none include/uapi/drm/xe_drm.h
date: invalid date ‘+%s’
All hooks done
^ permalink raw reply [flat|nested] 43+ messages in thread
* ✗ CI.checksparse: warning for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (29 preceding siblings ...)
2024-11-26 14:03 ` ✓ CI.Hooks: " Patchwork
@ 2024-11-26 14:04 ` Patchwork
2024-11-26 14:31 ` ✓ Xe.CI.BAT: success " Patchwork
2024-11-26 16:09 ` ✗ Xe.CI.Full: failure " Patchwork
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 14:04 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : warning
== Summary ==
+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast ef0147fcb01d58268e41f3b72e21c99014c55b8f
/root/linux/maintainer-tools/dim: line 2068: sparse: command not found
Sparse version:
Fast mode used, each commit won't be checked separately.
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 43+ messages in thread
* ✓ Xe.CI.BAT: success for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (30 preceding siblings ...)
2024-11-26 14:04 ` ✗ CI.checksparse: warning " Patchwork
@ 2024-11-26 14:31 ` Patchwork
2024-11-26 16:09 ` ✗ Xe.CI.Full: failure " Patchwork
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 14:31 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 7011 bytes --]
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : success
== Summary ==
CI Bug Log - changes from xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e_BAT -> xe-pw-141788v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (8 -> 9)
------------------------------
Additional (1): bat-pvc-2
Known issues
------------
Here are the changes found in xe-pw-141788v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_addfb_basic@addfb25-x-tiled-legacy:
- bat-pvc-2: NOTRUN -> [SKIP][1] ([i915#6077]) +30 other tests skip
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_addfb_basic@addfb25-x-tiled-legacy.html
* igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size:
- bat-pvc-2: NOTRUN -> [SKIP][2] ([Intel XE#1024] / [Intel XE#782]) +5 other tests skip
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html
* igt@kms_dsc@dsc-basic:
- bat-pvc-2: NOTRUN -> [SKIP][3] ([Intel XE#1024] / [Intel XE#784])
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_dsc@dsc-basic.html
* igt@kms_flip@basic-flip-vs-wf_vblank:
- bat-pvc-2: NOTRUN -> [SKIP][4] ([Intel XE#1024] / [Intel XE#947]) +3 other tests skip
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_flip@basic-flip-vs-wf_vblank.html
* igt@kms_force_connector_basic@force-connector-state:
- bat-pvc-2: NOTRUN -> [SKIP][5] ([Intel XE#540]) +3 other tests skip
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@basic:
- bat-pvc-2: NOTRUN -> [SKIP][6] ([Intel XE#1024] / [Intel XE#783])
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_pipe_crc_basic@read-crc-frame-sequence:
- bat-pvc-2: NOTRUN -> [SKIP][7] ([Intel XE#829]) +6 other tests skip
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_pipe_crc_basic@read-crc-frame-sequence.html
* igt@kms_prop_blob@basic:
- bat-pvc-2: NOTRUN -> [SKIP][8] ([Intel XE#780])
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_prop_blob@basic.html
* igt@kms_psr@psr-sprite-plane-onoff:
- bat-pvc-2: NOTRUN -> [SKIP][9] ([Intel XE#1024]) +2 other tests skip
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@kms_psr@psr-sprite-plane-onoff.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- bat-pvc-2: NOTRUN -> [SKIP][10] ([Intel XE#2849]) +1 other test skip
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_gt_freq@freq_fixed_idle:
- bat-pvc-2: NOTRUN -> [SKIP][11] ([Intel XE#1021]) +1 other test skip
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_gt_freq@freq_fixed_idle.html
* igt@xe_huc_copy@huc_copy:
- bat-pvc-2: NOTRUN -> [SKIP][12] ([Intel XE#255])
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_huc_copy@huc_copy.html
* igt@xe_intel_bb@render:
- bat-pvc-2: NOTRUN -> [SKIP][13] ([Intel XE#532])
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_intel_bb@render.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- bat-pvc-2: NOTRUN -> [SKIP][14] ([Intel XE#2229]) +1 other test skip
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_pat@pat-index-xe2:
- bat-pvc-2: NOTRUN -> [SKIP][15] ([Intel XE#977]) +1 other test skip
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc@render:
- bat-pvc-2: NOTRUN -> [SKIP][16] ([Intel XE#976])
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_pat@pat-index-xehpc@render.html
* igt@xe_pat@pat-index-xelpg:
- bat-pvc-2: NOTRUN -> [SKIP][17] ([Intel XE#979])
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_pat@pat-index-xelpg.html
* igt@xe_pm_residency@gt-c6-on-idle:
- bat-pvc-2: NOTRUN -> [SKIP][18] ([Intel XE#531])
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_pm_residency@gt-c6-on-idle.html
* igt@xe_sriov_flr@flr-vf1-clear:
- bat-pvc-2: NOTRUN -> [SKIP][19] ([Intel XE#3342])
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/bat-pvc-2/igt@xe_sriov_flr@flr-vf1-clear.html
[Intel XE#1021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1021
[Intel XE#1024]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1024
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#531]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/531
[Intel XE#532]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/532
[Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
[Intel XE#780]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/780
[Intel XE#782]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/782
[Intel XE#783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/783
[Intel XE#784]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/784
[Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
[Intel XE#947]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/947
[Intel XE#976]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/976
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
[i915#6077]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/6077
Build changes
-------------
* IGT: IGT_8125 -> IGT_8126
* Linux: xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e -> xe-pw-141788v1
IGT_8125: fbfda23ba003aab3454436d95c233dcf5e3bee54 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8126: 8126
xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e: 7cd4d1589e461d61330ec272c448bc6d1b9da35e
xe-pw-141788v1: 141788v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/index.html
[-- Attachment #2: Type: text/html, Size: 8303 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* ✗ Xe.CI.Full: failure for Plane Color Pipeline support for Intel platforms
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
` (31 preceding siblings ...)
2024-11-26 14:31 ` ✓ Xe.CI.BAT: success " Patchwork
@ 2024-11-26 16:09 ` Patchwork
32 siblings, 0 replies; 43+ messages in thread
From: Patchwork @ 2024-11-26 16:09 UTC (permalink / raw)
To: Uma Shankar; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 211421 bytes --]
== Series Details ==
Series: Plane Color Pipeline support for Intel platforms
URL : https://patchwork.freedesktop.org/series/141788/
State : failure
== Summary ==
CI Bug Log - changes from xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e_full -> xe-pw-141788v1_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-141788v1_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-141788v1_full, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-141788v1_full:
### IGT changes ###
#### Possible regressions ####
* igt@core_getversion@basic:
- shard-bmg: [PASS][1] -> [FAIL][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@core_getversion@basic.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@core_getversion@basic.html
* igt@kms_cursor_edge_walk@128x128-right-edge:
- shard-bmg: [PASS][3] -> [INCOMPLETE][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_cursor_edge_walk@128x128-right-edge.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_cursor_edge_walk@128x128-right-edge.html
* igt@kms_cursor_edge_walk@128x128-right-edge@pipe-a-hdmi-a-3:
- shard-bmg: NOTRUN -> [INCOMPLETE][5]
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_cursor_edge_walk@128x128-right-edge@pipe-a-hdmi-a-3.html
* igt@kms_hdr@static-toggle-suspend@pipe-a-dp-2:
- shard-bmg: [PASS][6] -> [SKIP][7]
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_hdr@static-toggle-suspend@pipe-a-dp-2.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_hdr@static-toggle-suspend@pipe-a-dp-2.html
* igt@kms_properties@plane-properties-legacy@pipe-a-hdmi-a-1:
- shard-adlp: [PASS][8] -> [FAIL][9] +11 other tests fail
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-6/igt@kms_properties@plane-properties-legacy@pipe-a-hdmi-a-1.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-8/igt@kms_properties@plane-properties-legacy@pipe-a-hdmi-a-1.html
* igt@kms_properties@plane-properties-legacy@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [FAIL][10] +7 other tests fail
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_properties@plane-properties-legacy@pipe-a-hdmi-a-6.html
* igt@kms_properties@plane-properties-legacy@pipe-b-hdmi-a-3:
- shard-bmg: NOTRUN -> [FAIL][11] +7 other tests fail
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_properties@plane-properties-legacy@pipe-b-hdmi-a-3.html
* igt@kms_properties@plane-properties-legacy@pipe-c-edp-1:
- shard-lnl: [PASS][12] -> [FAIL][13] +7 other tests fail
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-4/igt@kms_properties@plane-properties-legacy@pipe-c-edp-1.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-7/igt@kms_properties@plane-properties-legacy@pipe-c-edp-1.html
#### Warnings ####
* igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-adlp: [DMESG-FAIL][14] ([Intel XE#324]) -> [FAIL][15]
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_cursor_crc@cursor-random-256x256:
- shard-bmg: [SKIP][16] ([Intel XE#2423]) -> [SKIP][17]
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_cursor_crc@cursor-random-256x256.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_cursor_crc@cursor-random-256x256.html
* igt@kms_properties@plane-properties-legacy:
- shard-dg2-set2: [SKIP][18] ([Intel XE#2423] / [i915#2575]) -> [FAIL][19] +1 other test fail
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_properties@plane-properties-legacy.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_properties@plane-properties-legacy.html
- shard-bmg: [SKIP][20] ([Intel XE#2423]) -> [FAIL][21] +1 other test fail
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_properties@plane-properties-legacy.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_properties@plane-properties-legacy.html
* igt@xe_module_load@reload-no-display:
- shard-bmg: [DMESG-WARN][22] ([Intel XE#3467]) -> [FAIL][23]
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@xe_module_load@reload-no-display.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_module_load@reload-no-display.html
New tests
---------
New tests have been introduced between xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e_full and xe-pw-141788v1_full:
### New IGT tests (18) ###
* igt@kms_pm_rpm@legacy-planes-dpms@plane-119:
- Statuses : 2 pass(s)
- Exec time: [8.09, 17.48] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-128:
- Statuses : 2 pass(s)
- Exec time: [8.00, 17.20] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-61:
- Statuses : 2 pass(s)
- Exec time: [8.10, 17.24] s
* igt@kms_pm_rpm@legacy-planes-dpms@plane-90:
- Statuses : 2 pass(s)
- Exec time: [8.12, 17.35] s
* igt@kms_pm_rpm@legacy-planes@plane-119:
- Statuses : 3 pass(s)
- Exec time: [3.84, 17.33] s
* igt@kms_pm_rpm@legacy-planes@plane-128:
- Statuses : 3 pass(s)
- Exec time: [3.94, 17.62] s
* igt@kms_pm_rpm@legacy-planes@plane-61:
- Statuses : 3 pass(s)
- Exec time: [3.82, 17.68] s
* igt@kms_pm_rpm@legacy-planes@plane-90:
- Statuses : 3 pass(s)
- Exec time: [3.86, 17.44] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-119:
- Statuses : 3 pass(s)
- Exec time: [3.86, 17.36] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-128:
- Statuses : 3 pass(s)
- Exec time: [4.37, 17.37] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-137:
- Statuses : 3 pass(s)
- Exec time: [4.17, 17.57] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-61:
- Statuses : 3 pass(s)
- Exec time: [4.31, 17.24] s
* igt@kms_pm_rpm@universal-planes-dpms@plane-90:
- Statuses : 3 pass(s)
- Exec time: [4.04, 17.40] s
* igt@kms_pm_rpm@universal-planes@plane-119:
- Statuses : 1 dmesg-warn(s) 2 pass(s)
- Exec time: [3.47, 15.97] s
* igt@kms_pm_rpm@universal-planes@plane-128:
- Statuses : 1 dmesg-warn(s) 2 pass(s)
- Exec time: [3.60, 16.09] s
* igt@kms_pm_rpm@universal-planes@plane-137:
- Statuses : 1 dmesg-warn(s) 2 pass(s)
- Exec time: [5.08, 16.12] s
* igt@kms_pm_rpm@universal-planes@plane-61:
- Statuses : 1 dmesg-warn(s) 2 pass(s)
- Exec time: [4.26, 17.57] s
* igt@kms_pm_rpm@universal-planes@plane-90:
- Statuses : 1 dmesg-warn(s) 2 pass(s)
- Exec time: [3.70, 17.33] s
Known issues
------------
Here are the changes found in xe-pw-141788v1_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@core_hotunplug@hotreplug:
- shard-bmg: NOTRUN -> [SKIP][24] ([Intel XE#1885])
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@core_hotunplug@hotreplug.html
* igt@core_hotunplug@unbind-rebind:
- shard-dg2-set2: [PASS][25] -> [SKIP][26] ([Intel XE#1885])
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@core_hotunplug@unbind-rebind.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@core_hotunplug@unbind-rebind.html
* igt@core_hotunplug@unplug-rescan:
- shard-bmg: [PASS][27] -> [DMESG-WARN][28] ([Intel XE#3468]) +8 other tests dmesg-warn
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@core_hotunplug@unplug-rescan.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@core_hotunplug@unplug-rescan.html
- shard-dg2-set2: NOTRUN -> [SKIP][29] ([Intel XE#1885])
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@core_hotunplug@unplug-rescan.html
* igt@core_setmaster@master-drop-set-shared-fd:
- shard-bmg: [PASS][30] -> [SKIP][31] ([Intel XE#3453])
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@core_setmaster@master-drop-set-shared-fd.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@core_setmaster@master-drop-set-shared-fd.html
* igt@core_setmaster@master-drop-set-user:
- shard-bmg: [PASS][32] -> [FAIL][33] ([Intel XE#3339])
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@core_setmaster@master-drop-set-user.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@core_setmaster@master-drop-set-user.html
* igt@fbdev@read:
- shard-dg2-set2: [PASS][34] -> [SKIP][35] ([Intel XE#2134]) +1 other test skip
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@fbdev@read.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@fbdev@read.html
* igt@fbdev@unaligned-write:
- shard-bmg: [PASS][36] -> [SKIP][37] ([Intel XE#2134]) +2 other tests skip
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@fbdev@unaligned-write.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@fbdev@unaligned-write.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-1:
- shard-adlp: [PASS][38] -> [DMESG-FAIL][39] ([Intel XE#1033] / [Intel XE#1727]) +2 other tests dmesg-fail
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-1.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@kms_async_flips@alternate-sync-async-flip@pipe-c-hdmi-a-1.html
* igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-1:
- shard-adlp: [PASS][40] -> [DMESG-FAIL][41] ([Intel XE#1033] / [Intel XE#1727] / [Intel XE#324])
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-1.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@kms_async_flips@alternate-sync-async-flip@pipe-d-hdmi-a-1.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-180:
- shard-dg2-set2: [PASS][42] -> [SKIP][43] ([Intel XE#829])
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip:
- shard-dg2-set2: [PASS][44] -> [SKIP][45] ([Intel XE#2136]) +29 other tests skip
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-bmg: [PASS][46] -> [SKIP][47] ([Intel XE#2136]) +21 other tests skip
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-bmg: NOTRUN -> [SKIP][48] ([Intel XE#2136]) +33 other tests skip
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_big_fb@4-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-adlp: NOTRUN -> [SKIP][49] ([Intel XE#1124])
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-8/igt@kms_big_fb@4-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@linear-64bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][50] ([Intel XE#2327]) +1 other test skip
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_big_fb@linear-64bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-0:
- shard-adlp: [PASS][51] -> [FAIL][52] ([Intel XE#1874]) +5 other tests fail
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-4/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-9/igt@kms_big_fb@x-tiled-8bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
- shard-adlp: [PASS][53] -> [FAIL][54] ([Intel XE#1231]) +1 other test fail
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-2/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-8/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-16bpp-rotate-270:
- shard-adlp: NOTRUN -> [SKIP][55] ([Intel XE#316])
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-3/igt@kms_big_fb@y-tiled-16bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-64bpp-rotate-0:
- shard-bmg: NOTRUN -> [SKIP][56] ([Intel XE#1124])
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_big_fb@y-tiled-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-addfb:
- shard-bmg: NOTRUN -> [SKIP][57] ([Intel XE#2328])
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_big_fb@yf-tiled-addfb.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-bmg: NOTRUN -> [SKIP][58] ([Intel XE#610])
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_bw@connected-linear-tiling-1-displays-1920x1080p:
- shard-dg2-set2: NOTRUN -> [SKIP][59] ([Intel XE#367])
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_bw@connected-linear-tiling-1-displays-1920x1080p.html
* igt@kms_bw@linear-tiling-2-displays-2160x1440p:
- shard-bmg: NOTRUN -> [SKIP][60] ([Intel XE#367]) +1 other test skip
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_bw@linear-tiling-2-displays-2160x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][61] ([Intel XE#787]) +69 other tests skip
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-mc-ccs@pipe-a-dp-4.html
* igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs:
- shard-adlp: NOTRUN -> [SKIP][62] ([Intel XE#2907])
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-ccs:
- shard-bmg: NOTRUN -> [SKIP][63] ([Intel XE#2887]) +3 other tests skip
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_ccs@crc-primary-basic-y-tiled-ccs.html
* igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][64] ([Intel XE#455] / [Intel XE#787]) +11 other tests skip
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_ccs@crc-primary-basic-yf-tiled-ccs@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][65] ([Intel XE#787]) +11 other tests skip
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs@pipe-c-hdmi-a-1.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3:
- shard-bmg: NOTRUN -> [SKIP][66] ([Intel XE#2652] / [Intel XE#787]) +19 other tests skip
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-d-hdmi-a-3.html
* igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][67] ([Intel XE#455] / [Intel XE#787]) +7 other tests skip
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_ccs@crc-primary-suspend-y-tiled-ccs@pipe-d-hdmi-a-1.html
* igt@kms_chamelium_color@ctm-limited-range:
- shard-bmg: NOTRUN -> [SKIP][68] ([Intel XE#2325])
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_chamelium_color@ctm-limited-range.html
* igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode:
- shard-adlp: NOTRUN -> [SKIP][69] ([Intel XE#373])
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@kms_chamelium_hpd@dp-hpd-enable-disable-mode.html
* igt@kms_chamelium_hpd@dp-hpd-for-each-pipe:
- shard-bmg: NOTRUN -> [SKIP][70] ([Intel XE#2252]) +2 other tests skip
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_chamelium_hpd@dp-hpd-for-each-pipe.html
* igt@kms_chamelium_hpd@hdmi-hpd-after-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][71] ([Intel XE#373])
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_chamelium_hpd@hdmi-hpd-after-suspend.html
* igt@kms_color@deep-color:
- shard-bmg: NOTRUN -> [SKIP][72] ([Intel XE#2423]) +20 other tests skip
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_color@deep-color.html
* igt@kms_content_protection@legacy@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][73] ([Intel XE#1178]) +2 other tests fail
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_content_protection@legacy@pipe-a-dp-4.html
* igt@kms_cursor_crc@cursor-offscreen-32x32:
- shard-adlp: NOTRUN -> [SKIP][74] ([Intel XE#455])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@kms_cursor_crc@cursor-offscreen-32x32.html
* igt@kms_cursor_edge_walk@64x64-top-bottom:
- shard-bmg: NOTRUN -> [DMESG-FAIL][75] ([Intel XE#3468]) +4 other tests dmesg-fail
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_cursor_edge_walk@64x64-top-bottom.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#2286])
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions:
- shard-bmg: [PASS][77] -> [SKIP][78] ([Intel XE#2291]) +1 other test skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][79] ([Intel XE#309])
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_dither@fb-8bpc-vs-panel-6bpc:
- shard-bmg: [PASS][80] -> [SKIP][81] ([Intel XE#1340])
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_dither@fb-8bpc-vs-panel-6bpc.html
* igt@kms_draw_crc@draw-method-mmap-wc:
- shard-bmg: [PASS][82] -> [DMESG-FAIL][83] ([Intel XE#3468]) +4 other tests dmesg-fail
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_draw_crc@draw-method-mmap-wc.html
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_draw_crc@draw-method-mmap-wc.html
* igt@kms_draw_crc@draw-method-mmap-wc@rgb565-4tiled:
- shard-bmg: [PASS][84] -> [DMESG-WARN][85] ([Intel XE#2705])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_draw_crc@draw-method-mmap-wc@rgb565-4tiled.html
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_draw_crc@draw-method-mmap-wc@rgb565-4tiled.html
* igt@kms_draw_crc@draw-method-render:
- shard-bmg: [PASS][86] -> [INCOMPLETE][87] ([Intel XE#1727] / [Intel XE#3468]) +1 other test incomplete
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_draw_crc@draw-method-render.html
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_draw_crc@draw-method-render.html
* igt@kms_draw_crc@draw-method-render@rgb565-4tiled:
- shard-bmg: [PASS][88] -> [DMESG-FAIL][89] ([Intel XE#1727] / [Intel XE#3468])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_draw_crc@draw-method-render@rgb565-4tiled.html
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_draw_crc@draw-method-render@rgb565-4tiled.html
* igt@kms_fbcon_fbt@psr:
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#776])
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_fbcon_fbt@psr.html
* igt@kms_flip@2x-flip-vs-rmfb:
- shard-adlp: NOTRUN -> [SKIP][91] ([Intel XE#310]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-8/igt@kms_flip@2x-flip-vs-rmfb.html
* igt@kms_flip@2x-plain-flip-ts-check@bc-dp2-hdmi-a3:
- shard-bmg: NOTRUN -> [DMESG-WARN][92] ([Intel XE#3468]) +17 other tests dmesg-warn
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_flip@2x-plain-flip-ts-check@bc-dp2-hdmi-a3.html
* igt@kms_flip@flip-vs-blocking-wf-vblank:
- shard-lnl: [PASS][93] -> [FAIL][94] ([Intel XE#886]) +3 other tests fail
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-7/igt@kms_flip@flip-vs-blocking-wf-vblank.html
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-3/igt@kms_flip@flip-vs-blocking-wf-vblank.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2:
- shard-bmg: NOTRUN -> [FAIL][95] ([Intel XE#3486]) +1 other test fail
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-dp2.html
* igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling:
- shard-dg2-set2: [PASS][96] -> [SKIP][97] ([Intel XE#2136] / [Intel XE#2351]) +9 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-32bpp-xtile-to-64bpp-xtile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][98] ([Intel XE#455]) +5 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
- shard-bmg: NOTRUN -> [SKIP][99] ([Intel XE#2293] / [Intel XE#2380])
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling:
- shard-adlp: [PASS][100] -> [DMESG-FAIL][101] ([Intel XE#324]) +1 other test dmesg-fail
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#2293]) +5 other tests skip
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-dp-2-x-to-4:
- shard-bmg: NOTRUN -> [DMESG-FAIL][103] ([Intel XE#2705] / [Intel XE#3468])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_flip_tiling@flip-change-tiling@pipe-a-dp-2-x-to-4.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-a-dp-2-x-to-x:
- shard-bmg: NOTRUN -> [DMESG-FAIL][104] ([Intel XE#1727] / [Intel XE#3468])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_flip_tiling@flip-change-tiling@pipe-a-dp-2-x-to-x.html
* igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
- shard-dg2-set2: NOTRUN -> [SKIP][105] ([Intel XE#2136]) +41 other tests skip
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render:
- shard-bmg: NOTRUN -> [SKIP][106] ([Intel XE#2311]) +8 other tests skip
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][107] ([Intel XE#2136] / [Intel XE#2351]) +16 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-suspend.html
- shard-adlp: NOTRUN -> [SKIP][108] ([Intel XE#651])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-2/igt@kms_frontbuffer_tracking@drrs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt:
- shard-adlp: [PASS][109] -> [FAIL][110] ([Intel XE#1861]) +2 other tests fail
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-8/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-9/igt@kms_frontbuffer_tracking@fbc-1p-offscren-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt:
- shard-bmg: NOTRUN -> [FAIL][111] ([Intel XE#2333]) +2 other tests fail
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][112] ([Intel XE#2312]) +2 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-pgflip-blt:
- shard-adlp: NOTRUN -> [SKIP][113] ([Intel XE#656]) +6 other tests skip
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-indfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-linear:
- shard-dg2-set2: NOTRUN -> [SKIP][114] ([Intel XE#651]) +2 other tests skip
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-linear.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-dg2-set2: NOTRUN -> [SKIP][115] ([Intel XE#653]) +3 other tests skip
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary:
- shard-adlp: NOTRUN -> [SKIP][116] ([Intel XE#653]) +1 other test skip
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-3/igt@kms_frontbuffer_tracking@fbcpsr-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#2313]) +6 other tests skip
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-cur-indfb-draw-render.html
* igt@kms_getfb@getfb-handle-closed:
- shard-dg2-set2: [PASS][118] -> [DMESG-WARN][119] ([Intel XE#1727])
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_getfb@getfb-handle-closed.html
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_getfb@getfb-handle-closed.html
* igt@kms_hdr@static-toggle-suspend:
- shard-bmg: [PASS][120] -> [DMESG-WARN][121] ([Intel XE#3451])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_hdr@static-toggle-suspend.html
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
* igt@kms_invalid_mode@zero-clock:
- shard-dg2-set2: [PASS][122] -> [SKIP][123] ([Intel XE#2423] / [i915#2575]) +87 other tests skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_invalid_mode@zero-clock.html
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_invalid_mode@zero-clock.html
* igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence:
- shard-dg2-set2: NOTRUN -> [SKIP][124] ([Intel XE#2423] / [i915#2575]) +42 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_pipe_crc_basic@nonblocking-crc-frame-sequence.html
* igt@kms_plane_lowres@tiling-none:
- shard-bmg: [PASS][125] -> [INCOMPLETE][126] ([Intel XE#3452]) +1 other test incomplete
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_plane_lowres@tiling-none.html
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_plane_lowres@tiling-none.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-d:
- shard-adlp: NOTRUN -> [SKIP][127] ([Intel XE#2763] / [Intel XE#455]) +3 other tests skip
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-modifiers@pipe-d.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b:
- shard-dg2-set2: NOTRUN -> [SKIP][128] ([Intel XE#2763]) +14 other tests skip
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-b.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-d:
- shard-dg2-set2: NOTRUN -> [SKIP][129] ([Intel XE#2763] / [Intel XE#455]) +5 other tests skip
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format@pipe-d.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-a:
- shard-bmg: NOTRUN -> [SKIP][130] ([Intel XE#2763]) +3 other tests skip
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-a.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-c:
- shard-adlp: NOTRUN -> [SKIP][131] ([Intel XE#2763]) +5 other tests skip
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-9/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25@pipe-c.html
* igt@kms_pm_dc@dc6-psr:
- shard-lnl: [PASS][132] -> [FAIL][133] ([Intel XE#1430])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-3/igt@kms_pm_dc@dc6-psr.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-4/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_lpsp@kms-lpsp@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [FAIL][134] ([Intel XE#3527])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_pm_lpsp@kms-lpsp@pipe-a-hdmi-a-6.html
* igt@kms_pm_rpm@cursor:
- shard-dg2-set2: [PASS][135] -> [SKIP][136] ([Intel XE#2446])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_pm_rpm@cursor.html
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_pm_rpm@cursor.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-dg2-set2: NOTRUN -> [SKIP][137] ([Intel XE#2446]) +1 other test skip
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@legacy-planes-dpms:
- shard-bmg: NOTRUN -> [SKIP][138] ([Intel XE#2446])
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_pm_rpm@legacy-planes-dpms.html
* igt@kms_pm_rpm@modeset-lpsp-stress:
- shard-bmg: NOTRUN -> [SKIP][139] ([Intel XE#1439] / [Intel XE#3141])
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_pm_rpm@modeset-lpsp-stress.html
* igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait:
- shard-bmg: [PASS][140] -> [SKIP][141] ([Intel XE#2446]) +3 other tests skip
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_pm_rpm@modeset-non-lpsp-stress-no-wait.html
* igt@kms_pm_rpm@modeset-stress-extra-wait:
- shard-bmg: [PASS][142] -> [INCOMPLETE][143] ([Intel XE#1727] / [Intel XE#2864] / [Intel XE#3468])
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_pm_rpm@modeset-stress-extra-wait.html
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_pm_rpm@modeset-stress-extra-wait.html
* igt@kms_pm_rpm@universal-planes:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][144] ([Intel XE#2042] / [Intel XE#3468])
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-463/igt@kms_pm_rpm@universal-planes.html
* {igt@kms_pm_rpm@universal-planes@plane-119} (NEW):
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][145] ([Intel XE#3468]) +4 other tests dmesg-warn
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-463/igt@kms_pm_rpm@universal-planes@plane-119.html
* {igt@kms_pm_rpm@universal-planes@plane-137} (NEW):
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][146] ([Intel XE#1727] / [Intel XE#3468])
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-463/igt@kms_pm_rpm@universal-planes@plane-137.html
* igt@kms_properties@connector-properties-atomic:
- shard-dg2-set2: [PASS][147] -> [SKIP][148] ([Intel XE#2924]) +2 other tests skip
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_properties@connector-properties-atomic.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_properties@connector-properties-atomic.html
* igt@kms_properties@connector-properties-legacy:
- shard-bmg: [PASS][149] -> [SKIP][150] ([Intel XE#2423]) +95 other tests skip
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_properties@connector-properties-legacy.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_properties@connector-properties-legacy.html
* igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][151] ([Intel XE#2924]) +3 other tests skip
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
- shard-adlp: NOTRUN -> [SKIP][152] ([Intel XE#1489]) +1 other test skip
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_psr2_sf@fbc-pr-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf:
- shard-bmg: NOTRUN -> [SKIP][153] ([Intel XE#1489]) +2 other tests skip
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_su@frontbuffer-xrgb8888:
- shard-adlp: NOTRUN -> [SKIP][154] ([Intel XE#1122])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@kms_psr2_su@frontbuffer-xrgb8888.html
* igt@kms_psr@fbc-psr-cursor-render:
- shard-adlp: NOTRUN -> [SKIP][155] ([Intel XE#2850] / [Intel XE#929])
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-2/igt@kms_psr@fbc-psr-cursor-render.html
* igt@kms_psr@fbc-psr-no-drrs:
- shard-dg2-set2: NOTRUN -> [SKIP][156] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_psr@fbc-psr-no-drrs.html
* igt@kms_psr@psr-primary-blt:
- shard-bmg: NOTRUN -> [SKIP][157] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_psr@psr-primary-blt.html
* igt@kms_vrr@cmrr:
- shard-adlp: NOTRUN -> [SKIP][158] ([Intel XE#2168])
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_vrr@cmrr.html
* igt@kms_vrr@cmrr@pipe-a-edp-1:
- shard-lnl: [PASS][159] -> [FAIL][160] ([Intel XE#2159]) +1 other test fail
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-1/igt@kms_vrr@cmrr@pipe-a-edp-1.html
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-3/igt@kms_vrr@cmrr@pipe-a-edp-1.html
* igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01:
- shard-dg2-set2: NOTRUN -> [DMESG-FAIL][161] ([Intel XE#1727] / [Intel XE#3468]) +7 other tests dmesg-fail
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_ccs@suspend-resume@tile64-compressed-compfmt0-vram01-vram01.html
* igt@xe_copy_basic@mem-copy-linear-0xfd:
- shard-dg2-set2: NOTRUN -> [SKIP][162] ([Intel XE#1123])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0xfd.html
* igt@xe_eudebug@basic-vm-access:
- shard-dg2-set2: NOTRUN -> [SKIP][163] ([Intel XE#2905]) +1 other test skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@xe_eudebug@basic-vm-access.html
- shard-adlp: NOTRUN -> [SKIP][164] ([Intel XE#2905]) +1 other test skip
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@xe_eudebug@basic-vm-access.html
* igt@xe_eudebug_online@stopped-thread:
- shard-bmg: NOTRUN -> [SKIP][165] ([Intel XE#2905]) +3 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@xe_eudebug_online@stopped-thread.html
* igt@xe_evict@evict-beng-mixed-many-threads-small:
- shard-bmg: NOTRUN -> [TIMEOUT][166] ([Intel XE#1473])
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@xe_evict@evict-beng-mixed-many-threads-small.html
* igt@xe_evict@evict-beng-mixed-threads-large-multi-vm:
- shard-adlp: NOTRUN -> [SKIP][167] ([Intel XE#261] / [Intel XE#688])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@xe_evict@evict-beng-mixed-threads-large-multi-vm.html
* igt@xe_evict_ccs@evict-overcommit-simple:
- shard-adlp: NOTRUN -> [SKIP][168] ([Intel XE#688])
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-3/igt@xe_evict_ccs@evict-overcommit-simple.html
* igt@xe_exec_balancer@twice-cm-virtual-basic:
- shard-adlp: [PASS][169] -> [TIMEOUT][170] ([Intel XE#1033] / [Intel XE#1727]) +2 other tests timeout
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-6/igt@xe_exec_balancer@twice-cm-virtual-basic.html
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-9/igt@xe_exec_balancer@twice-cm-virtual-basic.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind:
- shard-adlp: NOTRUN -> [SKIP][171] ([Intel XE#1392]) +1 other test skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-null-rebind.html
* igt@xe_exec_basic@multigpu-once-null-rebind:
- shard-bmg: NOTRUN -> [SKIP][172] ([Intel XE#2322]) +2 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@xe_exec_basic@multigpu-once-null-rebind.html
* igt@xe_exec_basic@once-bindexecqueue-userptr-invalidate-race:
- shard-bmg: [PASS][173] -> [SKIP][174] ([Intel XE#1130]) +236 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@xe_exec_basic@once-bindexecqueue-userptr-invalidate-race.html
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_exec_basic@once-bindexecqueue-userptr-invalidate-race.html
* igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-prefetch:
- shard-dg2-set2: NOTRUN -> [SKIP][175] ([Intel XE#288]) +2 other tests skip
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_exec_fault_mode@many-execqueues-bindexecqueue-prefetch.html
* igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch:
- shard-adlp: NOTRUN -> [SKIP][176] ([Intel XE#288]) +1 other test skip
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@xe_exec_fault_mode@once-bindexecqueue-userptr-invalidate-race-prefetch.html
* igt@xe_exec_mix_modes@exec-spinner-interrupted-lr:
- shard-adlp: NOTRUN -> [SKIP][177] ([Intel XE#2360])
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-8/igt@xe_exec_mix_modes@exec-spinner-interrupted-lr.html
* igt@xe_fault_injection@inject-fault-probe-function-wait_for_lmem_ready:
- shard-bmg: [PASS][178] -> [DMESG-WARN][179] ([Intel XE#3467] / [Intel XE#3468])
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-wait_for_lmem_ready.html
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-wait_for_lmem_ready.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early:
- shard-adlp: [PASS][180] -> [DMESG-WARN][181] ([Intel XE#3086]) +4 other tests dmesg-warn
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_wa_init:
- shard-bmg: NOTRUN -> [DMESG-WARN][182] ([Intel XE#3467] / [Intel XE#3468])
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_wa_init.html
* igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][183] ([Intel XE#3467])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_execute.html
* igt@xe_intel_bb@lot-of-buffers:
- shard-bmg: [PASS][184] -> [DMESG-WARN][185] ([Intel XE#1727]) +2 other tests dmesg-warn
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@xe_intel_bb@lot-of-buffers.html
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@xe_intel_bb@lot-of-buffers.html
* igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit:
- shard-dg2-set2: NOTRUN -> [SKIP][186] ([Intel XE#2229])
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
- shard-bmg: NOTRUN -> [SKIP][187] ([Intel XE#2229])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_live_ktest@xe_migrate@xe_validate_ccs_kunit.html
* igt@xe_module_load@load:
- shard-bmg: NOTRUN -> [SKIP][188] ([Intel XE#2457])
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@xe_module_load@load.html
* igt@xe_oa@mmio-triggered-reports@ccs-0:
- shard-lnl: [PASS][189] -> [FAIL][190] ([Intel XE#2249]) +1 other test fail
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-7/igt@xe_oa@mmio-triggered-reports@ccs-0.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-5/igt@xe_oa@mmio-triggered-reports@ccs-0.html
* igt@xe_oa@syncs-ufence-wait:
- shard-dg2-set2: NOTRUN -> [SKIP][191] ([Intel XE#1130]) +75 other tests skip
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_oa@syncs-ufence-wait.html
* igt@xe_pm@d3cold-basic:
- shard-adlp: NOTRUN -> [SKIP][192] ([Intel XE#2284] / [Intel XE#366])
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@s2idle-vm-bind-prefetch:
- shard-adlp: [PASS][193] -> [DMESG-WARN][194] ([Intel XE#2953] / [Intel XE#3086]) +5 other tests dmesg-warn
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-6/igt@xe_pm@s2idle-vm-bind-prefetch.html
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@xe_pm@s2idle-vm-bind-prefetch.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-bmg: [PASS][195] -> [DMESG-WARN][196] ([Intel XE#1616] / [Intel XE#1727] / [Intel XE#3468])
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@xe_pm@s2idle-vm-bind-unbind-all.html
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@xe_pm@s2idle-vm-bind-unbind-all.html
* igt@xe_pm_residency@toggle-gt-c6:
- shard-lnl: [PASS][197] -> [FAIL][198] ([Intel XE#958])
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-1/igt@xe_pm_residency@toggle-gt-c6.html
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-3/igt@xe_pm_residency@toggle-gt-c6.html
* igt@xe_query@multigpu-query-invalid-extension:
- shard-bmg: NOTRUN -> [SKIP][199] ([Intel XE#944])
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@xe_query@multigpu-query-invalid-extension.html
* igt@xe_tlb@basic-tlb:
- shard-adlp: [PASS][200] -> [CRASH][201] ([Intel XE#3212])
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@xe_tlb@basic-tlb.html
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@xe_tlb@basic-tlb.html
- shard-lnl: [PASS][202] -> [CRASH][203] ([Intel XE#3212])
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-6/igt@xe_tlb@basic-tlb.html
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-8/igt@xe_tlb@basic-tlb.html
* igt@xe_vm@bind-no-array-conflict:
- shard-bmg: NOTRUN -> [SKIP][204] ([Intel XE#1130]) +47 other tests skip
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_vm@bind-no-array-conflict.html
* igt@xe_vm@large-binds-1073741824:
- shard-dg2-set2: [PASS][205] -> [SKIP][206] ([Intel XE#1130]) +148 other tests skip
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@xe_vm@large-binds-1073741824.html
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_vm@large-binds-1073741824.html
* igt@xe_vm@large-split-binds-33554432:
- shard-dg2-set2: NOTRUN -> [DMESG-WARN][207] ([Intel XE#1727])
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_vm@large-split-binds-33554432.html
#### Possible fixes ####
* igt@core_getversion@all-cards:
- shard-bmg: [FAIL][208] ([Intel XE#3249]) -> [PASS][209]
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@core_getversion@all-cards.html
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@core_getversion@all-cards.html
* igt@core_getversion@basic:
- shard-dg2-set2: [FAIL][210] ([Intel XE#3440]) -> [PASS][211]
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@core_getversion@basic.html
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@core_getversion@basic.html
* igt@core_hotunplug@hotreplug-lateclose:
- shard-dg2-set2: [SKIP][212] ([Intel XE#1885]) -> [PASS][213]
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@core_hotunplug@hotreplug-lateclose.html
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@core_hotunplug@hotreplug-lateclose.html
* igt@core_hotunplug@hotunbind-rebind:
- shard-bmg: [SKIP][214] ([Intel XE#1885]) -> [PASS][215] +2 other tests pass
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@core_hotunplug@hotunbind-rebind.html
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@core_hotunplug@hotunbind-rebind.html
* igt@core_setmaster@master-drop-set-root:
- shard-bmg: [FAIL][216] -> [PASS][217]
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@core_setmaster@master-drop-set-root.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@core_setmaster@master-drop-set-root.html
* igt@core_setmaster@master-drop-set-user:
- shard-dg2-set2: [FAIL][218] ([Intel XE#3339]) -> [PASS][219]
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@core_setmaster@master-drop-set-user.html
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@core_setmaster@master-drop-set-user.html
* igt@fbdev@write:
- shard-dg2-set2: [SKIP][220] ([Intel XE#2134]) -> [PASS][221] +1 other test pass
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@fbdev@write.html
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@fbdev@write.html
* igt@kms_addfb_basic@basic:
- shard-bmg: [SKIP][222] ([Intel XE#2423]) -> [PASS][223] +73 other tests pass
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_addfb_basic@basic.html
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_addfb_basic@basic.html
* igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y:
- shard-adlp: [DMESG-WARN][224] ([Intel XE#324]) -> [PASS][225] +2 other tests pass
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y.html
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@kms_async_flips@async-flip-with-page-flip-events@pipe-b-hdmi-a-1-y.html
* igt@kms_big_fb@4-tiled-addfb-size-overflow:
- shard-dg2-set2: [SKIP][226] ([Intel XE#2136]) -> [PASS][227] +19 other tests pass
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_big_fb@4-tiled-addfb-size-overflow.html
* igt@kms_big_fb@linear-64bpp-rotate-180:
- shard-dg2-set2: [SKIP][228] ([Intel XE#2136] / [Intel XE#2351]) -> [PASS][229] +6 other tests pass
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_big_fb@linear-64bpp-rotate-180.html
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_big_fb@linear-64bpp-rotate-180.html
* igt@kms_big_fb@linear-8bpp-rotate-180:
- shard-bmg: [SKIP][230] ([Intel XE#2136]) -> [PASS][231] +19 other tests pass
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_big_fb@linear-8bpp-rotate-180.html
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_big_fb@linear-8bpp-rotate-180.html
* igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-adlp: [FAIL][232] ([Intel XE#1231]) -> [PASS][233] +1 other test pass
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip:
- shard-adlp: [FAIL][234] ([Intel XE#3052]) -> [PASS][235]
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-2/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-async-flip.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip:
- shard-adlp: [FAIL][236] ([Intel XE#1874]) -> [PASS][237] +1 other test pass
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-hflip.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-bmg: [INCOMPLETE][238] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][239]
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_cursor_crc@cursor-suspend.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_cursor_edge_walk@256x256-right-edge:
- shard-bmg: [DMESG-FAIL][240] ([Intel XE#3468]) -> [PASS][241] +3 other tests pass
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_cursor_edge_walk@256x256-right-edge.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_cursor_edge_walk@256x256-right-edge.html
* igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic:
- shard-dg2-set2: [SKIP][242] ([Intel XE#2423] / [i915#2575]) -> [PASS][243] +49 other tests pass
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_cursor_legacy@2x-flip-vs-cursor-atomic.html
* igt@kms_feature_discovery@display-2x:
- shard-bmg: [SKIP][244] ([Intel XE#2373]) -> [PASS][245]
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_feature_discovery@display-2x.html
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_feature_discovery@display-2x.html
* igt@kms_flip@2x-busy-flip:
- shard-bmg: [SKIP][246] ([Intel XE#2316]) -> [PASS][247] +1 other test pass
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_flip@2x-busy-flip.html
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_flip@2x-busy-flip.html
* igt@kms_flip@absolute-wf_vblank@a-dp2:
- shard-bmg: [DMESG-FAIL][248] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][249] +1 other test pass
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_flip@absolute-wf_vblank@a-dp2.html
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_flip@absolute-wf_vblank@a-dp2.html
* igt@kms_flip@plain-flip-fb-recreate@b-edp1:
- shard-lnl: [FAIL][250] ([Intel XE#886]) -> [PASS][251] +6 other tests pass
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-3/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-5/igt@kms_flip@plain-flip-fb-recreate@b-edp1.html
* igt@kms_flip@plain-flip-fb-recreate@c-edp1:
- shard-lnl: [FAIL][252] ([Intel XE#3149] / [Intel XE#886]) -> [PASS][253] +1 other test pass
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-3/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-5/igt@kms_flip@plain-flip-fb-recreate@c-edp1.html
* igt@kms_flip@wf_vblank-ts-check:
- shard-bmg: [INCOMPLETE][254] ([Intel XE#2635]) -> [PASS][255] +1 other test pass
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_flip@wf_vblank-ts-check.html
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_flip@wf_vblank-ts-check.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-adlp: [DMESG-FAIL][256] ([Intel XE#324]) -> [PASS][257] +5 other tests pass
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_frontbuffer_tracking@basic:
- shard-dg2-set2: [SKIP][258] ([Intel XE#2351]) -> [PASS][259]
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_frontbuffer_tracking@basic.html
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_frontbuffer_tracking@basic.html
* igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt:
- shard-adlp: [FAIL][260] ([Intel XE#1861]) -> [PASS][261] +2 other tests pass
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-3/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-2/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-shrfb-pgflip-blt.html
* igt@kms_hdr@invalid-hdr:
- shard-bmg: [INCOMPLETE][262] -> [PASS][263] +1 other test pass
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_hdr@invalid-hdr.html
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_hdr@invalid-hdr.html
* igt@kms_invalid_mode@bad-hsync-start:
- shard-dg2-set2: [DMESG-WARN][264] ([Intel XE#1727]) -> [PASS][265] +1 other test pass
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_invalid_mode@bad-hsync-start.html
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_invalid_mode@bad-hsync-start.html
* igt@kms_joiner@invalid-modeset-force-big-joiner:
- shard-bmg: [SKIP][266] ([Intel XE#3012]) -> [PASS][267]
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_joiner@invalid-modeset-force-big-joiner.html
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_joiner@invalid-modeset-force-big-joiner.html
* igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format:
- shard-bmg: [DMESG-WARN][268] ([Intel XE#3468] / [Intel XE#877]) -> [PASS][269] +1 other test pass
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format.html
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_plane_scaling@plane-downscale-factor-0-5-with-pixel-format.html
* igt@kms_pm_dc@dc5-psr:
- shard-lnl: [FAIL][270] ([Intel XE#718]) -> [PASS][271] +1 other test pass
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-6/igt@kms_pm_dc@dc5-psr.html
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-4/igt@kms_pm_dc@dc5-psr.html
* igt@kms_pm_rpm@cursor-dpms:
- shard-dg2-set2: [INCOMPLETE][272] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][273]
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_pm_rpm@cursor-dpms.html
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_pm_rpm@cursor-dpms.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-bmg: [DMESG-WARN][274] ([Intel XE#1727] / [Intel XE#3468]) -> [PASS][275]
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_pm_rpm@drm-resources-equal:
- shard-bmg: [SKIP][276] ([Intel XE#2446]) -> [PASS][277] +1 other test pass
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_pm_rpm@drm-resources-equal.html
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_pm_rpm@drm-resources-equal.html
* igt@kms_pm_rpm@modeset-stress-extra-wait:
- shard-adlp: [FAIL][278] -> [PASS][279]
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_pm_rpm@modeset-stress-extra-wait.html
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-3/igt@kms_pm_rpm@modeset-stress-extra-wait.html
* igt@kms_pm_rpm@system-suspend-modeset:
- shard-dg2-set2: [SKIP][280] ([Intel XE#2446]) -> [PASS][281] +2 other tests pass
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_pm_rpm@system-suspend-modeset.html
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_pm_rpm@system-suspend-modeset.html
* igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1:
- shard-lnl: [FAIL][282] ([Intel XE#899]) -> [PASS][283] +2 other tests pass
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-3/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-6/igt@kms_universal_plane@cursor-fb-leak@pipe-c-edp-1.html
* igt@xe_evict@evict-beng-mixed-threads-large:
- shard-bmg: [INCOMPLETE][284] ([Intel XE#1473] / [Intel XE#3468]) -> [PASS][285]
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@xe_evict@evict-beng-mixed-threads-large.html
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@xe_evict@evict-beng-mixed-threads-large.html
* igt@xe_exec_balancer@many-cm-virtual-userptr-invalidate:
- shard-dg2-set2: [SKIP][286] ([Intel XE#1130]) -> [PASS][287] +123 other tests pass
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@xe_exec_balancer@many-cm-virtual-userptr-invalidate.html
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-463/igt@xe_exec_balancer@many-cm-virtual-userptr-invalidate.html
* igt@xe_live_ktest@xe_mocs:
- shard-lnl: [SKIP][288] ([Intel XE#1192]) -> [PASS][289]
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-5/igt@xe_live_ktest@xe_mocs.html
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-6/igt@xe_live_ktest@xe_mocs.html
* igt@xe_module_load@many-reload:
- shard-adlp: [DMESG-WARN][290] ([Intel XE#2953] / [Intel XE#3086]) -> [PASS][291]
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@xe_module_load@many-reload.html
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-8/igt@xe_module_load@many-reload.html
* igt@xe_oa@oa-regs-whitelisted@rcs-0:
- shard-lnl: [FAIL][292] ([Intel XE#2514]) -> [PASS][293] +1 other test pass
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-1/igt@xe_oa@oa-regs-whitelisted@rcs-0.html
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-6/igt@xe_oa@oa-regs-whitelisted@rcs-0.html
* igt@xe_pm@d3hot-mocs:
- shard-lnl: [DMESG-WARN][294] ([Intel XE#3184]) -> [PASS][295]
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-lnl-4/igt@xe_pm@d3hot-mocs.html
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-lnl-6/igt@xe_pm@d3hot-mocs.html
* igt@xe_pm@s2idle-vm-bind-userptr:
- shard-bmg: [DMESG-WARN][296] ([Intel XE#1616] / [Intel XE#1727] / [Intel XE#3468]) -> [PASS][297]
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@xe_pm@s2idle-vm-bind-userptr.html
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@xe_pm@s2idle-vm-bind-userptr.html
* igt@xe_pm@s3-mocs:
- shard-adlp: [DMESG-WARN][298] ([Intel XE#3086]) -> [PASS][299] +2 other tests pass
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@xe_pm@s3-mocs.html
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-4/igt@xe_pm@s3-mocs.html
* igt@xe_pm@s4-multiple-execs:
- shard-adlp: [ABORT][300] ([Intel XE#1358] / [Intel XE#1607] / [Intel XE#1794]) -> [PASS][301]
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-9/igt@xe_pm@s4-multiple-execs.html
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-2/igt@xe_pm@s4-multiple-execs.html
* igt@xe_pm_residency@toggle-gt-c6:
- shard-adlp: [FAIL][302] ([Intel XE#958]) -> [PASS][303]
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-9/igt@xe_pm_residency@toggle-gt-c6.html
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@xe_pm_residency@toggle-gt-c6.html
* igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout:
- shard-bmg: [DMESG-WARN][304] ([Intel XE#3468]) -> [PASS][305] +53 other tests pass
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@xe_sysfs_preempt_timeout@preempt_timeout_us-timeout.html
* igt@xe_vm@bind-once:
- shard-bmg: [SKIP][306] ([Intel XE#1130]) -> [PASS][307] +162 other tests pass
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_vm@bind-once.html
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@xe_vm@bind-once.html
#### Warnings ####
* igt@core_hotunplug@hotunplug-rescan:
- shard-dg2-set2: [INCOMPLETE][308] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][309] ([Intel XE#1885])
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@core_hotunplug@hotunplug-rescan.html
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@core_hotunplug@hotunplug-rescan.html
* igt@kms_addfb_basic@too-wide:
- shard-dg2-set2: [DMESG-WARN][310] ([Intel XE#1727]) -> [SKIP][311] ([Intel XE#2423] / [i915#2575])
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_addfb_basic@too-wide.html
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_addfb_basic@too-wide.html
* igt@kms_async_flips@alternate-sync-async-flip:
- shard-adlp: [DMESG-WARN][312] ([Intel XE#3086]) -> [DMESG-FAIL][313] ([Intel XE#1033] / [Intel XE#1727] / [Intel XE#324])
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_async_flips@alternate-sync-async-flip.html
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@kms_async_flips@alternate-sync-async-flip.html
* igt@kms_async_flips@async-flip-suspend-resume:
- shard-dg2-set2: [DMESG-WARN][314] ([Intel XE#3468]) -> [SKIP][315] ([Intel XE#2423] / [i915#2575])
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_async_flips@async-flip-suspend-resume.html
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_async_flips@async-flip-suspend-resume.html
* igt@kms_async_flips@invalid-async-flip:
- shard-bmg: [SKIP][316] ([Intel XE#873]) -> [SKIP][317] ([Intel XE#2423])
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_async_flips@invalid-async-flip.html
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_async_flips@invalid-async-flip.html
* igt@kms_async_flips@test-time-stamp:
- shard-dg2-set2: [INCOMPLETE][318] ([Intel XE#1727]) -> [SKIP][319] ([Intel XE#2423] / [i915#2575]) +1 other test skip
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_async_flips@test-time-stamp.html
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_async_flips@test-time-stamp.html
* igt@kms_big_fb@4-tiled-32bpp-rotate-90:
- shard-bmg: [SKIP][320] ([Intel XE#2136]) -> [SKIP][321] ([Intel XE#2327]) +3 other tests skip
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
- shard-dg2-set2: [SKIP][322] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][323] ([Intel XE#316])
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_big_fb@4-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-64bpp-rotate-90:
- shard-dg2-set2: [SKIP][324] ([Intel XE#2136]) -> [SKIP][325] ([Intel XE#316])
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_big_fb@4-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-180:
- shard-bmg: [DMESG-FAIL][326] ([Intel XE#3468]) -> [SKIP][327] ([Intel XE#2136]) +4 other tests skip
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_big_fb@4-tiled-8bpp-rotate-180.html
* igt@kms_big_fb@4-tiled-8bpp-rotate-90:
- shard-dg2-set2: [SKIP][328] ([Intel XE#316]) -> [SKIP][329] ([Intel XE#2136] / [Intel XE#2351])
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_big_fb@4-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0:
- shard-bmg: [DMESG-WARN][330] ([Intel XE#3468]) -> [SKIP][331] ([Intel XE#2136])
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0.html
[331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_big_fb@linear-max-hw-stride-32bpp-rotate-0.html
* igt@kms_big_fb@x-tiled-16bpp-rotate-90:
- shard-bmg: [SKIP][332] ([Intel XE#2327]) -> [SKIP][333] ([Intel XE#2136]) +6 other tests skip
[332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
[333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_big_fb@x-tiled-16bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-64bpp-rotate-90:
- shard-dg2-set2: [SKIP][334] ([Intel XE#316]) -> [SKIP][335] ([Intel XE#2136]) +1 other test skip
[334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
[335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_big_fb@x-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@x-tiled-addfb-size-overflow:
- shard-dg2-set2: [SKIP][336] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][337] ([Intel XE#829])
[336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_big_fb@x-tiled-addfb-size-overflow.html
[337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_big_fb@x-tiled-addfb-size-overflow.html
* igt@kms_big_fb@y-tiled-addfb:
- shard-dg2-set2: [SKIP][338] ([Intel XE#619]) -> [SKIP][339] ([Intel XE#2136] / [Intel XE#2351])
[338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_big_fb@y-tiled-addfb.html
[339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_big_fb@y-tiled-addfb.html
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-adlp: [DMESG-WARN][340] ([Intel XE#324]) -> [FAIL][341] ([Intel XE#1231] / [Intel XE#3052])
[340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
[341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-0:
- shard-bmg: [SKIP][342] ([Intel XE#1124]) -> [SKIP][343] ([Intel XE#2136]) +15 other tests skip
[342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
[343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_big_fb@yf-tiled-32bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
- shard-dg2-set2: [SKIP][344] ([Intel XE#1124]) -> [SKIP][345] ([Intel XE#2136]) +12 other tests skip
[344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
[345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
* igt@kms_big_fb@yf-tiled-8bpp-rotate-90:
- shard-bmg: [SKIP][346] ([Intel XE#2136]) -> [SKIP][347] ([Intel XE#1124]) +12 other tests skip
[346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
[347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_big_fb@yf-tiled-8bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow:
- shard-bmg: [SKIP][348] ([Intel XE#607]) -> [SKIP][349] ([Intel XE#2136])
[348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
- shard-dg2-set2: [SKIP][350] ([Intel XE#2136]) -> [SKIP][351] ([Intel XE#607])
[350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
[351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_big_fb@yf-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-dg2-set2: [SKIP][352] ([Intel XE#1124]) -> [SKIP][353] ([Intel XE#2136] / [Intel XE#2351]) +2 other tests skip
[352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
[353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-dg2-set2: [SKIP][354] ([Intel XE#2136]) -> [SKIP][355] ([Intel XE#1124]) +5 other tests skip
[354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
- shard-dg2-set2: [SKIP][356] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][357] ([Intel XE#1124]) +3 other tests skip
[356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
[357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
* igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p:
- shard-dg2-set2: [SKIP][358] ([Intel XE#2191]) -> [SKIP][359] ([Intel XE#2423] / [i915#2575]) +2 other tests skip
[358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html
[359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_bw@connected-linear-tiling-3-displays-1920x1080p.html
* igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p:
- shard-bmg: [SKIP][360] ([Intel XE#2314] / [Intel XE#2894]) -> [SKIP][361] ([Intel XE#2423]) +2 other tests skip
[360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
[361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_bw@connected-linear-tiling-3-displays-2560x1440p.html
* igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p:
- shard-bmg: [SKIP][362] ([Intel XE#2423]) -> [SKIP][363] ([Intel XE#2314] / [Intel XE#2894]) +1 other test skip
[362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html
[363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_bw@connected-linear-tiling-3-displays-3840x2160p.html
* igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p:
- shard-dg2-set2: [SKIP][364] ([Intel XE#2423] / [i915#2575]) -> [SKIP][365] ([Intel XE#2191])
[364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
[365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_bw@connected-linear-tiling-4-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-1-displays-2560x1440p:
- shard-bmg: [SKIP][366] ([Intel XE#367]) -> [SKIP][367] ([Intel XE#2423]) +3 other tests skip
[366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
[367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-1-displays-3840x2160p:
- shard-dg2-set2: [SKIP][368] ([Intel XE#2423] / [i915#2575]) -> [SKIP][369] ([Intel XE#367]) +1 other test skip
[368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
[369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html
* igt@kms_bw@linear-tiling-3-displays-2160x1440p:
- shard-bmg: [SKIP][370] ([Intel XE#2423]) -> [SKIP][371] ([Intel XE#367])
[370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
[371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
* igt@kms_bw@linear-tiling-4-displays-2160x1440p:
- shard-dg2-set2: [SKIP][372] ([Intel XE#367]) -> [SKIP][373] ([Intel XE#2423] / [i915#2575]) +2 other tests skip
[372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
[373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_bw@linear-tiling-4-displays-2160x1440p.html
* igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc:
- shard-dg2-set2: [SKIP][374] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][375] ([Intel XE#829])
[374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html
[375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_ccs@bad-aux-stride-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_ccs@bad-pixel-format-yf-tiled-ccs:
- shard-dg2-set2: [SKIP][376] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][377] ([Intel XE#2136]) +4 other tests skip
[376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
[377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_ccs@bad-pixel-format-yf-tiled-ccs.html
* igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
- shard-dg2-set2: [SKIP][378] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][379] ([Intel XE#455] / [Intel XE#787])
[378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
[379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-bmg: [SKIP][380] ([Intel XE#2652] / [Intel XE#787]) -> [SKIP][381] ([Intel XE#2136]) +1 other test skip
[380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
[381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs:
- shard-bmg: [SKIP][382] ([Intel XE#2136]) -> [SKIP][383] ([Intel XE#2887]) +8 other tests skip
[382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
[383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs:
- shard-dg2-set2: [SKIP][384] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][385] ([Intel XE#2136] / [Intel XE#2351]) +1 other test skip
[384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs.html
[385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_ccs@crc-primary-basic-y-tiled-gen12-mc-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs:
- shard-dg2-set2: [SKIP][386] ([Intel XE#2907]) -> [SKIP][387] ([Intel XE#2136]) +1 other test skip
[386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
[387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_ccs@crc-primary-rotation-180-4-tiled-bmg-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs:
- shard-dg2-set2: [SKIP][388] ([Intel XE#2136]) -> [SKIP][389] ([Intel XE#2907])
[388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
[389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs:
- shard-dg2-set2: [SKIP][390] ([Intel XE#2136]) -> [SKIP][391] ([Intel XE#829]) +4 other tests skip
[390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
[391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
- shard-bmg: [SKIP][392] ([Intel XE#3432]) -> [SKIP][393] ([Intel XE#2136]) +2 other tests skip
[392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[393]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
- shard-dg2-set2: [INCOMPLETE][394] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][395] ([Intel XE#2136]) +1 other test skip
[394]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
[395]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
- shard-bmg: [SKIP][396] ([Intel XE#2136]) -> [SKIP][397] ([Intel XE#2652] / [Intel XE#787]) +1 other test skip
[396]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
[397]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs:
- shard-bmg: [SKIP][398] ([Intel XE#2136]) -> [SKIP][399] ([Intel XE#3432]) +1 other test skip
[398]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
[399]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_ccs@crc-primary-suspend-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [FAIL][400] ([Intel XE#616]) -> [SKIP][401] ([Intel XE#2136])
[400]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
[401]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs:
- shard-bmg: [SKIP][402] ([Intel XE#2887]) -> [SKIP][403] ([Intel XE#2136]) +19 other tests skip
[402]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html
[403]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-mtl-rc-ccs.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs-cc:
- shard-dg2-set2: [SKIP][404] ([Intel XE#2136]) -> [SKIP][405] ([Intel XE#455] / [Intel XE#787]) +6 other tests skip
[404]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs-cc.html
[405]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs-cc.html
* igt@kms_cdclk@mode-transition:
- shard-dg2-set2: [SKIP][406] ([Intel XE#2136]) -> [SKIP][407] ([Intel XE#2924]) +8 other tests skip
[406]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_cdclk@mode-transition.html
[407]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_cdclk@mode-transition.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-bmg: [SKIP][408] ([Intel XE#2136]) -> [SKIP][409] ([Intel XE#2724])
[408]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_cdclk@mode-transition-all-outputs.html
[409]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_color@ctm-0-25:
- shard-bmg: [SKIP][410] ([Intel XE#2325]) -> [SKIP][411] ([Intel XE#2423]) +4 other tests skip
[410]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_chamelium_color@ctm-0-25.html
[411]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_chamelium_color@ctm-0-25.html
* igt@kms_chamelium_color@ctm-0-50:
- shard-bmg: [SKIP][412] ([Intel XE#2423]) -> [SKIP][413] ([Intel XE#2325]) +2 other tests skip
[412]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_chamelium_color@ctm-0-50.html
[413]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_chamelium_color@ctm-0-50.html
* igt@kms_chamelium_color@ctm-0-75:
- shard-dg2-set2: [SKIP][414] ([Intel XE#2423] / [i915#2575]) -> [SKIP][415] ([Intel XE#306]) +1 other test skip
[414]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_chamelium_color@ctm-0-75.html
[415]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_chamelium_color@ctm-0-75.html
* igt@kms_chamelium_color@gamma:
- shard-dg2-set2: [SKIP][416] ([Intel XE#306]) -> [SKIP][417] ([Intel XE#2423] / [i915#2575]) +1 other test skip
[416]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_chamelium_color@gamma.html
[417]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_chamelium_color@gamma.html
* igt@kms_chamelium_edid@dp-edid-change-during-hibernate:
- shard-bmg: [SKIP][418] ([Intel XE#2423]) -> [SKIP][419] ([Intel XE#2252]) +10 other tests skip
[418]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
[419]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_chamelium_edid@dp-edid-change-during-hibernate.html
* igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats:
- shard-dg2-set2: [SKIP][420] ([Intel XE#373]) -> [SKIP][421] ([Intel XE#2423] / [i915#2575]) +6 other tests skip
[420]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
[421]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_chamelium_frames@hdmi-crc-nonplanar-formats.html
* igt@kms_chamelium_frames@hdmi-frame-dump:
- shard-dg2-set2: [SKIP][422] ([Intel XE#2423] / [i915#2575]) -> [SKIP][423] ([Intel XE#373]) +8 other tests skip
[422]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_chamelium_frames@hdmi-frame-dump.html
[423]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_chamelium_frames@hdmi-frame-dump.html
* igt@kms_chamelium_hpd@dp-hpd-after-suspend:
- shard-bmg: [SKIP][424] ([Intel XE#2252]) -> [SKIP][425] ([Intel XE#2423]) +11 other tests skip
[424]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
[425]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_chamelium_hpd@dp-hpd-after-suspend.html
* igt@kms_content_protection@atomic:
- shard-bmg: [FAIL][426] ([Intel XE#1178]) -> [INCOMPLETE][427] ([Intel XE#2715] / [Intel XE#3468]) +1 other test incomplete
[426]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_content_protection@atomic.html
[427]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_content_protection@atomic.html
* igt@kms_content_protection@atomic-dpms:
- shard-dg2-set2: [SKIP][428] ([Intel XE#2423] / [i915#2575]) -> [FAIL][429] ([Intel XE#1178])
[428]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_content_protection@atomic-dpms.html
[429]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_content_protection@atomic-dpms.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-dg2-set2: [SKIP][430] ([Intel XE#2423] / [i915#2575]) -> [SKIP][431] ([Intel XE#307])
[430]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_content_protection@dp-mst-lic-type-0.html
[431]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@dp-mst-lic-type-1:
- shard-bmg: [SKIP][432] ([Intel XE#2390]) -> [SKIP][433] ([Intel XE#2423]) +1 other test skip
[432]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_content_protection@dp-mst-lic-type-1.html
[433]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_content_protection@dp-mst-lic-type-1.html
- shard-dg2-set2: [SKIP][434] ([Intel XE#307]) -> [SKIP][435] ([Intel XE#2423] / [i915#2575])
[434]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_content_protection@dp-mst-lic-type-1.html
[435]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_content_protection@dp-mst-lic-type-1.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-bmg: [SKIP][436] ([Intel XE#2423]) -> [SKIP][437] ([Intel XE#2390]) +1 other test skip
[436]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_content_protection@dp-mst-type-1.html
[437]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@legacy:
- shard-bmg: [FAIL][438] ([Intel XE#1178]) -> [SKIP][439] ([Intel XE#2423]) +1 other test skip
[438]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_content_protection@legacy.html
[439]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_content_protection@legacy.html
* igt@kms_content_protection@lic-type-0:
- shard-bmg: [FAIL][440] ([Intel XE#1178]) -> [SKIP][441] ([Intel XE#2341])
[440]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_content_protection@lic-type-0.html
[441]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@lic-type-1:
- shard-bmg: [SKIP][442] ([Intel XE#2423]) -> [SKIP][443] ([Intel XE#2341])
[442]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_content_protection@lic-type-1.html
[443]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_content_protection@lic-type-1.html
* igt@kms_cursor_crc@cursor-offscreen-512x512:
- shard-dg2-set2: [SKIP][444] ([Intel XE#308]) -> [SKIP][445] ([Intel XE#2423] / [i915#2575]) +1 other test skip
[444]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_cursor_crc@cursor-offscreen-512x512.html
[445]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_cursor_crc@cursor-offscreen-512x512.html
* igt@kms_cursor_crc@cursor-onscreen-32x10:
- shard-bmg: [SKIP][446] ([Intel XE#2423]) -> [SKIP][447] ([Intel XE#2320]) +3 other tests skip
[446]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-32x10.html
[447]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_cursor_crc@cursor-onscreen-32x10.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-bmg: [SKIP][448] ([Intel XE#2321]) -> [SKIP][449] ([Intel XE#2423])
[448]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_cursor_crc@cursor-onscreen-512x170.html
[449]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-onscreen-max-size:
- shard-bmg: [SKIP][450] ([Intel XE#2320]) -> [SKIP][451] ([Intel XE#2423]) +9 other tests skip
[450]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_cursor_crc@cursor-onscreen-max-size.html
[451]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_cursor_crc@cursor-onscreen-max-size.html
* igt@kms_cursor_crc@cursor-random-max-size:
- shard-dg2-set2: [SKIP][452] ([Intel XE#2423] / [i915#2575]) -> [SKIP][453] ([Intel XE#455]) +3 other tests skip
[452]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_cursor_crc@cursor-random-max-size.html
[453]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_cursor_crc@cursor-random-max-size.html
* igt@kms_cursor_crc@cursor-rapid-movement-512x512:
- shard-bmg: [SKIP][454] ([Intel XE#2423]) -> [SKIP][455] ([Intel XE#2321])
[454]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
[455]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html
* igt@kms_cursor_crc@cursor-sliding-512x170:
- shard-dg2-set2: [SKIP][456] ([Intel XE#2423] / [i915#2575]) -> [SKIP][457] ([Intel XE#308])
[456]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_cursor_crc@cursor-sliding-512x170.html
[457]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_cursor_crc@cursor-sliding-512x170.html
* igt@kms_cursor_crc@cursor-suspend:
- shard-dg2-set2: [INCOMPLETE][458] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][459] ([Intel XE#2423] / [i915#2575])
[458]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_cursor_crc@cursor-suspend.html
[459]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_cursor_crc@cursor-suspend.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size:
- shard-bmg: [SKIP][460] ([Intel XE#2286]) -> [SKIP][461] ([Intel XE#2423])
[460]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
[461]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
- shard-dg2-set2: [SKIP][462] ([Intel XE#2423] / [i915#2575]) -> [SKIP][463] ([Intel XE#323])
[462]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
[463]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-varying-size.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-toggle:
- shard-bmg: [DMESG-WARN][464] ([Intel XE#877]) -> [SKIP][465] ([Intel XE#2423])
[464]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
[465]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_cursor_legacy@cursorb-vs-flipa-toggle.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions:
- shard-bmg: [SKIP][466] ([Intel XE#2423]) -> [SKIP][467] ([Intel XE#2286])
[466]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
[467]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions.html
* igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-dp-2:
- shard-bmg: [DMESG-FAIL][468] ([Intel XE#3468]) -> [FAIL][469] ([Intel XE#2141]) +2 other tests fail
[468]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-dp-2.html
[469]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_dirtyfb@fbc-dirtyfb-ioctl@a-dp-2.html
* igt@kms_dirtyfb@psr-dirtyfb-ioctl:
- shard-bmg: [SKIP][470] ([Intel XE#1508]) -> [SKIP][471] ([Intel XE#2136]) +1 other test skip
[470]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
[471]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
* igt@kms_dp_aux_dev:
- shard-bmg: [SKIP][472] ([Intel XE#3009]) -> [SKIP][473] ([Intel XE#2423])
[472]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_dp_aux_dev.html
[473]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_dp_aux_dev.html
* igt@kms_dsc@dsc-basic:
- shard-dg2-set2: [SKIP][474] ([Intel XE#2351]) -> [SKIP][475] ([Intel XE#455])
[474]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_dsc@dsc-basic.html
[475]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_dsc@dsc-basic.html
- shard-bmg: [SKIP][476] ([Intel XE#2136]) -> [SKIP][477] ([Intel XE#2244])
[476]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_dsc@dsc-basic.html
[477]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_dsc@dsc-basic.html
* igt@kms_dsc@dsc-fractional-bpp:
- shard-bmg: [SKIP][478] ([Intel XE#2244]) -> [SKIP][479] ([Intel XE#2136]) +2 other tests skip
[478]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_dsc@dsc-fractional-bpp.html
[479]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_dsc@dsc-fractional-bpp.html
* igt@kms_dsc@dsc-with-bpc-formats:
- shard-dg2-set2: [SKIP][480] ([Intel XE#455]) -> [SKIP][481] ([Intel XE#2136] / [Intel XE#2351]) +1 other test skip
[480]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_dsc@dsc-with-bpc-formats.html
[481]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_dsc@dsc-with-bpc-formats.html
* igt@kms_dsc@dsc-with-formats:
- shard-dg2-set2: [SKIP][482] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][483] ([Intel XE#455]) +1 other test skip
[482]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_dsc@dsc-with-formats.html
[483]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_dsc@dsc-with-formats.html
* igt@kms_fbcon_fbt@fbc:
- shard-bmg: [SKIP][484] ([Intel XE#2136]) -> [FAIL][485] ([Intel XE#1695])
[484]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_fbcon_fbt@fbc.html
[485]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_fbcon_fbt@fbc.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-bmg: [FAIL][486] ([Intel XE#1695]) -> [SKIP][487] ([Intel XE#2136])
[486]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_fbcon_fbt@fbc-suspend.html
[487]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_fbcon_fbt@psr-suspend:
- shard-bmg: [SKIP][488] ([Intel XE#776]) -> [SKIP][489] ([Intel XE#2136])
[488]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_fbcon_fbt@psr-suspend.html
[489]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_fbcon_fbt@psr-suspend.html
- shard-dg2-set2: [SKIP][490] ([Intel XE#2136]) -> [SKIP][491] ([Intel XE#776])
[490]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_fbcon_fbt@psr-suspend.html
[491]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_fbcon_fbt@psr-suspend.html
* igt@kms_feature_discovery@display-3x:
- shard-bmg: [SKIP][492] ([Intel XE#2373]) -> [SKIP][493] ([Intel XE#2423])
[492]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_feature_discovery@display-3x.html
[493]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_feature_discovery@display-3x.html
- shard-dg2-set2: [SKIP][494] ([Intel XE#703]) -> [SKIP][495] ([Intel XE#2423] / [i915#2575])
[494]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_feature_discovery@display-3x.html
[495]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_feature_discovery@display-3x.html
* igt@kms_feature_discovery@display-4x:
- shard-dg2-set2: [SKIP][496] ([Intel XE#2423] / [i915#2575]) -> [SKIP][497] ([Intel XE#1138])
[496]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_feature_discovery@display-4x.html
[497]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_feature_discovery@display-4x.html
- shard-bmg: [SKIP][498] ([Intel XE#1138]) -> [SKIP][499] ([Intel XE#2423])
[498]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_feature_discovery@display-4x.html
[499]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_feature_discovery@display-4x.html
* igt@kms_feature_discovery@dp-mst:
- shard-bmg: [SKIP][500] ([Intel XE#2375]) -> [SKIP][501] ([Intel XE#2423])
[500]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_feature_discovery@dp-mst.html
[501]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_feature_discovery@dp-mst.html
* igt@kms_flip@2x-flip-vs-expired-vblank:
- shard-bmg: [DMESG-FAIL][502] ([Intel XE#3468]) -> [FAIL][503] ([Intel XE#2882]) +2 other tests fail
[502]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank.html
[503]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank.html
- shard-dg2-set2: [FAIL][504] ([Intel XE#301]) -> [SKIP][505] ([Intel XE#2423] / [i915#2575])
[504]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_flip@2x-flip-vs-expired-vblank.html
[505]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_flip@2x-flip-vs-expired-vblank.html
* igt@kms_flip@2x-flip-vs-expired-vblank-interruptible:
- shard-bmg: [FAIL][506] ([Intel XE#2882]) -> [SKIP][507] ([Intel XE#2423])
[506]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[507]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
- shard-dg2-set2: [FAIL][508] ([Intel XE#301]) -> [SKIP][509] ([Intel XE#2924])
[508]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
[509]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_flip@2x-flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3:
- shard-bmg: [DMESG-WARN][510] ([Intel XE#3468]) -> [FAIL][511] ([Intel XE#2882]) +1 other test fail
[510]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3.html
[511]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_flip@2x-flip-vs-expired-vblank@ab-dp2-hdmi-a3.html
* igt@kms_flip@2x-flip-vs-rmfb:
- shard-bmg: [SKIP][512] ([Intel XE#2423]) -> [SKIP][513] ([Intel XE#2316])
[512]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_flip@2x-flip-vs-rmfb.html
[513]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-rmfb.html
* igt@kms_flip@2x-flip-vs-suspend:
- shard-dg2-set2: [DMESG-FAIL][514] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][515] ([Intel XE#2423] / [i915#2575])
[514]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_flip@2x-flip-vs-suspend.html
[515]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_flip@2x-flip-vs-suspend.html
* igt@kms_flip@2x-plain-flip-fb-recreate-interruptible:
- shard-bmg: [DMESG-WARN][516] ([Intel XE#3468]) -> [SKIP][517] ([Intel XE#2316])
[516]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
[517]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_flip@2x-plain-flip-fb-recreate-interruptible.html
* igt@kms_flip@2x-plain-flip-interruptible:
- shard-bmg: [SKIP][518] ([Intel XE#2316]) -> [SKIP][519] ([Intel XE#2423])
[518]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_flip@2x-plain-flip-interruptible.html
[519]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_flip@2x-plain-flip-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-bmg: [SKIP][520] ([Intel XE#2423]) -> [FAIL][521] ([Intel XE#2882])
[520]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[521]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-bmg: [DMESG-WARN][522] ([Intel XE#3468]) -> [SKIP][523] ([Intel XE#2423]) +2 other tests skip
[522]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_flip@flip-vs-rmfb-interruptible.html
[523]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip@plain-flip-fb-recreate-interruptible:
- shard-bmg: [SKIP][524] ([Intel XE#2423]) -> [DMESG-FAIL][525] ([Intel XE#3468])
[524]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
[525]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_flip@plain-flip-fb-recreate-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling:
- shard-bmg: [SKIP][526] ([Intel XE#2293] / [Intel XE#2380]) -> [SKIP][527] ([Intel XE#2136]) +6 other tests skip
[526]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
[527]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-upscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-dg2-set2: [SKIP][528] ([Intel XE#2136]) -> [SKIP][529] ([Intel XE#455]) +2 other tests skip
[528]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
[529]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling:
- shard-dg2-set2: [SKIP][530] ([Intel XE#455]) -> [SKIP][531] ([Intel XE#2924])
[530]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
[531]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-upscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling:
- shard-dg2-set2: [SKIP][532] ([Intel XE#455]) -> [SKIP][533] ([Intel XE#2136]) +3 other tests skip
[532]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
[533]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling:
- shard-bmg: [SKIP][534] ([Intel XE#2136]) -> [SKIP][535] ([Intel XE#2293] / [Intel XE#2380]) +4 other tests skip
[534]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling.html
[535]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytile-upscaling.html
* igt@kms_flip_tiling@flip-change-tiling:
- shard-bmg: [SKIP][536] ([Intel XE#2136]) -> [INCOMPLETE][537] ([Intel XE#1727] / [Intel XE#3468])
[536]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_flip_tiling@flip-change-tiling.html
[537]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_flip_tiling@flip-change-tiling.html
* igt@kms_force_connector_basic@force-connector-state:
- shard-dg2-set2: [SKIP][538] ([Intel XE#2423] / [i915#2575]) -> [SKIP][539] ([Intel XE#540])
[538]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_force_connector_basic@force-connector-state.html
[539]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_force_connector_basic@force-connector-state.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc:
- shard-dg2-set2: [SKIP][540] ([Intel XE#651]) -> [SKIP][541] ([Intel XE#2136]) +15 other tests skip
[540]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc.html
[541]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render:
- shard-bmg: [SKIP][542] ([Intel XE#2311]) -> [SKIP][543] ([Intel XE#2312]) +4 other tests skip
[542]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
[543]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-cur-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render:
- shard-bmg: [SKIP][544] ([Intel XE#2312]) -> [SKIP][545] ([Intel XE#2136]) +4 other tests skip
[544]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
[545]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
- shard-dg2-set2: [SKIP][546] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][547] ([Intel XE#2924])
[546]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
[547]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-draw-render.html
* igt@kms_frontbuffer_tracking@drrs-slowdraw:
- shard-dg2-set2: [SKIP][548] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][549] ([Intel XE#651]) +4 other tests skip
[548]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-slowdraw.html
[549]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-slowdraw.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [FAIL][550] ([Intel XE#2333]) -> [DMESG-FAIL][551] ([Intel XE#3468]) +2 other tests dmesg-fail
[550]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html
[551]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][552] ([Intel XE#2312]) -> [FAIL][553] ([Intel XE#2333]) +1 other test fail
[552]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
[553]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt:
- shard-bmg: [DMESG-FAIL][554] ([Intel XE#3468]) -> [FAIL][555] ([Intel XE#2333]) +4 other tests fail
[554]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
[555]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-pri-shrfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt:
- shard-bmg: [FAIL][556] ([Intel XE#2333]) -> [SKIP][557] ([Intel XE#2136]) +18 other tests skip
[556]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
[557]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-shrfb-pgflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt:
- shard-bmg: [DMESG-FAIL][558] ([Intel XE#3468]) -> [SKIP][559] ([Intel XE#2312])
[558]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html
[559]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
- shard-bmg: [SKIP][560] ([Intel XE#2136]) -> [FAIL][561] ([Intel XE#2333]) +6 other tests fail
[560]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
[561]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbc-tiling-y:
- shard-bmg: [SKIP][562] ([Intel XE#2136]) -> [SKIP][563] ([Intel XE#2352])
[562]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
[563]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt:
- shard-bmg: [SKIP][564] ([Intel XE#2312]) -> [SKIP][565] ([Intel XE#2311]) +5 other tests skip
[564]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html
[565]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff:
- shard-adlp: [SKIP][566] ([Intel XE#656]) -> [TIMEOUT][567] ([Intel XE#1033] / [Intel XE#1727])
[566]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff.html
[567]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-9/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-spr-indfb-onoff.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render:
- shard-bmg: [SKIP][568] ([Intel XE#2311]) -> [SKIP][569] ([Intel XE#2136]) +38 other tests skip
[568]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
[569]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][570] ([Intel XE#2136]) -> [SKIP][571] ([Intel XE#2311]) +29 other tests skip
[570]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt.html
[571]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcdrrs-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc:
- shard-dg2-set2: [SKIP][572] ([Intel XE#651]) -> [SKIP][573] ([Intel XE#2136] / [Intel XE#2351]) +17 other tests skip
[572]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
[573]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_frontbuffer_tracking@fbcdrrs-rgb101010-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary:
- shard-dg2-set2: [SKIP][574] ([Intel XE#2136]) -> [SKIP][575] ([Intel XE#651]) +20 other tests skip
[574]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html
[575]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y:
- shard-dg2-set2: [SKIP][576] ([Intel XE#658]) -> [SKIP][577] ([Intel XE#2136] / [Intel XE#2351])
[576]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
[577]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcdrrs-tiling-y.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt:
- shard-dg2-set2: [SKIP][578] ([Intel XE#653]) -> [SKIP][579] ([Intel XE#2136]) +25 other tests skip
[578]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
[579]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][580] ([Intel XE#2312]) -> [SKIP][581] ([Intel XE#2313]) +6 other tests skip
[580]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
[581]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte:
- shard-bmg: [FAIL][582] ([Intel XE#2333]) -> [INCOMPLETE][583] ([Intel XE#1727] / [Intel XE#2050] / [Intel XE#3468])
[582]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
[583]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_frontbuffer_tracking@pipe-fbc-rte.html
* igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-dp-2:
- shard-bmg: [FAIL][584] ([Intel XE#2333]) -> [INCOMPLETE][585] ([Intel XE#1727] / [Intel XE#3468])
[584]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-dp-2.html
[585]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@kms_frontbuffer_tracking@pipe-fbc-rte@pipe-b-dp-2.html
* igt@kms_frontbuffer_tracking@plane-fbc-rte:
- shard-bmg: [SKIP][586] ([Intel XE#2350]) -> [SKIP][587] ([Intel XE#2136])
[586]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
[587]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_frontbuffer_tracking@plane-fbc-rte.html
* igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt:
- shard-bmg: [SKIP][588] ([Intel XE#2136]) -> [SKIP][589] ([Intel XE#2313]) +23 other tests skip
[588]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html
[589]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-1p-offscren-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff:
- shard-dg2-set2: [SKIP][590] ([Intel XE#653]) -> [SKIP][591] ([Intel XE#2924])
[590]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff.html
[591]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-1p-primscrn-cur-indfb-onoff.html
* igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move:
- shard-dg2-set2: [SKIP][592] ([Intel XE#2136]) -> [SKIP][593] ([Intel XE#653]) +14 other tests skip
[592]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
[593]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_frontbuffer_tracking@psr-1p-primscrn-spr-indfb-move.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt:
- shard-bmg: [SKIP][594] ([Intel XE#2313]) -> [SKIP][595] ([Intel XE#2312]) +4 other tests skip
[594]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
[595]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
- shard-dg2-set2: [SKIP][596] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][597] ([Intel XE#653]) +2 other tests skip
[596]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
[597]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
- shard-dg2-set2: [SKIP][598] ([Intel XE#653]) -> [SKIP][599] ([Intel XE#2136] / [Intel XE#2351]) +11 other tests skip
[598]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
[599]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt:
- shard-bmg: [SKIP][600] ([Intel XE#2136]) -> [SKIP][601] ([Intel XE#2312]) +3 other tests skip
[600]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html
[601]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-shrfb-msflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][602] ([Intel XE#2313]) -> [SKIP][603] ([Intel XE#2136]) +34 other tests skip
[602]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[603]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_getfb@getfb-reject-ccs:
- shard-bmg: [SKIP][604] ([Intel XE#2502]) -> [SKIP][605] ([Intel XE#2423])
[604]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_getfb@getfb-reject-ccs.html
[605]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_getfb@getfb-reject-ccs.html
- shard-dg2-set2: [SKIP][606] ([Intel XE#605]) -> [SKIP][607] ([Intel XE#2423] / [i915#2575])
[606]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_getfb@getfb-reject-ccs.html
[607]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_getfb@getfb-reject-ccs.html
* igt@kms_getfb@getfb-repeated-different-handles:
- shard-dg2-set2: [SKIP][608] ([Intel XE#2423] / [i915#2575]) -> [SKIP][609] ([Intel XE#687])
[608]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_getfb@getfb-repeated-different-handles.html
[609]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_getfb@getfb-repeated-different-handles.html
* igt@kms_getfb@getfb2-accept-ccs:
- shard-bmg: [SKIP][610] ([Intel XE#2340]) -> [SKIP][611] ([Intel XE#2423])
[610]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_getfb@getfb2-accept-ccs.html
[611]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_getfb@getfb2-accept-ccs.html
* igt@kms_hdr@bpc-switch-suspend:
- shard-bmg: [DMESG-FAIL][612] ([Intel XE#2705] / [Intel XE#3468]) -> [SKIP][613] ([Intel XE#2423])
[612]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_hdr@bpc-switch-suspend.html
[613]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_hdr@bpc-switch-suspend.html
* igt@kms_hdr@brightness-with-hdr:
- shard-bmg: [SKIP][614] ([Intel XE#3544]) -> [SKIP][615] ([Intel XE#2423])
[614]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_hdr@brightness-with-hdr.html
[615]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
* igt@kms_joiner@invalid-modeset-force-ultra-joiner:
- shard-bmg: [SKIP][616] ([Intel XE#2934]) -> [SKIP][617] ([Intel XE#2136])
[616]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
[617]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_joiner@invalid-modeset-force-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-ultra-joiner:
- shard-bmg: [SKIP][618] ([Intel XE#2136]) -> [SKIP][619] ([Intel XE#2927])
[618]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_joiner@invalid-modeset-ultra-joiner.html
[619]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@kms_joiner@invalid-modeset-ultra-joiner.html
* igt@kms_lease@possible-crtcs-filtering:
- shard-bmg: [SKIP][620] ([Intel XE#2423]) -> [DMESG-WARN][621] ([Intel XE#1727]) +1 other test dmesg-warn
[620]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_lease@possible-crtcs-filtering.html
[621]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@kms_lease@possible-crtcs-filtering.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-bmg: [SKIP][622] ([Intel XE#2501]) -> [SKIP][623] ([Intel XE#2423])
[622]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
[623]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_pipe_crc_basic@nonblocking-crc:
- shard-bmg: [SKIP][624] ([Intel XE#2423]) -> [DMESG-WARN][625] ([Intel XE#3468]) +1 other test dmesg-warn
[624]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_pipe_crc_basic@nonblocking-crc.html
[625]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_pipe_crc_basic@nonblocking-crc.html
* igt@kms_plane@pixel-format-source-clamping:
- shard-bmg: [INCOMPLETE][626] ([Intel XE#1035] / [Intel XE#2566] / [Intel XE#3468]) -> [SKIP][627] ([Intel XE#2423])
[626]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_plane@pixel-format-source-clamping.html
[627]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_plane@pixel-format-source-clamping.html
* igt@kms_plane_multiple@tiling-yf:
- shard-bmg: [SKIP][628] ([Intel XE#2423]) -> [SKIP][629] ([Intel XE#2493])
[628]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_plane_multiple@tiling-yf.html
[629]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_plane_multiple@tiling-yf.html
* igt@kms_plane_scaling@intel-max-src-size:
- shard-bmg: [DMESG-WARN][630] ([Intel XE#3468]) -> [SKIP][631] ([Intel XE#2685] / [Intel XE#3307])
[630]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_plane_scaling@intel-max-src-size.html
[631]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_plane_scaling@intel-max-src-size.html
- shard-dg2-set2: [FAIL][632] ([Intel XE#361]) -> [SKIP][633] ([Intel XE#2423] / [i915#2575])
[632]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_plane_scaling@intel-max-src-size.html
[633]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_plane_scaling@intel-max-src-size.html
* igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format:
- shard-bmg: [SKIP][634] ([Intel XE#2763]) -> [SKIP][635] ([Intel XE#2423]) +3 other tests skip
[634]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html
[635]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_plane_scaling@plane-downscale-factor-0-25-with-pixel-format.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling:
- shard-dg2-set2: [SKIP][636] ([Intel XE#2423] / [i915#2575]) -> [SKIP][637] ([Intel XE#2763] / [Intel XE#455]) +3 other tests skip
[636]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
[637]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_plane_scaling@planes-downscale-factor-0-25-unity-scaling.html
* igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25:
- shard-bmg: [SKIP][638] ([Intel XE#2423]) -> [SKIP][639] ([Intel XE#2763])
[638]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html
[639]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_plane_scaling@planes-downscale-factor-0-25-upscale-factor-0-25.html
* igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25:
- shard-dg2-set2: [SKIP][640] ([Intel XE#2763] / [Intel XE#455]) -> [SKIP][641] ([Intel XE#2423] / [i915#2575]) +1 other test skip
[640]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
[641]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_plane_scaling@planes-upscale-20x20-downscale-factor-0-25.html
* igt@kms_pm_backlight@bad-brightness:
- shard-dg2-set2: [SKIP][642] ([Intel XE#870]) -> [SKIP][643] ([Intel XE#2136]) +2 other tests skip
[642]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_pm_backlight@bad-brightness.html
[643]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_pm_backlight@bad-brightness.html
* igt@kms_pm_backlight@brightness-with-dpms:
- shard-dg2-set2: [SKIP][644] ([Intel XE#2938]) -> [SKIP][645] ([Intel XE#2136])
[644]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_pm_backlight@brightness-with-dpms.html
[645]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_pm_backlight@brightness-with-dpms.html
* igt@kms_pm_dc@dc6-dpms:
- shard-bmg: [SKIP][646] ([Intel XE#2136]) -> [FAIL][647] ([Intel XE#1430])
[646]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_pm_dc@dc6-dpms.html
[647]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_pm_dc@dc6-dpms.html
* igt@kms_pm_dc@dc6-psr:
- shard-dg2-set2: [SKIP][648] ([Intel XE#1129]) -> [SKIP][649] ([Intel XE#2136] / [Intel XE#2351])
[648]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_pm_dc@dc6-psr.html
[649]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_dc@dc9-dpms:
- shard-dg2-set2: [SKIP][650] ([Intel XE#2136] / [Intel XE#2351]) -> [DMESG-WARN][651] ([Intel XE#3468])
[650]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_pm_dc@dc9-dpms.html
[651]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_dc@deep-pkgc:
- shard-bmg: [SKIP][652] ([Intel XE#2505]) -> [SKIP][653] ([Intel XE#2136])
[652]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_pm_dc@deep-pkgc.html
[653]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_pm_dc@deep-pkgc.html
* igt@kms_pm_lpsp@kms-lpsp:
- shard-dg2-set2: [SKIP][654] ([Intel XE#2136]) -> [FAIL][655] ([Intel XE#3527])
[654]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_pm_lpsp@kms-lpsp.html
[655]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_pm_lpsp@kms-lpsp.html
- shard-bmg: [SKIP][656] ([Intel XE#2499]) -> [SKIP][657] ([Intel XE#2136])
[656]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@kms_pm_lpsp@kms-lpsp.html
[657]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_pm_lpsp@kms-lpsp.html
* igt@kms_pm_rpm@basic-pci-d3-state:
- shard-dg2-set2: [DMESG-WARN][658] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][659] ([Intel XE#2446])
[658]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_pm_rpm@basic-pci-d3-state.html
[659]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_pm_rpm@basic-pci-d3-state.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-bmg: [SKIP][660] ([Intel XE#2446]) -> [SKIP][661] ([Intel XE#1439])
[660]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[661]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_pm_rpm@dpms-mode-unset-non-lpsp:
- shard-dg2-set2: [DMESG-WARN][662] ([Intel XE#3468]) -> [SKIP][663] ([Intel XE#2446])
[662]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
[663]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_pm_rpm@dpms-mode-unset-non-lpsp.html
* igt@kms_pm_rpm@modeset-lpsp:
- shard-bmg: [SKIP][664] ([Intel XE#1439] / [Intel XE#3141]) -> [SKIP][665] ([Intel XE#2446])
[664]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@kms_pm_rpm@modeset-lpsp.html
[665]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_pm_rpm@modeset-lpsp.html
* igt@kms_pm_rpm@modeset-non-lpsp:
- shard-dg2-set2: [SKIP][666] ([Intel XE#2446]) -> [SKIP][667] ([Intel XE#2924])
[666]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_pm_rpm@modeset-non-lpsp.html
[667]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_pm_rpm@modeset-non-lpsp.html
* igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf:
- shard-bmg: [SKIP][668] ([Intel XE#1489]) -> [SKIP][669] ([Intel XE#2136]) +13 other tests skip
[668]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
[669]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_psr2_sf@fbc-pr-cursor-plane-move-continuous-sf.html
* igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area:
- shard-dg2-set2: [SKIP][670] ([Intel XE#1489]) -> [SKIP][671] ([Intel XE#2924])
[670]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html
[671]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_psr2_sf@fbc-psr2-primary-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@pr-cursor-plane-update-sf:
- shard-dg2-set2: [SKIP][672] ([Intel XE#2136]) -> [SKIP][673] ([Intel XE#1489]) +7 other tests skip
[672]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
[673]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_psr2_sf@pr-cursor-plane-update-sf.html
* igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf:
- shard-dg2-set2: [SKIP][674] ([Intel XE#1489]) -> [SKIP][675] ([Intel XE#2136]) +6 other tests skip
[674]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
[675]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_psr2_sf@pr-overlay-plane-update-continuous-sf.html
* igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area:
- shard-bmg: [SKIP][676] ([Intel XE#2136]) -> [SKIP][677] ([Intel XE#1489]) +7 other tests skip
[676]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
[677]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_psr2_sf@psr2-plane-move-sf-dmg-area.html
* igt@kms_psr2_su@page_flip-p010:
- shard-bmg: [SKIP][678] ([Intel XE#2136]) -> [SKIP][679] ([Intel XE#2387])
[678]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_psr2_su@page_flip-p010.html
[679]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_psr2_su@page_flip-p010.html
* igt@kms_psr@fbc-pr-cursor-blt:
- shard-bmg: [SKIP][680] ([Intel XE#2234] / [Intel XE#2850]) -> [SKIP][681] ([Intel XE#2136]) +21 other tests skip
[680]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_psr@fbc-pr-cursor-blt.html
[681]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_psr@fbc-pr-cursor-blt.html
* igt@kms_psr@fbc-pr-dpms:
- shard-dg2-set2: [SKIP][682] ([Intel XE#2136]) -> [SKIP][683] ([Intel XE#2850] / [Intel XE#929]) +6 other tests skip
[682]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_psr@fbc-pr-dpms.html
[683]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_psr@fbc-pr-dpms.html
* igt@kms_psr@fbc-pr-no-drrs:
- shard-dg2-set2: [SKIP][684] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][685] ([Intel XE#2136] / [Intel XE#2351]) +5 other tests skip
[684]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_psr@fbc-pr-no-drrs.html
[685]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_psr@fbc-pr-no-drrs.html
* igt@kms_psr@fbc-psr2-primary-render:
- shard-dg2-set2: [SKIP][686] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][687] ([Intel XE#2924]) +1 other test skip
[686]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_psr@fbc-psr2-primary-render.html
[687]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_psr@fbc-psr2-primary-render.html
* igt@kms_psr@fbc-psr2-suspend:
- shard-dg2-set2: [SKIP][688] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][689] ([Intel XE#2136]) +7 other tests skip
[688]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_psr@fbc-psr2-suspend.html
[689]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_psr@fbc-psr2-suspend.html
* igt@kms_psr@pr-dpms:
- shard-dg2-set2: [SKIP][690] ([Intel XE#2136] / [Intel XE#2351]) -> [SKIP][691] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip
[690]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@kms_psr@pr-dpms.html
[691]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_psr@pr-dpms.html
* igt@kms_psr@psr2-no-drrs:
- shard-bmg: [SKIP][692] ([Intel XE#2136]) -> [SKIP][693] ([Intel XE#2234] / [Intel XE#2850]) +12 other tests skip
[692]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_psr@psr2-no-drrs.html
[693]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@kms_psr@psr2-no-drrs.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-dg2-set2: [SKIP][694] ([Intel XE#2136]) -> [SKIP][695] ([Intel XE#2939])
[694]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[695]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_rotation_crc@primary-rotation-270:
- shard-dg2-set2: [SKIP][696] ([Intel XE#2423] / [i915#2575]) -> [SKIP][697] ([Intel XE#3414]) +2 other tests skip
[696]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_rotation_crc@primary-rotation-270.html
[697]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_rotation_crc@primary-rotation-270.html
- shard-bmg: [SKIP][698] ([Intel XE#2423]) -> [SKIP][699] ([Intel XE#3414]) +2 other tests skip
[698]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_rotation_crc@primary-rotation-270.html
[699]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_rotation_crc@primary-rotation-270.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
- shard-dg2-set2: [SKIP][700] ([Intel XE#1127]) -> [SKIP][701] ([Intel XE#2423] / [i915#2575])
[700]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
[701]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html
* igt@kms_rotation_crc@primary-y-tiled-reflect-x-180:
- shard-bmg: [SKIP][702] ([Intel XE#2330]) -> [SKIP][703] ([Intel XE#2423])
[702]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
[703]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
- shard-dg2-set2: [SKIP][704] ([Intel XE#2423] / [i915#2575]) -> [SKIP][705] ([Intel XE#1127])
[704]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
[705]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-180.html
* igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90:
- shard-bmg: [SKIP][706] ([Intel XE#3414]) -> [SKIP][707] ([Intel XE#2423]) +2 other tests skip
[706]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
[707]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-90.html
* igt@kms_rotation_crc@sprite-rotation-90-pos-100-0:
- shard-dg2-set2: [SKIP][708] ([Intel XE#3414]) -> [SKIP][709] ([Intel XE#2423] / [i915#2575]) +4 other tests skip
[708]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
[709]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_rotation_crc@sprite-rotation-90-pos-100-0.html
* igt@kms_scaling_modes@scaling-mode-none:
- shard-bmg: [SKIP][710] ([Intel XE#2413]) -> [SKIP][711] ([Intel XE#2423]) +2 other tests skip
[710]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@kms_scaling_modes@scaling-mode-none.html
[711]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_scaling_modes@scaling-mode-none.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-bmg: [SKIP][712] ([Intel XE#2423]) -> [SKIP][713] ([Intel XE#1435])
[712]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_setmode@basic-clone-single-crtc.html
[713]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_setmode@invalid-clone-exclusive-crtc:
- shard-bmg: [SKIP][714] ([Intel XE#1435]) -> [SKIP][715] ([Intel XE#2423]) +1 other test skip
[714]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_setmode@invalid-clone-exclusive-crtc.html
[715]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_setmode@invalid-clone-exclusive-crtc.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-dg2-set2: [FAIL][716] ([Intel XE#1729]) -> [SKIP][717] ([Intel XE#2423] / [i915#2575])
[716]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@kms_tiled_display@basic-test-pattern.html
[717]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_tiled_display@basic-test-pattern.html
* igt@kms_tv_load_detect@load-detect:
- shard-bmg: [SKIP][718] ([Intel XE#2450]) -> [SKIP][719] ([Intel XE#2423])
[718]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@kms_tv_load_detect@load-detect.html
[719]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_tv_load_detect@load-detect.html
* igt@kms_vrr@flip-basic-fastset:
- shard-bmg: [SKIP][720] ([Intel XE#2423]) -> [SKIP][721] ([Intel XE#1499])
[720]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_vrr@flip-basic-fastset.html
[721]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@kms_vrr@flip-basic-fastset.html
* igt@kms_vrr@flip-dpms:
- shard-dg2-set2: [SKIP][722] ([Intel XE#455]) -> [SKIP][723] ([Intel XE#2423] / [i915#2575]) +5 other tests skip
[722]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_vrr@flip-dpms.html
[723]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_vrr@flip-dpms.html
* igt@kms_vrr@flipline:
- shard-dg2-set2: [SKIP][724] ([Intel XE#2423] / [i915#2575]) -> [SKIP][725] ([Intel XE#2924]) +12 other tests skip
[724]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@kms_vrr@flipline.html
[725]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@kms_vrr@flipline.html
* igt@kms_vrr@lobf:
- shard-bmg: [SKIP][726] ([Intel XE#2423]) -> [SKIP][727] ([Intel XE#2168]) +1 other test skip
[726]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@kms_vrr@lobf.html
[727]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@kms_vrr@lobf.html
- shard-dg2-set2: [SKIP][728] ([Intel XE#2168]) -> [SKIP][729] ([Intel XE#2423] / [i915#2575])
[728]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@kms_vrr@lobf.html
[729]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@kms_vrr@lobf.html
* igt@kms_vrr@max-min:
- shard-bmg: [SKIP][730] ([Intel XE#1499]) -> [SKIP][731] ([Intel XE#2423]) +3 other tests skip
[730]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@kms_vrr@max-min.html
[731]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@kms_vrr@max-min.html
* igt@kms_writeback@writeback-check-output:
- shard-dg2-set2: [SKIP][732] ([Intel XE#756]) -> [SKIP][733] ([Intel XE#2423] / [i915#2575])
[732]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@kms_writeback@writeback-check-output.html
[733]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@kms_writeback@writeback-check-output.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-bmg: [SKIP][734] ([Intel XE#1091] / [Intel XE#2849]) -> [SKIP][735] ([Intel XE#2423])
[734]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@sriov_basic@enable-vfs-autoprobe-off.html
[735]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_ccs@suspend-resume:
- shard-dg2-set2: [SKIP][736] ([Intel XE#1130]) -> [DMESG-FAIL][737] ([Intel XE#1727] / [Intel XE#3468])
[736]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@xe_ccs@suspend-resume.html
[737]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_ccs@suspend-resume.html
* igt@xe_compute_preempt@compute-preempt:
- shard-dg2-set2: [SKIP][738] ([Intel XE#1280] / [Intel XE#455]) -> [SKIP][739] ([Intel XE#1130]) +1 other test skip
[738]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@xe_compute_preempt@compute-preempt.html
[739]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_copy_basic@mem-set-linear-0xfd:
- shard-dg2-set2: [SKIP][740] ([Intel XE#1130]) -> [SKIP][741] ([Intel XE#1126]) +1 other test skip
[740]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_copy_basic@mem-set-linear-0xfd.html
[741]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@xe_copy_basic@mem-set-linear-0xfd.html
* igt@xe_create@multigpu-create-massive-size:
- shard-dg2-set2: [SKIP][742] ([Intel XE#1130]) -> [SKIP][743] ([Intel XE#944]) +3 other tests skip
[742]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_create@multigpu-create-massive-size.html
[743]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_create@multigpu-create-massive-size.html
- shard-bmg: [SKIP][744] ([Intel XE#2504]) -> [SKIP][745] ([Intel XE#1130])
[744]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@xe_create@multigpu-create-massive-size.html
[745]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_create@multigpu-create-massive-size.html
* igt@xe_drm_fdinfo@utilization-single-idle:
- shard-bmg: [SKIP][746] ([Intel XE#1130]) -> [DMESG-WARN][747] ([Intel XE#3468]) +2 other tests dmesg-warn
[746]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_drm_fdinfo@utilization-single-idle.html
[747]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@xe_drm_fdinfo@utilization-single-idle.html
* igt@xe_eudebug@basic-close:
- shard-dg2-set2: [SKIP][748] ([Intel XE#2905]) -> [SKIP][749] ([Intel XE#1130]) +12 other tests skip
[748]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@xe_eudebug@basic-close.html
[749]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_eudebug@basic-close.html
* igt@xe_eudebug@basic-vm-bind-metadata-discovery:
- shard-bmg: [SKIP][750] ([Intel XE#1130]) -> [SKIP][751] ([Intel XE#2905]) +14 other tests skip
[750]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
[751]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@xe_eudebug@basic-vm-bind-metadata-discovery.html
* igt@xe_eudebug@vma-ufence:
- shard-bmg: [SKIP][752] ([Intel XE#2905]) -> [SKIP][753] ([Intel XE#1130]) +14 other tests skip
[752]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@xe_eudebug@vma-ufence.html
[753]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_eudebug@vma-ufence.html
* igt@xe_eudebug_online@basic-breakpoint:
- shard-dg2-set2: [SKIP][754] ([Intel XE#1130]) -> [SKIP][755] ([Intel XE#2905]) +8 other tests skip
[754]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@xe_eudebug_online@basic-breakpoint.html
[755]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-463/igt@xe_eudebug_online@basic-breakpoint.html
* igt@xe_evict@evict-beng-large-multi-vm-cm:
- shard-bmg: [FAIL][756] ([Intel XE#2364]) -> [SKIP][757] ([Intel XE#1130])
[756]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@xe_evict@evict-beng-large-multi-vm-cm.html
[757]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_evict@evict-beng-large-multi-vm-cm.html
* igt@xe_evict@evict-large-multi-vm-cm:
- shard-dg2-set2: [FAIL][758] ([Intel XE#1600]) -> [SKIP][759] ([Intel XE#1130])
[758]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@xe_evict@evict-large-multi-vm-cm.html
[759]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_evict@evict-large-multi-vm-cm.html
- shard-bmg: [SKIP][760] ([Intel XE#1130]) -> [FAIL][761] ([Intel XE#2364])
[760]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_evict@evict-large-multi-vm-cm.html
[761]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@xe_evict@evict-large-multi-vm-cm.html
* igt@xe_exec_balancer@twice-parallel-rebind:
- shard-dg2-set2: [SKIP][762] ([Intel XE#1130]) -> [DMESG-WARN][763] ([Intel XE#1727])
[762]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@xe_exec_balancer@twice-parallel-rebind.html
[763]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_exec_balancer@twice-parallel-rebind.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr:
- shard-bmg: [SKIP][764] ([Intel XE#1130]) -> [SKIP][765] ([Intel XE#2322]) +6 other tests skip
[764]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
[765]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-7/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue-userptr.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate:
- shard-bmg: [SKIP][766] ([Intel XE#2322]) -> [SKIP][767] ([Intel XE#1130]) +12 other tests skip
[766]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html
[767]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate.html
* igt@xe_exec_compute_mode@once-bindexecqueue:
- shard-bmg: [SKIP][768] ([Intel XE#1130]) -> [DMESG-WARN][769] ([Intel XE#1727])
[768]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_exec_compute_mode@once-bindexecqueue.html
[769]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@xe_exec_compute_mode@once-bindexecqueue.html
* igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate:
- shard-bmg: [DMESG-WARN][770] ([Intel XE#1727]) -> [SKIP][771] ([Intel XE#1130])
[770]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate.html
[771]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_exec_fault_mode@many-execqueues-userptr-invalidate.html
* igt@xe_exec_fault_mode@once-userptr-imm:
- shard-dg2-set2: [SKIP][772] ([Intel XE#1130]) -> [SKIP][773] ([Intel XE#288]) +21 other tests skip
[772]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_exec_fault_mode@once-userptr-imm.html
[773]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@xe_exec_fault_mode@once-userptr-imm.html
* igt@xe_exec_fault_mode@twice-userptr-rebind-imm:
- shard-dg2-set2: [SKIP][774] ([Intel XE#288]) -> [SKIP][775] ([Intel XE#1130]) +30 other tests skip
[774]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
[775]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_exec_fault_mode@twice-userptr-rebind-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-dg2-set2: [SKIP][776] ([Intel XE#1130]) -> [SKIP][777] ([Intel XE#2360])
[776]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
[777]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early:
- shard-bmg: [DMESG-WARN][778] ([Intel XE#3467] / [Intel XE#3468]) -> [SKIP][779] ([Intel XE#1130])
[778]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
[779]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_ggtt_init_early.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init:
- shard-dg2-set2: [SKIP][780] ([Intel XE#1130]) -> [DMESG-WARN][781] ([Intel XE#3343])
[780]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
[781]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-463/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init:
- shard-dg2-set2: [DMESG-WARN][782] ([Intel XE#3343]) -> [SKIP][783] ([Intel XE#1130])
[782]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html
[783]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ct_init.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init:
- shard-bmg: [DMESG-WARN][784] ([Intel XE#3467]) -> [SKIP][785] ([Intel XE#1130])
[784]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html
[785]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_fault_injection@inject-fault-probe-function-xe_sriov_init.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early:
- shard-dg2-set2: [SKIP][786] ([Intel XE#1130]) -> [DMESG-WARN][787] ([Intel XE#3467])
[786]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
[787]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_fault_injection@inject-fault-probe-function-xe_tile_init_early.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init:
- shard-bmg: [DMESG-WARN][788] ([Intel XE#3343]) -> [DMESG-WARN][789] ([Intel XE#3343] / [Intel XE#3468])
[788]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
[789]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@xe_fault_injection@inject-fault-probe-function-xe_wopcm_init.html
* igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create:
- shard-bmg: [FAIL][790] ([Intel XE#3499]) -> [DMESG-FAIL][791] ([Intel XE#3467])
[790]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-2/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create.html
[791]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-2/igt@xe_fault_injection@vm-bind-fail-vm_bind_ioctl_ops_create.html
* igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare:
- shard-bmg: [DMESG-FAIL][792] ([Intel XE#3467]) -> [SKIP][793] ([Intel XE#1130])
[792]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-4/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html
[793]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_prepare.html
* igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run:
- shard-bmg: [SKIP][794] ([Intel XE#1130]) -> [FAIL][795] ([Intel XE#3499])
[794]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html
[795]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@xe_fault_injection@vm-bind-fail-xe_pt_update_ops_run.html
* igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc:
- shard-dg2-set2: [DMESG-WARN][796] ([Intel XE#3467]) -> [SKIP][797] ([Intel XE#1130]) +2 other tests skip
[796]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html
[797]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html
- shard-bmg: [DMESG-FAIL][798] ([Intel XE#3467] / [Intel XE#3468]) -> [FAIL][799] ([Intel XE#3499])
[798]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html
[799]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-6/igt@xe_fault_injection@vm-bind-fail-xe_vma_ops_alloc.html
* igt@xe_fault_injection@vm-create-fail-xe_pt_create:
- shard-bmg: [DMESG-WARN][800] ([Intel XE#3467]) -> [DMESG-WARN][801] ([Intel XE#3467] / [Intel XE#3468])
[800]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@xe_fault_injection@vm-create-fail-xe_pt_create.html
[801]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@xe_fault_injection@vm-create-fail-xe_pt_create.html
* igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch:
- shard-bmg: [DMESG-WARN][802] ([Intel XE#3467] / [Intel XE#3468]) -> [DMESG-WARN][803] ([Intel XE#3467]) +1 other test dmesg-warn
[802]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-7/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html
[803]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@xe_fault_injection@vm-create-fail-xe_vm_create_scratch.html
* igt@xe_huc_copy@huc_copy:
- shard-dg2-set2: [SKIP][804] ([Intel XE#255]) -> [SKIP][805] ([Intel XE#1130])
[804]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@xe_huc_copy@huc_copy.html
[805]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_huc_copy@huc_copy.html
* igt@xe_intel_bb@blit-reloc:
- shard-dg2-set2: [INCOMPLETE][806] ([Intel XE#2594]) -> [SKIP][807] ([Intel XE#1130])
[806]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@xe_intel_bb@blit-reloc.html
[807]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_intel_bb@blit-reloc.html
* igt@xe_media_fill@media-fill:
- shard-dg2-set2: [SKIP][808] ([Intel XE#560]) -> [SKIP][809] ([Intel XE#1130])
[808]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@xe_media_fill@media-fill.html
[809]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_media_fill@media-fill.html
* igt@xe_module_load@reload-no-display:
- shard-dg2-set2: [FAIL][810] ([Intel XE#3546]) -> [DMESG-FAIL][811] ([Intel XE#3467])
[810]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_module_load@reload-no-display.html
[811]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_module_load@reload-no-display.html
* igt@xe_oa@map-oa-buffer:
- shard-dg2-set2: [SKIP][812] ([Intel XE#3573]) -> [SKIP][813] ([Intel XE#1130]) +5 other tests skip
[812]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@xe_oa@map-oa-buffer.html
[813]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_oa@map-oa-buffer.html
* igt@xe_oa@non-system-wide-paranoid:
- shard-dg2-set2: [SKIP][814] ([Intel XE#1130]) -> [SKIP][815] ([Intel XE#3573]) +10 other tests skip
[814]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_oa@non-system-wide-paranoid.html
[815]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_oa@non-system-wide-paranoid.html
* igt@xe_oa@unprivileged-single-ctx-counters:
- shard-bmg: [SKIP][816] ([Intel XE#1130]) -> [SKIP][817] ([Intel XE#2248])
[816]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_oa@unprivileged-single-ctx-counters.html
[817]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@xe_oa@unprivileged-single-ctx-counters.html
* igt@xe_pat@display-vs-wb-transient:
- shard-dg2-set2: [SKIP][818] ([Intel XE#1337]) -> [SKIP][819] ([Intel XE#1130])
[818]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@xe_pat@display-vs-wb-transient.html
[819]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_pat@display-vs-wb-transient.html
* igt@xe_pat@pat-index-xehpc:
- shard-bmg: [SKIP][820] ([Intel XE#1420]) -> [SKIP][821] ([Intel XE#1130])
[820]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-3/igt@xe_pat@pat-index-xehpc.html
[821]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_pat@pat-index-xehpc.html
* igt@xe_pm@d3cold-basic:
- shard-bmg: [SKIP][822] ([Intel XE#1130]) -> [SKIP][823] ([Intel XE#2284])
[822]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_pm@d3cold-basic.html
[823]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-4/igt@xe_pm@d3cold-basic.html
* igt@xe_pm@d3cold-basic-exec:
- shard-dg2-set2: [SKIP][824] ([Intel XE#1130]) -> [SKIP][825] ([Intel XE#2284] / [Intel XE#366]) +3 other tests skip
[824]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@xe_pm@d3cold-basic-exec.html
[825]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_pm@d3cold-basic-exec.html
* igt@xe_pm@d3hot-multiple-execs:
- shard-dg2-set2: [DMESG-WARN][826] ([Intel XE#1727] / [Intel XE#3468]) -> [DMESG-WARN][827] ([Intel XE#3468])
[826]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@xe_pm@d3hot-multiple-execs.html
[827]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_pm@d3hot-multiple-execs.html
- shard-bmg: [DMESG-WARN][828] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][829] ([Intel XE#1130])
[828]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@xe_pm@d3hot-multiple-execs.html
[829]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_pm@d3hot-multiple-execs.html
* igt@xe_pm@s2idle-basic-exec:
- shard-dg2-set2: [SKIP][830] ([Intel XE#1130]) -> [DMESG-WARN][831] ([Intel XE#1727] / [Intel XE#3468])
[830]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-434/igt@xe_pm@s2idle-basic-exec.html
[831]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@xe_pm@s2idle-basic-exec.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-dg2-set2: [DMESG-WARN][832] ([Intel XE#1727] / [Intel XE#3468]) -> [SKIP][833] ([Intel XE#1130])
[832]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@xe_pm@s2idle-vm-bind-unbind-all.html
[833]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-466/igt@xe_pm@s2idle-vm-bind-unbind-all.html
* igt@xe_pm@s3-exec-after:
- shard-bmg: [SKIP][834] ([Intel XE#1130]) -> [DMESG-WARN][835] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569])
[834]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_pm@s3-exec-after.html
[835]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-5/igt@xe_pm@s3-exec-after.html
- shard-dg2-set2: [SKIP][836] ([Intel XE#1130]) -> [DMESG-WARN][837] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569])
[836]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_pm@s3-exec-after.html
[837]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-435/igt@xe_pm@s3-exec-after.html
* igt@xe_pm@s3-multiple-execs:
- shard-dg2-set2: [DMESG-WARN][838] ([Intel XE#1727] / [Intel XE#3468] / [Intel XE#569]) -> [SKIP][839] ([Intel XE#1130])
[838]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@xe_pm@s3-multiple-execs.html
[839]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_pm@s3-multiple-execs.html
* igt@xe_pm@s4-d3cold-basic-exec:
- shard-bmg: [SKIP][840] ([Intel XE#2284]) -> [SKIP][841] ([Intel XE#1130])
[840]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-6/igt@xe_pm@s4-d3cold-basic-exec.html
[841]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_pm@s4-d3cold-basic-exec.html
* igt@xe_pm@vram-d3cold-threshold:
- shard-dg2-set2: [SKIP][842] ([Intel XE#579]) -> [SKIP][843] ([Intel XE#1130])
[842]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-435/igt@xe_pm@vram-d3cold-threshold.html
[843]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_pm@vram-d3cold-threshold.html
* igt@xe_pm_residency@toggle-gt-c6:
- shard-bmg: [DMESG-WARN][844] ([Intel XE#3468]) -> [SKIP][845] ([Intel XE#1130]) +5 other tests skip
[844]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@xe_pm_residency@toggle-gt-c6.html
[845]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_pm_residency@toggle-gt-c6.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-bmg: [SKIP][846] ([Intel XE#944]) -> [SKIP][847] ([Intel XE#1130]) +3 other tests skip
[846]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-5/igt@xe_query@multigpu-query-mem-usage.html
[847]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-1/igt@xe_query@multigpu-query-mem-usage.html
* igt@xe_query@multigpu-query-topology-l3-bank-mask:
- shard-bmg: [SKIP][848] ([Intel XE#1130]) -> [SKIP][849] ([Intel XE#944]) +2 other tests skip
[848]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-bmg-1/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
[849]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-bmg-3/igt@xe_query@multigpu-query-topology-l3-bank-mask.html
* igt@xe_query@multigpu-query-uc-fw-version-huc:
- shard-dg2-set2: [SKIP][850] ([Intel XE#944]) -> [SKIP][851] ([Intel XE#1130]) +4 other tests skip
[850]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-436/igt@xe_query@multigpu-query-uc-fw-version-huc.html
[851]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_query@multigpu-query-uc-fw-version-huc.html
* igt@xe_sriov_flr@flr-each-isolation:
- shard-dg2-set2: [SKIP][852] ([Intel XE#1130]) -> [SKIP][853] ([Intel XE#3342])
[852]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-466/igt@xe_sriov_flr@flr-each-isolation.html
[853]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-436/igt@xe_sriov_flr@flr-each-isolation.html
* igt@xe_vm@mixed-userptr-binds-1611661312:
- shard-dg2-set2: [DMESG-WARN][854] ([Intel XE#1727]) -> [SKIP][855] ([Intel XE#1130]) +4 other tests skip
[854]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-dg2-463/igt@xe_vm@mixed-userptr-binds-1611661312.html
[855]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-dg2-434/igt@xe_vm@mixed-userptr-binds-1611661312.html
* igt@xe_wedged@basic-wedged:
- shard-adlp: [DMESG-WARN][856] ([Intel XE#2919] / [Intel XE#3086]) -> [DMESG-WARN][857] ([Intel XE#2919])
[856]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e/shard-adlp-3/igt@xe_wedged@basic-wedged.html
[857]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/shard-adlp-6/igt@xe_wedged@basic-wedged.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1033]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1033
[Intel XE#1035]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1035
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
[Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
[Intel XE#1130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1130
[Intel XE#1138]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1138
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1192]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1192
[Intel XE#1231]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1231
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337
[Intel XE#1340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1340
[Intel XE#1358]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1358
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1420]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1420
[Intel XE#1430]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1430
[Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1473]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1473
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1508]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1508
[Intel XE#1600]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1600
[Intel XE#1607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1607
[Intel XE#1616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1616
[Intel XE#1695]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1695
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1794]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1794
[Intel XE#1861]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1861
[Intel XE#1874]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1874
[Intel XE#1885]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1885
[Intel XE#2042]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2042
[Intel XE#2050]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2050
[Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
[Intel XE#2136]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2136
[Intel XE#2141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2141
[Intel XE#2159]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2159
[Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2229]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2229
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2244]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2244
[Intel XE#2248]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2248
[Intel XE#2249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2249
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2325]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2325
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2328]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2328
[Intel XE#2330]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2330
[Intel XE#2333]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2333
[Intel XE#2340]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2340
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2350]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2350
[Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
[Intel XE#2352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2352
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2364]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2364
[Intel XE#2373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2373
[Intel XE#2375]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2375
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2387]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2387
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2413]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2413
[Intel XE#2423]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2423
[Intel XE#2446]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2446
[Intel XE#2450]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2450
[Intel XE#2457]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2457
[Intel XE#2493]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2493
[Intel XE#2499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2499
[Intel XE#2501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2501
[Intel XE#2502]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2502
[Intel XE#2504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2504
[Intel XE#2505]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2505
[Intel XE#2514]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2514
[Intel XE#255]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/255
[Intel XE#2566]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2566
[Intel XE#2594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2594
[Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
[Intel XE#2635]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2635
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2685]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2685
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2715]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2715
[Intel XE#2724]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2724
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#2864]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2864
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2882]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2882
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
[Intel XE#2905]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2905
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2919]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2919
[Intel XE#2924]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2924
[Intel XE#2927]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2927
[Intel XE#2934]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2934
[Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
[Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
[Intel XE#3052]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3052
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#3086]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3086
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3141]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3141
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#3184]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3184
[Intel XE#3212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3212
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#324]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/324
[Intel XE#3249]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3249
[Intel XE#3307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3307
[Intel XE#3339]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3339
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3343]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3343
[Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#3440]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3440
[Intel XE#3451]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3451
[Intel XE#3452]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3452
[Intel XE#3453]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3453
[Intel XE#3467]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3467
[Intel XE#3468]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3468
[Intel XE#3486]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3486
[Intel XE#3499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3499
[Intel XE#3527]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3527
[Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
[Intel XE#3546]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3546
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#361]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/361
[Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#540]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/540
[Intel XE#560]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/560
[Intel XE#569]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/569
[Intel XE#579]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/579
[Intel XE#605]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/605
[Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/658
[Intel XE#687]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/687
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#756]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/756
[Intel XE#776]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/776
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#829]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/829
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#873]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/873
[Intel XE#877]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/877
[Intel XE#886]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/886
[Intel XE#899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/899
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#958]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/958
[i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
Build changes
-------------
* IGT: IGT_8125 -> IGT_8126
* Linux: xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e -> xe-pw-141788v1
IGT_8125: fbfda23ba003aab3454436d95c233dcf5e3bee54 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8126: 8126
xe-2279-7cd4d1589e461d61330ec272c448bc6d1b9da35e: 7cd4d1589e461d61330ec272c448bc6d1b9da35e
xe-pw-141788v1: 141788v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-141788v1/index.html
[-- Attachment #2: Type: text/html, Size: 271979 bytes --]
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [v2 02/25] drm: Add support for 3x3 CTM
2024-11-26 13:27 ` [v2 02/25] drm: Add support for 3x3 CTM Uma Shankar
@ 2024-11-30 9:38 ` Dmitry Baryshkov
2024-12-03 9:03 ` Shankar, Uma
0 siblings, 1 reply; 43+ messages in thread
From: Dmitry Baryshkov @ 2024-11-30 9:38 UTC (permalink / raw)
To: Uma Shankar
Cc: dri-devel, intel-gfx, intel-xe, ville.syrjala, harry.wentland,
pekka.paalanen, sebastian.wick, jadahl, mwen, contact,
naveen1.kumar, Chaitanya Kumar Borah
On Tue, Nov 26, 2024 at 06:57:07PM +0530, Uma Shankar wrote:
> From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>
> Add support for 3x3 Color Transformation Matrices in Color Pipeline.
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
> drivers/gpu/drm/drm_atomic.c | 3 +++
> drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
> drivers/gpu/drm/drm_colorop.c | 29 +++++++++++++++++++++++++++++
> include/drm/drm_colorop.h | 2 ++
> include/uapi/drm/drm_mode.h | 8 ++++++++
> 5 files changed, 45 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 3161e2ab4efc..8a75f4a0637a 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -802,6 +802,9 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
> drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
> drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
> break;
> + case DRM_COLOROP_CTM_3X3:
> + drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
> + break;
> case DRM_COLOROP_CTM_3X4:
> drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
> break;
> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
> index d6c71135f290..ba68358c0ffe 100644
> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> @@ -708,6 +708,9 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop,
> case DRM_COLOROP_CTM_3X4:
> size = sizeof(struct drm_color_ctm_3x4);
> break;
> + case DRM_COLOROP_CTM_3X3:
> + size = sizeof(struct drm_color_ctm);
> + break;
> case DRM_COLOROP_3D_LUT:
> index = state->lut_3d_mode_index;
> if (index >= (state->lut_3d_modes->length / sizeof(struct drm_mode_3dlut_mode)))
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index fd1cd934df48..a427cfc5bbbc 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
> @@ -315,6 +315,35 @@ int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop
> }
> EXPORT_SYMBOL(drm_colorop_ctm_3x4_init);
>
> +/**
> + * drm_colorop_ctm_3x3 - Initialize a DRM_COLOROP_CTM_3X3
Please build with W=1 to trigger kerneldoc warnings. Here the prototype
in the doc comment doesn't match the actual function name.
> + *
> + * @dev: DRM device
> + * @colorop: The drm_colorop object to initialize
> + * @plane: The associated drm_plane
> + * @allow_bypass: true if BYPASS property should be created, false if bypass of
> + * this colorop is not possible
> + * @return zero on success, -E value on failure
> + */
> +int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
> + struct drm_plane *plane, bool allow_bypass)
> +{
> + int ret;
> +
> + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X3, allow_bypass);
> + if (ret)
> + return ret;
> +
> + ret = drm_colorop_create_data_prop(dev, colorop);
> + if (ret)
> + return ret;
> +
> + drm_colorop_reset(colorop);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_colorop_ctm_3x3_init);
> +
> /**
> * drm_colorop_mult_init - Initialize a DRM_COLOROP_MULTIPLIER
> *
> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> index bf5117f30c80..56b51fafebdf 100644
> --- a/include/drm/drm_colorop.h
> +++ b/include/drm/drm_colorop.h
> @@ -377,6 +377,8 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co
> struct drm_plane *plane, uint32_t lut_size,
> enum drm_colorop_lut1d_interpolation_type lut1d_interpolation,
> bool allow_bypass);
> +int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
> + struct drm_plane *plane, bool allow_bypass);
> int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
> struct drm_plane *plane, bool allow_bypass);
> int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 290c2e32f692..a4a7ab689631 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -905,6 +905,14 @@ enum drm_colorop_type {
> */
> DRM_COLOROP_CTM_3X4,
>
> + /**
> + * @DRM_COLOROP_CTM_3X3:
> + *
> + * A 3x3 matrix. Its values are specified via the
> + * &drm_color_ctm struct provided via the DATA property.
> + */
> + DRM_COLOROP_CTM_3X3,
> +
> /**
> * @DRM_COLOROP_MULTIPLIER:
> *
> --
> 2.42.0
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [v2 05/25] drm: Add Color ops capability property
2024-11-26 13:27 ` [v2 05/25] drm: Add Color ops capability property Uma Shankar
@ 2024-11-30 9:43 ` Dmitry Baryshkov
2024-12-03 9:09 ` Shankar, Uma
0 siblings, 1 reply; 43+ messages in thread
From: Dmitry Baryshkov @ 2024-11-30 9:43 UTC (permalink / raw)
To: Uma Shankar
Cc: dri-devel, intel-gfx, intel-xe, ville.syrjala, harry.wentland,
pekka.paalanen, sebastian.wick, jadahl, mwen, contact,
naveen1.kumar
On Tue, Nov 26, 2024 at 06:57:10PM +0530, Uma Shankar wrote:
> Add capability property which a colorop can expose it's
> hardware's abilities. It's a blob property that can be
> filled with respective data structures depending on the
> colorop. The user space is expected to read this property
> and program the colorop accordingly.
If it's a blob, where is its contents documented? Also please point out
the non-IGT userspace implementation that uses the property.
>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> ---
> drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
> include/drm/drm_colorop.h | 12 ++++++++++++
> 2 files changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
> index ba68358c0ffe..46cc7b0df6e8 100644
> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> @@ -780,6 +780,9 @@ drm_atomic_colorop_get_property(struct drm_colorop *colorop,
> *val = state->size;
> } else if (property == colorop->data_property) {
> *val = (state->data) ? state->data->base.id : 0;
> + } else if (property == colorop->hw_caps_property) {
> + *val = state->hw_caps ?
> + state->hw_caps->base.id : 0;
> } else {
> return -EINVAL;
> }
> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> index 56b51fafebdf..58e5b87c6d56 100644
> --- a/include/drm/drm_colorop.h
> +++ b/include/drm/drm_colorop.h
> @@ -146,6 +146,11 @@ struct drm_colorop_state {
> * Number of entries of the custom LUT. This should be read-only.
> */
> uint32_t size;
> + /**
> + * @hw_caps:
> + *
> + */
> + struct drm_property_blob *hw_caps;
>
> /**
> * @lut_3d_modes:
> @@ -297,6 +302,13 @@ struct drm_colorop {
> */
> struct drm_property *curve_1d_type_property;
>
> + /**
> + * @hwlut_caps_property:
> + *
> + * Property to expose hardware lut capbilities.
> + */
> + struct drm_property *hw_caps_property;
> +
> /**
> * @multiplier_property:
> *
> --
> 2.42.0
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [v2 07/25] drm: Add 1D LUT multi-segmented color op
2024-11-26 13:27 ` [v2 07/25] drm: Add 1D LUT multi-segmented color op Uma Shankar
@ 2024-11-30 9:44 ` Dmitry Baryshkov
2024-12-03 9:11 ` Shankar, Uma
0 siblings, 1 reply; 43+ messages in thread
From: Dmitry Baryshkov @ 2024-11-30 9:44 UTC (permalink / raw)
To: Uma Shankar
Cc: dri-devel, intel-gfx, intel-xe, ville.syrjala, harry.wentland,
pekka.paalanen, sebastian.wick, jadahl, mwen, contact,
naveen1.kumar, Chaitanya Kumar Borah
On Tue, Nov 26, 2024 at 06:57:12PM +0530, Uma Shankar wrote:
> From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>
> Add support for color ops that can be programmed
> by 1 dimensional multi segmented Look Up Tables.
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
> drivers/gpu/drm/drm_atomic.c | 4 ++++
> drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
> include/uapi/drm/drm_mode.h | 8 ++++++++
> 3 files changed, 15 insertions(+)
>
> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 8a75f4a0637a..f344d64d42ce 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
> @@ -802,6 +802,10 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
> drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
> drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
> break;
> + case DRM_COLOROP_1D_LUT_MULTSEG:
> + drm_printf(p, "\thw cap blob id=%d\n", state->hw_caps ? state->hw_caps->base.id : 0);
> + drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
> + break;
> case DRM_COLOROP_CTM_3X3:
> drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
> break;
> diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
> index 46cc7b0df6e8..326159bff91c 100644
> --- a/drivers/gpu/drm/drm_atomic_uapi.c
> +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> @@ -720,6 +720,9 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop,
> size = modes[index].lut_stride[0] * modes[index].lut_stride[1] * modes[index].lut_stride[2] *
> sizeof(struct drm_color_lut);
> break;
> + case DRM_COLOROP_1D_LUT_MULTSEG:
> + elem_size = sizeof(struct drm_color_lut_32);
> + break;
> default:
> /* should never get here */
> return -EINVAL;
> diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> index 9ed8b1b1357a..d126a5410eea 100644
> --- a/include/uapi/drm/drm_mode.h
> +++ b/include/uapi/drm/drm_mode.h
> @@ -923,6 +923,14 @@ enum drm_colorop_type {
> */
> DRM_COLOROP_CTM_3X4,
>
> + /**
> + * @DRM_COLOROP_1D_LUT_MULTSEG:
> + *
> + * A 3x4 matrix. Its values are specified via the
> + * &drm_color_ctm_3x4 struct provided via the DATA property.
The comment is incorrect
> + */
> + DRM_COLOROP_1D_LUT_MULTSEG,
> +
> /**
> * @DRM_COLOROP_CTM_3X3:
> *
> --
> 2.42.0
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [v2 09/25] drm: Add helper to initialize segmented 1D LUT
2024-11-26 13:27 ` [v2 09/25] drm: Add helper to initialize segmented 1D LUT Uma Shankar
@ 2024-11-30 9:46 ` Dmitry Baryshkov
2024-12-03 9:14 ` Shankar, Uma
0 siblings, 1 reply; 43+ messages in thread
From: Dmitry Baryshkov @ 2024-11-30 9:46 UTC (permalink / raw)
To: Uma Shankar
Cc: dri-devel, intel-gfx, intel-xe, ville.syrjala, harry.wentland,
pekka.paalanen, sebastian.wick, jadahl, mwen, contact,
naveen1.kumar, Chaitanya Kumar Borah
On Tue, Nov 26, 2024 at 06:57:14PM +0530, Uma Shankar wrote:
> From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
>
> Add helper to initialize 1D segmented LUT
>
> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> ---
> drivers/gpu/drm/drm_colorop.c | 27 ++++++++++++++++++++++++++-
> include/drm/drm_colorop.h | 4 ++++
> 2 files changed, 30 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
> index 111517c08216..871d5660e3b2 100644
> --- a/drivers/gpu/drm/drm_colorop.c
> +++ b/drivers/gpu/drm/drm_colorop.c
> @@ -104,7 +104,6 @@ static int drm_create_colorop_capability_prop(struct drm_device *dev,
> return 0;
> }
>
> -__maybe_unused
Squash all three patches so that you don't have to play with
__maybe_unused. Then please expand commit message to describe the
problem that you are solving.
> static int drm_colorop_lutcaps_init(struct drm_colorop *colorop,
> struct drm_plane *plane,
> const struct drm_color_lut_range *ranges,
> @@ -338,6 +337,32 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co
> }
> EXPORT_SYMBOL(drm_colorop_curve_1d_lut_init);
>
Missing kerneldoc
> +int drm_colorop_curve_1d_lut_multseg_init(struct drm_device *dev, struct drm_colorop *colorop,
> + struct drm_plane *plane,
> + const struct drm_color_lut_range *ranges,
> + size_t length, bool allow_bypass)
> +{
> + int ret;
> +
> + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_1D_LUT_MULTSEG, allow_bypass);
> + if (ret)
> + return ret;
> +
> + ret = drm_colorop_lutcaps_init(colorop, plane, ranges, length);
> + if (ret)
> + return ret;
> +
> + /* data */
> + ret = drm_colorop_create_data_prop(dev, colorop);
> + if (ret)
> + return ret;
> +
> + drm_colorop_reset(colorop);
> +
> + return 0;
> +}
> +EXPORT_SYMBOL(drm_colorop_curve_1d_lut_multseg_init);
> +
> int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
> struct drm_plane *plane, bool allow_bypass)
> {
> diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> index 58e5b87c6d56..9268fffd04f6 100644
> --- a/include/drm/drm_colorop.h
> +++ b/include/drm/drm_colorop.h
> @@ -391,6 +391,10 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co
> bool allow_bypass);
> int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
> struct drm_plane *plane, bool allow_bypass);
> +int drm_colorop_curve_1d_lut_multseg_init(struct drm_device *dev, struct drm_colorop *colorop,
> + struct drm_plane *plane,
> + const struct drm_color_lut_range *ranges,
> + size_t length, bool allow_bypass);
> int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
> struct drm_plane *plane, bool allow_bypass);
> int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
> --
> 2.42.0
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* RE: [v2 02/25] drm: Add support for 3x3 CTM
2024-11-30 9:38 ` Dmitry Baryshkov
@ 2024-12-03 9:03 ` Shankar, Uma
0 siblings, 0 replies; 43+ messages in thread
From: Shankar, Uma @ 2024-12-03 9:03 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com,
harry.wentland@amd.com, pekka.paalanen@haloniitty.fi,
sebastian.wick@redhat.com, jadahl@redhat.com, mwen@igalia.com,
contact@emersion.fr, Kumar, Naveen1, Borah, Chaitanya Kumar
> -----Original Message-----
> From: dri-devel <dri-devel-bounces@lists.freedesktop.org> On Behalf Of Dmitry
> Baryshkov
> Sent: Saturday, November 30, 2024 3:08 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> xe@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> harry.wentland@amd.com; pekka.paalanen@haloniitty.fi;
> sebastian.wick@redhat.com; jadahl@redhat.com; mwen@igalia.com;
> contact@emersion.fr; Kumar, Naveen1 <naveen1.kumar@intel.com>; Borah,
> Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Subject: Re: [v2 02/25] drm: Add support for 3x3 CTM
>
> On Tue, Nov 26, 2024 at 06:57:07PM +0530, Uma Shankar wrote:
> > From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> >
> > Add support for 3x3 Color Transformation Matrices in Color Pipeline.
> >
> > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> > drivers/gpu/drm/drm_atomic.c | 3 +++
> > drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
> > drivers/gpu/drm/drm_colorop.c | 29 +++++++++++++++++++++++++++++
> > include/drm/drm_colorop.h | 2 ++
> > include/uapi/drm/drm_mode.h | 8 ++++++++
> > 5 files changed, 45 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_atomic.c
> > b/drivers/gpu/drm/drm_atomic.c index 3161e2ab4efc..8a75f4a0637a 100644
> > --- a/drivers/gpu/drm/drm_atomic.c
> > +++ b/drivers/gpu/drm/drm_atomic.c
> > @@ -802,6 +802,9 @@ static void drm_atomic_colorop_print_state(struct
> drm_printer *p,
> > drm_printf(p, "\tinterpolation=%s\n",
> drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
> > drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data-
> >base.id : 0);
> > break;
> > + case DRM_COLOROP_CTM_3X3:
> > + drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data-
> >base.id : 0);
> > + break;
> > case DRM_COLOROP_CTM_3X4:
> > drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data-
> >base.id : 0);
> > break;
> > diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
> > b/drivers/gpu/drm/drm_atomic_uapi.c
> > index d6c71135f290..ba68358c0ffe 100644
> > --- a/drivers/gpu/drm/drm_atomic_uapi.c
> > +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> > @@ -708,6 +708,9 @@ static int drm_atomic_color_set_data_property(struct
> drm_colorop *colorop,
> > case DRM_COLOROP_CTM_3X4:
> > size = sizeof(struct drm_color_ctm_3x4);
> > break;
> > + case DRM_COLOROP_CTM_3X3:
> > + size = sizeof(struct drm_color_ctm);
> > + break;
> > case DRM_COLOROP_3D_LUT:
> > index = state->lut_3d_mode_index;
> > if (index >= (state->lut_3d_modes->length / sizeof(struct
> > drm_mode_3dlut_mode))) diff --git a/drivers/gpu/drm/drm_colorop.c
> > b/drivers/gpu/drm/drm_colorop.c index fd1cd934df48..a427cfc5bbbc
> > 100644
> > --- a/drivers/gpu/drm/drm_colorop.c
> > +++ b/drivers/gpu/drm/drm_colorop.c
> > @@ -315,6 +315,35 @@ int drm_colorop_ctm_3x4_init(struct drm_device
> > *dev, struct drm_colorop *colorop }
> > EXPORT_SYMBOL(drm_colorop_ctm_3x4_init);
> >
> > +/**
> > + * drm_colorop_ctm_3x3 - Initialize a DRM_COLOROP_CTM_3X3
>
> Please build with W=1 to trigger kerneldoc warnings. Here the prototype in the
> doc comment doesn't match the actual function name.
Thanks Dmitry for the feedback. Yeah we missed it.
Will fix it in the next version.
Regards,
Uma Shankar
> > + *
> > + * @dev: DRM device
> > + * @colorop: The drm_colorop object to initialize
> > + * @plane: The associated drm_plane
> > + * @allow_bypass: true if BYPASS property should be created, false if bypass of
> > + * this colorop is not possible
> > + * @return zero on success, -E value on failure */ int
> > +drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop
> *colorop,
> > + struct drm_plane *plane, bool allow_bypass) {
> > + int ret;
> > +
> > + ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X3,
> allow_bypass);
> > + if (ret)
> > + return ret;
> > +
> > + ret = drm_colorop_create_data_prop(dev, colorop);
> > + if (ret)
> > + return ret;
> > +
> > + drm_colorop_reset(colorop);
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL(drm_colorop_ctm_3x3_init);
> > +
> > /**
> > * drm_colorop_mult_init - Initialize a DRM_COLOROP_MULTIPLIER
> > *
> > diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> > index bf5117f30c80..56b51fafebdf 100644
> > --- a/include/drm/drm_colorop.h
> > +++ b/include/drm/drm_colorop.h
> > @@ -377,6 +377,8 @@ int drm_colorop_curve_1d_lut_init(struct drm_device
> *dev, struct drm_colorop *co
> > struct drm_plane *plane, uint32_t lut_size,
> > enum drm_colorop_lut1d_interpolation_type
> lut1d_interpolation,
> > bool allow_bypass);
> > +int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop
> *colorop,
> > + struct drm_plane *plane, bool allow_bypass);
> > int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop
> *colorop,
> > struct drm_plane *plane, bool allow_bypass); int
> > drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop
> > *colorop, diff --git a/include/uapi/drm/drm_mode.h
> > b/include/uapi/drm/drm_mode.h index 290c2e32f692..a4a7ab689631 100644
> > --- a/include/uapi/drm/drm_mode.h
> > +++ b/include/uapi/drm/drm_mode.h
> > @@ -905,6 +905,14 @@ enum drm_colorop_type {
> > */
> > DRM_COLOROP_CTM_3X4,
> >
> > + /**
> > + * @DRM_COLOROP_CTM_3X3:
> > + *
> > + * A 3x3 matrix. Its values are specified via the
> > + * &drm_color_ctm struct provided via the DATA property.
> > + */
> > + DRM_COLOROP_CTM_3X3,
> > +
> > /**
> > * @DRM_COLOROP_MULTIPLIER:
> > *
> > --
> > 2.42.0
> >
>
> --
> With best wishes
> Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* RE: [v2 05/25] drm: Add Color ops capability property
2024-11-30 9:43 ` Dmitry Baryshkov
@ 2024-12-03 9:09 ` Shankar, Uma
0 siblings, 0 replies; 43+ messages in thread
From: Shankar, Uma @ 2024-12-03 9:09 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com,
harry.wentland@amd.com, pekka.paalanen@haloniitty.fi,
sebastian.wick@redhat.com, jadahl@redhat.com, mwen@igalia.com,
contact@emersion.fr, Kumar, Naveen1
> -----Original Message-----
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Sent: Saturday, November 30, 2024 3:13 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> xe@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> harry.wentland@amd.com; pekka.paalanen@haloniitty.fi;
> sebastian.wick@redhat.com; jadahl@redhat.com; mwen@igalia.com;
> contact@emersion.fr; Kumar, Naveen1 <naveen1.kumar@intel.com>
> Subject: Re: [v2 05/25] drm: Add Color ops capability property
>
> On Tue, Nov 26, 2024 at 06:57:10PM +0530, Uma Shankar wrote:
> > Add capability property which a colorop can expose it's hardware's
> > abilities. It's a blob property that can be filled with respective
> > data structures depending on the colorop. The user space is expected
> > to read this property and program the colorop accordingly.
>
> If it's a blob, where is its contents documented? Also please point out the non-IGT
> userspace implementation that uses the property.
We tried to describe it in the docs (last patch in the series:
https://patchwork.freedesktop.org/patch/626179/?series=129811&rev=2
Will add more details in the patch here as well to be clear.
Currently for userspace, plan is that weston will implement the color management protocol and
related KMS changes. Pekka and Sebastian are driving the implementation in Weston.
Regards,
Uma Shankar
> >
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > ---
> > drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
> > include/drm/drm_colorop.h | 12 ++++++++++++
> > 2 files changed, 15 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
> > b/drivers/gpu/drm/drm_atomic_uapi.c
> > index ba68358c0ffe..46cc7b0df6e8 100644
> > --- a/drivers/gpu/drm/drm_atomic_uapi.c
> > +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> > @@ -780,6 +780,9 @@ drm_atomic_colorop_get_property(struct drm_colorop
> *colorop,
> > *val = state->size;
> > } else if (property == colorop->data_property) {
> > *val = (state->data) ? state->data->base.id : 0;
> > + } else if (property == colorop->hw_caps_property) {
> > + *val = state->hw_caps ?
> > + state->hw_caps->base.id : 0;
> > } else {
> > return -EINVAL;
> > }
> > diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
> > index 56b51fafebdf..58e5b87c6d56 100644
> > --- a/include/drm/drm_colorop.h
> > +++ b/include/drm/drm_colorop.h
> > @@ -146,6 +146,11 @@ struct drm_colorop_state {
> > * Number of entries of the custom LUT. This should be read-only.
> > */
> > uint32_t size;
> > + /**
> > + * @hw_caps:
> > + *
> > + */
> > + struct drm_property_blob *hw_caps;
> >
> > /**
> > * @lut_3d_modes:
> > @@ -297,6 +302,13 @@ struct drm_colorop {
> > */
> > struct drm_property *curve_1d_type_property;
> >
> > + /**
> > + * @hwlut_caps_property:
> > + *
> > + * Property to expose hardware lut capbilities.
> > + */
> > + struct drm_property *hw_caps_property;
> > +
> > /**
> > * @multiplier_property:
> > *
> > --
> > 2.42.0
> >
>
> --
> With best wishes
> Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* RE: [v2 07/25] drm: Add 1D LUT multi-segmented color op
2024-11-30 9:44 ` Dmitry Baryshkov
@ 2024-12-03 9:11 ` Shankar, Uma
0 siblings, 0 replies; 43+ messages in thread
From: Shankar, Uma @ 2024-12-03 9:11 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com,
harry.wentland@amd.com, pekka.paalanen@haloniitty.fi,
sebastian.wick@redhat.com, jadahl@redhat.com, mwen@igalia.com,
contact@emersion.fr, Kumar, Naveen1, Borah, Chaitanya Kumar
> -----Original Message-----
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Sent: Saturday, November 30, 2024 3:14 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> xe@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> harry.wentland@amd.com; pekka.paalanen@haloniitty.fi;
> sebastian.wick@redhat.com; jadahl@redhat.com; mwen@igalia.com;
> contact@emersion.fr; Kumar, Naveen1 <naveen1.kumar@intel.com>; Borah,
> Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Subject: Re: [v2 07/25] drm: Add 1D LUT multi-segmented color op
>
> On Tue, Nov 26, 2024 at 06:57:12PM +0530, Uma Shankar wrote:
> > From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> >
> > Add support for color ops that can be programmed by 1 dimensional
> > multi segmented Look Up Tables.
> >
> > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> > drivers/gpu/drm/drm_atomic.c | 4 ++++
> > drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
> > include/uapi/drm/drm_mode.h | 8 ++++++++
> > 3 files changed, 15 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/drm_atomic.c
> > b/drivers/gpu/drm/drm_atomic.c index 8a75f4a0637a..f344d64d42ce 100644
> > --- a/drivers/gpu/drm/drm_atomic.c
> > +++ b/drivers/gpu/drm/drm_atomic.c
> > @@ -802,6 +802,10 @@ static void drm_atomic_colorop_print_state(struct
> drm_printer *p,
> > drm_printf(p, "\tinterpolation=%s\n",
> drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
> > drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data-
> >base.id : 0);
> > break;
> > + case DRM_COLOROP_1D_LUT_MULTSEG:
> > + drm_printf(p, "\thw cap blob id=%d\n", state->hw_caps ? state-
> >hw_caps->base.id : 0);
> > + drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data-
> >base.id : 0);
> > + break;
> > case DRM_COLOROP_CTM_3X3:
> > drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data-
> >base.id : 0);
> > break;
> > diff --git a/drivers/gpu/drm/drm_atomic_uapi.c
> > b/drivers/gpu/drm/drm_atomic_uapi.c
> > index 46cc7b0df6e8..326159bff91c 100644
> > --- a/drivers/gpu/drm/drm_atomic_uapi.c
> > +++ b/drivers/gpu/drm/drm_atomic_uapi.c
> > @@ -720,6 +720,9 @@ static int drm_atomic_color_set_data_property(struct
> drm_colorop *colorop,
> > size = modes[index].lut_stride[0] * modes[index].lut_stride[1] *
> modes[index].lut_stride[2] *
> > sizeof(struct drm_color_lut);
> > break;
> > + case DRM_COLOROP_1D_LUT_MULTSEG:
> > + elem_size = sizeof(struct drm_color_lut_32);
> > + break;
> > default:
> > /* should never get here */
> > return -EINVAL;
> > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> > index 9ed8b1b1357a..d126a5410eea 100644
> > --- a/include/uapi/drm/drm_mode.h
> > +++ b/include/uapi/drm/drm_mode.h
> > @@ -923,6 +923,14 @@ enum drm_colorop_type {
> > */
> > DRM_COLOROP_CTM_3X4,
> >
> > + /**
> > + * @DRM_COLOROP_1D_LUT_MULTSEG:
> > + *
> > + * A 3x4 matrix. Its values are specified via the
> > + * &drm_color_ctm_3x4 struct provided via the DATA property.
>
> The comment is incorrect
Thanks Dmitry for spotting, will fix it.
Regards,
Uma Shankar
> > + */
> > + DRM_COLOROP_1D_LUT_MULTSEG,
> > +
> > /**
> > * @DRM_COLOROP_CTM_3X3:
> > *
> > --
> > 2.42.0
> >
>
> --
> With best wishes
> Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* RE: [v2 09/25] drm: Add helper to initialize segmented 1D LUT
2024-11-30 9:46 ` Dmitry Baryshkov
@ 2024-12-03 9:14 ` Shankar, Uma
2024-12-05 23:38 ` Dmitry Baryshkov
0 siblings, 1 reply; 43+ messages in thread
From: Shankar, Uma @ 2024-12-03 9:14 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com,
harry.wentland@amd.com, pekka.paalanen@haloniitty.fi,
sebastian.wick@redhat.com, jadahl@redhat.com, mwen@igalia.com,
contact@emersion.fr, Kumar, Naveen1, Borah, Chaitanya Kumar
> -----Original Message-----
> From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> Sent: Saturday, November 30, 2024 3:17 PM
> To: Shankar, Uma <uma.shankar@intel.com>
> Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> xe@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> harry.wentland@amd.com; pekka.paalanen@haloniitty.fi;
> sebastian.wick@redhat.com; jadahl@redhat.com; mwen@igalia.com;
> contact@emersion.fr; Kumar, Naveen1 <naveen1.kumar@intel.com>; Borah,
> Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> Subject: Re: [v2 09/25] drm: Add helper to initialize segmented 1D LUT
>
> On Tue, Nov 26, 2024 at 06:57:14PM +0530, Uma Shankar wrote:
> > From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> >
> > Add helper to initialize 1D segmented LUT
> >
> > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > ---
> > drivers/gpu/drm/drm_colorop.c | 27 ++++++++++++++++++++++++++-
> > include/drm/drm_colorop.h | 4 ++++
> > 2 files changed, 30 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/drm_colorop.c
> > b/drivers/gpu/drm/drm_colorop.c index 111517c08216..871d5660e3b2
> > 100644
> > --- a/drivers/gpu/drm/drm_colorop.c
> > +++ b/drivers/gpu/drm/drm_colorop.c
> > @@ -104,7 +104,6 @@ static int drm_create_colorop_capability_prop(struct
> drm_device *dev,
> > return 0;
> > }
> >
> > -__maybe_unused
>
> Squash all three patches so that you don't have to play with __maybe_unused.
> Then please expand commit message to describe the problem that you are
> solving.
Idea was to logically separate for ease of review. But we can squash if that looks better.
> > static int drm_colorop_lutcaps_init(struct drm_colorop *colorop,
> > struct drm_plane *plane,
> > const struct drm_color_lut_range *ranges,
> @@ -338,6 +337,32
> > @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct
> > drm_colorop *co } EXPORT_SYMBOL(drm_colorop_curve_1d_lut_init);
> >
>
> Missing kerneldoc
Sure, will update and add it.
Regards,
Uma Shankar
> > +int drm_colorop_curve_1d_lut_multseg_init(struct drm_device *dev, struct
> drm_colorop *colorop,
> > + struct drm_plane *plane,
> > + const struct drm_color_lut_range
> *ranges,
> > + size_t length, bool allow_bypass) {
> > + int ret;
> > +
> > + ret = drm_colorop_init(dev, colorop, plane,
> DRM_COLOROP_1D_LUT_MULTSEG, allow_bypass);
> > + if (ret)
> > + return ret;
> > +
> > + ret = drm_colorop_lutcaps_init(colorop, plane, ranges, length);
> > + if (ret)
> > + return ret;
> > +
> > + /* data */
> > + ret = drm_colorop_create_data_prop(dev, colorop);
> > + if (ret)
> > + return ret;
> > +
> > + drm_colorop_reset(colorop);
> > +
> > + return 0;
> > +}
> > +EXPORT_SYMBOL(drm_colorop_curve_1d_lut_multseg_init);
> > +
> > int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop
> *colorop,
> > struct drm_plane *plane, bool allow_bypass) { diff --
> git
> > a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h index
> > 58e5b87c6d56..9268fffd04f6 100644
> > --- a/include/drm/drm_colorop.h
> > +++ b/include/drm/drm_colorop.h
> > @@ -391,6 +391,10 @@ int drm_colorop_curve_1d_lut_init(struct drm_device
> *dev, struct drm_colorop *co
> > bool allow_bypass);
> > int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop
> *colorop,
> > struct drm_plane *plane, bool allow_bypass);
> > +int drm_colorop_curve_1d_lut_multseg_init(struct drm_device *dev, struct
> drm_colorop *colorop,
> > + struct drm_plane *plane,
> > + const struct drm_color_lut_range
> *ranges,
> > + size_t length, bool allow_bypass);
> > int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop
> *colorop,
> > struct drm_plane *plane, bool allow_bypass); int
> > drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop
> > *colorop,
> > --
> > 2.42.0
> >
>
> --
> With best wishes
> Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
* Re: [v2 09/25] drm: Add helper to initialize segmented 1D LUT
2024-12-03 9:14 ` Shankar, Uma
@ 2024-12-05 23:38 ` Dmitry Baryshkov
0 siblings, 0 replies; 43+ messages in thread
From: Dmitry Baryshkov @ 2024-12-05 23:38 UTC (permalink / raw)
To: Shankar, Uma
Cc: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org, ville.syrjala@linux.intel.com,
harry.wentland@amd.com, pekka.paalanen@haloniitty.fi,
sebastian.wick@redhat.com, jadahl@redhat.com, mwen@igalia.com,
contact@emersion.fr, Kumar, Naveen1, Borah, Chaitanya Kumar
On Tue, Dec 03, 2024 at 09:14:58AM +0000, Shankar, Uma wrote:
>
>
> > -----Original Message-----
> > From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
> > Sent: Saturday, November 30, 2024 3:17 PM
> > To: Shankar, Uma <uma.shankar@intel.com>
> > Cc: dri-devel@lists.freedesktop.org; intel-gfx@lists.freedesktop.org; intel-
> > xe@lists.freedesktop.org; ville.syrjala@linux.intel.com;
> > harry.wentland@amd.com; pekka.paalanen@haloniitty.fi;
> > sebastian.wick@redhat.com; jadahl@redhat.com; mwen@igalia.com;
> > contact@emersion.fr; Kumar, Naveen1 <naveen1.kumar@intel.com>; Borah,
> > Chaitanya Kumar <chaitanya.kumar.borah@intel.com>
> > Subject: Re: [v2 09/25] drm: Add helper to initialize segmented 1D LUT
> >
> > On Tue, Nov 26, 2024 at 06:57:14PM +0530, Uma Shankar wrote:
> > > From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > >
> > > Add helper to initialize 1D segmented LUT
> > >
> > > Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
> > > Signed-off-by: Uma Shankar <uma.shankar@intel.com>
> > > ---
> > > drivers/gpu/drm/drm_colorop.c | 27 ++++++++++++++++++++++++++-
> > > include/drm/drm_colorop.h | 4 ++++
> > > 2 files changed, 30 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/drm_colorop.c
> > > b/drivers/gpu/drm/drm_colorop.c index 111517c08216..871d5660e3b2
> > > 100644
> > > --- a/drivers/gpu/drm/drm_colorop.c
> > > +++ b/drivers/gpu/drm/drm_colorop.c
> > > @@ -104,7 +104,6 @@ static int drm_create_colorop_capability_prop(struct
> > drm_device *dev,
> > > return 0;
> > > }
> > >
> > > -__maybe_unused
> >
> > Squash all three patches so that you don't have to play with __maybe_unused.
> > Then please expand commit message to describe the problem that you are
> > solving.
>
> Idea was to logically separate for ease of review. But we can squash if that looks better.
I think the patches are simple enough, but it's just my 2c.
>
> > > static int drm_colorop_lutcaps_init(struct drm_colorop *colorop,
> > > struct drm_plane *plane,
> > > const struct drm_color_lut_range *ranges,
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 43+ messages in thread
end of thread, other threads:[~2024-12-05 23:39 UTC | newest]
Thread overview: 43+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
2024-11-26 13:27 ` [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
2024-11-26 13:27 ` [v2 02/25] drm: Add support for 3x3 CTM Uma Shankar
2024-11-30 9:38 ` Dmitry Baryshkov
2024-12-03 9:03 ` Shankar, Uma
2024-11-26 13:27 ` [v2 03/25] drm: Add Enhanced LUT precision structure Uma Shankar
2024-11-26 13:27 ` [v2 04/25] drm: Add Color lut range attributes Uma Shankar
2024-11-26 13:27 ` [v2 05/25] drm: Add Color ops capability property Uma Shankar
2024-11-30 9:43 ` Dmitry Baryshkov
2024-12-03 9:09 ` Shankar, Uma
2024-11-26 13:27 ` [v2 06/25] drm: Define helper to create color " Uma Shankar
2024-11-26 13:27 ` [v2 07/25] drm: Add 1D LUT multi-segmented color op Uma Shankar
2024-11-30 9:44 ` Dmitry Baryshkov
2024-12-03 9:11 ` Shankar, Uma
2024-11-26 13:27 ` [v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG Uma Shankar
2024-11-26 13:27 ` [v2 09/25] drm: Add helper to initialize segmented 1D LUT Uma Shankar
2024-11-30 9:46 ` Dmitry Baryshkov
2024-12-03 9:14 ` Shankar, Uma
2024-12-05 23:38 ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 10/25] drm/i915: Add identifiers for intel color blocks Uma Shankar
2024-11-26 13:27 ` [v2 11/25] drm/i915: Add intel_color_op Uma Shankar
2024-11-26 13:27 ` [v2 12/25] drm/i915/color: Add helper to create intel colorop Uma Shankar
2024-11-26 13:27 ` [v2 13/25] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2024-11-26 13:27 ` [v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
2024-11-26 13:27 ` [v2 15/25] drm/i915/color: Add framework to set colorop Uma Shankar
2024-11-26 13:27 ` [v2 16/25] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
2024-11-26 13:27 ` [v2 17/25] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
2024-11-26 13:27 ` [v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
2024-11-26 13:27 ` [v2 19/25] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2024-11-26 13:27 ` [v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2024-11-26 13:27 ` [v2 21/25] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2024-11-26 13:27 ` [v2 22/25] drm/i915/color: Program Pre-CSC registers Uma Shankar
2024-11-26 13:27 ` [v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2024-11-26 13:27 ` [v2 24/25] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2024-11-26 13:27 ` [v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar
2024-11-26 13:27 ` ✓ CI.Patch_applied: success for Plane Color Pipeline support for Intel platforms Patchwork
2024-11-26 13:28 ` ✗ CI.checkpatch: warning " Patchwork
2024-11-26 13:31 ` ✓ CI.KUnit: success " Patchwork
2024-11-26 14:00 ` ✓ CI.Build: " Patchwork
2024-11-26 14:03 ` ✓ CI.Hooks: " Patchwork
2024-11-26 14:04 ` ✗ CI.checksparse: warning " Patchwork
2024-11-26 14:31 ` ✓ Xe.CI.BAT: success " Patchwork
2024-11-26 16:09 ` ✗ Xe.CI.Full: failure " Patchwork
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