From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 01/10] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update
Date: Fri, 13 Dec 2024 08:35:19 +0200 [thread overview]
Message-ID: <20241213063528.2759659-2-jouni.hogander@intel.com> (raw)
In-Reply-To: <20241213063528.2759659-1-jouni.hogander@intel.com>
We are preparing for a change where only frontbuffer flush will use
single full frame bit of a new register (SFF_CTL) available on LunarLake
onwards.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 64c00a8a6850..7ad8adcaea98 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -2381,7 +2381,6 @@ static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,
val |= man_trk_ctl_partial_frame_bit_get(display);
if (full_update) {
- val |= man_trk_ctl_single_full_frame_bit_get(display);
val |= man_trk_ctl_continuos_full_frame(display);
goto exit;
}
--
2.34.1
next prev parent reply other threads:[~2024-12-13 6:35 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-13 6:35 [PATCH 00/10] PSR DSB support Jouni Högander
2024-12-13 6:35 ` Jouni Högander [this message]
2024-12-13 6:35 ` [PATCH 02/10] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2024-12-13 6:35 ` [PATCH 03/10] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2024-12-13 6:35 ` [PATCH 04/10] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2024-12-20 9:36 ` Ville Syrjälä
2024-12-13 6:35 ` [PATCH 05/10] drm/i915/psr: Ensure SFF/CFF bits are not written at their sample point Jouni Högander
2024-12-20 9:34 ` Ville Syrjälä
2024-12-31 9:02 ` Hogander, Jouni
2024-12-13 6:35 ` [PATCH 06/10] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2024-12-13 6:35 ` [PATCH 07/10] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2024-12-13 6:35 ` [PATCH 08/10] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2024-12-13 6:35 ` [PATCH 09/10] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Jouni Högander
2024-12-13 6:35 ` [PATCH 10/10] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2024-12-13 7:48 ` ✓ CI.Patch_applied: success for PSR DSB support Patchwork
2024-12-13 7:48 ` ✗ CI.checkpatch: warning " Patchwork
2024-12-13 7:49 ` ✓ CI.KUnit: success " Patchwork
2024-12-13 8:07 ` ✓ CI.Build: " Patchwork
2024-12-13 8:10 ` ✓ CI.Hooks: " Patchwork
2024-12-13 8:12 ` ✗ CI.checksparse: warning " Patchwork
2024-12-13 9:03 ` ✓ Xe.CI.BAT: success " Patchwork
2024-12-13 13:59 ` ✗ Xe.CI.Full: failure " Patchwork
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