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From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH 05/10] drm/i915/psr: Ensure SFF/CFF bits are not written at their sample point
Date: Fri, 13 Dec 2024 08:35:23 +0200	[thread overview]
Message-ID: <20241213063528.2759659-6-jouni.hogander@intel.com> (raw)
In-Reply-To: <20241213063528.2759659-1-jouni.hogander@intel.com>

Bspec says this for SFF/CFF:

"Hardware samples this bit on the start of every V. Blank Guardband
region. For deterministic behavior, Software should ensure it is not
changing this bit around the sample point."

This can be achieved by using intel_vblank_evade.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index c074de6b6c12..8aa2574ba5c9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -26,6 +26,7 @@
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_damage_helper.h>
 #include <drm/drm_debugfs.h>
+#include <drm/drm_vblank.h>
 
 #include "i915_drv.h"
 #include "i915_reg.h"
@@ -44,6 +45,7 @@
 #include "intel_psr.h"
 #include "intel_psr_regs.h"
 #include "intel_snps_phy.h"
+#include "intel_vblank.h"
 #include "skl_universal_plane.h"
 
 /**
@@ -3114,16 +3116,31 @@ static void intel_psr_configure_full_frame_update(struct intel_dp *intel_dp)
 {
 	struct intel_display *display = to_intel_display(intel_dp);
 	enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
+	struct intel_crtc *crtc = intel_crtc_for_pipe(display, intel_dp->psr.pipe);
+	struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state);
+	struct intel_vblank_evade_ctx evade;
 
 	if (!intel_dp->psr.psr2_sel_fetch_enabled)
 		return;
 
+	intel_vblank_evade_init(crtc_state, crtc_state, &evade);
+
+	drm_crtc_vblank_get(&crtc->base);
+
+	local_irq_disable();
+
+	intel_vblank_evade(&evade);
+
+	drm_crtc_vblank_put(&crtc->base);
+
 	intel_de_write(display,
 		       PSR2_MAN_TRK_CTL(display, cpu_transcoder),
 		       man_trk_ctl_enable_bit_get(display) |
 		       man_trk_ctl_partial_frame_bit_get(display) |
 		       man_trk_ctl_single_full_frame_bit_get(display) |
 		       man_trk_ctl_continuos_full_frame(display));
+
+	local_irq_enable();
 }
 
 static void _psr_invalidate_handle(struct intel_dp *intel_dp)
-- 
2.34.1


  parent reply	other threads:[~2024-12-13  6:35 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-12-13  6:35 [PATCH 00/10] PSR DSB support Jouni Högander
2024-12-13  6:35 ` [PATCH 01/10] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2024-12-13  6:35 ` [PATCH 02/10] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2024-12-13  6:35 ` [PATCH 03/10] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2024-12-13  6:35 ` [PATCH 04/10] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2024-12-20  9:36   ` Ville Syrjälä
2024-12-13  6:35 ` Jouni Högander [this message]
2024-12-20  9:34   ` [PATCH 05/10] drm/i915/psr: Ensure SFF/CFF bits are not written at their sample point Ville Syrjälä
2024-12-31  9:02     ` Hogander, Jouni
2024-12-13  6:35 ` [PATCH 06/10] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2024-12-13  6:35 ` [PATCH 07/10] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2024-12-13  6:35 ` [PATCH 08/10] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2024-12-13  6:35 ` [PATCH 09/10] drm/i915/psr: Remove DSB_SKIP_WAITS_EN chicken bit Jouni Högander
2024-12-13  6:35 ` [PATCH 10/10] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2024-12-13  7:48 ` ✓ CI.Patch_applied: success for PSR DSB support Patchwork
2024-12-13  7:48 ` ✗ CI.checkpatch: warning " Patchwork
2024-12-13  7:49 ` ✓ CI.KUnit: success " Patchwork
2024-12-13  8:07 ` ✓ CI.Build: " Patchwork
2024-12-13  8:10 ` ✓ CI.Hooks: " Patchwork
2024-12-13  8:12 ` ✗ CI.checksparse: warning " Patchwork
2024-12-13  9:03 ` ✓ Xe.CI.BAT: success " Patchwork
2024-12-13 13:59 ` ✗ Xe.CI.Full: failure " Patchwork

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