From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>
Subject: [PATCH v3 08/10] drm/i915/psr: Add intel_psr_is_psr_mode_changing
Date: Thu, 9 Jan 2025 09:31:35 +0200 [thread overview]
Message-ID: <20250109073137.1977494-9-jouni.hogander@intel.com> (raw)
In-Reply-To: <20250109073137.1977494-1-jouni.hogander@intel.com>
Add new interface for checking possible PSR/PR mode change. We need this
information to decide if DSB can be used.
Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
---
drivers/gpu/drm/i915/display/intel_psr.c | 20 ++++++++++++++++++++
drivers/gpu/drm/i915/display/intel_psr.h | 2 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index 1e99329b70a1..90e36e34e0c7 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -225,6 +225,26 @@ bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
intel_encoder_can_psr(encoder);
}
+/**
+ * intel_psr_is_psr_mode_changing - Check if PSR/PR mode is changing
+ * @old_crtc_state: pointer to old intel_crtc_state
+ * @new_crtc_state: pointer to new intel_crtc_state
+ *
+ * This can be used to figure out if PSR/PR mode is changing between old and new
+ * crtc state.
+ *
+ * Returns true if mode is changing, false if mode is not changing.
+ */
+bool intel_psr_is_psr_mode_changing(const struct intel_crtc_state *old_crtc_state,
+ const struct intel_crtc_state *new_crtc_state)
+{
+ return old_crtc_state->has_psr != new_crtc_state->has_psr ||
+ old_crtc_state->has_sel_update != new_crtc_state->has_sel_update ||
+ old_crtc_state->has_panel_replay != new_crtc_state->has_panel_replay ||
+ old_crtc_state->enable_psr2_su_region_et !=
+ new_crtc_state->enable_psr2_su_region_et;
+}
+
static bool psr_global_enabled(struct intel_dp *intel_dp)
{
struct intel_display *display = to_intel_display(intel_dp);
diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h
index fc807817863e..cc6267e87933 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.h
+++ b/drivers/gpu/drm/i915/display/intel_psr.h
@@ -26,6 +26,8 @@ struct intel_plane_state;
(intel_dp)->psr.source_panel_replay_support)
bool intel_encoder_can_psr(struct intel_encoder *encoder);
+bool intel_psr_is_psr_mode_changing(const struct intel_crtc_state *old_crtc_state,
+ const struct intel_crtc_state *new_crtc_state);
bool intel_psr_needs_aux_io_power(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state);
void intel_psr_init_dpcd(struct intel_dp *intel_dp);
--
2.43.0
next prev parent reply other threads:[~2025-01-09 7:32 UTC|newest]
Thread overview: 40+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-09 7:31 [PATCH v3 00/10] PSR DSB support Jouni Högander
2025-01-09 7:31 ` [PATCH v3 01/10] drm/i915/psr: Use PSR2_MAN_TRK_CTL CFF bit only to send full update Jouni Högander
2025-01-15 7:43 ` Manna, Animesh
2025-01-09 7:31 ` [PATCH v3 02/10] drm/i915/psr: Rename psr_force_hw_tracking_exit as intel_psr_force_update Jouni Högander
2025-01-15 7:46 ` Manna, Animesh
2025-01-09 7:31 ` [PATCH v3 03/10] drm/i915/psr: Split setting sff and cff bits away from intel_psr_force_update Jouni Högander
2025-01-15 7:58 ` Manna, Animesh
2025-01-09 7:31 ` [PATCH v3 04/10] drm/i915/psr: Add register definitions for SFF_CTL and CFF_CTL registers Jouni Högander
2025-01-15 8:32 ` Manna, Animesh
2025-01-09 7:31 ` [PATCH v3 05/10] drm/i915/psr: Use SFF_CTL on invalidate/flush for LunarLake onwards Jouni Högander
2025-01-15 8:18 ` Manna, Animesh
2025-01-09 7:31 ` [PATCH v3 06/10] drm/i915/psr: Allow writing PSR2_MAN_TRK_CTL using DSB Jouni Högander
2025-01-16 6:03 ` Manna, Animesh
2025-01-17 19:22 ` Ville Syrjälä
2025-01-20 6:47 ` Hogander, Jouni
2025-01-09 7:31 ` [PATCH v3 07/10] drm/i915/psr: Changes for PSR2_MAN_TRK_CTL handling when DSB is in use Jouni Högander
2025-01-16 6:10 ` Manna, Animesh
2025-01-09 7:31 ` Jouni Högander [this message]
2025-01-16 7:15 ` [PATCH v3 08/10] drm/i915/psr: Add intel_psr_is_psr_mode_changing Manna, Animesh
2025-01-09 7:31 ` [PATCH v3 09/10] drm/i915/display: Don't use DSB if psr mode changing Jouni Högander
2025-01-16 7:19 ` Manna, Animesh
2025-01-09 7:31 ` [PATCH v3 10/10] drm/i915/psr: Allow DSB usage when PSR is enabled Jouni Högander
2025-01-16 7:27 ` Manna, Animesh
2025-01-17 20:20 ` Ville Syrjälä
2025-01-17 23:07 ` Ville Syrjälä
2025-01-20 7:28 ` Hogander, Jouni
2025-01-20 14:39 ` Ville Syrjälä
2025-01-20 15:27 ` Ville Syrjälä
2025-01-21 10:29 ` Hogander, Jouni
2025-01-21 13:57 ` Ville Syrjälä
2025-01-21 15:11 ` Ville Syrjälä
2025-01-22 5:53 ` Hogander, Jouni
2025-01-09 7:46 ` ✓ CI.Patch_applied: success for PSR DSB support (rev3) Patchwork
2025-01-09 7:46 ` ✓ CI.checkpatch: " Patchwork
2025-01-09 7:47 ` ✓ CI.KUnit: " Patchwork
2025-01-09 8:05 ` ✓ CI.Build: " Patchwork
2025-01-09 8:07 ` ✓ CI.Hooks: " Patchwork
2025-01-09 8:09 ` ✗ CI.checksparse: warning " Patchwork
2025-01-09 8:38 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-11 11:27 ` ✗ Xe.CI.Full: failure " Patchwork
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250109073137.1977494-9-jouni.hogander@intel.com \
--to=jouni.hogander@intel.com \
--cc=intel-gfx@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox