From: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
To: intel-xe@lists.freedesktop.org
Cc: kernel-dev@igalia.com, Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
Subject: [CI 0/4] Misc reviewed patches for CI
Date: Fri, 7 Mar 2025 11:13:58 +0000 [thread overview]
Message-ID: <20250307111402.26577-1-tvrtko.ursulin@igalia.com> (raw)
Four already reviewed patches extracted from my ADL-P AuxCCS series, but not
really about that feature, just general cleanups.
Tvrtko Ursulin (4):
drm/xe: Fix MOCS debugfs LNCF readout
drm/xe: Fix ring flush invalidation
drm/xe: Pass flags directly to emit_flush_imm_ggtt
drm/xe: Use correct type width for alignment in fb pinning code
drivers/gpu/drm/xe/display/xe_fb_pin.c | 20 +++++++++---------
drivers/gpu/drm/xe/xe_mocs.c | 4 +++-
drivers/gpu/drm/xe/xe_ring_ops.c | 28 +++++++++++---------------
3 files changed, 25 insertions(+), 27 deletions(-)
--
2.48.0
next reply other threads:[~2025-03-07 11:14 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-07 11:13 Tvrtko Ursulin [this message]
2025-03-07 11:13 ` [PATCH 1/4] drm/xe: Fix MOCS debugfs LNCF readout Tvrtko Ursulin
2025-03-07 11:14 ` [PATCH 2/4] drm/xe: Fix ring flush invalidation Tvrtko Ursulin
2025-03-07 11:14 ` [PATCH 3/4] drm/xe: Pass flags directly to emit_flush_imm_ggtt Tvrtko Ursulin
2025-03-07 12:26 ` Upadhyay, Tejas
2025-03-07 11:14 ` [PATCH 4/4] drm/xe: Use correct type width for alignment in fb pinning code Tvrtko Ursulin
2025-03-07 12:02 ` ✓ CI.Patch_applied: success for Misc reviewed patches for CI Patchwork
2025-03-07 12:03 ` ✓ CI.checkpatch: " Patchwork
2025-03-07 12:04 ` ✓ CI.KUnit: " Patchwork
2025-03-07 12:21 ` ✓ CI.Build: " Patchwork
2025-03-07 12:23 ` ✓ CI.Hooks: " Patchwork
2025-03-07 12:24 ` ✓ CI.checksparse: " Patchwork
2025-03-07 12:46 ` ✓ Xe.CI.BAT: " Patchwork
2025-03-08 6:06 ` ✗ Xe.CI.Full: failure " Patchwork
2025-03-10 15:51 ` [CI 0/4] " Rodrigo Vivi
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