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From: "Jouni Högander" <jouni.hogander@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org
Cc: "Jouni Högander" <jouni.hogander@intel.com>,
	"Ankit Nautiyal" <ankit.k.nautiyal@intel.com>
Subject: [PATCH v4 01/12] drm/panelreplay: Panel Replay capability DPCD register definitions
Date: Wed, 21 May 2025 14:53:08 +0300	[thread overview]
Message-ID: <20250521115319.2380655-2-jouni.hogander@intel.com> (raw)
In-Reply-To: <20250521115319.2380655-1-jouni.hogander@intel.com>

Add new definition for size of Panel Replay DPCD capability registers
area. Rename existing definitions to group capability registers together.

Signed-off-by: Jouni Högander <jouni.hogander@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
 drivers/gpu/drm/i915/display/intel_psr.c |  8 ++++----
 include/drm/display/drm_dp.h             | 12 +++++++-----
 2 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
index cd833b63ea6b..0cfdeff268f9 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -516,7 +516,7 @@ static u8 intel_dp_get_su_capability(struct intel_dp *intel_dp)
 
 	if (intel_dp->psr.sink_panel_replay_su_support)
 		drm_dp_dpcd_readb(&intel_dp->aux,
-				  DP_PANEL_PANEL_REPLAY_CAPABILITY,
+				  DP_PANEL_REPLAY_CAP_CAPABILITY,
 				  &su_capability);
 	else
 		su_capability = intel_dp->psr_dpcd[1];
@@ -528,7 +528,7 @@ static unsigned int
 intel_dp_get_su_x_granularity_offset(struct intel_dp *intel_dp)
 {
 	return intel_dp->psr.sink_panel_replay_su_support ?
-		DP_PANEL_PANEL_REPLAY_X_GRANULARITY :
+		DP_PANEL_REPLAY_CAP_X_GRANULARITY :
 		DP_PSR2_SU_X_GRANULARITY;
 }
 
@@ -536,7 +536,7 @@ static unsigned int
 intel_dp_get_su_y_granularity_offset(struct intel_dp *intel_dp)
 {
 	return intel_dp->psr.sink_panel_replay_su_support ?
-		DP_PANEL_PANEL_REPLAY_Y_GRANULARITY :
+		DP_PANEL_REPLAY_CAP_Y_GRANULARITY :
 		DP_PSR2_SU_Y_GRANULARITY;
 }
 
@@ -676,7 +676,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
 {
 	drm_dp_dpcd_read(&intel_dp->aux, DP_PSR_SUPPORT, intel_dp->psr_dpcd,
 			 sizeof(intel_dp->psr_dpcd));
-	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP,
+	drm_dp_dpcd_readb(&intel_dp->aux, DP_PANEL_REPLAY_CAP_SUPPORT,
 			  &intel_dp->pr_dpcd);
 
 	if (intel_dp->pr_dpcd & DP_PANEL_REPLAY_SUPPORT)
diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
index 3001c0b6e7bb..3371e2edd9e9 100644
--- a/include/drm/display/drm_dp.h
+++ b/include/drm/display/drm_dp.h
@@ -547,16 +547,18 @@
 /* DFP Capability Extension */
 #define DP_DFP_CAPABILITY_EXTENSION_SUPPORT	0x0a3	/* 2.0 */
 
-#define DP_PANEL_REPLAY_CAP				0x0b0  /* DP 2.0 */
+#define DP_PANEL_REPLAY_CAP_SUPPORT			0x0b0  /* DP 2.0 */
 # define DP_PANEL_REPLAY_SUPPORT			(1 << 0)
 # define DP_PANEL_REPLAY_SU_SUPPORT			(1 << 1)
 # define DP_PANEL_REPLAY_EARLY_TRANSPORT_SUPPORT	(1 << 2) /* eDP 1.5 */
 
-#define DP_PANEL_PANEL_REPLAY_CAPABILITY		0xb1
-# define DP_PANEL_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)
+#define DP_PANEL_REPLAY_CAP_SIZE	7
 
-#define DP_PANEL_PANEL_REPLAY_X_GRANULARITY		0xb2
-#define DP_PANEL_PANEL_REPLAY_Y_GRANULARITY		0xb4
+#define DP_PANEL_REPLAY_CAP_CAPABILITY			0xb1
+# define DP_PANEL_REPLAY_SU_GRANULARITY_REQUIRED	(1 << 5)
+
+#define DP_PANEL_REPLAY_CAP_X_GRANULARITY		0xb2
+#define DP_PANEL_REPLAY_CAP_Y_GRANULARITY		0xb4
 
 /* Link Configuration */
 #define	DP_LINK_BW_SET		            0x100
-- 
2.43.0


  reply	other threads:[~2025-05-21 11:53 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-05-21 11:53 [PATCH v4 00/12] Panel Replay + Adaptive sync Jouni Högander
2025-05-21 11:53 ` Jouni Högander [this message]
2025-05-21 11:53 ` [PATCH v4 02/12] drm/dp: Add Panel Replay capability bits from DP2.1 specification Jouni Högander
2025-05-21 12:16   ` Nautiyal, Ankit K
2025-05-21 11:53 ` [PATCH v4 03/12] drm/i915/psr: Read all Panel Replay capability registers from DPCD Jouni Högander
2025-05-21 11:53 ` [PATCH v4 04/12] drm/i915/alpm: Add PR_ALPM_CTL register definitions Jouni Högander
2025-05-21 11:53 ` [PATCH v4 05/12] drm/i915/alpm: Write PR_ALPM_CTL register Jouni Högander
2025-05-21 11:53 ` [PATCH v4 06/12] drm/i915/psr: Add interface to check if AUXLess ALPM is needed by PSR Jouni Högander
2025-05-21 11:53 ` [PATCH v4 07/12] drm/i915/alpm: Add new interface to check if AUXLess ALPM is used Jouni Högander
2025-05-21 11:53 ` [PATCH v4 08/12] drm/i915/alpm: Move port alpm configuration Jouni Högander
2025-05-21 11:53 ` [PATCH v4 09/12] drm/i915/display: Add PHY_CMN1_CONTROL register definitions Jouni Högander
2025-05-21 11:53 ` [PATCH v4 10/12] drm/i915/display: Add function to configure LFPS sending Jouni Högander
2025-05-21 11:53 ` [PATCH v4 11/12] drm/i915/psr: Fix using wrong mask in REG_FIELD_PREP Jouni Högander
2025-05-21 11:53 ` [PATCH v4 12/12] drm/i915/psr: Do not disable Panel Replay in case VRR is enabled Jouni Högander
2025-05-22  5:25 ` [PATCH v4 00/12] Panel Replay + Adaptive sync Hogander, Jouni
2025-05-26 11:43   ` Maarten Lankhorst
2025-05-29  5:33     ` Hogander, Jouni
  -- strict thread matches above, loose matches on Subject: below --
2025-05-26 12:05 Jouni Högander
2025-05-26 12:05 ` [PATCH v4 01/12] drm/panelreplay: Panel Replay capability DPCD register definitions Jouni Högander

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