From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Subject: [PATCH v6 0/9] Add WildCat Lake support
Date: Sat, 14 Jun 2025 01:01:37 +0530 [thread overview]
Message-ID: <20250613193146.3549862-1-dnyaneshwar.bhadane@intel.com> (raw)
Enable Wildcat Lake by adding PCI IDs and add the initial support GT, Media
and Display workarounds.
Dnyaneshwar Bhadane (3):
drm/i915/xe3lpd: Extend DMC load path for display version 30.02
drm/i915/wcl: C10 phy connected to port A and B
drm/i915/xe3lpd: Extend WA 16023981245 for display 30.02
Matt Atwood (2):
drm/i915/xe3lpd: Update bandwidth parameters for display version 30.02
drm/i915: Set max cdclk for display 30.02
Matt Roper (4):
drm/i915/xe3lpd: Add support for display version 30.02
drm/xe/xe3: Add support for graphics IP version 30.03
drm/xe/xe3: Add support for media IP version 30.02
drm/xe: Add Wildcat Lake device IDs to PTL list
.../gpu/drm/i915/display/intel_atomic_plane.c | 3 ++-
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++++++++++-
drivers/gpu/drm/i915/display/intel_cdclk.c | 4 +++-
drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 +++++++-
.../gpu/drm/i915/display/intel_display_device.c | 1 +
drivers/gpu/drm/i915/display/intel_dmc.c | 3 ++-
drivers/gpu/drm/xe/xe_pci.c | 2 ++
drivers/gpu/drm/xe/xe_wa.c | 16 ++++++++++++++++
drivers/gpu/drm/xe/xe_wa_oob.rules | 6 ++++++
include/drm/intel/pciids.h | 4 +++-
10 files changed, 52 insertions(+), 6 deletions(-)
--
2.34.1
next reply other threads:[~2025-06-13 19:31 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 19:31 Dnyaneshwar Bhadane [this message]
2025-06-13 19:31 ` [PATCH v6 1/9] drm/i915/xe3lpd: Add support for display version 30.02 Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 2/9] drm/xe/xe3: Add support for graphics IP version 30.03 Dnyaneshwar Bhadane
2025-06-16 8:36 ` Vivekanandan, Balasubramani
2025-06-13 19:31 ` [PATCH v6 3/9] drm/xe/xe3: Add support for media IP version 30.02 Dnyaneshwar Bhadane
2025-06-16 9:47 ` Vivekanandan, Balasubramani
2025-06-13 19:31 ` [PATCH v6 4/9] drm/i915/xe3lpd: Update bandwidth parameters for display " Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 5/9] drm/i915: Set max cdclk for display 30.02 Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 6/9] drm/xe: Add Wildcat Lake device IDs to PTL list Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 7/9] drm/i915/xe3lpd: Extend DMC load path for display Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 8/9] drm/i915/wcl: C10 phy connected to port A and B Dnyaneshwar Bhadane
2025-06-16 8:38 ` Kandpal, Suraj
2025-06-16 16:01 ` Bhadane, Dnyaneshwar
2025-06-17 5:07 ` Kandpal, Suraj
2025-06-17 5:46 ` Bhadane, Dnyaneshwar
2025-06-17 5:58 ` Kandpal, Suraj
2025-06-13 19:31 ` [PATCH v6 9/9] drm/i915/xe3lpd: Extend WA 16023981245 for display 30.02 Dnyaneshwar Bhadane
2025-06-13 21:07 ` ✓ CI.KUnit: success for Add WildCat Lake support Patchwork
2025-06-13 21:22 ` ✗ CI.checksparse: warning " Patchwork
2025-06-13 21:47 ` ✓ Xe.CI.BAT: success " Patchwork
2025-06-15 20:06 ` ✗ Xe.CI.Full: failure " Patchwork
2025-06-18 6:47 ` Bhadane, Dnyaneshwar
2025-06-18 22:46 ` Matt Roper
-- strict thread matches above, loose matches on Subject: below --
2025-06-13 10:22 [PATCH v6 0/9] " Dnyaneshwar Bhadane
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