From: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Matt Atwood <matthew.s.atwood@intel.com>,
Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>,
Matt Roper <matthew.d.roper@intel.com>
Subject: [PATCH v6 4/9] drm/i915/xe3lpd: Update bandwidth parameters for display version 30.02
Date: Sat, 14 Jun 2025 01:01:41 +0530 [thread overview]
Message-ID: <20250613193146.3549862-5-dnyaneshwar.bhadane@intel.com> (raw)
In-Reply-To: <20250613193146.3549862-1-dnyaneshwar.bhadane@intel.com>
From: Matt Atwood <matthew.s.atwood@intel.com>
Bandwidth parameters for WCL have been updated with respect to
previous display releases. Encode them into xe3lpd_3002_sa_info and use
that new struct.
-v2: Resolve conflict to apply patch.
Bspec: 68859
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/display/intel_bw.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_bw.c b/drivers/gpu/drm/i915/display/intel_bw.c
index 6c2ab2e0dc91..a515241d80db 100644
--- a/drivers/gpu/drm/i915/display/intel_bw.c
+++ b/drivers/gpu/drm/i915/display/intel_bw.c
@@ -420,6 +420,13 @@ static const struct intel_sa_info xe3lpd_sa_info = {
.derating = 10,
};
+static const struct intel_sa_info xe3lpd_3002_sa_info = {
+ .deburst = 32,
+ .deprogbwlimit = 22, /* GB/s */
+ .displayrtids = 256,
+ .derating = 10,
+};
+
static int icl_get_bw_info(struct intel_display *display,
const struct dram_info *dram_info,
const struct intel_sa_info *sa)
@@ -771,7 +778,9 @@ void intel_bw_init_hw(struct intel_display *display)
if (!HAS_DISPLAY(display))
return;
- if (DISPLAY_VER(display) >= 30)
+ if (DISPLAY_VERx100(display) >= 3002)
+ tgl_get_bw_info(display, dram_info, &xe3lpd_3002_sa_info);
+ else if (DISPLAY_VER(display) >= 30)
tgl_get_bw_info(display, dram_info, &xe3lpd_sa_info);
else if (DISPLAY_VERx100(display) >= 1401 && display->platform.dgfx &&
dram_info->type == INTEL_DRAM_GDDR_ECC)
--
2.34.1
next prev parent reply other threads:[~2025-06-13 19:31 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-13 19:31 [PATCH v6 0/9] Add WildCat Lake support Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 1/9] drm/i915/xe3lpd: Add support for display version 30.02 Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 2/9] drm/xe/xe3: Add support for graphics IP version 30.03 Dnyaneshwar Bhadane
2025-06-16 8:36 ` Vivekanandan, Balasubramani
2025-06-13 19:31 ` [PATCH v6 3/9] drm/xe/xe3: Add support for media IP version 30.02 Dnyaneshwar Bhadane
2025-06-16 9:47 ` Vivekanandan, Balasubramani
2025-06-13 19:31 ` Dnyaneshwar Bhadane [this message]
2025-06-13 19:31 ` [PATCH v6 5/9] drm/i915: Set max cdclk for display 30.02 Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 6/9] drm/xe: Add Wildcat Lake device IDs to PTL list Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 7/9] drm/i915/xe3lpd: Extend DMC load path for display Dnyaneshwar Bhadane
2025-06-13 19:31 ` [PATCH v6 8/9] drm/i915/wcl: C10 phy connected to port A and B Dnyaneshwar Bhadane
2025-06-16 8:38 ` Kandpal, Suraj
2025-06-16 16:01 ` Bhadane, Dnyaneshwar
2025-06-17 5:07 ` Kandpal, Suraj
2025-06-17 5:46 ` Bhadane, Dnyaneshwar
2025-06-17 5:58 ` Kandpal, Suraj
2025-06-13 19:31 ` [PATCH v6 9/9] drm/i915/xe3lpd: Extend WA 16023981245 for display 30.02 Dnyaneshwar Bhadane
2025-06-13 21:07 ` ✓ CI.KUnit: success for Add WildCat Lake support Patchwork
2025-06-13 21:22 ` ✗ CI.checksparse: warning " Patchwork
2025-06-13 21:47 ` ✓ Xe.CI.BAT: success " Patchwork
2025-06-15 20:06 ` ✗ Xe.CI.Full: failure " Patchwork
2025-06-18 6:47 ` Bhadane, Dnyaneshwar
2025-06-18 22:46 ` Matt Roper
-- strict thread matches above, loose matches on Subject: below --
2025-06-13 10:22 [PATCH v6 0/9] " Dnyaneshwar Bhadane
2025-06-13 10:22 ` [PATCH v6 4/9] drm/i915/xe3lpd: Update bandwidth parameters for display version 30.02 Dnyaneshwar Bhadane
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