From: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
To: intel-xe@lists.freedesktop.org
Subject: [CI 07/13] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds
Date: Tue, 19 Aug 2025 09:55:28 +0100 [thread overview]
Message-ID: <20250819085537.97902-8-tvrtko.ursulin@igalia.com> (raw)
In-Reply-To: <20250819085537.97902-1-tvrtko.ursulin@igalia.com>
Following from the i915 reference implementation, we add the AuxCCS
invalidation to the indirect context workarounds page.
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@igalia.com>
---
drivers/gpu/drm/xe/xe_lrc.c | 47 +++++++++++++++++++++++++++++++++++++
1 file changed, 47 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c
index 8f6c3ba47882..0b0ecdf09f9f 100644
--- a/drivers/gpu/drm/xe/xe_lrc.c
+++ b/drivers/gpu/drm/xe/xe_lrc.c
@@ -25,6 +25,7 @@
#include "xe_map.h"
#include "xe_memirq.h"
#include "xe_mmio.h"
+#include "xe_ring_ops.h"
#include "xe_sriov.h"
#include "xe_trace_lrc.h"
#include "xe_vm.h"
@@ -75,11 +76,23 @@ lrc_to_xe(struct xe_lrc *lrc)
static bool
gt_engine_needs_indirect_ctx(struct xe_gt *gt, enum xe_engine_class class)
{
+ struct xe_device *xe = gt_to_xe(gt);
+
if (XE_GT_WA(gt, 16010904313) &&
(class == XE_ENGINE_CLASS_RENDER ||
class == XE_ENGINE_CLASS_COMPUTE))
return true;
+ /* AuxCCS invalidation */
+ if (GRAPHICS_VERx100(xe) >= 1200 &&
+ GRAPHICS_VERx100(xe) <= 1210 &&
+ (class == XE_ENGINE_CLASS_RENDER ||
+ class == XE_ENGINE_CLASS_COMPUTE ||
+ class == XE_ENGINE_CLASS_COPY ||
+ class == XE_ENGINE_CLASS_VIDEO_DECODE ||
+ class == XE_ENGINE_CLASS_VIDEO_ENHANCE))
+ return true;
+
return false;
}
@@ -1122,6 +1135,31 @@ static ssize_t setup_invalidate_state_cache_wa(struct xe_lrc *lrc,
return cmd - batch;
}
+static ssize_t setup_invalidate_auxccs_wa(struct xe_lrc *lrc,
+ struct xe_hw_engine *hwe,
+ u32 *batch, size_t max_len)
+{
+ struct xe_gt *gt = lrc->gt;
+ struct xe_device *xe = gt_to_xe(gt);
+ const unsigned int class = hwe->class;
+ u32 *cmd;
+
+ if (GRAPHICS_VERx100(xe) < 1200 || GRAPHICS_VERx100(xe) > 1210 ||
+ !(class == XE_ENGINE_CLASS_RENDER ||
+ class == XE_ENGINE_CLASS_COMPUTE ||
+ class == XE_ENGINE_CLASS_COPY ||
+ class == XE_ENGINE_CLASS_VIDEO_DECODE ||
+ class == XE_ENGINE_CLASS_VIDEO_ENHANCE))
+ return 0;
+
+ if (xe_gt_WARN_ON(gt, max_len < 8))
+ return -ENOSPC;
+
+ cmd = xe_emit_aux_table_inv(hwe, batch);
+
+ return cmd - batch;
+}
+
struct bo_setup {
ssize_t (*setup)(struct xe_lrc *lrc, struct xe_hw_engine *hwe,
u32 *batch, size_t max_size);
@@ -1251,6 +1289,10 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
{
static struct bo_setup rcs_funcs[] = {
{ .setup = setup_timestamp_wa },
+ { .setup = setup_invalidate_auxccs_wa },
+ };
+ static struct bo_setup xcs_funcs[] = {
+ { .setup = setup_invalidate_auxccs_wa },
};
struct bo_setup_state state = {
.lrc = lrc,
@@ -1268,6 +1310,11 @@ setup_indirect_ctx(struct xe_lrc *lrc, struct xe_hw_engine *hwe)
hwe->class == XE_ENGINE_CLASS_COMPUTE) {
state.funcs = rcs_funcs;
state.num_funcs = ARRAY_SIZE(rcs_funcs);
+ } else if (hwe->class == XE_ENGINE_CLASS_COPY ||
+ hwe->class == XE_ENGINE_CLASS_VIDEO_DECODE ||
+ hwe->class == XE_ENGINE_CLASS_VIDEO_ENHANCE) {
+ state.funcs = xcs_funcs;
+ state.num_funcs = ARRAY_SIZE(xcs_funcs);
}
if (xe_gt_WARN_ON(lrc->gt, !state.funcs))
--
2.48.0
next prev parent reply other threads:[~2025-08-19 8:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-19 8:55 [CI 00/13] auxccs late flush Tvrtko Ursulin
2025-08-19 8:55 ` [CI 01/13] drm/xe/xelpg: Flush CCS when flushing caches Tvrtko Ursulin
2025-08-19 8:55 ` [CI 02/13] drm/xe/xelp: Quiesce memory traffic before invalidating auxccs Tvrtko Ursulin
2025-08-19 8:55 ` [CI 03/13] drm/xe/xelp: Support auxccs invalidation on blitter Tvrtko Ursulin
2025-08-19 8:55 ` [CI 04/13] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms Tvrtko Ursulin
2025-08-19 8:55 ` [CI 05/13] drm/xe/xelp: Wait for AuxCCS invalidation to complete Tvrtko Ursulin
2025-08-19 8:55 ` [CI 06/13] drm/xe: Export xe_emit_aux_table_inv Tvrtko Ursulin
2025-08-19 8:55 ` Tvrtko Ursulin [this message]
2025-08-19 8:55 ` [CI 08/13] drm/xe: Flush GGTT writes after populating DPT Tvrtko Ursulin
2025-08-19 8:55 ` [CI 09/13] drm/xe: Handle DPT in system memory Tvrtko Ursulin
2025-08-19 8:55 ` [CI 10/13] drm/xe/display: Add support for AuxCCS Tvrtko Ursulin
2025-08-19 8:55 ` [CI 11/13] drm/xe: Force flush system memory AuxCCS data before scan out Tvrtko Ursulin
2025-08-19 8:55 ` [CI 12/13] late flush Tvrtko Ursulin
2025-08-19 8:55 ` [CI 13/13] drm/i915/display: Expose AuxCCS frame buffer modifiers for Xe Tvrtko Ursulin
2025-08-19 14:16 ` ✗ CI.checkpatch: warning for auxccs late flush Patchwork
2025-08-19 14:17 ` ✓ CI.KUnit: success " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-08-19 14:38 [CI 00/13] " Tvrtko Ursulin
2025-08-19 14:38 ` [CI 07/13] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
2025-08-20 9:18 [CI 00/13] auxccs no stolen Tvrtko Ursulin
2025-08-20 9:19 ` [CI 07/13] drm/xe/xelp: Add AuxCCS invalidation to the indirect context workarounds Tvrtko Ursulin
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